Method and system for improving photoetching alignment precision of backside illuminated CCD (Charge Coupled Device)
By making reverse marks and flip-thinning etching in the forward illumination process of the back-illuminated CCD image sensor, the problem of low lithography alignment accuracy is solved, high-precision lithography alignment is achieved, and the finished product yield and imaging quality are improved.
Patent Information
- Application Number
- CN202510716685.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-30
- Publication Date
- 2025-08-08
AI Technical Summary
The photolithographic alignment accuracy of the back-illuminated CCD image sensor is low, resulting in cell damage and device failure, affecting imaging quality and finished product yield.
In the forward illumination process, the reverse mark is made on the dielectric layer, and then flipped by the lithography machine and thinned and etched in the back illumination process to expose the reverse mark to achieve high-precision lithography machine alignment.
Improves the photolithographic alignment accuracy, thereby reducing cell damage, improving finished product yield and imaging quality.
Smart Images
Figure CN120447313A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of image sensors, and in particular to a method and system for improving the alignment accuracy of back-illuminated CCD lithography. Background Art
[0002] CCDs offer a range of advantages, including low noise, wide dynamic range, low power consumption, and high integration. Compared to front-illuminated CCD image sensors, back-illuminated CCD image sensors feature a shift in light incidence from the front to the back, eliminating light reflection and absorption by the front-side multilayer dielectric film and polysilicon electrode structure. This results in higher quantum efficiency and a wider absorption spectrum. Back-illuminated CCD image sensors are increasingly being used in high-sensitivity cameras for ground reconnaissance, space astronomical exploration, satellite and spacecraft star sensors, scientific research, spectral analysis, and medicine.
[0003] The MTF (Modulation Transfer Function) reflects the camera's response to various spatial frequency components. It is an objective measure of camera imaging quality and describes the camera's ability to capture scene detail. Because back-illuminated CCD image sensors use backside illumination, electrons generated by short-wavelength (300nm-600nm) light cannot be collected promptly and effectively by the corresponding pixels. These electrons diffuse to adjacent pixels, causing electrical crosstalk between them. Simultaneously, incident light also strikes adjacent pixels, generating optical crosstalk. This results in a low MTF for back-illuminated CCD image sensors, resulting in poor image quality and blurred image detail, significantly limiting their applications in aerospace. Back-illuminated CCD image sensors require high backside photolithography processes. However, existing photolithography alignment accuracy is typically greater than 1 micron, which can cause the isolation grooves of back-illuminated CCD image sensors to fall within pixels, causing pixel damage and device failure. Summary of the Invention
[0004] In view of the above problems in the prior art, the present invention proposes a method and system for improving the photolithography alignment accuracy of back-illuminated CCD image sensors, which mainly solves the problem of low photolithography alignment accuracy of current back-illuminated CCD image sensors.
[0005] In order to achieve the above-mentioned and other purposes, the technical solutions adopted by the present invention are as follows.
[0006] The present application provides a method for improving the alignment accuracy of back-illuminated CCD lithography, the method comprising: in a front illumination process, after the dielectric layer of an image sensor unit is completed, forming a reverse mark on the dielectric layer; wherein the reverse mark is obtained by flipping an alignment mark recognizable by a photolithography machine; performing a back illumination process, bonding a carrier to the front side of the image sensor unit, and thinning and etching the back side of the image sensor unit to expose the reverse mark, so as to perform photolithography machine alignment based on the reverse mark.
[0007] In one embodiment of the present application, the step of forming the anti-mark on the dielectric layer includes: etching the dielectric layer to form a first trench; depositing metal in the first trench, and forming the anti-mark by metal etching.
[0008] In one embodiment of the present application, the depth of the first trench is between 700 nm and 900 nm.
[0009] In one embodiment of the present application, the step of bonding the carrier to the front side of the image sensing unit includes: bonding the side of the image sensing unit provided with the reverse mark to the carrier by bonding glue.
[0010] In one embodiment of the present application, the thickness of the bonding adhesive is between 3.3-3.7 microns.
[0011] In one embodiment of the present application, the steps of thinning and etching the back side of the image sensing unit include: thinning the side of the image sensing unit away from the anti-mark so that the thickness of the image sensing unit reaches a target thickness; corroding the thinned image sensing unit to remove the substrate and the transition region; and etching the silicon and silicon dioxide at a position corresponding to the anti-mark so that the anti-mark is exposed.
[0012] In one embodiment of the present application, the thickness of the deposited metal is between 1-2 microns; the thickness of the etched metal is between 1-2 microns.
[0013] In one embodiment of the present application, the target thickness is between 750-770 microns.
[0014] The present application also provides a system for improving the alignment accuracy of back-illuminated CCD lithography, comprising: a first module for making a reverse mark on the dielectric layer of the image sensor unit after the dielectric layer of the image sensor unit is completed under a front illumination process; wherein the reverse mark is obtained by flipping the alignment mark recognizable by the lithography machine; a second module for performing a back-illuminated process, bonding a carrier to the front of the image sensor unit, and thinning and etching the back of the image sensor unit to expose the reverse mark, so as to perform lithography machine alignment based on the reverse mark.
[0015] As described above, the method and system for improving the alignment accuracy of back-illuminated CCD lithography of the present invention have the following beneficial effects.
[0016] This application makes a reverse mark on the front side of the CCD image sensor unit, and then thins and etches the back side to expose the reverse mark from the back side. As a result, the reverse mark on the front side is flipped and becomes an ordinary mark that can be recognized by the photolithography machine. The photolithography machine performs alignment based on the mark, which can effectively improve the alignment accuracy and thus ensure the yield of the finished product. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 Schematic diagram of a flow chart of a method for improving the alignment accuracy of back-illuminated CCD lithography in one embodiment of the present application.
[0018] Figure 2 Schematic diagram comparing the reverse mark and the normal mark in one embodiment of the present application.
[0019] Figure 3 Schematic diagram of the wafer structure after photolithography of the BPSG layer in one embodiment of the present application.
[0020] Figure 4 Schematic diagram of the wafer structure after metal deposition in one embodiment of the present application.
[0021] Figure 5 This is a schematic diagram of the structure after bonding the silicon carrier in one embodiment of the present application.
[0022] Figure 6 This is a schematic diagram of the structure after back thinning in one embodiment of the present application.
[0023] Figure 7 This is a schematic diagram of the structure after the backside photolithography exposes the counter mark in one embodiment of the present application. DETAILED DESCRIPTION
[0024] The following describes the embodiments of the present invention through specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments. The details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other unless they conflict.
[0025] It should be noted that the illustrations provided in the following embodiments are merely schematic illustrations of the basic concept of the present invention. Therefore, the illustrations only show components related to the present invention and are not drawn according to the number, shape, and size of components in actual implementation. In actual implementation, the type, quantity, and proportion of each component may be changed arbitrarily, and the component layout may also be more complex.
[0026] The inventors have discovered that:
[0027] At present, the method to improve back-illuminated image sensors is to use fully depleted devices. Photogenerated electrons can be directly collected by the back-illuminated CCD depletion region without long-distance diffusion, which improves the MTF of the device to a certain extent, but cannot completely isolate optical and electrical crosstalk. Since the back-illuminated CCD is fully depleted under working conditions, there are strict requirements for the surface state control of the back-illuminated CCD. Slight contamination and defects on the surface will lead to an increase in the dark current of the back-illuminated CCD and a decrease in the yield.
[0028] Back-illuminated CCDs use pixel isolation injection and back-side deep trench isolation for electrical and optical isolation. The pixel size of a back-illuminated CCD is generally between 5μm and 15μm. In the horizontal direction between pixels of a front-illuminated CCD, trench resistance is used for shallow isolation with a line width of 1μm. Back-illuminated CCDs perform image isolation injection and deep trench etching and filling in the horizontal and vertical directions of the pixels, which can effectively achieve electrical and optical isolation. The key to achieving pixel isolation lies in the photolithography process of the back-illuminated CCD, which requires the alignment deviation of the back-side photolithography process to be less than 1μm. Currently, there are two main types of back-side alignment technologies used in back-illuminated CCDs. One is to use a double-sided photolithography machine for back-level photolithography with an alignment accuracy of >2μm, and the other is to use infrared alignment with an alignment accuracy of >1μm. This will cause the isolation groove to fall within the pixel. After the silicon in the pixel is etched, the pixel will be damaged and the device will fail.
[0029] In order to improve the MTF of the back-illuminated CCD, structures such as front trench resistance, back isolation injection, and back DTI are used to prevent optical and electrical crosstalk between pixels. This requires a corresponding pixel-level back lithography process. Poor pixel-level alignment accuracy will lead to low full well capacity of the device, increased defects, and device failure. In order to improve the alignment accuracy of the back lithography layer in the back-illuminated CCD process, a reverse mark structure is designed in the front-illuminated CCD process, and the reverse mark coordinate position calibration is performed in the back isolation groove lithography process, thereby realizing a high-precision back lithography process. The following is a collection of specific embodiments to elaborate on the technical solution of this application.
[0030] See also Figure 1 , Figure 1 1 is a flow chart of a method for improving the alignment accuracy of back-illuminated CCD lithography according to an embodiment of the present application. The method according to the embodiment of the present application comprises the following steps:
[0031] Step S100: After the dielectric layer of the image sensor unit is completed under the positive illumination process, a reverse mark is made on the dielectric layer; wherein the reverse mark is obtained by flipping the alignment mark that can be recognized by the photolithography machine. The dielectric layer can be borophosphosilicate glass (BPSG), and the thickness of the BPSG layer can be set between 700nm and 900nm. After the dielectric layer is completed, a stepper lithography machine is used to perform reverse mark lithography on the BPSG layer to obtain Figure 3 The structure shown. The photolithography depth can be determined according to the thickness of the BPSG layer. For example, the photolithography thickness is also between 700nm and 900nm. The photolithography position of the anti-mark can be determined according to the coordinates of the ordinary mark in the wafer. For example, the anti-mark coordinate range can be (±62mm, 0). The graphic diagram of the anti-mark and the ordinary mark (i.e., alignment mark) is shown as follows Figure 2 As shown in the figure, the inverted mark is obtained by flipping the positive mark 180 degrees. Of course, the position coordinates and flipping amplitude of the inverted mark can be set and adjusted according to actual application requirements and are not limited here.
[0032] In one embodiment, after the anti-mark etching is completed, a front metal deposition can be performed on the front side of the obtained wafer to obtain Figure 4 The structure shown. The thickness of the deposition can be between 1-2 microns. The deposited metal is then etched. The thickness of the metal etching can be determined according to the thickness of the deposited metal. For example, it can also be between 1-2 microns.
[0033] After the positive imaging process is completed based on the above steps, the wafer of the image sensor unit is cleaned and dried for later use.
[0034] Step S110 , performing a back illumination process, bonding a carrier to the front side of the image sensor unit, and thinning and etching the back side of the image sensor unit to expose the reverse mark, so as to perform photolithography machine alignment based on the reverse mark.
[0035] In one embodiment, the wafer with the reverse mark is bonded to the carrier under the back-illumination process. Bonding glue can be coated on the side of the wafer with the reverse mark and cured, and the thickness of the bonding glue can be controlled at (3.5±0.2) μm. The carrier can be a silicon carrier. The side coated with the bonding glue is aligned with the silicon carrier, and specifically, a double-sided photolithography machine can be used to achieve the alignment of the wafer and the silicon carrier. After the alignment is completed, the wafer and the silicon carrier are placed on the bonding machine equipment and bonded by applying a pressure of 2000N to obtain Figure 5 The structure shown.
[0036] In one embodiment, after bonding is completed, the back side of the image sensor unit (ie, the side away from the anti-mark) is thinned to thin the wafer of the image sensor unit to a target thickness. Figure 6 The target thickness can be (760±10) microns. The specific target thickness can be set and adjusted according to actual application requirements and is not limited here.
[0037] In one embodiment, a self-stop etching process can be performed on the backside of the thinned wafer to remove the epitaxial highly doped silicon substrate. The wafer after the self-stop etching process is then masked to remove the transition region where the highly doped silicon material diffuses into the low-doped silicon material. The thickness typically measured is between 2 and 4 microns.
[0038] After the polishing process, the back of the wafer is coated with photoresist (3-5μm), and the areas corresponding to the reverse markings are exposed and developed, followed by plasma etching. This two-step etching process first etches the epitaxial silicon material (10-30 microns) and then etches the oxide layer (1-2 microns). This oxide layer is silicon dioxide.
[0039] The wafer obtained through the above steps is subjected to dry stripping and organic stripping to obtain a wafer with a back-illuminated image sensor unit with a reverse mark. Since the reverse mark designed under the front illumination process is flipped after the back illumination process, the reverse mark is flipped 180 degrees and becomes a regular mark (i.e., alignment mark) that can be normally recognized by the lithography machine. Through the above steps, we can get Figure 7 The structure shown.
[0040] Based on the technical solutions of the above embodiments of the present application, a reverse mark is produced on the front side of the front-illuminated CCD. After the back-illuminated process is completed, the substrate of the epitaxial silicon material is removed by thinning, and then the dielectric layer on the reverse mark is removed by dry etching. The lithography machine can accurately identify the reverse mark, and the positioning accuracy is improved from >2μm to within 500nm. The produced back isolation groove can be precisely aligned with the front trench resistance of the front-illuminated CCD, thereby improving the MTF of the back-illuminated CCD.
[0041] The present application also provides a system for improving the alignment accuracy of back-illuminated CCD lithography, the system comprising: a first module for making a reverse mark on the dielectric layer of the image sensing unit after the dielectric layer of the image sensing unit is completed under a front illumination process; wherein the reverse mark is obtained by flipping the alignment mark recognizable by the lithography machine; and a second module for performing a back-illuminated process, bonding a carrier to the front side of the image sensing unit, and thinning and etching the back side of the image sensing unit so that the reverse mark is exposed, so as to perform lithography machine alignment based on the reverse mark.
[0042] The execution process of the specific system has been described in detail in the aforementioned method embodiment and will not be repeated here.
[0043] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Anyone skilled in the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by one of ordinary skill in the art without departing from the spirit and technical principles disclosed herein are intended to be covered by the claims of the present invention.
Claims
1. A method for improving the alignment accuracy of back-illuminated CCD lithography, characterized in that: The method comprises: In a positive illumination process, after the dielectric layer of the image sensor unit is manufactured, a reverse mark is manufactured on the dielectric layer; wherein the reverse mark is obtained by flipping an alignment mark identifiable by a photolithography machine; A back-illumination process is performed, a carrier is bonded to the front of the image sensing unit, and thinning and etching are performed on the back of the image sensing unit to expose the anti-mark, so as to perform photolithography machine alignment based on the anti-mark.
2. The method for improving the alignment accuracy of back-illuminated CCD lithography according to claim 1, wherein: The step of making an anti-mark on the dielectric layer comprises: Etching the dielectric layer to form a first trench; Metal is deposited in the first trench, and the anti-mark is formed by metal etching.
3. The method for improving the alignment accuracy of back-illuminated CCD lithography according to claim 2, wherein: The depth of the first trench is between 700 nm and 900 nm.
4. The method for improving back-illuminated CCD lithography alignment accuracy according to claim 2, wherein: The step of bonding a carrier to the front side of the image sensing unit includes bonding the side of the image sensing unit provided with the reverse mark to the carrier by means of bonding glue.
5. The method for improving back-illuminated CCD lithography alignment accuracy according to claim 4, characterized in that: The thickness of the bonding adhesive is between 3.3 and 3.7 microns.
6. The method for improving back-illuminated CCD lithography alignment accuracy according to claim 2, wherein: The steps of thinning and etching the back side of the image sensor unit include: Thinning the side of the image sensing unit away from the counter mark so that the thickness of the image sensing unit reaches a target thickness; etching the thinned image sensing unit to remove the substrate and the transition region; The silicon and silicon dioxide at positions corresponding to the anti-marks are etched to expose the anti-marks.
7. The method for improving back-illuminated CCD lithography alignment accuracy according to claim 2, characterized in that: The thickness of the deposited metal is between 1-2 microns; the thickness of the metal etched is between 1-2 microns.
8. The method for improving back-illuminated CCD lithography alignment accuracy according to claim 6, wherein: The target thickness is between 750-770 microns.
9. A system for improving the alignment accuracy of back-illuminated CCD lithography, characterized in that: include: The first module is used to form a reverse mark on the dielectric layer of the image sensor unit after the dielectric layer is formed in a positive illumination process; The reverse mark is obtained by flipping the alignment mark identifiable by the photolithography machine; The second module is used to perform a back-illumination process, bonding a carrier to the front of the image sensor unit, and thinning and etching the back of the image sensor unit to expose the anti-mark so as to perform photolithography machine alignment based on the anti-mark.