Trace capture and playback system, method and equipment based on trace driving simulation technology and medium

Abstract

The invention discloses a trace capture and playback system, method, equipment and medium based on a trace driving simulation technology, and relates to the technical field of computer system simulation. The invention aims to solve the problems of network delay and computing resource waste caused by the fact that a data center processor consumes CPU (Central Processing Unit) resources to carry data of network equipment. The method comprises the following steps: capturing a running trace generated by network I / O equipment in a real environment and a memory access trace of a CPU in a simulation environment; and developing a trace playback framework based on Gem5, so that the trace captured by the trace capturing unit is played back. The I / O trace capturing tool has lower overhead, and the trace file generated under the same condition is smaller. And the playback frame has better flexibility and expansibility.

Description

Technical Field

[0001] The present application belongs to the technical field of computer system simulation. Background Art

[0002] Data centers are facilities that store, manage, and process massive amounts of data. They are widely used by various organizations and industries, including internet companies, financial institutions, healthcare institutions, and government agencies, to meet their storage, computing, and data processing needs. With the growth of cloud computing, many companies are migrating their data and applications to cloud data centers for greater flexibility and scalability. Data center network bandwidth is rapidly increasing. 100Gbps Ethernet is now widely deployed, and 400Gbps Ethernet is expected soon. As network bandwidth continues to increase, data center processors are required to consume more CPU (Central Processing Unit) resources to move data between network devices, resulting in significant network latency and wasting valuable computing resources. Research has found that on a 32-core server, sending data at 40Gb / s using eight TCP connections incurs a 6% CPU overhead, while receiving data at 40Gb / s using eight TGP connections incurs a 12% CPU overhead. Such high CPU overhead is unacceptable in modern data centers. Summary of the Invention

[0003] This application aims to address the problem of data center processors consuming CPU resources to transfer data from network devices, resulting in significant network latency and wasted computing resources. This application provides a trace capture and playback system, method, device, and medium based on trace-driven simulation technology for the design optimization and effectiveness verification of data center processors. This technology is used to restore the actual business scenarios of data center processors while improving simulation speed. This application can be used to improve and optimize I / O performance models and analyze the impact of I / O devices on processor performance in I / O-intensive scenarios.

[0004] In a first aspect, the present application provides a trace capture and playback system based on trace-driven simulation technology, comprising a trace capture unit and a general playback unit; the trace capture unit is configured to capture operation traces generated by network I / O devices in a real environment and memory access traces of a CPU in a simulated environment, wherein the memory access traces of the CPU in the simulated environment include read request traces for the instruction cache and read and write request traces for the data cache; the general playback unit is configured to develop a playback framework for traces based on Gem5, so that the traces captured by the trace capture unit can be played back, wherein the playback framework includes an I / O trace playback framework and a CPU trace playback framework.

[0005] In one possible design, the trace capture unit includes: an I / O trace capture tool and a CPU trace capture tool; the I / O trace capture tool is used to capture the operation traces generated by network I / O devices in a real environment; the CPU trace capture tool is used to simulate the memory access traces of the CPU in an environment.

[0006] In one possible design, the above-mentioned I / O trace capture tool includes: a main process, a shared ring buffer and a capture process; the main process is used to: use a callback function to write the read Ethernet packet into the shared ring buffer; the capture process is used to: copy the data in the shared ring buffer to the local, and write it to the trace file after trimming redundant data.

[0007] In one possible design, the above-mentioned CPU trace capture tool includes: multiple probe nodes and multiple listening nodes corresponding to the probe nodes; the probe nodes are used to capture the CPU's memory access traces to the instruction cache and the data cache; the listening nodes are used to package the CPU's memory access traces to the instruction cache and the data cache into trace files.

[0008] In one possible design, the universal playback unit includes: a trace generation module, a synchronization module, a playback control module, a rate control module and a trace output module; the trace generation module is used to decode the trace captured by the trace capture unit and randomly generate traces; the synchronization module is used to maintain synchronization between the playback control module and the trace simulation system; the playback control module is used to control the start and stop of the playback operation, select the playback mode and select the playback strategy, the playback mode includes playing back the captured trace and playing back the randomly generated trace, and the playback strategy includes playing back according to the timestamp recorded by the trace and playing back at a user-defined rate; the rate control module is used to adjust the multiplier of the trace playback speed; the trace output module is used to encapsulate the trace into a data packet and inject it into the trace simulation system.

[0009] In one possible design, the I / O trace playback framework is used to: play back the operation traces generated by the network I / O devices in a real environment captured by the trace capture unit.

[0010] In one possible design, the CPU trace playback framework is used to: play back the memory access traces of the CPU in a simulation environment captured by the trace capture unit.

[0011] The second aspect of the present application provides a trace capture and playback method based on trace-driven simulation technology, comprising:

[0012] Capture the operation traces generated by network I / O devices in a real environment and the memory access traces of the CPU in a simulated environment. The memory access traces of the CPU in the simulated environment include: read request traces for the instruction cache and read and write request traces for the data cache; develop a trace playback framework based on Gem5, so that the traces captured by the trace capture unit can be replayed. The playback framework includes: an I / O trace playback framework and a CPU trace playback framework.

[0013] The third aspect of the present application provides a trace capture and playback device based on trace drive simulation technology. The agricultural machinery maintenance service pricing device includes a processor and a memory, and the memory stores at least one instruction. The at least one instruction is loaded and executed by the processor to implement the trace capture and playback method based on trace drive simulation technology provided in the second aspect above.

[0014] The fourth aspect of the present application provides a computer storage medium, in which at least one instruction is stored. The at least one instruction is loaded and executed by a processor to implement the trace capture and playback method based on trace-driven simulation technology as provided in the second aspect above.

[0015] Beneficial effects of this application:

[0016] The trace capture and playback system, method, device and medium based on trace-driven simulation technology provided by this application fully considers the impact of CPU and I / O on processor architecture performance, and has higher accuracy than existing trace-driven simulation methods. Compared with traditional I / O trace capture tools, the trace capture tool for I / O traces designed by this application has lower overhead, and the size of the trace file generated under the same conditions is only about 3.6% of that of traditional tools. Compared with traditional trace playback tools, the playback tool based on a general playback framework designed by this application has better flexibility and scalability. Compared with the simulation method based on an architecture simulator, the trace-driven simulation method designed by this application achieves a trace playback accuracy of 94%, and brings about 6 times the simulation acceleration compared with the simulation method of a structural simulator, effectively improving the efficiency of data center processor architecture evaluation. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A diagram of the I / O trace capture tool provided for this application;

[0018] Figure 2 A diagram of the CPU trace capture tool provided for this application;

[0019] Figure 3 This is a structural diagram of the general playback unit provided by this application;

[0020] Figure 4A diagram of the I / O trace playback framework provided for this application;

[0021] Figure 5 A diagram of the CPU trace playback framework provided for this application;

[0022] Figure 6 This is a structural diagram of the trace capture and playback system based on trace-driven simulation technology provided in this application. DETAILED DESCRIPTION

[0023] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application. It should be noted that, in the absence of conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0024] Currently, there are two main types of simulation testing methods: RTL-level simulation and architecture simulator-based simulation. Traditional RTL simulation uses RTL-level design source code for simulation. While highly accurate, this method suffers from poor simulation speed. Architecture simulator-based simulation uses a processor architecture model for simulation, significantly improving simulation speed while maintaining accuracy. However, it still struggles to reproduce the processor's actual operating scenario. While its simulation speed is significantly improved compared to RTL simulation, it still takes a significant amount of time to simulate large-scale designs. For example, the Gem5 simulator runs approximately three orders of magnitude slower than actual hardware.

[0025] Trace-driven simulation technology effectively addresses the shortcomings of architecture simulators. Using traces generated by real hardware as simulation input, trace-driven simulation can better reproduce the actual processor operating scenario. Using trace input instead of functional models for simulation can significantly improve simulation speed. However, existing trace-driven simulation technology only considers the impact of the CPU when evaluating processor architectures, ignoring the impact of I / O. Trace-driven simulation technology consists of two steps: trace capture and trace replay. Existing I / O trace capture tools are prohibitively expensive and generate large trace files. Existing trace replay frameworks are highly tied to the hardware being evaluated, resulting in poor flexibility and scalability.

[0026] In view of this, the embodiments of the present application provide a trace capture and playback system, method, device and medium based on trace driven simulation technology to solve the above problems. Figures 1 to 6 , the scheme of the implementation method of this application is described in detail.

[0027] Specific embodiment 1: The trace capture and playback system based on trace-driven simulation technology described in this embodiment includes: a trace capture unit and a general playback unit. Specifically, the trace capture unit is used to capture the operation traces generated by network I / O devices in a real environment and the memory access traces of the CPU in a simulated environment. The memory access traces of the CPU in the simulated environment include: read request traces for the instruction cache and read and write request traces for the data cache; the general playback unit is used to develop a playback framework for traces based on Gem5, so that the traces captured by the trace capture unit can be played back. The playback framework includes: an I / O trace playback framework and a CPU trace playback framework.

[0028] In one embodiment, the trace capture unit includes: an I / O trace capture tool and a CPU trace capture tool; the I / O trace capture tool is used to capture the operation traces generated by network I / O devices in a real environment; the CPU trace capture tool is used to simulate the memory access traces of the CPU in an environment.

[0029] In one embodiment, the I / O trace capture tool includes: a main process, a shared circular buffer and a capture process; the main process is used to: use a callback function to write the read Ethernet packet into the shared circular buffer; the capture process is used to: copy the data in the shared circular buffer to the local, and write it to the trace file after trimming redundant data.

[0030] In one embodiment, a CPU trace capture tool includes: multiple probe nodes and multiple listening nodes corresponding to the probe nodes; the probe nodes are used to capture the CPU's memory access traces to the instruction cache and the data cache; the listening nodes are used to package the CPU's memory access traces to the instruction cache and the data cache into trace files.

[0031] In one embodiment, a universal playback unit includes: a trace generation module, a synchronization module, a playback control module, a rate control module and a trace output module; the trace generation module is used to decode the trace captured by the trace capture unit and randomly generate traces; the synchronization module is used to maintain synchronization between the playback control module and the trace simulation system; the playback control module is used to control the start and stop of the playback operation, select the playback mode and select the playback strategy, the playback mode includes playing back the captured trace and playing back the randomly generated trace, and the playback strategy includes playing back according to the timestamp recorded by the trace and playing back at a user-defined rate; the rate control module is used to adjust the multiplier of the trace playback speed; the trace output module is used to encapsulate the trace into a data packet and inject it into the trace simulation system.

[0032] In one embodiment, the I / O trace playback framework is used to: play back the operation traces generated by the network I / O device in a real environment captured by the trace capture unit.

[0033] In one embodiment, the CPU trace playback framework is used to: play back the memory access trace of the CPU in the simulation environment captured by the trace capture unit.

[0034] To further introduce the solution of the implementation method of this application, each unit is described in detail below:

[0035] 1. I / O trace capture tool, used to capture the traces generated by network I / O devices when the actual machine is running. It uses inter-process communication technology and instrumentation technology to capture the running behavior of DPDK (Data Plane Development Kit) applications.

[0036] Specifically, such as Figure 1 As shown, the I / O trace capture tool consists of two parts: a main process and a capture process. The main process runs the test case. A callback function is registered within the main process. After the main process's packet processing function processes the Ethernet packet, it calls the callback function, which writes the read Ethernet packet to a shared ring buffer. The capture process runs the trace capture tool. During this process, the program continuously accesses the shared ring buffer, copies the data locally, trims redundant data, and writes it to the trace file. The I / O trace capture tool can effectively capture I / O traces on actual machines.

[0037] 2. CPU trace capture tool, used to capture the CPU's memory access traces to the instruction cache and data cache in the simulation environment. The traces captured using this tool are divided into two types: one is the CPU's read request trace to the instruction cache, and the other is the CPU's read and write request trace to the data cache. Using CPU traces can improve the simulation efficiency of the simulation environment.

[0038] Specifically, such as Figure 2 As shown, the CPU trace capture tool consists of multiple probe nodes and multiple listener nodes. The tool leverages the Gem5 simulator's probe-listener mechanism. Probe nodes capture CPU access traces to the instruction cache and data cache, which are then packaged into trace files by the listener nodes. During the trace packaging process, protobuf is used to encode and compress the traces. The CPU trace capture tool effectively captures CPU traces generated during simulation.

[0039] 3. A reconfigurable and extensible general playback tool, used to: quickly develop trace playback tools for different research objects, and develop different hardware playback frameworks based on it to reduce development difficulty and shorten development time.

[0040] Specifically, such as Figure 3 As shown, the universal playback tool consists of a trace generation module, a synchronization module, a playback control module, a rate control module, and a trace output module. The trace generation module reads and decodes traces from trace files, packages the decoded traces, and passes them to the next level. The trace generation module also supports the random generation of traces. The synchronization module maintains synchronization between the playback control module and the entire simulation system. Developers can customize the playback mechanism in this synchronization module. The playback control module is responsible for controlling the entire playback process, including controlling the start and stop of playback operations, playback mode selection, and playback strategy selection. The playback strategy supports playback based on the timestamp of the trace record or playback at a user-defined rate. The rate control module supports playback of traces at a specified magnification rate. The trace output module is responsible for encapsulating the trace output from the previous level into a data packet format supported by the simulation system and injecting the data packet into the simulation system. Upon completion, the synchronization callback mechanism is triggered, notifying the synchronization module to take corresponding actions.

[0041] The general playback tool is developed based on Gem5. The entire framework is designed as a SimObject (a fundamental component in Gem5). All parameters within the framework can be configured as needed within a Python script. Designed in C++, the framework is designed as a template class for enhanced scalability. Template parameters are the trace format and output data packet format. Four overridable APIs are provided, allowing developers to rewrite them based on their specific needs. This tool can effectively improve the development efficiency of specialized trace playback tools.

[0042] 4. I / O Trace Replay Tool: This tool replays I / O traces captured by the I / O Trace Capture Tool in the Gem5 simulator. This tool, developed based on the general trace replay tool, injects real I / O traffic into the simulator, restoring the real I / O working scenario of a data center processor.

[0043] The I / O trace replay tool is developed based on the general replay tool. It rewrites the API of the general replay framework and uses the I / O trace format as a template parameter. Since the virtual network card model can be recognized by the software running in the simulation system, the entire replay module is regarded as an Ethernet card at the software level. In order to shield the CPU from controlling the network card while not affecting the normal operation of the application, this embodiment designs two sets of registers in the network card model, one set is virtual registers for CPU access, and the other set is controlled by the replay module. The virtual registers cannot directly control the behavior of the network card model, thus realizing the isolation between the CPU and the network card, and the replay module takes over the control of the network card. Using this tool can achieve high-precision and high-efficiency playback of I / O traces.

[0044] like Figure 4 As shown, the virtual register of the network card model sends the Tx tail pointer to the sending synchronization module. The sending synchronization module sets the synchronization number according to the Tx tail pointer to the sending processing submodule of the trace output module. The sending processing submodule writes the sending descriptor and the sending data according to the synchronization number, that is, the sending trace is encapsulated into a data packet. The data packet is then injected into the trace simulation system through the DMA port. When the synchronization between the playback control module and the trace simulation system is successful, the sending synchronization module obtains the synchronization status and updates the Tx tail pointer. The updated Tx tail pointer is then sent to the register of the network card model. The register of the network card model sends the Tx tail pointer to the receiving synchronization module. The receiving synchronization module sets the synchronization number according to the Tx tail pointer to the receiving processing submodule of the trace output module. The receiving processing submodule reads the receiving descriptor and the receiving data according to the synchronization number, that is, the receiving trace is encapsulated into a data packet. The data packet is then injected into the trace simulation system through the DMA port.

[0045] 5. CPU trace replay tool, used to replace the detailed CPU model in the Gem5 simulator for simulation. This tool is developed based on the general trace replay tool and can restore CPU behavior while significantly improving the simulation speed of the Gem5 simulator.

[0046] like Figure 5 As shown in the figure, the CPU trace replay tool is developed based on the general replay tool. This tool rewrites four APIs in the general replay framework. The data processing module is used to process the access traces of the data cache, encapsulating the traces as CPU data requests and sending them to the data cache port; the instruction processing module is used to process the access traces of the instruction cache and initiate instruction read requests to the instruction cache port based on the trace content. After each trace is executed, the status feedback from the cache port is used to determine whether the instruction has been executed. If the execution is successful, the synchronization module status is updated; otherwise, the instruction needs to be executed again. This tool can replace the detailed CPU model in the Gem5 simulator for simulation, which can restore CPU behavior while significantly improving the simulation speed of the Gem5 simulator.

[0047] Specific embodiment 2: The trace capture and playback method based on trace-driven simulation technology described in this embodiment includes: capturing the operation traces generated by network I / O devices in a real environment and the memory access traces of the CPU in a simulation environment, wherein the memory access traces of the CPU in the simulation environment include: read request traces for the instruction cache and read and write request traces for the data cache; a playback framework for the trace is developed based on Gem5, so that the traces captured by the trace capture unit are played back, and the playback framework includes: an I / O trace playback framework and a CPU trace playback framework.

[0048] Specific embodiment three: The trace capture and playback device based on trace drive simulation technology described in this embodiment is characterized in that the agricultural machinery maintenance service pricing device includes a processor and a memory, and the memory stores at least one instruction, and the at least one instruction is loaded and executed by the processor to implement the trace capture and playback method based on trace drive simulation technology as described in specific embodiment two.

[0049] Specific embodiment 4: This embodiment describes a computer storage medium, in which at least one instruction is stored. The at least one instruction is loaded and executed by a processor to implement the trace capture and playback method based on trace-driven simulation technology as described in specific embodiment 2.

[0050] Although the present application is described herein with reference to specific embodiments, it should be understood that these embodiments are merely illustrative of the principles and applications of the present application. It should therefore be understood that many modifications may be made to the illustrative embodiments, and that other arrangements may be devised, without departing from the spirit and scope of the present application as defined by the appended claims. It should be understood that the various dependent claims and features described herein may be combined in ways other than those described in the original claims. It should also be understood that features described in conjunction with individual embodiments may be used in other described embodiments.

Claims

1. The trace capture and playback system based on trace driven simulation technology is characterized by: Includes trace capture unit and general playback unit; The trace capture unit is used to capture the operation traces generated by the network I / O device in the real environment and the memory access traces of the CPU in the simulation environment, wherein the memory access traces of the CPU in the simulation environment include: read request traces of the instruction cache and read and write request traces of the data cache; The universal playback unit is used to develop a playback framework of traces based on Gem5, so that the traces captured by the trace capture unit can be played back. The playback framework includes an I / O trace playback framework and a CPU trace playback framework.

2. The trace capture and playback system based on trace driven simulation technology according to claim 1, characterized in that: The trace capture unit includes: an I / O trace capture tool and a CPU trace capture tool; The I / O trace capture tool is used to: capture the operation traces generated by network I / O devices in a real environment; The CPU trace capture tool is used to: simulate the memory access trace of the CPU in an environment.

3. The trace capture and playback system based on trace driven simulation technology according to claim 2, characterized in that: The I / O trace capture tool includes: a main process, a shared ring buffer and a capture process; The main process is configured to: write the read Ethernet packet into the shared ring buffer using a callback function; The capture process is used to copy the data in the shared ring buffer to the local computer, and write the data into the trace file after trimming the redundant data.

4. The trace capture and playback system based on trace driven simulation technology according to claim 2, characterized in that: The CPU trace capture tool includes: a plurality of probe nodes and a plurality of monitoring nodes corresponding to the probe nodes; The probe node is used to capture the CPU's memory access traces to the instruction cache and data cache; The monitoring node is used to package the CPU's memory access traces to the instruction cache and the data cache into a trace file.

5. The trace capture and playback system based on trace driven simulation technology according to claim 1, characterized in that: The universal playback unit includes: a trace generation module, a synchronization module, a playback control module, a rate control module and a trace output module; The trace generation module is configured to decode the trace captured by the trace capture unit and to generate traces randomly; The synchronization module is used to maintain synchronization between the playback control module and the trace simulation system; The playback control module is used to control the start and stop of the playback operation, select the playback mode and select the playback strategy. The playback mode includes playing back captured traces and playing back randomly generated traces. The playback strategy includes playing back according to the timestamp recorded by the trace and playing back at a user-defined rate. The rate control module is used to: adjust the rate magnification of the trace playback speed; The trace output module is used to encapsulate the trace into a data packet and inject the data packet into the trace simulation system.

6. The trace capture and playback system based on trace driven simulation technology according to claim 5, characterized in that: The I / O trace playback framework is used to: play back the operation traces generated by the network I / O device in a real environment captured by the trace capture unit.

7. The trace capture and playback system based on trace driven simulation technology according to claim 5, characterized in that: The CPU trace playback framework is used to: play back the memory access trace of the CPU in the simulation environment captured by the trace capture unit.

8. A trace capture and playback method based on trace driven simulation technology, characterized in that: include: Capturing the operation traces generated by network I / O devices in a real environment and the memory access traces of the CPU in a simulated environment, wherein the memory access traces of the CPU in the simulated environment include: traces of read requests to the instruction cache and traces of read and write requests to the data cache; A trace playback framework is developed based on Gem5, so that the trace captured by the trace capture unit can be played back. The playback framework includes: an I / O trace playback framework and a CPU trace playback framework.

9. Trace capture and playback equipment based on trace driven simulation technology, characterized in that: The agricultural machinery maintenance service pricing device includes a processor and a memory, wherein the memory stores at least one instruction, and the at least one instruction is loaded and executed by the processor to implement the trace capture and playback method based on trace drive simulation technology as described in claim 8.

10. A computer storage medium, characterized in that The computer storage medium stores at least one instruction, and the at least one instruction is loaded and executed by the processor to implement the trace capture and playback method based on trace-driven simulation technology as claimed in claim 8.

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