Methods, apparatus, equipment and media for disassembly of controlled phase-shifting gates

Abstract

This application relates to a method, apparatus, device, and medium for decomposing a controlled phase shift gate. The method includes: obtaining a controlled phase shift gate to be decomposed; decomposing it into multiple single-qubit PS gates and multiple two-qubit CNOT gates applied to a quantum circuit, wherein the decomposition includes: applying a single-qubit PS gate to qubit q0; and applying a single-qubit PS gate to qubit q0. i Above, i∈{1,2,……,n}, apply 2 alternately i A single-qubit PS gate and 2 i Two-qubit CNOT gates, of which 2 i The target bits of each two-qubit CNOT gate are arranged at qubit q. i Above, 2 i The control bits of a two-qubit CNOT gate are recursively arranged in qubits q0, q1, ..., q2. i‑1 Above. This invention can decompose a controlled quantum phase shift gate with any number of control bits, effectively reducing the number of quantum gates and the complexity of the quantum circuit after decomposition.

Description

Technical Field

[0001] This application relates to the field of quantum computing technology, and in particular to a method, apparatus, device and medium for decomposition of controlled phase shift gates. Background Technology

[0002] In quantum computing, quantum algorithms used to perform computational tasks are typically described using quantum circuits. A quantum circuit consists of qubits (qubits) and a series of quantum logic gates (quantum gates). Unlike classical circuits that transmit signals via metal wires, quantum circuits connect individual quantum gates through time evolution; the state of a qubit changes when it passes through a quantum gate. Quantum gate operations are essentially the process of unitary matrices acting on qubits; therefore, the entire quantum circuit can be viewed as a complex unitary matrix composed of multiple unitary matrices. Through quantum circuits, complex quantum operations are decomposed into a series of simple operations, facilitating implementation in quantum computers.

[0003] However, for a multi-controllable quantum gate with multiple control bits, the number of quantum gates and the circuit depth required for its decomposition increase rapidly. For example, decomposing a 4-controllable multi-controllable quantum gate requires 2^13 quantum gates and a circuit depth of 149; while decomposing a 5-controllable multi-controllable quantum gate requires 1429 quantum gates and a circuit depth as high as 959. This exponential resource consumption makes implementing multi-controllable quantum gates in noisy medium-scale quantum (NISQ) computers extremely complex, becoming a major technical bottleneck on the road to the practical application of quantum computing.

[0004] Therefore, effectively decomposing multi-controllable quantum gates to reduce hardware resource requirements while improving the efficiency of quantum computing has become an important direction in quantum computing research. This research not only promotes the practical application of quantum computing but also lays the foundation for its application in many other fields. Summary of the Invention

[0005] To address the technical problems existing in the prior art, this application proposes a method, apparatus, device and medium for decomposing controlled phase shift gates, which can decompose controlled quantum phase shift gates with any number of control bits, effectively reducing the number of quantum gates after decomposition and the complexity of quantum circuits.

[0006] To address the aforementioned technical problems, according to one aspect of this application, a method for decomposing a controlled phase-shifting gate is provided, the method comprising the following:

[0007] Obtain the controlled phase shift gate to be decomposed, the controlled phase shift gate having n control bits and 1 target bit; decompose the controlled phase shift gate into multiple single-qubit PS gates and multiple two-qubit CNOT gates applied to the quantum circuit, wherein the quantum circuit has n+1 qubits q0, q1, ..., qn And the qubits q0, q1, ..., q n-1 Each of the n control bits corresponding to the controlled phase shift gate, and the qubit q n Corresponding to the target bit of the controlled phase shift gate, the decomposition includes: applying a single-qubit PS gate to qubit q0; and applying a single-qubit PS gate to qubit q0. i Above, i∈{1,2,……,n}, apply 2 alternately i A single-qubit PS gate and 2 i Two-qubit CNOT gates, wherein the 2 i The phase parameters of a single-qubit PS gate are alternately set to positive and negative values, the 2 i The target bits of each two-qubit CNOT gate are arranged at qubit q. i Above, the 2 i The control bits of a two-qubit CNOT gate are recursively arranged in qubits q0, q1, ..., q2. i-1 superior.

[0008] The decomposition method described above, the 2 i The control bits of a two-qubit CNOT gate are recursively arranged in qubits q0, q1, ..., q2. i-1 Above, including: when i=1, the 2 applied to qubit q1 1 The control bits of each two-qubit CNOT gate are arranged on qubit q0; when i≥2, the control bits of qubit q0 are all located on qubit q0. i 2 applied on i The control bits of the two-qubit CNOT gate are sequentially arranged on the qubits included in Sequence(i) determined by the following formula:

[0009] Sequence(i) = Insert(q i-1 Sequence(i-1));

[0010] Wherein, Sequence(i-1) represents the sequence formed by the quantum bit q i-1 2 applied on i-1 Sequence(i) is a sequence of qubits whose control bits of a two-qubit CNOT gate are arranged sequentially. i 2 applied on i The sequence of qubits, whose control bits of two-qubit CNOT gates are arranged sequentially, is used by Insert to insert qubit q before each qubit in the sequence represented by Sequence(i-1). i-1 To determine the qubits included in the sequence represented by Sequence(i).

[0011] The decomposition method described above further includes configuring the phase parameter of each single-qubit PS gate to θ / 2. n , where θ is the phase parameter of the controlled phase shift gate.

[0012] According to another aspect of this application, a decomposition apparatus for a controlled phase shift gate is proposed, comprising: a controlled phase shift gate acquisition unit configured to acquire a controlled phase shift gate to be decomposed, the controlled phase shift gate having n control bits and 1 target bit; and a controlled phase shift gate decomposition unit configured to decompose the controlled phase shift gate into multiple single-qubit PS gates and multiple two-qubit CNOT gates applied to a quantum circuit, wherein the quantum circuit has n+1 qubits q0, q1, ..., q n And the qubits q0, q1, ..., q n-1 Each of the n control bits corresponding to the controlled phase shift gate, and the qubit q n Corresponding to the target bit of the controlled phase shift gate, the controlled phase shift gate decomposition unit includes: a first decomposition unit configured to apply a single-qubit PS gate to qubit q0; and a second decomposition unit configured to apply a single-qubit PS gate to qubit q0. i Above, i∈{1,2,……,n}, apply 2 alternately i A single-qubit PS gate and 2 i Two-qubit CNOT gates, wherein the 2 i The phase parameters of a single-qubit PS gate are alternately set to positive and negative values, the 2 i The target bits of each two-qubit CNOT gate are arranged at qubit q. i Above, the 2 i The control bits of a two-qubit CNOT gate are recursively arranged in qubits q0, q1, ..., q2. i-1 superior.

[0013] The decomposition apparatus as described above, wherein the second decomposition unit includes: an initial arrangement unit configured to apply a 2 to qubit q1 when i=1. 1 The control bits of each two-qubit CNOT gate are arranged on qubit q0; the recursive arrangement unit is configured such that when i≥2, the control bits of qubit q0 are all located on qubit q0. i 2 applied on i The control bits of the two-qubit CNOT gate are sequentially arranged on the qubits included in Sequence(i) determined by the following formula:

[0014] Sequence(i) = Insert(q i-1 Sequence(i-1));

[0015] Wherein, Sequence(i-1) represents the sequence formed by the quantum bit q i-1 2 applied on i-1 Sequence(i) is a sequence of qubits whose control bits of a two-qubit CNOT gate are arranged sequentially. i 2 applied on i The sequence of qubits, whose control bits of two-qubit CNOT gates are arranged sequentially, is used by Insert to insert qubit q before each qubit in the sequence represented by Sequence(i-1). i-1 To determine the qubits included in the sequence represented by Sequence(i).

[0016] The decomposition apparatus described above further includes a controlled phase-shift gate decomposition unit: a phase parameter configuration unit configured to configure the phase parameter of each single-qubit PS gate to θ / 2. n , where θ is the phase parameter of the controlled phase shift gate.

[0017] According to another aspect of this application, a computing device is also provided, comprising: a processor and a memory, the memory storing a computer program that, when executed by the processor, implements the aforementioned decomposition method for a controlled phase-shifting gate.

[0018] According to another aspect of this application, a computer-readable storage medium is also provided, wherein computer instructions are stored therein, which, when executed by a processor, implement the aforementioned decomposition method for a controlled phase-shifting gate.

[0019] This application can convert any n control bits of C n The PS gate is decomposed into a combination of a single-qubit PS gate and a CNOT gate. The resulting quantum circuit can completely and equivalently realize C... n The function of PS gates: Since the decomposed quantum circuit contains only single-qubit PS gates and CNOT gates, the quantum gates contained in this quantum circuit are closer to the basic quantum gate set supported by existing quantum computers, making them easier to physically implement. This facilitates the operation of quantum circuits containing C++ gates on quantum computers. n A quantum algorithm for PS gates; compared with other decomposition methods of controlled quantum phase shift gates in the prior art, this application reduces the number of quantum gates and the depth of the quantum circuit, thus effectively reducing the complexity of the decomposed quantum circuit and improving the execution efficiency of the quantum circuit. Attached Figure Description

[0020] The preferred embodiments of this application will now be described in further detail with reference to the accompanying drawings, wherein:

[0021] Figure 1 This is a flowchart of a decomposition method for a controlled quantum phase shift gate according to an embodiment of this application;

[0022] Figure 2 This is a decomposed quantum circuit diagram for a controlled quantum phase shift gate according to an embodiment of this application;

[0023] Figure 3 According to one embodiment of this application, A schematic diagram of the decomposed quantum circuit;

[0024] Figure 4 Is Figure 3 Based on the quantum circuit shown, when A schematic diagram of the quantum circuit in the |0> state;

[0025] Figure 5 Is Figure 3 Based on the quantum circuit shown, when A schematic diagram of the quantum circuit in the |1> state;

[0026] Figure 6 Is Figure 3 Based on the quantum circuit shown, when A simplified schematic diagram of the quantum circuit in the |1> state;

[0027] Figure 7 Is Figure 3 Based on the quantum circuit shown, when A simplified schematic diagram of the quantum circuit in the |0> state;

[0028] Figure 8 Is Figure 3 Based on the quantum circuit shown, when A simplified schematic diagram of the quantum circuit in the |1> state;

[0029] Figure 9 This is a flowchart of a method for constructing a controlled quantum phase-shifting gate quantum circuit according to an embodiment of the present invention;

[0030] Figure 10 This is a schematic diagram of a decomposed quantum circuit constructed according to an application embodiment of this application;

[0031] Figure 11 This is a schematic diagram of a decomposition device for a controlled quantum phase shift gate according to an embodiment of this application;

[0032] Figure 12 This is a block diagram of a decomposition device for a controlled quantum phase shift gate according to another embodiment of this application;

[0033] Figure 13 This is a structural principle block diagram of a computing device according to an embodiment of this application. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0035] In the following detailed description, reference can be made to the accompanying drawings, which form part of this application and illustrate specific embodiments of the present application. In the drawings, similar reference numerals describe substantially similar components in different figures. Specific embodiments of the present application are described in sufficient detail below to enable those skilled in the art to implement the technical solutions of the present application. It should be understood that other embodiments may also be utilized, or structural, logical, or electrical changes may be made to the embodiments of the present application.

[0036] Controlled quantum phase shift gate (C) n The PS gate (where n represents the number of control bits) is a type of controlled quantum gate commonly used in many quantum algorithms. For example, the exact Grover algorithm requires the use of C... n PS gates are used to perform precise searches in an unordered database. n A PS gate contains n control bits and one target bit. A PS gate is applied to the target bit if and only if all control bits are |1>. Otherwise, C n The PS gate is ineffective. The PS gate is a phase-shift gate that operates on a single qubit and involves a phase angle θ (0 ≤ θ < 2π). The corresponding two-dimensional matrix is ​​shown in equation (1-1).

[0037] (1-1)

[0038] However, implementing certain complex quantum gates in practical quantum computers can present significant hardware challenges. Therefore, current quantum computers only support a subset of quantum gate types, known as the basic gate set. For this reason, before running a quantum algorithm, the quantum computer needs to handle quantum gates not supported by the algorithm, such as C... n PS gates are decomposed into a sequence of basic quantum gates that they can support, such as single-qubit gates and two-qubit gates.

[0039] Controlled quantum phase shift gate (in the following description, the controlled quantum phase shift gate will be abbreviated as C when referring to the phase shift angle). n The PS(θ) gate is abbreviated as C when the phase shift angle is not involved. n The PS gate is a common and important n+1 qubit gate in quantum algorithms, consisting of n control bits and one target bit. The n control bits have a total of 2^n bits. n Ground states: |00…0>, |00…1>, …, |11…0>, |11…1>, corresponding to 0~2 n A binary string of -1. When C n When the n control bits of the PS gate (assuming they are all valid when |1>) are in the positions of |00…0>, |00…1>,…,|11…0>, C n The PS gate has no effect and does not cause any change in the quantum state. It is equivalent to an identity I gate (the matrix of the I gate is the identity matrix, so it does not cause any change in the quantum state and can be directly omitted); a phase shift gate (abbreviated as PS gate) is applied to the target bit only when the control bit is in |11…1>.

[0040] Figure 1 This is a flowchart of a decomposition method for a controlled quantum phase shift gate according to an embodiment of this application. Figure 1 As shown, the method includes:

[0041] Step S110: Obtain the controlled phase shift gate to be decomposed, wherein the controlled phase shift gate has n control bits and 1 target bit;

[0042] Step S120: The controlled phase shift gate is decomposed into multiple single-qubit PS gates and multiple two-qubit CNOT gates applied to the quantum circuit, wherein the quantum circuit has n+1 qubits q0, q1, ..., q n And the qubits q0, q1, ..., q n-1 Each of the n control bits corresponding to the controlled phase shift gate, and the qubit q n Corresponding to the target position of the controlled phase shift gate, the decomposition step further includes:

[0043] Step S1201: Apply a single-qubit PS gate to qubit q0;

[0044] Step S1202, in the quantum bit q i Above, i∈{1,2,……,n}, apply 2 alternately i A single-qubit PS gate and 2 i Two-qubit CNOT gates, wherein the 2 i The phase parameters of a single-qubit PS gate are alternately set to positive and negative values, the 2 iThe target bits of each two-qubit CNOT gate are arranged at qubit q. i Above, the 2 i The control bits of a two-qubit CNOT gate are recursively arranged in qubits q0, q1, ..., q2. i-1 superior.

[0045] As can be seen from the above method, this application will use the C of n control bits n A PS gate can be decomposed into multiple single-qubit PS gates and multiple two-qubit CNOT gates. Using the decomposition method provided in this application, any n control bits of the C... n The PS gate is decomposed into a combination of a single-qubit PS gate and a CNOT gate. The resulting quantum circuit can completely and equivalently realize C... n The PS gate's functionality is closer to the set of quantum gates supported by existing quantum computers, making it easier to run programs containing C on quantum computers. n The quantum algorithm for PS gates is provided in this application. Furthermore, the decomposition method provided in this application simplifies the structure of the quantum circuit after decomposition while ensuring the accuracy of the decomposition. That is, it reduces the number of quantum gates and the circuit depth, reduces the complexity of the quantum circuit, and improves the execution efficiency of the quantum circuit.

[0046] In one embodiment of this application, 2 i The control bits of a two-qubit CNOT gate are recursively arranged in qubits q0, q1, ..., q2. i-1 Above, including:

[0047] When i=1, a 2 is applied to the qubit q1 1 The control bits of each two-qubit CNOT gate are arranged on qubit q0;

[0048] When i≥2, in the quantum bit q i 2 applied on i The control bits of the two-qubit CNOT gate are sequentially arranged on the qubits included in Sequence(i) determined by the following formula:

[0049] Sequence(i) = Insert(q i-1 Sequence(i-1));

[0050] Wherein, Sequence(i-1) represents the sequence formed by the quantum bit q i-1 2 applied on i-1 Sequence(i) is a sequence of qubits whose control bits of a two-qubit CNOT gate are arranged sequentially. i 2 applied on iThe sequence of qubits, whose control bits of two-qubit CNOT gates are arranged sequentially, is used by Insert to insert qubit q before each qubit in the sequence represented by Sequence(i-1). i-1 To determine the qubits included in the sequence represented by Sequence(i).

[0051] For example, if i = 2, then:

[0052] Sequence(1) = [q0, q0];

[0053] Sequence(2) = Insert(q1, Sequence(1)) = [q1, q0, q1, q0];

[0054] That is, in The control bits of the four CNOT gates applied above are q1, q0, q1, q0 in sequence.

[0055] This nested, recursive construction method ensures that each qubit... The control bit of the CNOT gate applied above maintains the interference effect on the control structure of the previous qubit, while introducing a new control bit, thereby realizing the correct unfolding of the overall logic of the controlled phase shift gate.

[0056] It should be noted that, although the above embodiments illustrate "2" i The control bits of a two-qubit CNOT gate are recursively arranged in qubits q0, q1, ..., q2. i-1 The specific implementation process of the recursive construction above is described, but this application is not limited to this. For example, in another embodiment of this application, Insert can also be used to insert qubit q after each qubit included in the sequence represented by Sequence(i-1). i-1 To determine the qubits included in the sequence represented by Sequence(i).

[0057] In addition, in the embodiments of this application, the phase parameter of each single-qubit PS gate can also be configured as θ / 2. n , where θ is the phase parameter of the controlled phase shift gate.

[0058] Figure 2 This is a decomposed quantum circuit diagram for a controlled quantum phase shift gate according to one embodiment of this application. (See also...) Figure 2 As shown, according to Figure 1 The decomposition method will control the quantum phase shift gate C n PS(θ) is decomposed into multiple single-qubit PS gates and multiple two-qubit CNOT gates.

[0059] The solid black dot in the picture is related to " The symbol formed by the solid black dot represents a CNOT gate, and the qubit containing the solid black dot represents a control bit. The qubit containing the symbol represents the target bit. When the control bit is in the |0> state, the CNOT gate has no effect and can be omitted. When the control bit is in the |1> state, an I gate is applied to the target bit. In the figure, the "+" in the PS(+) gate represents the principal argument value of the phase shift angle. In one embodiment, the principal argument value is θ / 2. n In the PS(-) gate, the "-" indicates that the principal argument value is -θ / 2. n θ is C n The principal argument of the phase shift angle of the PS(θ) gate.

[0060] See Figure 2 A phase shift gate PS(+) is configured on the 0th qubit.

[0061] On qubit q1, there are a total of 2 1 =2 single-qubit PS gates and 2 1 = 2 two-qubit CNOT gates, wherein the phase parameters of the two single-qubit PS gates are set alternately to positive and negative, and each of them is followed by a CNOT gate; the target bit of each PS(+) gate, PS(-) gate and each CNOT gate is configured on the first qubit, and the control bit of each CNOT gate is set on qubit q0.

[0062] On qubit q2, there are a total of 2 2 =4 single-qubit PS gates and 2 2 =4 two-qubit CNOT gates, wherein the phase parameters of the 4 single-qubit PS gates are alternately set to positive and negative, and each is followed by a CNOT gate; the target bit of each PS(+) gate, PS(-) gate and each CNOT gate is configured on the 2nd qubit, and the control bit of each CNOT gate is arranged recursively on qubits q0 and q1. Specifically, the control bits of the 4 two-qubit CNOT gates applied to qubit q2 are arranged sequentially on the qubits included in Sequence (2) determined by the following formula:

[0063] Sequence(2) = Insert(q1, Sequence(1));

[0064] From Sequence(1) = [q0, q0], we know that

[0065] Sequence(2) = Insert(q1, Sequence(1)) = [q1, q0, q1, q0].

[0066] As can be seen from the above, the control bits of the four two-qubit CNOT gates are arranged on the q1, q0, q1 and q0 qubits respectively.

[0067] There are 2 on qubit q3. 3 =8 single-qubit PS gates and 2 3 =8 two-qubit CNOT gates, wherein the phase parameters of the 8 single-qubit PS gates are alternately set to positive and negative, and each is followed by a CNOT gate; the target bit of each PS(+) gate, PS(-) gate and each CNOT gate is configured on the 3rd qubit, and the control bit of each CNOT gate is arranged recursively on qubits q0, q1 and q3. Specifically, the control bits of the 8 two-qubit CNOT gates applied to qubit q3 are arranged sequentially on the qubits included in Sequence (3) determined by the following formula:

[0068] Sequence(3) = Insert(q2, Sequence(2));

[0069] From Sequence(2) = [q1, q0, q1, q0], we know that...

[0070] Sequence(3) = Insert(q2, Sequence(2)) = [q2, q1, q2, q0, q2, q1, q2, q0].

[0071] As can be seen from the above, the control bits of the eight two-qubit CNOT gates are arranged sequentially on qubits q2, q1, q2, q0, q2, q1, q2 and q0.

[0072] And so on, in the quantum bit q i There are 2 in total. i A single-qubit PS gate and 2 i Two-qubit CNOT gates, of which 2 i The phase parameters of each single-qubit PS gate are alternately set to positive and negative, and each is followed by a CNOT gate; the target bit of each PS(+) gate, PS(-) gate, and each CNOT gate is configured on the i-th qubit, and the control bits of each CNOT gate are recursively arranged on qubits q0, q1, ..., q i-1 Above. Specifically, in the quantum bit q i 2 applied on i The control bits of the two-qubit CNOT gate are sequentially arranged on the qubits included in Sequence(i) determined by the following formula:

[0073] Sequence(i) = Insert(q i-1 , Sequence(i-1)).

[0074] As can be seen from the foregoing explanation, for C n The PS gate acts on n+1 qubits. q 0 ,q 1 ,……,q n Above, the control bit is q 0 ,q 1 ,……,q n-1 The target position is q n The quantum circuits resulting from the decomposition of such controlled phase-shift gates contain a total of 2... n+2 -3 quantum gates, each with 2 n+1 -1 PS door and 2 n+1 -2 CNOT gates. In order of action: 2 0 =1 target bit is PS Gate, 2 2 =4 target bits q 1 The PS gate and CNOT gate, 2 3 =8 target bits q 2 The PS scandal and CNOT scandal, ..., 2 n +1 The target bits are q n The PS gate and CNOT gate.

[0075] Target position is q 0 The principal argument of the phase shift angle of the PS gate is θ / 2 n .

[0076] Target position is q 1 The PS gate and CNOT gate are applied alternately, including 2 1 = 2 PS gates, the principal arguments of the phase shift angles are θ / 2 respectively. n -θ / 2 n , including 2 1 = 2 CNOT gates, all control bits are q 0 .

[0077] Target position is q 2The PS gate and CNOT gate are applied alternately, including 2 2 =4 PS gates, the principal arguments of the phase shift angles are θ / 2 respectively. n -θ / 2 n θ / 2 n -θ / 2 n Alternating positive and negative; including 2 2 =4 CNOT gates, control bits are as follows: q 1 , q 0 , q 1 , q 0 .

[0078] And so on, the target position is q n The PS gate and CNOT gate are applied alternately, including 2 n For each PS gate, the principal argument values ​​of the phase shift angles are θ / 2. n -θ / 2 n θ / 2 n -θ / 2 n ...alternating between positive and negative; including 2 n There are 1 CNOT gates, and the control bit of the last CNOT gate is... q 0 Of the remaining CNOT gates, the control bit of the CNOT gate located in the very middle is... q 0 The CNOT gate divides the remaining CNOT gates into a first left section and a first right section, with the CNOT gates in the first left section and the first right section having identical configurations. In the first left section, the control position of the CNOT gate located in the very center is... q 1 The CNOT gate divides the remaining CNOT gates into a second left part and a second right part. The CNOT gates of the second left part and the second right part are arranged in the same pattern, ..., and so on, until the target position is... q n 2 n All CNOT gates have been arranged.

[0079] This application mainly utilizes the following related properties of quantum gates, making the decomposed quantum circuit equivalent to a controlled quantum phase shift gate:

[0080] Property 1: Two adjacent I gates can cancel each other out, which can be directly omitted in quantum circuits;

[0081] Property 2: Two adjacent CNOT gates with the same control bit and target bit can cancel each other out, which can be directly omitted in quantum circuits;

[0082] Property 3: The parameters (i.e. the principal arguments of the phase shift angles) are opposites of each other and two adjacent PS gates can cancel each other out, which can be directly omitted in quantum circuits;

[0083] Property 4: Two adjacent PS gates can be merged into one PS gate. At the same time, the parameters of the merged PS gate are equal to the sum of the parameters of the two PS gates before merging, as shown in the following formula (2-1):

[0084] PS(θ1)•PS(θ2)=PS(θ1+θ2) (2-1)

[0085] Property 5: Two global phase gates at arbitrary positions on arbitrary qubits with opposite parameters. The gates can cancel each other out and can be directly omitted in quantum circuits. The gate contains a phase angle θ (0≤θ<2π), and the corresponding two-dimensional matrix is ​​shown in equation (2-2) below:

[0086] (2-2)

[0087] Property 6: Two global phase gates at any position on any qubit The doors can be merged into one. Door, and at the same time, the merged The parameters of the gate are equal to those of the two gates before merging. The sum of the gate parameters is shown in equation (2-3):

[0088] (θ1)• (θ2)= (θ1+θ2) (2-3)

[0089] Property 7: Global Phase Gate The effect of a gate acting on any position on any qubit is equivalent;

[0090] Property 8: The PS gate does not cause any change in the ground state |0> of a single qubit and can be directly omitted. Acting on the |1> state is equivalent to a global phase gate. The door is shown in equations (2-4) and (2-5) below:

[0091] PS(θ)•|0>=|0> (2-4)

[0092] PS(θ)•|1>= (θ)•|1> (2-5)

[0093] Property 9: A set of adjacent I gates, PS gates, and I gates can be simplified to a single global phase gate. A door and a PS door, along with the simplified version. With the gate parameters unchanged, the parameters of the PS gate are negative, as shown in equation (2-6):

[0094] X•PS(θ)•X= (θ)•PS(-θ) (2-6)

[0095] This application cleverly alternates PS gates and CNOT gates on all qubits, ultimately ensuring that when the current n control bits are in any of the states |00…0>, |00…1>,…,|11…0>, the effects of all quantum gates in the circuit cancel each other out, equivalent to an identity I gate; only when the current n control bits are in |11…1>, the effects of all quantum gates on the first n qubits (except for…00…0>, CNOT gates) cancel each other out. q 0 The effects of all quantum gates (excluding the PS gates on the target) cancel each other out, and the effects of all quantum gates on the (n+1)th target bit are mutually exclusive. q 0 The combined effect of the PS gates on the n+1th target bit is equivalent to applying a PS gate. Therefore, this quantum circuit equivalently implements C using only PS and CNOT gates. n The effect of PS doors.

[0096] With C 2 Taking the PS(θ) gate as an example, this illustrates the relationship between the quantum circuit decomposed by this application and C. 2 The PS(θ) gate is equivalent.

[0097] See Figure 3 , Figure 3 According to one embodiment of this application, C 2 A schematic diagram of the quantum circuit after PS(θ) gate decomposition. Figure 3 In the diagram, "+" indicates the parameter value θ / 2. 2 "-" indicates the parameter value -θ / 2 2 .

[0098] The following is for q 0 The two states, |0> and |1>, are explained in different cases. Figure 3 The effect of the quantum circuit shown.

[0099] (1) When q 0 When in the |0> state, according to property 8, q 0 The first PS(+) gate on the top will not cause q 0 The changes in the upper quantum state can be omitted; based on the effect of the CNOT gate, it can be known that... q0 Since the four CNOT gates for the control bits are ineffective, they can be omitted; at this point, we get... Figure 4 The quantum circuit shown. Figure 4 Is Figure 3 Based on the quantum circuit shown, when q 0 A schematic diagram of a quantum circuit in the |0> state.

[0100] Obviously, in q 1 Applying property 3 above, in q 2 Applying property 3, property 2, and property 3 in sequence, we can... Figure 3 All eight quantum gates in the code are omitted, which means that when q 0 When in the |0> state, regardless of q 1 q 2 What state is it in? q 0 q 1 q 2 The quantum states of C do not change at all. 2 The PS(θ) gate has the same effect.

[0101] (2) When q 0 When in the state |1>, according to properties 8 and 7, we know that... q 0 The first PS(+) door on can be replaced with q 1 The one above (+) door, q 0 Still in the |1> state; based on the effect of the CNOT gate, it can be known that... q 0 To ensure that all four CNOT gates of the control bit are active, it can be simplified to the I gates on the corresponding target bits; at this point, we obtain... Figure 5 Quantum circuits. Figure 5 Is Figure 3 Based on the quantum circuit shown, when q 0 A schematic diagram of a quantum circuit in the |1> state.

[0102] Obviously, in q 1 Applying properties 9, 5, and 4 in sequence, we can... q 1 Simplifying the five quantum gates, we get Figure 6 Quantum circuits. Figure 6 Is Figure 3 Based on the quantum circuit shown, when q 0 A simplified schematic diagram of the quantum circuit when in the |1> state.

[0103] exist Figure 6 In this context, "2+" indicates twice the parameter value θ / 2. 2 That is, θ / 2.

[0104] At this time, in response to q 1 The two states, |0> and |1>, will be discussed in separate cases.

[0105] (1) When q 1 When in the |0> state, according to property 8, q 1 The first PS(2+) gate can be omitted; based on the effect of the CNOT gate, it can be concluded that... q 1 Since the two CNOT gates for the control bits are ineffective, they can be omitted; in this case, we get... Figure 7 Quantum circuits. Figure 7 Is Figure 3 Based on the quantum circuit shown, when q 1 A simplified schematic diagram of the quantum circuit when in the |0> state.

[0106] Obviously, in q 2 Applying property 3 and property 1 in sequence, we can... Figure 7 All six quantum gates in the code are omitted, which means that when q 0 In the |1> state, q 1 When in the |0> state, regardless of q 2 What state is it in? q 0 q 1 q 2 The quantum states of C do not change at all. 2 The effect of PS(θ) is the same.

[0107] (2) When q 1 When in the state |1>, according to property 8, q 1 The first PS(2+) door on can be replaced with q1 The one above (2+) doors, q 1 Still in the |1> state; based on the effect of the CNOT gate, it can be known that... q 1 To ensure that both CNOT gates of the control bit are active, it can be simplified to an I gate on the corresponding target bit; at this point, we obtain... Figure 8 Quantum circuits. Figure 8 Is Figure 3 Based on the quantum circuit shown, when q 1 A simplified schematic diagram of the quantum circuit when in the |1> state.

[0108] Obviously, in q 2 Applying properties 9, 7, 6, 5, and 4 in sequence, we can... Figure 8 The nine quantum gates in the text are simplified, leaving only... q 2 A PS(θ) gate (i.e., a PS(4+) gate, where "4+" indicates four times the parameter value θ / 2) is used. 2 (i.e., θ), which means when q 0 and q 1 When both are in the |1> state, regardless of q 2 In what state, q 2 Apply a PS(θ) gate to C. 2 The effect of PS(θ) is the same.

[0109] In conclusion, q 0 q 1 q 2 In any state, Figure 3 C 2 All PS(θ) gate decomposition circuits can be equivalently implemented using C. 2 The effect of the PS(θ) gate.

[0110] Figure 9 This is a flowchart of a method for constructing a controlled quantum phase-shift gate quantum circuit according to an embodiment of the present invention. The method for constructing a controlled quantum phase-shift gate quantum circuit includes the following steps:

[0111] Step S1: Initialize the construction parameters to their minimum values. These parameters include: the qubit index i where the PS gate is located (1 ≤ i ≤ n, n is the index of the last qubit, 2 ≤ n); and the number j of phase shift gates already configured on each qubit (0 ≤ j ≤ 2). i -1; CNOT gate control bit parameter k, 1≤k≤i. After initialization, i=1, j=0, k=1.

[0112] Step S2: Configure a PS gate on the 0th qubit, with the principal argument of its phase shift angle configured as phase(θ / 2). n ).

[0113] Step S3: Determine if i is less than or equal to n. If i is less than or equal to n, proceed to step S4; otherwise, end the process. Here, the PS gate configuration bit number i points to the bit q to which the PS gate will be applied. i It also points to the target bit of the CNOT gate that is about to be applied. q i The initial value of parameter i is 1, indicating that the vector sub-bits will be vectored soon. q 1 Apply a quantum gate. Determine if i is less than or equal to n, i.e., determine the qubit corresponding to the active bit of the PS gate to be applied. q i Does it go beyond qubits? q 0 ,q 1 ,……,q n The range.

[0114] Step S4: Determine if j is less than or equal to 2 i -1; if j is less than or equal to 2 i -1, proceed to step S5; if j is not less than 2 i -1, execute step S10. Wherein, parameter j (0≤j≤2) i -1) indicates that it has been applied. q i The number of PS gates on the target bit also indicates the number of gates that have been applied. q i The number of CNOT gates, with parameter j initialized to 0, representing a qubit. q i No quantum gate has been applied yet. If j≤2 i -1 indicates that an application has been applied to the qubit. q i The PS gate on and the applied target bit are q i The number of CNOT gates did not exceed 2 i-1. When j is not less than 2 i -1 indicates that in a quantum bit q i The total number of PS gates and CNOT gates applied has reached 2. i If the PS gate and CNOT gate cannot be applied, then the parameter i is incremented by 1 in step S10, and the application of the quantum gate on the next qubit begins.

[0115] Step S5: Determine if k is less than or equal to i; if k is less than or equal to i, proceed to step S6; if k is not less than or equal to i, proceed to step S10. The parameter k (1 ≤ k ≤ i) is used to calculate the qubit. q i The control bit number ik of the (j+1)th CNOT gate is given, and the initial value of k is 1.

[0116] If k≤i, that is, the qubit being checked q i-k Not exceeding the quantum bit q 0 ,q 1 ,……,q n If the range is specified, then the qubits are checked in step 6. q i-k Is it a quantum bit? The control bit of the (j+1)th CNOT gate.

[0117] Step S6: Determine if relation (3-1) is true. Substitute the current values ​​of i, j, and k into relation (3-1). If relation (3-1) is true, proceed to step S7. If relation (3-1) is false, proceed to step S9.

[0118] (3-1)

[0119] In this context, "|" represents integer division, and "%" represents the remainder operation.

[0120] Step 6 is used to check the qubits. q i-1 Whether it is the control bit of the CNOT gate is determined by judging the quantum bit. q i The sequence number i, the number of quantum gates to be applied, the sequence number j, and the qubits being checked. q i-k Check if the relationship between the three items k (3-1) is true. If it is true, proceed to step S7.

[0121] Step S7: Configure the phase shift gate and CNOT gate. Specifically, configure a PS gate on the i-th qubit with a phase shift angle of . A CNOT gate is configured on the i-th qubit and the ik-th qubit, where the i-th qubit is the target bit of the CNOT gate and the ik-th qubit is the control bit of the CNOT gate.

[0122] Step S8: Set j = j + 1, then return to step S4.

[0123] Step S9: Set k=k+1, then return to step S5.

[0124] Step 10: Set i = i + 1, then return to step S3.

[0125] The above describes the construction of a quantum circuit with an n-controllable phase shift gate. See details... Figure 2 .

[0126] The decomposition method provided in this application can be used to implement C for any n (n=1,2,3,…) control bits. n The decomposition of the PS gate results in a quantum circuit containing only a single-qubit PS gate and a two-qubit CNOT gate, compared to C... n PS gates are closer to the set of quantum gates supported by quantum computers, making them easier to implement on quantum computers. Compared to existing C... n Compared to the method of decomposing a PS gate into a CPS gate (a PS gate with one control bit) and combining it with a CNOT gate, since most quantum computers do not directly support CPS gates, further decomposition is still necessary. Ultimately, the CPS gate will be decomposed into a CPS gate. n PS door is broken down into 3.2 n+1 -A combination of 7 PS gates and CNOT gates. The decomposition method provided in this application can be used to decompose identical C gates. n PS door is broken down into 2 n+2 The combination of -3 PS gates and CNOT gates reduces the number of gates by 2 compared to the above method. n+1 -4 quantum gates, achieving an exponential optimization effect in the number of quantum gates.

[0127] Application Examples

[0128] The exact Grover algorithm is a quantum algorithm for solving unordered database search problems. It achieves both exact and fast search efficiency, offering a quadratic speedup compared to classical algorithms. It is commonly used for solving minimum value problems, string matching, and quantum dynamic programming problems. The exact Grover algorithm has several implementation methods, including 3D rotation, big-small-step, and conjugate rotation. The 3D rotation method requires multiple uses of C++. nUsing PS gates to construct precise search operators, and then forming the quantum circuits of the algorithm, often results in quantum computers being unable to directly run the corresponding quantum circuits of the algorithm.

[0129] The method proposed in this invention is used to integrate all quantum circuits in the three-dimensional rotation method. Decomposing the gate into a combination of PS gates and CNOT gates, so that the decomposed circuit is composed entirely of single-qubit gates and CNOT gates, is closer to the set of quantum gates supported by quantum computers, and is more conducive to executing the precise Grover algorithm based on three-dimensional rotation on quantum computers.

[0130] In the precise Grover algorithm based on 3D rotation, if the unordered database contains 2 4 Given a set of data points, and searching for two target data points within them, the quantum circuit constructed by the algorithm will contain four qubits, denoted as _____. q 0 ,q 1 ,q 2 ,q 3 The line will use several C... 3 PS(θ) gate (the phase angle can be calculated using a three-dimensional rotation method) In this type of gate, the target bit is the same qubit, and the other three qubits are control bits. Assuming... q 0 ,q 1 ,q 2 This is the control position for this type of door. q 3 It is the target bit. The method proposed in this invention is used to target this C. 3 The PS(θ) gate is used for decomposition; for specific steps, please refer to [link / reference]. Figure 9 In this application embodiment, firstly, in step S1, the initial value of parameter i is set to 1, and the maximum value is 3, i.e., 1≤i≤3. Parameter i points to the active bit of the PS gate that is about to be applied. q i It also points to the target bit of the CNOT gate that is about to be applied. q i The initial value of parameter j is 0, 0 ≤ j ≤ 7, i.e., 2. 3 -1=7, parameter j indicates the value already applied to... q i The number of PS gates on the target bit also indicates the number of PS gates that have been applied. q i The number of CNOT gates; the initial value of parameter k is 1, 1≤k≤3, and parameter k is used to calculate q iThe control bit ik of the (j+1)th CNOT gate. Then in step S2, in q 0 Apply a PS(θ / 2) to 3 )Door.

[0131] Repeat steps 3 to 10, iterating through the cases of i=1, 2, 3 respectively, that is, sequentially vectorizing the sub-bits. q 1 ,q 2 ,q 3 Apply a quantum gate to i; iterate through j = 0, 1, ..., 2 for each value of i. i The case of -1, i.e., the total vector sub-bits q i Apply 2 i One PS door and 2 i Each CNOT gate; in each value of j, the cases of k=1,2,...,i are traversed, that is, the qubits are checked sequentially. q i-1 ,q i-2 ,……,q 0 Whether it is the control bit of the corresponding CNOT gate, and determine the application status of the PS gate and CNOT gate according to relation 3-1 in step S6.

[0132] In this application embodiment, the initial values ​​are set as i=1, j=0, and k=1. The changes of i, j, and k, the validity of relation (3-1), and the application of PS gate and CNOT gate during the entire traversal process are shown in Table 1 below (cases where the regularity equation does not hold, i.e., cases where PS gate and CNOT gate are not needed, have been omitted from the table):

[0133] Table 1:

[0134]

[0135] Based on the data in Table 1 and according to Figure 9 The complete decomposition path obtained from the construction method flow shown is as follows: Figure 10 As shown, Figure 10 This is a schematic diagram of a decomposed quantum circuit constructed according to an application embodiment of this application. Figure 10 In the diagram, "+" indicates the parameter value θ / 2. 3 "-" indicates the parameter value -θ / 2 3 .

[0136] This method successfully converted a C 3 The PS(θ) gate is decomposed into 2 3+2-3 = 29 PS gates and CNOT gates combined, if all C in the three-dimensional rotating quantum circuit are... 3 If all PS(θ) gates are decomposed as described above, the resulting circuits consist only of single-qubit gates and CNOT gates, making them easier to run on quantum computers. This is beneficial for promoting the use of quantum computers in solving practical application problems such as disordered database search.

[0137] In another aspect, the present invention also provides a decomposition device for a controlled phase shift gate, see [link to relevant documentation]. Figure 11 , Figure 11 This is a block diagram illustrating the principle of a decomposition device for a controlled phase shift gate according to an embodiment of this application. The decomposition device 100 for a controlled phase shift gate (hereinafter referred to as the decomposition device) provided in this embodiment includes a controlled phase shift gate acquisition unit 110 and a controlled phase shift gate decomposition unit 120. The controlled phase shift gate acquisition unit 110 is configured to acquire the controlled phase shift gate to be decomposed, the controlled phase shift gate having n control bits and 1 target bit; the controlled phase shift gate decomposition unit 120 is configured to decompose the controlled phase shift gate into multiple single-qubit PS gates and multiple two-qubit CNOT gates applied to a quantum circuit, wherein the quantum circuit has n+1 qubits q0, q1, ..., q n And the qubits q0, q1, ..., q n-1 Each of the n control bits corresponding to the controlled phase shift gate, and the qubit q n The target position corresponding to the controlled phase shift gate.

[0138] Figure 12 This is a block diagram of a controlled phase-shift gate decomposition unit according to an embodiment of this application. The controlled phase-shift gate decomposition unit 120 provided in this embodiment includes: a first decomposition unit 121, a second decomposition unit 122, and a phase parameter configuration unit 123. The first decomposition unit 121 is configured to apply a single-qubit PS gate to qubit q0; the second decomposition unit 122 is configured to apply a single-qubit PS gate to qubit q0. i Above, i∈{1,2,……,n}, apply 2 alternately i A single-qubit PS gate and 2 i Two-qubit CNOT gates, wherein the 2 i The phase parameters of a single-qubit PS gate are alternately set to positive and negative values, the 2 i The target bits of each two-qubit CNOT gate are arranged at qubit q. i Above, the 2 i The control bits of a two-qubit CNOT gate are recursively arranged in qubits q0, q1, ..., q2. i-1 Above. The phase parameter configuration unit 123 is configured to configure the phase parameter of each single-qubit PS gate to θ / 2.n , where θ is the phase parameter of the controlled phase shift gate.

[0139] The second decomposition unit 122 includes an initial arrangement unit 1221 and a recursive arrangement unit 1222. The initial arrangement unit 1221 is configured to apply a 2... when i=1 to the qubit q1. 1 The control bits of each two-qubit CNOT gate are arranged on qubit q0; the recursive arrangement unit 1222 is configured such that when i≥2, the control bits of qubit q0 are all located on qubit q0. i 2 applied on i The control bits of the two-qubit CNOT gate are sequentially arranged on the qubits included in Sequence(i) determined by the following formula:

[0140] Sequence(i) = Insert(q i-1 Sequence(i-1));

[0141] Wherein, Sequence(i-1) represents the sequence formed by the quantum bit q i-1 2 applied on i-1 Sequence(i) is a sequence of qubits whose control bits of a two-qubit CNOT gate are arranged sequentially. i 2 applied on i The sequence of qubits, whose control bits of two-qubit CNOT gates are arranged sequentially, is used by Insert to insert qubit q before each qubit in the sequence represented by Sequence(i-1). i-1 To determine the qubits included in the sequence represented by Sequence(i).

[0142] The controlled quantum phase shift gate decomposition method and apparatus provided in this application can be applied to controlled phase shift gates with any number of control bits. It does not require different decomposition steps for different numbers of control bits, which simplifies the decomposition complexity in application and makes it easier to implement physically.

[0143] The final decomposition result contains only single-qubit gates and CNOT gates. No secondary decomposition is required during actual operation of a quantum computer, making it easier to implement systems containing single-qubit gates on a quantum computer. Quantum algorithms for gates.

[0144] In existing decomposition methods, C can be decomposed into... n A PS gate is decomposed into a combination of a CPS gate (a PS gate with one control bit) and a CNOT gate. However, quantum computers often do not directly support CPS gates, so further decomposition is necessary. Ultimately, the CPS gate will be decomposed into a combination of a CPS gate (a PS gate with one control bit) and a CNOT gate. n PS door is broken down into 3.2n+1 -A combination of 7 PS gates and CNOT gates. This application, however, will use the same C... n PS door is broken down into 2 n+2 The combination of 3 PS gates and CNOT gates reduces the number of gates by 2 compared to existing methods. n+1 -4 quantum gates, achieving an exponential optimization effect in the number of quantum gates.

[0145] On the other hand, this application also provides a computing device, see [link to application]. Figure 13 , Figure 13 This is a structural principle block diagram of a computing device according to an embodiment of this application. Figure 13 As shown, the computing device includes a processor 601 and a memory 602 storing computer program instructions; when the processor 601 executes the computer program instructions, it implements the decomposition method for controlled quantum phase shift gates in the foregoing embodiments.

[0146] Specifically, processor 601 may include a central processing unit (CPU) or a graphics processing unit (GPU), or an application-specific integrated circuit (ASIC), or one or more integrated circuits that can be configured to implement the embodiments of this application. Memory 602 may include memory for data or instructions. For example, memory 602 may be at least one of the following: a hard disk drive (HDD), read-only memory (ROM), random access memory (RAM), floppy disk drive, flash memory, optical disk, magneto-optical disk, magnetic tape, universal serial bus (USB) drive, or other physical / tangible memory storage device. Alternatively, memory 602 may include removable or non-removable (or fixed) media. Furthermore, memory 602 may be internal or external to the integrated gateway disaster recovery device. Memory 602 may be non-volatile solid-state memory. In other words, memory 602 typically includes a tangible (non-transitory) computer-readable storage medium (such as a memory device) encoded with executable instructions, wherein the stored executable instructions, when executed by processor 601 (such as by one or more processors), can implement the decomposition method for controlled quantum phase shift gates in the embodiments of this application.

[0147] In one example Figure 13 The illustrated electronic device may also include a communication interface 603 and a bus 610. The processor 601, memory 602, and communication interface 603 are connected via the bus 610 and communicate with each other. The communication interface 603 is mainly used to enable communication between modules, devices, units, and / or equipment within the electronic device.

[0148] Bus 610, including hardware, software, or both, couples components of an online data traffic metering device together. For example, the bus may include at least one of the following: Accelerated Graphics Port (AGP) or other graphics bus, Enhanced Industry Standard Architecture (EISA) bus, Front Side Bus (FSB), HyperTransport (HT) interconnect, Industry Standard Architecture (ISA) bus, Infinite Bandwidth Interconnect, Low Pin Count (LPC) bus, memory bus, Microchannel Architecture (MCA) bus, Peripheral Component Interconnect (PCI) bus, PCI-Eipress (PCI-I) bus, Serial Advanced Technology Attachment (SATA) bus, Video Electronics Standards Association Local (VLB) bus, or other suitable bus. Bus 610 may include one or more buses. Although specific buses are described or illustrated in embodiments of this application, any suitable bus or interconnection method is contemplated in embodiments of this application.

[0149] In another aspect, embodiments of this application also provide a computer-readable storage medium storing computer program instructions. When executed by a processor, these computer program instructions implement the aforementioned decomposition method for controlled quantum phase shift gates. The computer-readable storage medium can be, for example, a classical computer-readable storage medium, such as a read-only memory (ROM), random access memory (RAM), disk storage medium, optical storage medium, flash memory, or electrical, optical, or other physical / tangible memory storage device. It can also be a storage medium for storing quantum information that is readable by a quantum computer, such as quantum random access memory (QRAM). QRAM can be considered a quantum version of RAM in a classical computer. Through QRAM, quantum superposition states containing information can be created. Compared to RAM, which requires reading each element individually, superimposed data can be read from superimposed addresses. QRAM can be implemented using physical methods such as optics, semiconductor quantum dots, superconducting circuits, and ion traps.

[0150] The flowcharts and / or block diagrams of the methods and systems according to embodiments of this application have been described above by way of example, and related aspects have been described. It should be understood that each block or combination thereof in the flowcharts and / or block diagrams may be implemented by computer program instructions, by dedicated hardware performing the specified function or action, or by a combination of dedicated hardware and computer instructions. For example, these computer program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to form a machine such that these instructions, which execute via such processor, enable the implementation of the function / action specified in each block or combination thereof in the flowcharts and / or block diagrams. Such a processor may be a general-purpose processor, a dedicated processor, a special-purpose application processor, or a field-programmable logic circuit.

[0151] The functional blocks shown in the structural block diagrams of this application can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, they can be, for example, electronic circuits, application-specific integrated circuits (ASICs), appropriate firmware, plug-ins, function cards, etc.; when implemented in software, they are programs or code segments used to perform the required tasks. Programs or code segments can be stored in memory or transmitted over a transmission medium or communication link via data signals carried on a carrier wave. Code segments can be downloaded via computer networks such as the Internet or intranets.

[0152] The above embodiments are for illustrative purposes only and are not intended to limit the scope of this application. Those skilled in the art can make various changes and modifications without departing from the scope of this application. Therefore, all equivalent technical solutions should also fall within the scope of this application.

Claims

1. A decomposition method for a controlled phase-shifting gate, characterized in that, include: Obtain the controlled phase shift gate to be decomposed, wherein the controlled phase shift gate has n control bits and 1 target bit; The controlled phase shift gate is decomposed into multiple single-qubit PS gates and multiple two-qubit CNOT gates applied to the quantum circuit, wherein the quantum circuit has n+1 qubits q0, q1, ..., q n And the qubits q0, q1, ..., q n-1 Each of the n control bits corresponding to the controlled phase shift gate, and the qubit q n Corresponding to the target position of the controlled phase shift gate, the decomposition includes: A single-qubit PS gate is applied to qubit q0; In quantum bit q i Above, i∈{1,2,……,n}, apply 2 alternately i A single-qubit PS gate and 2 i Two-qubit CNOT gates, wherein the 2 i The phase parameters of a single-qubit PS gate are alternately set to positive and negative values, the 2 i The target bits of each two-qubit CNOT gate are arranged at qubit q. i Above, the 2 i The control bits of a two-qubit CNOT gate are recursively arranged in qubits q0, q1, ..., q2. i-1 superior.

2. The decomposition method according to claim 1, characterized in that, The 2 i The control bits of a two-qubit CNOT gate are recursively arranged in qubits q0, q1, ..., q2. i-1 Above, including: When i=1, a 2 is applied to the qubit q1 1 The control bits of each two-qubit CNOT gate are arranged on qubit q0; When i≥2, in the quantum bit q i 2 applied on i The control bits of the two-qubit CNOT gate are sequentially arranged on the qubits included in Sequence(i) determined by the following formula: Sequence(i) = Insert(q i-1 , Sequence(i-1)); Wherein, Sequence(i-1) represents the sequence formed by the quantum bit q i-1 2 applied on i-1 Sequence(i) is a sequence of qubits whose control bits of a two-qubit CNOT gate are arranged sequentially. i 2 applied on i The sequence of qubits, whose control bits of two-qubit CNOT gates are arranged sequentially, is used by Insert to insert qubit q before each qubit in the sequence represented by Sequence(i-1). i-1 To determine the qubits included in the sequence represented by Sequence(i).

3. The decomposition method according to claim 1, characterized in that, The decomposition also includes: Configure the phase parameter of each single-qubit PS gate to θ / 2. n , where θ is the phase parameter of the controlled phase shift gate.

4. A decomposition device for a controlled phase shift gate, characterized in that, include: The controlled phase shift gate acquisition unit is configured to acquire the controlled phase shift gate to be decomposed, wherein the controlled phase shift gate has n control bits and 1 target bit; The controlled phase shift gate decomposition unit is configured to decompose the controlled phase shift gate into multiple single-qubit PS gates and multiple two-qubit CNOT gates applied to the quantum circuit, wherein the quantum circuit has n+1 qubits q0, q1, ..., q n And the qubits q0, q1, ..., q n-1 Each of the n control bits corresponding to the controlled phase shift gate, and the qubit q n Corresponding to the target position of the controlled phase shift gate, wherein the controlled phase shift gate decomposition unit includes: The first decomposition unit is configured to apply a single-qubit PS gate to qubit q0; The second decomposition unit is configured in the qubit q i Above, i∈{1,2,……,n}, apply 2 alternately i A single-qubit PS gate and 2 i Two-qubit CNOT gates, wherein the 2 i The phase parameters of a single-qubit PS gate are alternately set to positive and negative values, the 2 i The target bits of each two-qubit CNOT gate are arranged at qubit q. i Above, the 2 i The control bits of a two-qubit CNOT gate are recursively arranged in qubits q0, q1, ..., q2. i-1 superior.

5. The decomposition apparatus according to claim 4, characterized in that, The second decomposition unit includes: The initial arrangement of the cells is configured such that when i=1, a 2-1 force is applied to qubit q1. 1 The control bits of each two-qubit CNOT gate are arranged on qubit q0; The recursive arrangement unit is configured such that when i≥2, in the qubit q i 2 applied on i The control bits of the two-qubit CNOT gate are sequentially arranged on the qubits included in Sequence(i) determined by the following formula: Sequence(i) = Insert(q i-1 , Sequence(i-1)); Wherein, Sequence(i-1) represents the sequence formed by the quantum bit q i-1 2 applied on i-1 Sequence(i) is a sequence of qubits whose control bits of a two-qubit CNOT gate are arranged sequentially. i 2 applied on i The sequence of qubits, whose control bits of two-qubit CNOT gates are arranged sequentially, is used by Insert to insert qubit q before each qubit in the sequence represented by Sequence(i-1). i-1 To determine the qubits included in the sequence represented by Sequence(i).

6. The decomposition apparatus according to claim 4, characterized in that, The controlled phase shift gate decomposition unit further includes: The phase parameter configuration unit is configured to configure the phase parameter of each single-qubit PS gate to θ / 2. n , where θ is the phase parameter of the controlled phase shift gate.

7. A computing device, characterized in that, include: processor; The memory stores a computer program that, when executed by a processor, implements the decomposition method for a controlled phase-shifting gate as described in any one of claims 1-3.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that, when executed by a processor, implement the decomposition method for a controlled phase-shifting gate as described in any one of claims 1-3.

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