Power substrate, power module and preparation method of power module

Abstract

The invention discloses a power substrate, a power module and a preparation method of the power module, and is applied to the technical field of power devices. The heat dissipation structure comprises a heat dissipation metal plate, and a groove is formed in the surface of one side of the heat dissipation metal plate; the insulating layer is fixed on the bottom surface of the groove; the electrical connection layer is arranged on the surface of one side, far away from the heat dissipation metal plate, of the insulating layer; the distance between the top face of the electrical connection layer and the bottom face of the groove is not smaller than the depth of the groove, and the electrical connection layer is isolated from the side wall of the groove. By etching the groove in the heat dissipation metal plate and directly arranging the insulating layer in the groove, the arrangement of a traditional metal connecting layer can be reduced, and the distance from the insulating layer to the bottom surface of the heat dissipation metal plate can be reduced, so that the heat dissipation path is reduced, and the heat dissipation efficiency is improved. Meanwhile, the distance between the top surface of the electrical connection layer and the bottom surface of the groove is not smaller than the depth of the groove, so that the position of the power chip can be higher than the heat dissipation metal plate, and the size of the power module is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of power devices, and in particular to a power substrate, a power module and a method for preparing the power module. Background Art

[0002] A power semiconductor module is a device capable of high-frequency, high-voltage, and high-current output. It consists of multiple power chips arranged according to a specific electrical topology and packaged into an integrated module, making it easily applicable in the industrial, new energy, and electronics sectors. As a key component of power modules, the power substrate plays a vital role in industries such as new energy vehicles. With continuous technological advancements and market development, power substrates are expected to exhibit higher performance, lower costs, smaller size, and lighter weight.

[0003] In existing power module packaging structures, the power substrate plays a crucial role, providing electrical interconnection and insulation, corrosion protection, mechanical support, and heat dissipation for semiconductor chips. Currently, commonly used power substrates can be categorized by material, including polymer substrates, insulated metal substrates, and ceramic substrates. Due to the high voltage, high power, and high heat generation characteristics of power semiconductor modules, the use of polymer and insulated metal substrates is significantly limited. Ceramic substrates, however, are the most widely used due to their high thermal conductivity, excellent heat resistance, high insulation, and high strength.

[0004] Currently, ceramic substrates typically consist of an electrical connection layer, a ceramic layer, and a metal connection layer from top to bottom. The metal connection layer is used to connect to a heat dissipation metal plate, which is then equipped with a heat dissipation structure on its outer surface. The heat dissipation path from the power chip typically goes from solder layer to electrical connection layer, then to ceramic layer, then to metal connection layer, then to solder layer, then to heat dissipation metal plate, and finally to heat dissipation structure. This long heat dissipation path results in high thermal resistance and low heat dissipation efficiency in practical applications. This poor heat dissipation performance often leads to power module failure, resulting in serious safety incidents, particularly in new energy motor drives. Therefore, finding a power substrate with a short heat dissipation path is an urgent challenge for those skilled in the art. Summary of the Invention

[0005] An object of the present invention is to provide a power substrate having high heat dissipation performance; another object of the present invention is to provide a power module and a method for preparing a power module having high heat dissipation performance.

[0006] In order to solve the above technical problems, the present invention provides a power substrate, comprising:

[0007] Heat dissipation structure; the heat dissipation structure includes a heat dissipation metal plate, and a groove is provided on one side surface of the heat dissipation metal plate;

[0008] an insulating layer fixed to the bottom surface of the groove;

[0009] An electrical connection layer is arranged on the surface of the insulating layer away from the heat dissipation metal plate; the distance between the top surface of the electrical connection layer and the bottom surface of the groove is not less than the depth of the groove, and the electrical connection layer is isolated from the side wall of the groove.

[0010] By etching grooves in the heat dissipation metal plate and directly placing an insulating layer within the grooves, the traditional metal connection layer can be reduced and the distance between the insulating layer and the bottom surface of the heat dissipation metal plate can be shortened, thereby shortening the heat dissipation path and improving heat dissipation efficiency. Furthermore, the distance between the top surface of the electrical connection layer and the bottom surface of the groove is set to be no less than the groove depth, allowing the power chip to be positioned higher than the heat dissipation metal plate. This increases the vertical isolation between the power chip and the heat dissipation metal plate, ensuring further improvement in the heat dissipation performance of the power module while reducing the power module's size.

[0011] Optionally, the top surface of the electrical connection layer is flush with the top surface of the groove sidewall.

[0012] Optionally, there is a first gap between the side surface of the insulating layer and the side wall of the groove; and / or there is a second gap between the edge of the electrical connection layer and the edge of the insulating layer.

[0013] Optionally, the insulating layer includes a main body layer made of the same material as the substrate in the power chip to be bonded, and the main body layer is provided with an insulating film layer at least on the surface where the electrical connection layer is provided, and the electrical connection layer is isolated from the main body layer by the insulating film layer.

[0014] The thermal expansion coefficient of the insulation layer provided in this application is highly matched with the power chip. Whether it is the vacuum high-temperature reflow soldering during the production process or the high-temperature working environment of the module, the deformation of the insulation layer is consistent with the deformation of the power chip, which reduces the risk of power chip failure and improves device reliability.

[0015] Optionally, the main layer includes a silicon wafer, and the insulating film layer includes an oxide layer.

[0016] The insulating layer of this application uses the same silicon material as the power chip, which facilitates synchronous electrical consistency and can solve the technical problem of deformation caused by thermal stress during the power chip welding process, which can lead to power chip failure. This solution uses the same silicon-based material as the power chip as the insulating layer of the power chip, with the same or similar thermal expansion coefficient. At the same temperature, the deformation is the same, with little error. This avoids the deformation difference caused by the different thermal expansion coefficients of the insulating layer during the power chip welding process, which can lead to power chip failure and damage. At the same time, the power module of this solution uses silicon wafers as the substrate, which has low material cost and high thermal conductivity, which is conducive to reducing the size of the power chip and device volume.

[0017] Optionally, the electrical connection layer is a metal layer having fluidity when fixing the power chip at the first temperature.

[0018] This application reduces the copper foil layer, significantly reducing the thermal resistance of the three layers. The lightweight structure and the reduction of metal layers offer low cost and high reliability. While reducing material, the power module's lateral heat dissipation capacity increases by 10-30 times, significantly improving heat dissipation performance while maintaining reliability. The use of liquid metal to form the electrical metal layer further avoids power chip failures caused by inconsistent thermal expansion coefficients, improving the production yield of power modules and reducing cost losses.

[0019] Compared with the thermal stress compensation structure of the existing heat dissipation base plate, this application does not require an arc design, has a thin solder layer, good soldering quality, small residual stress, low leakage risk, and high reliability.

[0020] Optionally, a solder layer is provided on the surface of the electrical connection layer facing away from the insulating layer, and the solder layer is used to fix the power chip.

[0021] The present application also provides a power module, comprising a power chip and a power substrate as described in any one of the above items, wherein the power chip is fixedly connected to the electrical connection layer.

[0022] The present application also provides a method for preparing a power module, comprising:

[0023] A groove is provided on one side surface of the heat dissipation metal plate of the heat dissipation structure;

[0024] fixing an insulating layer in the groove;

[0025] An electrical connection layer is provided on a surface of the insulating layer away from the heat dissipation metal plate; a distance between a top surface of the electrical connection layer and a bottom surface of the groove is not less than a depth of the groove, and the electrical connection layer is isolated from a sidewall of the groove;

[0026] The power chip is fixed based on the electrical connection layer until the preparation of the power module is completed.

[0027] Optionally, providing an electrical connection layer on a surface of the insulating layer away from the heat dissipation metal plate includes:

[0028] Printing a patterned solder layer on the surface of the insulating layer away from the heat dissipation metal plate;

[0029] Fixing the power chip based on the electrical connection layer includes:

[0030] A patterned metal layer is printed on the surface of the insulating layer away from the heat dissipation metal plate; the metal layer has fluidity when fixing the power chip at a first temperature;

[0031] Fixing the power chip based on the electrical connection layer includes:

[0032] heating the metal layer to a first temperature and fixing the power chip and the metal layer at the first temperature; the metal layer has fluidity at the first temperature;

[0033] After the power chip is fixed, the temperature of the metal layer is lowered until the metal layer is solidified.

[0034] The preparation method of the heat dissipation metal plate has been significantly changed compared with the existing technology. By using a metal layer with fluidity at the first temperature as the electrical connection layer, the production yield can be improved, the void rate can be reduced, and the product reliability and product qualification rate can be improved, which is suitable for industrial mass production applications.

[0035] By heating the metal layer to a semi-molten state and welding it to the power chip, compared with the existing technology of connecting through solder, the process of this application is simpler and less expensive. At the same time, due to the good toughness of the metal flexible layer of this material and the low void rate, the product yield is high. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the embodiments of the present invention or the technical solutions of the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0037] Figure 1 A schematic structural diagram of a power substrate provided by an embodiment of the present invention;

[0038] Figure 2 A schematic structural diagram of another power substrate provided by an embodiment of the present invention;

[0039] Figure 3 A schematic diagram of the exploded structure of a power module provided by an embodiment of the present invention;

[0040] Figure 4 A schematic structural diagram of a power module provided by an embodiment of the present invention;

[0041] Figure 5 A flow chart of a method for preparing a power module provided in this embodiment;

[0042] Figure 6 A schematic top view of the structure of a power module prepared in this embodiment;

[0043] Figure 7 for Figure 6Sectional view along line AA;

[0044] Figure 8 This is a flow chart of a specific method for preparing a power module provided by an embodiment of the present invention.

[0045] In the figure: 1. Heat dissipation metal plate, 2. Insulation layer, 3. Electrical connection layer, 4. Raised structure, 5. Power chip, 6. Bonding wire, 7. Power pin, 8. Housing, 9. Packaging colloid, 10. Cover. DETAILED DESCRIPTION

[0046] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. It should be understood that the drawings in the present application only serve the purpose of illustration and description and are not used to limit the scope of protection of the present application. In addition, it should be understood that the schematic drawings are not drawn to scale. The flowcharts used in this application illustrate the operations implemented according to some embodiments of the present application. It should be understood that the operations of the flowcharts can be implemented out of sequence, and steps without logical context can be reversed or implemented simultaneously. In addition, those skilled in the art, under the guidance of the contents of this application, can add one or more other operations to the flowchart, or remove one or more operations from the flowchart.

[0047] In addition, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application generally described and shown in the drawings here can be arranged and designed in various configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application.

[0048] The heat sink baseplate structure for existing power semiconductor modules is typically made of solid metal (copper or aluminum silicon carbide (AlSiC)) plates with a thickness of 3mm to 8mm. It is generally divided into a flat baseplate indirect heat dissipation structure and an integrated pin-fin direct cooling structure. Based on the application requirements, the power module substrate must have high thermal conductivity (the material must have good thermal conductivity to effectively dissipate the heat generated by the power module), a reasonable thermal expansion coefficient (similar to that of the chip to avoid thermal stress at the bonding interface under high temperature conditions, which may lead to fracture or damage of the material bonding interface), high strength (sufficient mechanical strength to operate normally in high-vibration environments), long life (meeting the design life requirements of the vehicle, typically 15 years or more, with zero failure), small size, and low cost (the assembly volume should not be too large to reduce manufacturing costs). The ceramic substrate materials of the DBC ceramic substrate or AMB ceramic substrate used in existing power modules are generally made of Al2O3, AlN, Si3N4 or zirconium-doped Al2O3. Although they meet the needs of most application scenarios, they cannot have the advantages of high thermal conductivity, reasonable thermal expansion, low cost, and high strength. Therefore, adaptive selection is required in different application scenarios and the compatibility is low.

[0049] At the same time, the overall structure of the conventional standard power module in the existing technology is a chip, a DBC (Direct Bonded Copper) ceramic substrate, and a heat dissipation metal plate. The power chip realizes electrical function transmission through bonding wires or bonding copper ribbons. The power chip, DBC ceramic substrate, and heat dissipation metal plate are connected by solder vacuum reflow to achieve thermal conductivity, insulation, and corresponding electrical performance. When the power chip is working, it will generate a lot of heat. Most of this heat is transferred to the heat dissipation metal plate through the DBC ceramic substrate and dissipated by the flow of coolant. This packaging has at least the following technical problems:

[0050] 1. Because this classic packaging module needs to be manufactured in a vacuum and high-temperature environment, the heat dissipation metal plate bends toward the back because its thermal expansion coefficient is smaller than that of the DBC ceramic substrate (see "CN103794571A"). This bending causes fatigue damage to the solder, and solder voids are prone to occur between the DBC ceramic substrate and the heat dissipation base plate, directly affecting the heat dissipation of the entire system. At the same time, during welding, the DBC ceramic substrate and the power chip will also cause deformation due to thermal stress generated by high temperature, which can easily cause excessive deformation and failure of the power chip. Overall reliability is low, the production process requires strict settings, the fixture design is complex, and the production process is complicated and cumbersome.

[0051] Specifically, the power chip, ceramic substrate, and metal baseplate are connected via solder. Each layer of material has a different coefficient of thermal expansion. Temperature changes during the soldering process and operation can cause the baseplate to bend and deform, generating stress on the weld surface. Appropriate mounting pressure is required between the baseplate and the heat sink or cooling water tank to ensure optimal thermal contact, reduce interfacial thermal resistance, or seal the cooling water. This requires the finished module baseplate (heat dissipation metal plate) to have a certain curvature. This curvature is in the opposite direction of the bending deformation caused by welding. Therefore, the baseplate cannot be flat before soldering and a pre-set curvature must be reserved for compensation and suppression. High pre-curvature precision is required, making processing difficult. Excessive curvature results in a thick solder layer that is prone to voids and high mounting stress. Excessive curvature leads to high interfacial thermal resistance or leaks due to poor sealing.

[0052] 2. Due to the differences in thermal expansion coefficients of various materials in the existing power module substrate, the existing process production control is relatively complex and the defect rate is high, which further leads to high production costs and is not conducive to the industrial application of power modules.

[0053] 3. In the existing technology, the ceramic substrate usually includes an electrical connection layer, a ceramic layer and a metal connection layer from top to bottom. The metal connection layer is used to connect to the heat dissipation metal plate, and a heat dissipation structure is provided on the outside of the heat dissipation metal plate. At this time, the heat dissipation path starting from the power chip usually includes welding layer → electrical connection layer → ceramic layer → metal layer connection layer → welding layer → heat dissipation metal plate → heat dissipation structure. The heat dissipation path is long and the heat dissipation efficiency is low.

[0054] Based on this, the present invention provides a power substrate, comprising: a heat dissipation structure; the heat dissipation structure includes a heat dissipation metal plate, a groove being provided on one surface of the heat dissipation metal plate; an insulating layer fixed to the bottom surface of the groove; an electrical connection layer being provided on the surface of the insulating layer on a side away from the heat dissipation metal plate; the distance between the top surface of the electrical connection layer and the bottom surface of the groove being no less than the depth of the groove, and the electrical connection layer being isolated from the sidewalls of the groove.

[0055] By etching grooves in the heat dissipation metal plate and directly placing an insulating layer within the grooves, the traditional metal connection layer can be reduced and the distance between the insulating layer and the bottom surface of the heat dissipation metal plate can be shortened, thereby shortening the heat dissipation path and improving heat dissipation efficiency. Furthermore, the distance between the top surface of the electrical connection layer and the bottom surface of the groove is set to be no less than the groove depth, allowing the power chip to be positioned higher than the heat dissipation metal plate. This increases the vertical isolation between the power chip and the heat dissipation metal plate, ensuring the usability of the power module and facilitating a reduction in the size of the power module.

[0056] In order to enable those skilled in the art to better understand the present invention, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0057] Example 1

[0058] Please refer to Figure 1 , Figure 1 This is a schematic structural diagram of a power substrate provided by an embodiment of the present invention.

[0059] See also Figure 1 In this embodiment, the power substrate includes a heat dissipation structure; the heat dissipation structure includes a heat dissipation metal plate 1, and a groove is provided on one side surface of the heat dissipation metal plate 1; an insulating layer 2 fixed to the bottom surface of the groove; an electrical connection layer 3 is provided on the surface of the insulating layer 2 on the side away from the heat dissipation metal plate 1; the distance between the top surface of the electrical connection layer 3 and the bottom surface of the groove is not less than the depth of the groove, and the electrical connection layer 3 is isolated from the sidewalls of the groove.

[0060] The heat dissipation structure described above is the primary heat dissipation function of the power module and requires at least one heat dissipation metal plate 1. This plate is typically plate-shaped and generally not excessively thick. Typically, the heat dissipation metal plate 1 is made of a highly thermally conductive metal material, such as aluminum or copper, which typically exhibits high thermal conductivity and a certain degree of structural strength. In this embodiment, a groove is etched inwardly on one side of the heat dissipation metal plate 1. This groove further reduces the thickness of the heat dissipation metal plate 1.

[0061] In this embodiment, an insulating layer 2 is secured to the bottom surface of the recess. This insulating layer 2 forms the core structure of the power substrate and must not only provide adequate mechanical properties but also possess excellent heat dissipation and insulation properties. This insulating layer 2 is directly secured to the bottom surface of the recess. In this embodiment, the insulating layer 2 can be soldered to the bottom surface of the recess. In this case, a single layer of solder is placed between the insulating layer 2 and the heat-dissipating metal plate 1, with no other structures, such as metal connecting layers, being present.

[0062] In this embodiment, an electrical connection layer 3 is provided on the surface of the insulating layer 2 away from the heat dissipation metal plate 1. The electrical connection layer 3 is mainly used for welding the power substrate and the power chip 5. Therefore, the electrical connection layer 3 needs to be isolated from the heat dissipation metal plate 1. It is necessary to avoid direct contact between the electrical connection layer 3 and the side wall of the groove, that is, the electrical connection layer 3 needs to be isolated from the side wall of the groove, so as to avoid electrical connection between the electrical connection layer 3 and the heat dissipation metal plate 1.

[0063] In this embodiment, to reduce the heat dissipation path of the power chip 5, the depth of the groove in the heat dissipation metal plate 1 can be further increased. To ensure isolation between the power chip 5 and the heat dissipation metal plate 1, the top surface of the electrical connection layer 3 can be flush with the top surface of the groove sidewall. This minimizes the heat dissipation path from the power chip 5 to the exposed surface of the heat dissipation metal plate 1, while ensuring isolation between the power chip 5 and the heat dissipation metal plate 1.

[0064] Specifically, in this embodiment, there is a first gap between the side of the insulating layer 2 and the side wall of the groove; and / or, there is a second gap between the edge of the electrical connection layer 3 and the edge of the insulating layer 2. In this embodiment, the insulating layer 2 may not be arranged along the inner side wall of the groove, but a first gap may be arranged between the insulating layer 2 and the side wall of the groove, thereby increasing the distance between the electrical connection layer 3 and the heat dissipation metal plate 1 in the lateral direction. Moreover, in this embodiment, a second gap may be arranged between the edge of the electrical connection layer 3 and the edge of the insulating layer 2. At this time, the distance between the electrical connection layer 3 and the heat dissipation metal plate 1 in the lateral direction is the sum of the above-mentioned first gap and the second gap, and the isolation between the electrical connection layer 3 and the heat dissipation metal plate 1 in the lateral direction is further increased. The specific values of the above-mentioned first gap and second gap can be set according to actual conditions and are not specifically limited here. In this embodiment, multiple insulating layers 2 can be arranged in the groove of a heat dissipation structure, and their number is not specifically limited in this embodiment.

[0065] Specifically, in this embodiment, the insulating layer 2 includes a main body layer of the same material as the substrate material of the power chip 5 to be bonded, and an insulating film layer is provided on the surface of the main body layer. That is, in this embodiment, the insulating layer 2 specifically includes a main body layer and an insulating film layer covering the surface of the main body layer. The main body layer is the main structure of the insulating layer 2, so the main body layer can be a flat plate structure, that is, the surface of the main body layer is flat and has no curvature. In this embodiment, the material of the main body layer needs to be the same as the substrate material of the power chip 5 to be bonded, so that the thermal expansion coefficient of the insulating layer 2 can be roughly the same as the thermal expansion coefficient of the power chip 5. This setting can ensure that the insulating layer 2 will not bend due to the large difference in thermal expansion coefficient compared with the power chip 5 in a high-temperature environment, and ensure that no gap will be generated between the power substrate and the power chip 5 due to the difference in thermal expansion coefficient in a high-temperature environment. Therefore, the main body layer can be set as a flat plate structure, and the bottom surface of the corresponding groove can be set as only a plane. At this time, the preparation of the power substrate is relatively simple.

[0066] Since the material of the main body layer is the same as that of the substrate in the power chip 5, it is typically a semiconductor material. This material generally has excellent thermal conductivity. However, to ensure its insulation properties, in this embodiment, an insulating film layer is provided at least on the surface of the main body layer. This insulating film layer is typically attached to the surface of the main body layer in the form of a film. This insulating film layer generally does not significantly affect the thermal expansion coefficient of the main body layer, but can significantly improve its insulation properties, making the semiconductor main body layer suitable for power substrates.

[0067] It should be noted that the above-mentioned insulating film layer needs to be set at least in the area of the main layer corresponding to the area where the electrical connection layer 3 is set, that is, the insulating film layer will isolate the electrical connection layer 3 from the main layer. The electrical connection layer 3 is used for welding with the power chip 5. At this time, the electrical connection layer 3 is electrically isolated from the main layer by the insulating film layer in the thickness direction, and the electrical connection layer 3 is physically separated from the heat dissipation metal plate 1 in the horizontal direction. Therefore, this structure can make the electrical connection layer 3 electrically insulated from the heat dissipation metal plate 1, and avoid the heat dissipation metal plate 1 from interfering with the circuit of the power chip 5. In addition to being set in the area corresponding to the electrical connection layer 3, the above-mentioned insulating film layer can further cover each surface of the main layer, thereby ensuring that the electrical connection layer 3 and the heat dissipation metal plate 1 are insulated from each other. In a feasible example, the above-mentioned insulating film layer can at least cover the surface of the main layer away from the heat dissipation metal plate 1 to ensure that the electrical connection layer 3 and the heat dissipation metal plate 1 are insulated from each other. In another feasible example, in order to facilitate the setting of the insulating film layer, the insulating film layer can cover the entire surface of the main layer.

[0068] Specifically, in this embodiment, the main body layer includes a silicon wafer, and the insulating film layer includes an oxide layer. That is, in this embodiment, a silicon wafer can be selected as the main body layer, and silicon is also the material used for the substrate of the conventional power chip 5. The silicon wafer can be either a single crystal silicon wafer or a polycrystalline silicon wafer, which is not specifically limited here. The selection of a silicon material of the same material as the power chip 5 for the main body layer is conducive to the consistency of the synchronous thermal expansion coefficient, and can solve the technical problem of deformation caused by thermal stress during the welding process of the power chip 5, which leads to chip failure. In this embodiment, the insulating layer 2 adopts the same silicon-based material as the power chip 5, and the thermal expansion coefficient is the same or similar. At the same temperature, the deformation is the same, and the error is not large, which avoids the deformation difference caused by the different thermal expansion coefficients of the power substrate during the welding process of the power chip 5, which leads to failure and damage of the power chip 5.

[0069] The oxide layer specifically serves as the insulating film layer to ensure electrical isolation between the electrical connection layer 3 and the heat dissipation metal plate 1. Typically, the oxide layer covers at least the surface of the silicon wafer facing away from the heat dissipation metal plate 1. Of course, the oxide layer can further cover the entire surface of the silicon wafer to enhance its insulation. It should be noted that the oxide layer needs to be a dense oxide layer, rather than an oxide layer formed by natural oxidation, to enhance its insulation performance.

[0070] Furthermore, in this embodiment, the heat dissipation metal plate 1 is provided with a connection structure connected to the outer shell 8. The connection structure is used to enable the power substrate to be fixedly connected to the outer shell 8 when packaging the power module. The specific content of the connection structure can be set according to actual conditions and is not specifically limited here. Specifically, in this embodiment, the non-groove area of the heat dissipation metal plate 1 can be provided with a mounting hole extending in the thickness direction. The above-mentioned mounting hole serves as a connection structure and can be connected to the outer shell 8 by screws. It should be noted that the mounting hole is provided in the non-groove area of the heat dissipation metal plate 1, and it specifically extends in the thickness direction and does not pass through the insulating layer 2. Therefore, the setting of the mounting hole can avoid affecting the structure of the insulating layer 2, that is, avoiding drilling in semiconductor materials such as silicon to ensure that the insulating layer 2 has sufficient structural strength. In addition to providing the mounting hole as a connection structure, other structures can also be provided as connection structures, which are not specifically limited here.

[0071] The thermal expansion coefficient of the insulation layer provided by this application closely matches that of the power chip. Whether undergoing vacuum high-temperature reflow soldering during production or operating in the high-temperature environment of the module, the insulation layer's deformation remains consistent with that of the power chip, reducing the risk of power chip failure and improving device reliability. Furthermore, the power module of this solution utilizes a silicon wafer as its substrate, offering low material cost and high thermal conductivity, which helps reduce the size of the power chip and device volume.

[0072] The insulating layer 2 of the present application is made of the same silicon material as the power chip 5, which is conducive to synchronous electrical consistency and can solve the technical problem that the thermal stress during the welding process of the power chip 5 causes deformation and thus leads to failure of the power chip 5. The insulating layer 2 of this solution uses the same silicon-based material as the power chip 5, and the thermal expansion coefficient is the same or similar. At the same temperature, the deformation is the same and the error is not large, which avoids the deformation difference caused by the different thermal expansion coefficients of the insulating layer 2 during the welding process of the power chip 5, which leads to failure and damage of the power chip 5.

[0073] The specific contents of a power substrate provided in this application will be described in detail in the following embodiments.

[0074] Example 2

[0075] Please refer to Figure 2 , Figure 2 This is a schematic structural diagram of another power substrate provided by an embodiment of the present invention.

[0076] Different from the above embodiment, this embodiment further defines the structure of the power substrate based on the above embodiment. The rest of the contents have been described in detail in the above embodiment and will not be repeated here.

[0077] See also Figure 2 In this embodiment, the heat dissipation structure also includes a raised structure 4 located on the surface of the heat dissipation metal plate 1 away from the insulating layer 2. The raised structure 4 needs to be fixedly connected to the heat dissipation metal plate 1 so that heat can be transferred to the raised structure 4 through the heat dissipation metal plate 1 for heat dissipation. The raised structure 4 can increase the heat dissipation area relative to the heat dissipation metal plate 1, and the raised structure 4 can be further combined with heat dissipation components such as water cooling to improve the heat dissipation performance of the power substrate. It should be noted that the raised structure 4 and the heat dissipation metal plate 1 are suitable for higher heat dissipation requirements. When the heat dissipation requirement is low, only the heat dissipation metal plate 1 can be set without the above-mentioned raised structure 4, so as to be suitable for low-power application scenarios. This embodiment does not require the provision of a metal connection layer, that is, in this embodiment, the power substrate and the heat dissipation structure can be combined with each other by directly providing the insulating layer 2 in the groove of the heat dissipation metal plate 1. The heat conduction path is very short, which helps to improve the heat dissipation performance of the power substrate.

[0078] Specifically, in this embodiment, the raised structure 4 includes heat dissipation columns extending along a side away from the insulating layer 2, arranged in an array. These columns, combined with the heat dissipation metal plate 1, form a PIN-FIN heat dissipation structure, with the heat dissipation metal plate 1 serving as the base of the PIN-FIN heat dissipation structure. This structure ensures excellent heat dissipation performance of the power substrate, ultimately further enhancing the heat dissipation capability of the power module.

[0079] In this embodiment, the electrical connection layer 3 is a metal layer that is fluid when securing the power chip 5 at a first temperature. In this application, soldering the power substrate and the power chip 5 together is performed at a higher temperature, which is referred to as the first temperature in this embodiment. In this embodiment, the electrical connection layer 3 needs to be fluid when heated to the first temperature for soldering the power substrate and the power chip 5. At this point, the electrical connection layer 3 itself can serve as solder to solder the insulating layer 2 and the power chip 5 together, eliminating the need for additional solder to solder the power chip 5 to the electrical connection layer 3. Therefore, after encapsulating the power chip 5, this structure can further reduce the use of one layer of solder in the heat dissipation path from the power chip 5 to the heat dissipation structure, thereby further improving heat dissipation performance. Furthermore, by configuring the electrical connection layer 3 as a metal layer that is fluid at the first temperature, warping between the electrical connection layer 3 and the insulating layer 2 due to differences in thermal expansion coefficients can be further avoided during soldering of the power chip 5. Furthermore, the fluid electrical connection layer 3 can effectively fill the gap between the insulating layer 2 and the power chip 5, ensuring a tight bond between the two. At the first temperature, the electrical connection layer 3 may be in a liquid state or a semi-solid state, which is not specifically limited here, as long as it has fluidity.

[0080] Typically, the metal layer, which is liquid or semi-solid at the first temperature, requires patterning. The purpose of patterning is to ensure that a certain circuit is formed to facilitate electrical connection to the power chip 5, while also preventing the electrical connection layer 3 from flowing off the surface of the insulating layer 2 and contacting the heat dissipation metal plate 1 at the first temperature. Because the metal layer is fluid at the first temperature, gaps created by differences in thermal expansion coefficients between the electrical connection layer 3 and the insulating layer 2 can be further avoided during the soldering process. Furthermore, the electrical connection layer 3 can directly fill gaps created by slight differences in thermal expansion coefficients between the insulating layer 2 and the power chip 5, ensuring that the insulating layer 2 maintains a flat plate structure. In this embodiment, the electrical connection layer 3 may be an aluminum-based active metal (Al-Si-Ti series). Its specific material can be customized based on actual conditions and is not specifically limited herein.

[0081] In another feasible example, a solder layer is provided on the surface of the electrical connection layer 3 facing away from the insulating layer 2, and the solder layer is used to fix the power chip 5. When the electrical connection layer 3 is a metal layer that is still solid at the first temperature, such as an aluminum layer, a copper layer, etc., in this example, a solder layer can be further provided on the surface of the electrical connection layer 3 facing away from the insulating layer 2, and the solder layer can ensure a fixed connection between the power chip 5 and the electrical connection layer 3 during welding. The solder layer also needs to have fluidity at the first temperature, and can further avoid the gap between the electrical connection layer 3 and the power chip 5 due to the difference in thermal expansion coefficient during the welding process, ensuring that the insulating layer 2 can be a flat plate structure. The specific material of the solder layer can be set according to actual conditions and is not specifically limited here.

[0082] Of course, if the electrical connection layer 3 is a metal layer that is still solid at the first temperature, such as an aluminum layer, a copper layer, etc., the electrical connection layer 3 can be fixedly connected to the insulating layer 2 by solder. In this embodiment, the heat dissipation metal plate 1 is preferably an aluminum plate or an aluminum alloy plate.

[0083] The power substrate provided in this embodiment further enhances heat dissipation by providing a raised structure 4, reducing the length of the heat dissipation path and thus improving heat dissipation performance. Using a metal layer with fluidity at a first temperature as the electrical connection layer 3 further ensures that the power substrate can still form a good electrical connection with the power chip 5 in a flat-plate configuration, further reducing failures caused by mismatched thermal expansion coefficients between the power chip 5 and the insulating layer 2, improving power module reliability, and ensuring product production yield.

[0084] Specifically, the use of liquid metal to form the electrical metal layer 3 further avoids failure of the power chip 5 due to inconsistent thermal expansion coefficients, improves the production yield of the power module, and reduces cost losses. Compared with the thermal stress compensation structure of the existing heat sink base plate, the present application does not require an arc design, has a thin solder layer, good soldering quality, low residual stress, low leakage risk, and high reliability.

[0085] Example 3

[0086] Please refer to Figure 3 as well as Figure 4 , Figure 3 A schematic diagram of the exploded structure of a power module provided by an embodiment of the present invention; Figure 4 A schematic structural diagram of a power module provided by an embodiment of the present invention.

[0087] See also Figure 3 as well as Figure 4This embodiment further provides a power module, which includes a power chip 5 and a power substrate as provided in any of the above-mentioned embodiments of the invention. The power chip 5 is specifically fixedly connected to the electrical connection layer 3, thereby achieving a fixed connection between the power chip 5 and the power substrate. The structure of the power substrate can be referred to the above-mentioned embodiment and will not be described in detail here. The specific structure of the power chip 5 can be referred to the existing technology and will not be described in detail here.

[0088] In addition to the aforementioned power chip 5 and power substrate, a power module typically includes a cover plate 10, a housing 8, power pins 7, bonding wires 6, and an encapsulating resin 9. Specifically, the power chip 5 can be arranged on the electrical connection layer 3 in a bridge circuit configuration. The bonding wires 6 are used for direct electrical connection between the power chips 5 and with external circuits. The power pins 7 are used to control and sample the power chip 5. The entire module is encapsulated in the housing 8, then potted with glue and dried to form a finished product.

[0089] For example, the power module shown in this application is a three-phase full-bridge power module, and the packaging form is HPD. It can also be a half-bridge module or an H-bridge module, and the packaging form can also be selected as ME4, HP1, etc. This application does not impose fixed restrictions.

[0090] Since the power module of this embodiment is provided with the power substrate provided by the above-mentioned embodiment of the invention, the preparation cost of the power module is lower, the structure is simpler, the heat dissipation is more efficient, and thus the performance is more stable.

[0091] Example 4

[0092] The following is an introduction to a method for preparing a power module provided in this embodiment. The method for preparing the power module described below and the power module described above can be referenced to each other.

[0093] Please refer to Figures 5 to 7 , Figure 5 A flow chart of a method for preparing a power module provided in this embodiment; Figure 6 A schematic top view of the structure of a power module prepared in this embodiment; Figure 7 for Figure 6 Sectional view along line AA.

[0094] See also Figures 5 to 7 In this embodiment, the method for preparing the power module includes:

[0095] S101: A groove is formed on one side of the heat dissipation metal plate of the heat dissipation structure.

[0096] In this step, a groove may be formed on one side of the heat dissipation metal plate 1 by machining.

[0097] S102: Fix the insulating layer in the groove.

[0098] In this step, an insulating film layer needs to be provided on the surface of the main body layer, and its specific content will be described in detail in the following embodiments. In this step, an insulating layer 2 needs to be fixed on the bottom surface of the groove, and in this step, the insulating layer 2 can be fixed to the groove by vacuum welding.

[0099] S103: An electrical connection layer is provided on the surface of the insulation layer away from the heat dissipation metal plate.

[0100] In this embodiment, the distance between the top surface of the electrical connection layer 3 and the bottom surface of the groove is not less than the depth of the groove, and the electrical connection layer 3 is isolated from the sidewalls of the groove. The specific structure of the power substrate has been described in detail in the above embodiment and will not be repeated here.

[0101] In this step, an electrical connection layer 3 is provided on the surface of the insulating layer 2. The material of the electrical connection layer 3 can be a conventional aluminum layer or copper layer, or a metal layer with fluidity at the first temperature. The specific content will be described in detail in the following embodiments and will not be repeated here.

[0102] S104: Fix the power chip based on the electrical connection layer until the power module is prepared.

[0103] In this step, the power chip 5 is fixed to the electrical connection layer 3, and the power module is prepared based on this structure. The specific content will be described in detail in the following embodiments and will not be repeated here.

[0104] This embodiment provides a method for fabricating a power module. By etching a groove in a heat-dissipating metal plate 1 and directly placing an insulating layer 2 within the groove, the conventional metal connection layer can be reduced, as well as the distance between the insulating layer 2 and the bottom surface of the heat-dissipating metal plate 1. This reduces the heat dissipation path and improves heat dissipation efficiency. Furthermore, the distance between the top surface of the electrical connection layer 3 and the bottom surface of the groove is set to be no less than the groove depth, allowing the power chip 5 to be positioned higher than the heat-dissipating metal plate 1. This increases the vertical isolation between the power chip 5 and the heat-dissipating metal plate 1, ensuring the usability of the power module and facilitating a reduction in the size of the power module.

[0105] The specific contents of the power substrate preparation method provided by the present invention will be described in detail in the following embodiments.

[0106] Example 5

[0107] Please refer to Figure 8 , Figure 8 This is a flow chart of a specific method for preparing a power module provided by an embodiment of the present invention.

[0108] See also Figure 8 In this embodiment, the method for preparing the power module includes:

[0109] S201: A groove is formed on one side of the heat dissipation metal plate of the heat dissipation structure.

[0110] This step may specifically include:

[0111] S2011: Provide an aluminum-based heat dissipation metal plate or an aluminum alloy heat dissipation metal plate, and use laser equipment or cutting equipment to process and punch out the blank to form a heat dissipation metal plate with grooves.

[0112] S2012: Place the heat dissipation metal plate in an alkaline degreasing agent at 50℃ to 70℃, perform ultrasonic cleaning at 20kHz to 25kHz for 5 minutes to 10 minutes, take out the heat dissipation metal plate and place it in 99.9% anhydrous alcohol for cleaning for 3 to 5 minutes, then place it in a hot air circulation oven and bake it at 100℃ to 120℃ for 5 minutes to keep the heat dissipation metal plate dry.

[0113] S202: Oxidizing the silicon wafer based on a dry oxygen oxidation process to form an oxide layer covering the surface of the silicon wafer.

[0114] Before this step, the silicon wafer surface is typically cleaned to remove contaminants. Specifically, in this embodiment, an RCA cleaning method (SC1 (ammonia + hydrogen peroxide + water) or SC2 solution (hydrochloric acid + hydrogen peroxide + water)) can be used to remove organic matter, metallic impurities, and particulate contaminants from the silicon wafer surface. The silicon wafer is then immersed in a dilute hydrofluoric acid (HF) solution (1:50 dilution) for 5 to 15 minutes to remove the naturally occurring thin oxide layer. In addition to the aforementioned methods, plasma cleaning can also be used in this embodiment to remove contaminants and the naturally oxidized loose oxide layer from the silicon wafer surface. The specific cleaning process is not specified here and will depend on the specific circumstances.

[0115] In this step, a dense oxide layer needs to be formed on the surface of the silicon wafer to ensure its insulation and mechanical properties. The oxidation method of this embodiment can be dry oxygen oxidation, specifically:

[0116] S2021: Place the silicon wafer with the natural oxide film removed in 99.9% anhydrous alcohol for ultrasonic cleaning at a frequency of 10kHz to 15kHz for 5 minutes to 10 minutes, then place the silicon wafer in a hot air circulation oven and bake it at 100℃ to 120℃ for 5-10 minutes to keep it dry.

[0117] S2022: Place the dried silicon wafer in a quartz boat and send it into a high-temperature furnace tube, heating it to 1000°C at a rate of 5°C / min to 10°C / min to avoid warping of the silicon wafer due to thermal stress.

[0118] S2023: Inert gas, such as N2, is introduced to keep the temperature in the high-temperature furnace tube stable and ensure temperature uniformity in the furnace.

[0119] S2024: high-purity oxygen is introduced at 1 L / min to 10 L / min for 30 min to 60 min to form a dense oxide layer as an insulating film layer.

[0120] S2025: After the oxide layer is formed, cool down to room temperature at a rate of 3°C / min to 5°C / min to prevent cracks caused by thermal shock.

[0121] S2026: Place the oxidized silicon wafer in 99.9% anhydrous alcohol and perform ultrasonic cleaning at 5kHz to 15kHz for 5 minutes to 10 minutes. Then place it in a hot air circulation oven and bake it at 50℃ to 75℃ for 10 minutes to 15 minutes to keep the silicon wafer dry.

[0122] Through the above steps, a dense oxide layer can be formed on the surface of the silicon wafer to form the insulating layer 2.

[0123] S203: Fix the insulating layer in the groove.

[0124] In this step, the heat dissipation metal plate 1 can be placed in the mold first, and then the active metal solder can be coated in the groove, such as aluminum-based active solder (Al-Si-Ti series), lead-free active solder (Sn-Ag-Ti series), silver-based active solder (Ag-Cu-Ti series), etc. After that, the oxidized silicon wafer is placed in the groove, and the whole structure is placed in a vacuum soldering furnace for vacuum reflow soldering. During soldering, the vacuum degree in the furnace can be kept less than 10 -3 Pa, and step-by-step heating at a heating rate of 5°C / min to 10°C / min to 200°C to 400°C, then maintaining the constant temperature for 20min to 30min, and then cooling to room temperature at a rate of 3°C / min to 5°C / min, so that the insulating layer 2 is fully connected to the heat dissipation metal plate 1 without voids.

[0125] This embodiment uses active metal solder to connect the insulating layer 2 and the heat dissipation metal plate 1. This prevents deformation caused by mismatched thermal expansion coefficients between the silicon wafer and the heat dissipation metal plate 1, thereby preventing silicon wafer cracking and production failure. Furthermore, the active metal solder has a low probability of generating voids in high-temperature environments, effectively reducing the void ratio between the silicon wafer and the heat dissipation metal plate 1. This ensures full contact between the silicon wafer and the heat dissipation metal plate 1, significantly increasing the thermal conductivity area, improving the heat dissipation performance of the power module, and effectively ensuring the power module's lateral heat dissipation capability.

[0126] S204: Printing a patterned metal layer on the surface of the insulating layer away from the heat dissipation metal plate.

[0127] In this embodiment, the metal layer is fluid when fixing the power chip at the first temperature. In this step, a metal layer that is fluid at the first temperature can be used as the electrical connection layer 3. Taking aluminum-based active metal (Al-Si-Ti series) as an example, in this step, the electrical connection layer 3 is fixed to the surface of the insulating layer 2 according to the required circuit using a mold, and then the substrate is placed in a vacuum soldering furnace for vacuum reflow sintering, maintaining the vacuum degree in the furnace less than <1×10 -3 Pa, and step-by-step heating to 200°C to 300°C at a heating rate of 5°C / min to 10°C / min, maintaining the constant temperature for 30min to 45min, and then cooling to room temperature at a rate of 3°C / min to 5°C / min to form an electrical connection layer 3.

[0128] Exemplarily, this embodiment may also use traditional metals such as Cu, Al, etc. to sinter to form the electrical connection layer 3, or the electrical connection layer 3 may be set by an electroplating process. There is no fixed restriction here. This application preferably uses active metals with fluidity at high temperatures to sinter for circuit layout.

[0129] S205: heating the metal layer to a first temperature, and fixing the power chip and the metal layer at the first temperature.

[0130] In this embodiment, the metal layer has fluidity at the first temperature, that is, in this step, the electrical connection layer 3 needs to be heated to a semi-molten state so that the power chip 5 can be disposed on the electrical connection layer 3 according to the required electrical circuit.

[0131] This step may specifically include: placing a plurality of power chips 5 on the electrical connection layer 3 through an automatic placement machine, and then placing the above structure in a vacuum reflow soldering fixture at 200° C. to 260° C. for vacuum soldering for 30 minutes to 35 minutes.

[0132] S206: After fixing the power chip, lower the temperature of the metal layer until the metal layer solidifies.

[0133] In this step, the temperature may be lowered to room temperature in a stepwise manner at a rate of 20° C. per minute to solidify the metal layer.

[0134] In this embodiment, the electrical connection layer 3 is heated to a semi-molten state and then soldered to the power chip 5. Compared to conventional solder connections, this embodiment has a simpler process and lower costs. Furthermore, due to the excellent flexibility and low void rate of this metal, the product yield is high. After this step, the semi-finished power module with the power chip 5 can be placed in an X-ray device with a voltage of 80V to 120V, a current of 100μA to 300μA, and a focal length (SOD / SDD) preferably set to: SOD [optimized source-object distance] ϵ (100, 300) mm, SDD [object-detector distance] ϵ (300, 500) mm. After adding a copper filter or aluminum filter with a thickness of 0.5mm to 0.8mm, the power chip 5 and the solder layer between the power chip 5 and the power substrate are inspected and feedback is provided. If the solder void rate (defect area / total solder joint area × 100%) is not less than 3%, the module is deemed unqualified and the semi-finished product is scrapped. At this point, the relevant welding parameters need to be adjusted. If the welding void ratio is less than 3%, it is judged to be qualified.

[0135] This step adds copper or aluminum filters to filter low-energy rays, reduce noise, improve verification accuracy, and effectively ensure product reliability.

[0136] S207: Provide a number of bonding wires and perform bonding connections between chips according to the electrical structure diagram.

[0137] The bonding wire 6 includes aluminum wire, copper wire, etc., and aluminum wire is preferred in this application. This step specifically includes:

[0138] Provide a number of bonding wires 6 and / or bonding metal strips, and use ultrasonic bonding to perform electrical connections of the power chip 5 and realize the electrical functions of the power module in accordance with a bridge circuit. Specifically, it includes:

[0139] Provide several bonding wires 6, place the semi-finished power module in a bonding jig, fix it, and then place it in an ultrasonic bonding device. Set the ultrasonic frequency to 20 kHz to 60 kHz, the pressure to 0.5N to 1.5N, the bonding temperature to 100°C to 150°C, and use nitrogen circulation to prevent oxidation. After controlling the arc height to 1mm to 1.5mm, according to the bridge electrical topology, realize the connection between the upper bridge and the lower bridge, the power chip 5 and the signal layer.

[0140] S208: Provide a number of power pins, leads, and thermal resistors, and connect them to the sampling positions and control positions corresponding to the electrical connection layer 3 according to the electrical structure.

[0141] This step specifically includes:

[0142] Place the power pin 7, pin and thermistor in a soldering jig, and vacuum solder them in a vacuum reflow soldering equipment at 100°C to 150°C for 10 to 15 minutes using any solder, and then cool them to room temperature at a rate of 15°C / min. The power pin 7 includes a sampling pin and a control pin according to its setting position and function. The sampling pin and control pin are set at the sampling position and control position corresponding to the bridge circuit.

[0143] S209: providing a housing to encapsulate the semi-finished power module and form a cavity, and then pouring encapsulation colloid into the cavity and drying and curing it.

[0144] This step specifically includes:

[0145] S2091: Place the welded semi-finished power module in a fixed mold or fixed machine tool; provide a housing 8 of the desired packaging form, apply a strong bonding adhesive to the outline of the housing 8, and also apply a strong bonding adhesive to the vertical projection of the housing 8 on the heat sink substrate. This vertical projection is typically provided with the aforementioned connection structure, such as the mounting hole.

[0146] S2092: Provide fixing parts, such as screws and bolts, to connect the housing to the power base through the fixing holes of the housing and the mounting holes of the power base.

[0147] S2093: Place the fixed semi-finished module with the encapsulation shell in an oven and bake it in a vacuum environment at 50°C to 75°C for 15 minutes to 30 minutes to completely cure the strong connection colloid.

[0148] The above-mentioned strong connection colloid is preferably epoxy resin or silicone, and its thermal conductivity is usually 1 W / m·K to 5 W / m·K. The strong connection colloid fills the gap between the shell 8 and the power substrate. The thickness of the glue layer is usually not more than 100μm, and the overflow amount is usually less than 0.5mm. The overflow amount needs to be precisely controlled by a dispensing machine.

[0149] S2094: After heating the semi-finished power module with a shell to 40°C to 60°C, place it in a glue potting jig, machine tool or assembly line, and use the glue potting equipment to encapsulate the power module, power chip 5, and bonding wire 6 at a speed of 5mm / s to 25mm / s. Stop the glue potting when the encapsulation glue 9 is encapsulated to two-thirds of the height of the shell 8.

[0150] S2095: Place the semi-finished product after encapsulation in an oven for vacuum baking. First, bake it at 40°C to 60°C for 1 to 2 hours to slowly cross-link it and reduce internal stress; then bake it at 100°C to 150°C for 2 to 4 hours to completely solidify the encapsulation glue 9.

[0151] In this embodiment, the packaging colloid 9 is preferably silicone gel, and other packaging materials such as epoxy resin can also be selected.

[0152] S210: Cover the power module with a cover plate to form the power module. Spray an anti-oxidation substance on the exposed portion and pack it for storage.

[0153] In this step, a cover plate 10 is provided that can be snapped onto the housing 8. An anti-oxidation agent, such as silicone gel or polyurethane, is then sprayed onto the exposed portion of the power substrate. The substrate is then dried at 50°C to 75°C for 30 to 45 minutes, packaged, and stored at room temperature, preferably in a vacuum. In this embodiment, the silicon wafer can be either an intrinsic silicon wafer or a multicrystalline silicon wafer.

[0154] The method for preparing a power module provided in this embodiment can prepare a power module with high heat dissipation performance at a relatively low cost.

[0155] The thermal expansion coefficient of the power substrate in this application closely matches that of the power chip 5. Whether undergoing vacuum high-temperature reflow soldering during production or operating in the high-temperature environment of the module, the deformation of the power substrate and the power chip 5 remain consistent, reducing the risk of power chip 5 failure and improving power module reliability. Furthermore, the power substrate in this application utilizes a silicon wafer as its substrate, offering low material cost and high thermal conductivity, which helps reduce the size of the power chip 5 and the volume of the power module.

[0156] Compared to conventional power modules, the power module of this application eliminates the copper foil layer between the power substrate and the heat dissipation metal plate 1, significantly reducing the overall thermal resistance of the power module. Furthermore, the electrical connection layer 3 is made of a metal that is fluid at high temperatures. Due to its excellent flexibility at high temperatures, this further avoids failure of the power chip 5 due to inconsistent thermal expansion coefficients, further improving the production yield of the power module. The power module of this application is lightweight, reduces the number of metal layers and solder, and offers low cost and high reliability.

[0157] The power substrate of this application does not require arc design or micro-arc, and has a thin solder layer, good welding quality, small residual stress, low leakage risk, and high reliability. This application reduces thermal resistance. While reducing materials, the lateral heat dissipation capacity of the power module is increased by 10 to 30 times, and the heat dissipation performance is improved while ensuring reliability. The manufacturing process of this application has been greatly changed compared to the existing technology. By using a high-temperature and fluid metal layer, the production yield is improved, the void rate is reduced, and the product reliability is improved. It is suitable for industrial mass production applications.

[0158] The insulating layer 2 of the present application is made of the same silicon material as the power chip 5, which is conducive to synchronous thermal expansion consistency and can solve the problem of deformation caused by thermal stress during the welding of the power chip 5, which in turn causes the chip to tear. At the same temperature, the two have the same deformation and the error is not large, which avoids the deformation difference caused by the different thermal expansion coefficients of the power substrate during the welding of the power chip 5, which in turn causes the power chip 5 to tear and be damaged. The present application heats the electrical connection layer 3 to a semi-molten state and welds it to the power chip 5. Compared with the traditional connection through solder, the process of the present application is simpler and the cost is lower. At the same time, due to the good flexibility of this metal and the low void rate, the product yield is high.

[0159] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0160] Finally, it should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or device comprising the element.

[0161] The above is a detailed introduction to a power substrate, a power module, and a method for preparing a power module provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only intended to help understand the method and core ideas of the present invention. It should be pointed out that, for those skilled in the art, without departing from the principles of the present invention, several improvements and modifications may be made to the present invention, and such improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A power substrate, characterized in that: include: Heat dissipation structure; the heat dissipation structure includes a heat dissipation metal plate, and a groove is provided on one side surface of the heat dissipation metal plate; an insulating layer fixed to the bottom surface of the groove; An electrical connection layer is provided on a surface of the insulating layer away from the heat dissipation metal plate; the distance between the top surface of the electrical connection layer and the bottom surface of the groove is not less than the depth of the groove, and the electrical connection layer is isolated from the sidewall of the groove; The insulating layer includes a main body layer made of the same material as the substrate of the power chip to be bonded, the main body layer is provided with an insulating film layer at least on the surface where the electrical connection layer is provided, and the electrical connection layer is isolated from the main body layer by the insulating film layer; The electrical connection layer is a metal layer with fluidity when the power chip is fixed at a first temperature. When the power chip is welded, the electrical connection layer with fluidity fills the gap between the insulating layer and the power chip.

2. The power substrate according to claim 1, wherein: The top surface of the electrical connection layer is flush with the top surface of the groove sidewall.

3. The power substrate according to claim 1, wherein: There is a first gap between the side surface of the insulating layer and the side wall of the groove; and / or there is a second gap between the edge of the electrical connection layer and the edge of the insulating layer.

4. The power substrate according to claim 1, wherein: The main layer includes a silicon wafer, and the insulating film layer includes an oxide layer.

5. A power module, characterized in that: The invention comprises a power chip and the power substrate according to any one of claims 1 to 4, wherein the power chip is fixedly connected to the electrical connection layer.

6. A method for preparing a power module, characterized in that: include: A groove is provided on one side surface of the heat dissipation metal plate of the heat dissipation structure; An insulating layer is fixed in the groove; the insulating layer includes a main body layer made of the same material as the substrate of the power chip to be bonded, the main body layer is provided with an insulating film layer at least on the surface where the electrical connection layer is provided, and the electrical connection layer is isolated from the main body layer by the insulating film layer; An electrical connection layer is provided on a surface of the insulating layer away from the heat dissipation metal plate; the distance between the top surface of the electrical connection layer and the bottom surface of the groove is not less than the depth of the groove, and the electrical connection layer is isolated from the sidewalls of the groove; the electrical connection layer is a metal layer with fluidity when fixing the power chip at the first temperature, and the electrical connection layer with fluidity fills the gap between the insulating layer and the power chip when soldering the power chip; The power chip is fixed based on the electrical connection layer until the preparation of the power module is completed.

7. The method according to claim 6, characterized in that Providing an electrical connection layer on a surface of the insulating layer away from the heat dissipation metal plate comprises: A patterned metal layer is printed on the surface of the insulating layer away from the heat dissipation metal plate; the metal layer has fluidity when fixing the power chip at a first temperature; Fixing the power chip based on the electrical connection layer includes: heating the metal layer to a first temperature and fixing the power chip and the metal layer at the first temperature; the metal layer has fluidity at the first temperature; After the power chip is fixed, the temperature of the metal layer is lowered until the metal layer is solidified.

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