Circuit for suppressing surge current during transient start and implementation method thereof

Abstract

The invention discloses a circuit for suppressing surge current during transient start, which comprises a surge current detection circuit, the surge current detection circuit comprises a chip U2, a pin 4 of the chip U2 is connected with a pin 1 of a field effect transistor Q1, a pin 5 of the chip U2 is connected with one end of a resistor R9 and one end of a resistor R10, the other end of the resistor R10 is connected with one end of a resistor R11, and the other end of the resistor R11 is connected with the other end of the field effect transistor Q1. And the other end of the resistor R9 is connected with one end of a resistor R8. The invention further discloses an implementation method of the circuit for suppressing the surge current during transient starting, through the arrangement of the surge current detection circuit, the phase angle during starting can be effectively limited, a post-stage circuit is prevented from starting at a high-surge-current phase angle, the charging voltage of a capacitor CE1 in the driving circuit can start from 67 V, and the charging voltage of the capacitor CE1 in the driving circuit can not start from 67 V; starting from the normal rated input voltage, the impact current of the chip U1 of the driving circuit during starting is effectively limited, so that the charging current of the capacitor CE1 is greatly reduced.

Description

Technical Field

[0001] The present invention belongs to the technical field of suppressing surge current, and in particular relates to a circuit for suppressing surge current during transient startup and an implementation method thereof. Background Art

[0002] Currently, in the global LED lighting market, countries are increasingly demanding higher energy efficiency for LED lighting, especially for some high-end customized products that need to achieve Class A energy efficiency, with an efficiency of >96%, and the product drivers often use Boost topology circuits.

[0003] However, such products also have fatal drawbacks. The transient impact current during startup is very large, as large as about 50 amperes. When multiple lamps are connected, even with the largest air switch on the market, the number of LED lamps that can be started can only be a few. In a large indoor new installation environment, more air switches are often required, which are very inconvenient to use and increase safety risks, and the cost for end users is greatly increased. Summary of the Invention

[0004] The present invention aims to provide a circuit for suppressing inrush current during transient startup, thereby addressing the problems identified in the aforementioned background art. The present invention provides a circuit for suppressing inrush current during transient startup, ensuring that the subsequent circuit only begins energy storage and charging at a specific low voltage while maintaining Class A energy efficiency for LED products, significantly reducing the inrush current during startup.

[0005] Another object of the present invention is to provide a method for implementing a circuit for suppressing surge current during transient startup.

[0006] To achieve the above-mentioned objectives, the present invention provides the following technical solutions: a circuit for suppressing inrush current during transient startup, comprising an inrush current detection circuit, the inrush current detection circuit comprising a chip U2, pin 4 of the chip U2 being connected to pin 1 of the field-effect transistor Q1, pin 5 of the chip U2 being connected to one end of a resistor R9 and a resistor R10 respectively, the other end of the resistor R10 being connected to one end of the resistor R11, the other end of the resistor R9 being connected to one end of the resistor R8, the other end of the resistor R8 being connected to the cathode of a diode D3, the anode of the diode D3 being connected to a pre-stage filter circuit, pin 2 of the field-effect transistor Q1 being connected to a drive circuit, the pre-stage filter circuit being connected to the drive circuit, and pin 3 of the field-effect transistor Q1, pin 2 of the chip U2 and the other end of the resistor R11 being all connected to the ground end of the pre-stage filter circuit.

[0007] In order to filter out high-frequency interference and provide a stable operating voltage for the chip U2, further, pin 3 of the chip U2 is connected to one end of the capacitor C3, and the other end of the capacitor C3 is connected to the ground end of the pre-stage filter circuit.

[0008] In order to provide protection for the continuous switching of the field effect tube Q1, the 4th pin of the chip U2 is further connected to one end of the resistor R5, and the other end of the resistor R5 is connected to the ground end of the pre-stage filter circuit.

[0009] In order to filter out common-mode and differential-mode interference in the power grid, the pre-stage filter circuit further includes a common-mode inductor LF1, pin 1 of the common-mode inductor LF1 is connected to the neutral line N, pins 2 of the common-mode inductor LF1 are respectively connected to the anode of the diode D4 and the cathode of the diode D5, pin 3 of the common-mode inductor LF1 is connected to the live wire L, and pin 4 of the common-mode inductor LF1 is respectively connected to the anode of the diode D3, the anode of the diode D6, and the cathode of the diode D7, the anodes of the diode D5 and the diode D7 are grounded, and the cathodes of the diode D4 and the diode D6 are connected to the drive circuit.

[0010] In order to avoid the risk of fire due to excessive current and high temperature for a long time after the circuit is abnormal, a fuse F1 and a thermistor NTC1 are further connected in series between the 3rd pin of the common mode inductor LF1 and the live wire L.

[0011] In order to filter out excessive voltage or lightning surges in the power grid, a varistor VR1 is further connected in parallel between pins 2 and 4 of the common-mode inductor LF1.

[0012] In order to make the entire drive circuit more stable, the drive circuit further includes a chip U1, pins 5 and 6 of the chip U1 are respectively connected to one end of the transformer T1 and the anode of the diode D2, pin 4 of the chip U1 is connected to one end of the resistor RS3, the other end of the resistor RS3 is connected to the cathode of the diode D2 and the cathode of the diode D1, the cathode of the diode D2 is connected to the output terminal V+, and pin 1 of the chip U1 is connected to the output terminal V-.

[0013] In order to prevent the chip U2 from being damaged by the surge voltage breakdown, the anode of the diode D1 and the other end of the transformer T1 are further connected to the inductor L1, the resistor R3 and one end of the thin film capacitor CX2 respectively, the other ends of the inductor L1 and the resistor R3 are respectively connected to one end of the thin film capacitor CX1 and the varistor VR2 and the pre-stage filter circuit, and the other ends of the thin film capacitor CX1, the thin film capacitor CX2 and the varistor VR2 are respectively connected to the output terminal V- and the surge current detection circuit.

[0014] In order to provide a reference detection voltage for the ISP pin of the chip U1 and make the output current more accurate and constant, the 7th pin of the chip U1 is further connected to one end of the resistor RS1 and the resistor RS2 respectively, and the other ends of the resistor RS1 and the resistor RS2 are connected to the output terminal V-.

[0015] In order to make the output current more stable, the resistors R1, R2 and R4 are connected in series and then in parallel between the output terminal V+ and the output terminal V−, and the capacitor CE1 is connected in parallel between the output terminal V+ and the output terminal V−.

[0016] Furthermore, in the present invention, a method for implementing a circuit for suppressing inrush current during transient startup includes the following steps:

[0017] (1) Diode D4, diode D5, diode D6 and diode D7 rectify the input AC power frequency alternating current and output DC voltage to the drive circuit;

[0018] (2) Diode D3, resistor R8 and resistor R9 continuously provide detection voltage to the REC pin of chip U2 every time the power is turned on, so that chip U2 starts to detect the voltage of the internal detection pin every time the input voltage rises to 67V. When the internal detection pin meets 1V, the gate of the MOS tube inside chip U2 is turned on, making the 2nd and 3rd pins of the field effect tube Q1 conductive, so that the driver starts working;

[0019] (3) Pin 7 of the chip U1 is connected to one end of the resistor RS1 and one end of the resistor RS2, respectively. The other ends of the resistor RS1 and the resistor RS2 are connected to the output terminal V-, providing a reference detection voltage for the ISP pin of the chip U1;

[0020] (4) Output current at the output end.

[0021] Compared with the prior art, the present invention has the following beneficial effects:

[0022] 1. The present invention can effectively limit the phase angle at startup by setting an inrush current detection circuit, preventing the subsequent circuit from starting at a high inrush current phase angle. The charging voltage of the capacitor CE1 in the drive circuit can be started from 67V instead of the rated input voltage under normal conditions. This effectively limits the inrush current of the chip U1 of the drive circuit at startup, greatly reducing the charging current of the capacitor CE1, and also reducing the inrush current of the AC input terminal L or N.

[0023] 2. The present invention can avoid abnormal fire risks caused by overcurrent and overtemperature conditions by providing the fuse F1 and thermistor NTC1.

[0024] 3. The present invention sets the field effect transistor Q1 so that the chip U2 starts to detect the voltage of the internal detection pin every time the input voltage rises to 67V. When the internal detection pin meets the falling edge 1V, the gate of the MOS tube inside the chip U2 is turned on. At this time, if the conditions are met, the 2nd and 3rd pins of the field effect transistor Q1 are turned on, and the subsequent circuit starts to work normally, which can ensure that it is in a low-inrush current state after each startup.

[0025] 4. The present invention is provided with resistors R1, R2 and R4. After the product is powered off, the charge on capacitor CE1 is discharged to ensure that the residual charge on the driver is quickly reduced.

[0026] 5. The present invention can eliminate the interference source of 30MHz-1GHz space radiation by setting capacitor CY1. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 1 is a circuit diagram of the present invention.

[0028] Figure 2 2 is a circuit diagram of the pre-stage filter circuit of the present invention.

[0029] Figure 3 FIG. 4 is a circuit diagram of a driving circuit of the present invention.

[0030] Figure 4 FIG. 4 is a circuit diagram of the surge current detection circuit of the present invention. DETAILED DESCRIPTION

[0031] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0032] Example 1

[0033] See also Figure 1-Figure 4 The present invention provides the following technical solution: a circuit for suppressing inrush current during transient startup, including an inrush current detection circuit, the inrush current detection circuit including a chip U2, pin 4 of the chip U2 connected to pin 1 of the field effect transistor Q1, pin 5 of the chip U2 connected to one end of a resistor R9 and a resistor R10 respectively, the other end of the resistor R10 connected to one end of a resistor R11, the other end of the resistor R9 connected to one end of a resistor R8, the other end of the resistor R8 connected to the cathode of a diode D3, the anode of the diode D3 connected to a pre-stage filter circuit, pin 2 of the field effect transistor Q1 connected to a drive circuit, the pre-stage filter circuit connected to the drive circuit, and pin 3 of the field effect transistor Q1, pin 2 of the chip U2, and the other end of the resistor R11 are all connected to the ground end of the pre-stage filter circuit.

[0034] By adopting the above technical solution, the present invention can accurately and continuously provide a detection voltage to the REC pin of the chip U2 each time the power is turned on through the setting of the diode D3, the resistor R8 and the resistor R9, so that the chip U2 starts to detect the voltage of the internal detection pin every time the input voltage rises to 67V. When the internal detection pin meets 1V, the gate of the MOS tube inside the chip U2 is turned on. At this time, if the conditions are met, the 2nd and 3rd pins of the field effect tube Q1 are turned on, and the subsequent circuit starts to work normally.

[0035] Specifically, pin 3 of the chip U2 is connected to one end of the capacitor C3, and the other end of the capacitor C3 is connected to the ground end of the pre-stage filter circuit.

[0036] By adopting the above technical solution, high-frequency interference is filtered out and a stable operating voltage is provided for the chip U2.

[0037] Specifically, pin 4 of the chip U2 is also connected to one end of the resistor R5, and the other end of the resistor R5 is connected to the ground end of the pre-stage filter circuit.

[0038] By adopting the above technical solution, pin 4 of chip U2 is grounded through resistor R5, which can effectively discharge the Ciss junction capacitance of field effect transistor Q1, avoiding the excessive accumulated voltage after continuous switching on and off that breaks down pin 1 of field effect transistor Q1, and providing protection for continuous switching on and off of field effect transistor Q1.

[0039] Specifically, the pre-stage filter circuit includes a common-mode inductor LF1, pin 1 of the common-mode inductor LF1 is connected to the neutral line N, pins 2 of the common-mode inductor LF1 are respectively connected to the anode of the diode D4 and the cathode of the diode D5, pin 3 of the common-mode inductor LF1 is connected to the live wire L, and pin 4 of the common-mode inductor LF1 is respectively connected to the anode of the diode D3, the anode of the diode D6, and the cathode of the diode D7, the anodes of the diode D5 and the diode D7 are grounded, and the cathodes of the diode D4 and the diode D6 are connected to the drive circuit. The diodes D4, D5, D6, and D7 can rectify the input AC power frequency alternating current, so that the input voltage of the drive circuit is a smoother and more stable DC voltage.

[0040] By adopting the above technical solution, the common-mode and differential-mode interference in the power grid can be effectively filtered out by the common-mode inductor LF1, and especially during normal operation, the abnormal risk brought to the power grid by this interference can be effectively avoided.

[0041] Specifically, a fuse F1 and a thermistor NTC1 are connected in series between the third pin of the common mode inductor LF1 and the live wire L.

[0042] By adopting the above technical solution, the fuse F1 and thermistor NTC1 are set to avoid the risk of fire caused by excessive current and high temperature for a long time after the circuit is abnormal.

[0043] Specifically, a varistor VR1 is connected in parallel between pins 2 and 4 of the common-mode inductor LF1.

[0044] By adopting the above technical solution, excessive voltage or lightning surge in the power grid can be effectively filtered out, preventing these interferences from damaging other components of the circuit.

[0045] Specifically, the driving circuit includes a chip U1, pins 5 and 6 of the chip U1 are respectively connected to one end of the transformer T1 and the anode of the diode D2, pin 4 of the chip U1 is connected to one end of the resistor RS3, the other end of the resistor RS3 is connected to the cathode of the diode D2 and the cathode of the diode D1, the cathode of the diode D2 is connected to the output terminal V+, and pin 1 of the chip U1 is connected to the output terminal V-.

[0046] By adopting the above technical solution, diode D1 prevents overshoot current from flowing through transformer T1 after the power is first turned on, effectively avoiding magnetic saturation of transformer T1 caused by overshoot current and making the entire drive circuit more stable. Transformer T1 and diode D2 provide stable current output to the output load.

[0047] Specifically, the anode of the diode D1 and the other end of the transformer T1 are respectively connected to the inductor L1, the resistor R3 and one end of the thin film capacitor CX2, the other ends of the inductor L1 and the resistor R3 are respectively connected to one end of the thin film capacitor CX1 and the varistor VR2 and the pre-stage filter circuit, and the other ends of the thin film capacitor CX1, the thin film capacitor CX2 and the varistor VR2 are respectively connected to the output terminal V- and the surge current detection circuit.

[0048] By adopting the above technical solution, the film capacitor CX1, the film capacitor CX2 and the inductor L1 form a filter circuit, which can filter out harmonics and common-mode interference, making the operating voltage of the subsequent circuit smoother and more stable; the varistor VR2 ensures that the subsequent circuit can absorb excessive surge voltage when the AC front-end input voltage fluctuates abnormally, so that the chip U2 is not damaged by the surge voltage breakdown.

[0049] Example 2

[0050] The difference between this embodiment and the first embodiment is that: specifically, pin 7 of the chip U1 is connected to one end of the resistor RS1 and the resistor RS2 respectively, and the other ends of the resistor RS1 and the resistor RS2 are connected to the output terminal V-.

[0051] By adopting the above technical solution, a reference detection voltage is provided for the ISP pin of the chip U1, making the output current more accurate and constant.

[0052] Example 3

[0053] This embodiment differs from the first embodiment in that: specifically, the resistors R1 , R2 and R4 are connected in series and then in parallel between the output terminal V+ and the output terminal V−, and the capacitor CE1 is connected in parallel between the output terminal V+ and the output terminal V−.

[0054] By adopting the above technical solution, capacitor CE1 is used to filter current ripple, making the output current more stable; resistors R1, R2 and R4 discharge the charge on capacitor CE1 after the product is powered off, ensuring that the residual power on the driver is quickly reduced.

[0055] Example 4

[0056] Furthermore, in the present invention, a method for implementing a circuit for suppressing inrush current during transient startup includes the following steps:

[0057] (1) Diode D4, diode D5, diode D6 and diode D7 rectify the input AC power frequency alternating current and output DC voltage to the drive circuit;

[0058] (2) Diode D3, resistor R8 and resistor R9 continuously provide detection voltage to the REC pin of chip U2 every time the power is turned on, so that chip U2 starts to detect the voltage of the internal detection pin every time the input voltage rises to 67V. When the internal detection pin meets 1V, the gate of the MOS tube inside chip U2 is turned on, making the 2nd and 3rd pins of the field effect tube Q1 conductive, so that the driver starts working;

[0059] (3) Pin 7 of the chip U1 is connected to one end of the resistor RS1 and one end of the resistor RS2, respectively. The other ends of the resistor RS1 and the resistor RS2 are connected to the output terminal V-, providing a reference detection voltage for the ISP pin of the chip U1;

[0060] (4) Output current at the output end.

[0061] The model of the chip U1 in the present invention is JW1965FC; the model of the chip U2 is JW1819O.

[0062] In summary, the present invention, through the provision of an inrush current detection circuit, can effectively limit the phase angle during startup, preventing the subsequent circuit from starting at a high inrush current phase angle. This allows the charging voltage of capacitor CE1 in the driver circuit to begin at 67V, rather than the rated input voltage under normal conditions. This effectively limits the inrush current of driver circuit chip U1 during startup, significantly reducing the charging current of capacitor CE1 and the inrush current at AC input terminals L or N. By providing fuse F1 and thermistor NTC1, the present invention can avoid the risk of abnormal fires caused by overcurrent and overtemperature conditions. By providing field-effect transistor Q1, the present invention causes chip U2 to begin detecting the voltage of its internal detection pin whenever the input voltage rises at 67V. When the internal detection pin reaches the falling edge of 1V, the gate of the MOS transistor within chip U2 is turned on. At this time, if the conditions are met, pins 2 and 3 of field-effect transistor Q1 are connected, and the subsequent circuit begins normal operation, ensuring a low inrush current state upon each startup. The present invention includes resistors R1, R2, and R4. When the product is powered off, the charge on capacitor CE1 is discharged, ensuring that the residual charge on the driver is quickly reduced. By including capacitor CY1, the present invention can eliminate interference sources from 30MHz-1GHz spatial radiation.

[0063] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.

Claims

1. A circuit for suppressing inrush current during transient startup, characterized by: It includes an inrush current detection circuit, which includes a chip U2. Pin 4 of chip U2 is connected to pin 1 of field effect tube Q1, pin 5 of chip U2 is connected to one end of resistor R9 and resistor R10 respectively, the other end of resistor R10 is connected to one end of resistor R11, the other end of resistor R9 is connected to one end of resistor R8, the other end of resistor R8 is connected to the cathode of diode D3, the anode of diode D3 is connected to the pre-stage filter circuit, pin 2 of field effect tube Q1 is connected to the drive circuit, the pre-stage filter circuit is connected to the drive circuit, and pin 3 of field effect tube Q1, pin 2 of chip U2 and the other end of resistor R11 are all connected to the ground end of the pre-stage filter circuit.

2. The circuit for suppressing inrush current during transient startup according to claim 1, characterized in that: Pin 3 of the chip U2 is connected to one end of the capacitor C3, and the other end of the capacitor C3 is connected to the ground end of the pre-stage filter circuit.

3. The circuit for suppressing inrush current during transient startup according to claim 1, characterized in that: Pin 4 of the chip U2 is also connected to one end of a resistor R5 , and the other end of the resistor R5 is connected to the ground end of the pre-stage filter circuit.

4. The circuit for suppressing inrush current during transient startup according to claim 1, characterized in that: The pre-stage filter circuit includes a common-mode inductor LF1, pin 1 of the common-mode inductor LF1 is connected to the neutral line N, pin 2 of the common-mode inductor LF1 is respectively connected to the anode of the diode D4 and the cathode of the diode D5, pin 3 of the common-mode inductor LF1 is connected to the live wire L, and pin 4 of the common-mode inductor LF1 is respectively connected to the anode of the diode D3, the anode of the diode D6 and the cathode of the diode D7, the anodes of the diode D5 and the diode D7 are grounded, and the cathodes of the diode D4 and the diode D6 are connected to the drive circuit.

5. The circuit for suppressing inrush current during transient startup according to claim 4, characterized in that: A fuse F1 and a thermistor NTC1 are connected in series between pin 3 of the common-mode inductor LF1 and the live wire L, and a varistor VR1 is connected in parallel between pins 2 and 4 of the common-mode inductor LF1.

6. The circuit for suppressing inrush current during transient startup according to claim 1, characterized in that: The driving circuit includes a chip U1, wherein pins 5 and 6 of the chip U1 are respectively connected to one end of the transformer T1 and the anode of the diode D2, pin 4 of the chip U1 is connected to one end of the resistor RS3, the other end of the resistor RS3 is connected to the cathode of the diode D2 and the cathode of the diode D1, the cathode of the diode D2 is connected to the output terminal V+, and pin 1 of the chip U1 is connected to the output terminal V-.

7. The circuit for suppressing inrush current during transient startup according to claim 6, characterized in that: The anode of the diode D1 and the other end of the transformer T1 are respectively connected to the inductor L1, the resistor R3 and one end of the thin film capacitor CX2. The other ends of the inductor L1 and the resistor R3 are respectively connected to one end of the thin film capacitor CX1 and the varistor VR2 and the pre-stage filter circuit. The other ends of the thin film capacitor CX1, the thin film capacitor CX2 and the varistor VR2 are respectively connected to the output terminal V- and the surge current detection circuit.

8. The circuit for suppressing inrush current during transient startup according to claim 6, characterized in that: Pin 7 of the chip U1 is connected to one end of the resistor RS1 and one end of the resistor RS2 respectively, and the other ends of the resistor RS1 and the resistor RS2 are connected to the output terminal V-.

9. The circuit for suppressing inrush current during transient startup according to claim 6, characterized in that: The resistor R1 , the resistor R2 , and the resistor R4 are connected in series and then in parallel between the output terminal V+ and the output terminal V−. The capacitor CE1 is connected in parallel between the output terminal V+ and the output terminal V−.

10. A method for implementing a circuit for suppressing inrush current during transient startup according to any one of claims 1 to 9, characterized in that: The following steps are involved: (1) Diode D4, diode D5, diode D6 and diode D7 rectify the input AC power frequency alternating current and output DC voltage to the drive circuit; (2) Diode D3, resistor R8 and resistor R9 continuously provide detection voltage to the REC pin of chip U2 every time the power is turned on, so that chip U2 starts to detect the voltage of the internal detection pin every time the input voltage rises to 67V. When the internal detection pin meets 1V, the gate of the MOS tube inside chip U2 is turned on, making the 2nd and 3rd pins of the field effect tube Q1 conductive, so that the driver starts working; (3) Pin 7 of the chip U1 is connected to one end of the resistor RS1 and one end of the resistor RS2, respectively. The other ends of the resistor RS1 and the resistor RS2 are connected to the output terminal V-, providing a reference detection voltage for the ISP pin of the chip U1; (4) Output current at the output end.

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