Data transmission method and system for large-bit-width network-on-chip

Abstract

The invention relates to the technical field of network-on-chip, and provides a data transmission method and system for a large-bit-width network-on-chip. According to the invention, if there is no closable data needing to be transmitted from a sending end to a receiving end, the link from the sending end to the receiving end is determined as a non-closable link, and all cache spaces in each NOC node on the non-closable link are used to transmit the non-closable data; if the blocking data needing to be transmitted exists from the sending end to the receiving end, the link from the sending end to the receiving end is determined as a blocking link, and a blocking cache space is distributed for the blocking data from all cache spaces in each NOC node on the blocking link and used for transmitting the blocking data; and determining the residual cache space as a non-blocking cache space and transmitting non-blocking data. The problems that the area overhead of a chip is too large and the chip is not practical due to the fact that a cache space is reserved at a receiving end are solved.

Description

Technical Field

[0001] The present invention relates to the technical field of network-on-chip (NoC), and in particular to a data transmission method and system for a large-bit-width NoC. Background Art

[0002] The network on chip (NOC) is used for data exchange within the chip. However, due to the phenomenon of head-of-line blocking (HOL), the transmission efficiency of the entire NOC is greatly reduced. HOL is a phenomenon that occurs in cached communication network switching. Since data exchange typically consists of an input port (for connecting the sender), a switching fabric, and an output port (for connecting the receiver), HOL occurs when packets arriving at the same input port are sent to different output ports, resulting in data congestion in the NOC and the inability to continuously move and transmit data.

[0003] To avoid head-of-line blocking, existing technologies often reserve sufficient internal buffer space at the receiving end to temporarily store blocked data packets. When the reserved buffer space is almost full, the sending end is no longer requested for new data, ensuring continuous data transfer and preventing congestion in the entire NOC. However, for chips with high latency and high bandwidth, the required buffer space is often too large, consuming a huge amount of chip area and making it impractical.

[0004] In view of this, overcoming the defects of the prior art is an urgent problem to be solved in this technical field. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a data transmission method and system for a large-bit-width on-chip network, which divides the data to be transmitted by the on-chip network into blockable data and non-blockable data. When there is blockable data that needs to be transmitted between a sending end and a receiving end, a blockable cache space is allocated by a NOC node for the blockable data, and the blockable cache space is used to transmit the blockable data, and the remaining cache space inside the NOC node is used to transmit the corresponding non-blockable data. This not only eliminates the need to reserve a huge cache space inside the receiving end, but also ensures continuous data transportation and prevents the entire on-chip network from being blocked, thereby solving the problem of excessive chip area overhead and impracticality caused by reserving cache space at the receiving end.

[0006] The present invention adopts the following technical solutions:

[0007] In a first aspect, the present invention provides a data transmission method for a large-bit-width on-chip network, comprising:

[0008] If there is no blockable data to be transmitted from the sending end to the receiving end, the link from the sending end to the receiving end is determined to be a non-blockable link; all cache spaces inside each NOC node on the non-blockable link are used to transmit the non-blockable data;

[0009] If there is blockable data that needs to be transmitted from the sending end to the receiving end, the link from the sending end to the receiving end is determined to be a blockable link; from all the cache spaces inside each NOC node on the blockable link, blockable cache space is allocated to the blockable data, and the remaining cache space is determined as non-blockable cache space; the blockable cache space is used to transmit the blockable data, and the non-blockable cache space is used to transmit the corresponding non-blockable data.

[0010] Furthermore, at least one counter is set inside each NOC node;

[0011] The using the blockable cache space to transmit the blockable data and the using the non-blockable cache space to transmit corresponding non-blockable data comprises:

[0012] When receiving blockable data, the blockable data is stored in a blockable cache space allocated thereto, and a count of a counter in a corresponding NOC node is modified so as to send the blockable data in the blockable cache space to a downstream node of the NOC node; wherein the count of the counter is used to represent: the amount of blockable cache space occupied by the blockable data in the downstream node;

[0013] When non-blockable data is received, the non-blockable data in the non-blockable buffer space is directly sent to the downstream node.

[0014] Further, when receiving the blockable data, storing the blockable data in a blockable cache space allocated thereto, and modifying the count of a counter in a corresponding NOC node so as to send the blockable data in the blockable cache space to a downstream node of the NOC node includes:

[0015] When the NOC node sends the blockable data to the downstream node, the count of the counter of the NOC node is increased by one, and the NOC node sends a counter decrement instruction to all upstream nodes;

[0016] When the NOC node receives a counter decrement instruction from a downstream node, the NOC node decrements the counter of the NOC node by one;

[0017] According to the count of the counter of the NOC node, the blockable data is selectively sent to the downstream node, or the blockable data is kept stored in the blockable buffer space.

[0018] Furthermore, selectively sending the blockable data to the downstream node according to the count of the counter of the NOC node, or keeping the blockable data stored in the blockable cache space, includes:

[0019] If the count of the counter is equal to the maximum cacheable space number of the NOC node, suspending the sending of the blockable data to the downstream node; wherein the maximum cacheable space number is the number of blockable cache spaces allocated by the NOC node for the blockable data;

[0020] If the count of the counter of the NOC node is less than the maximum cacheable space, the blockable data is sent to the downstream node.

[0021] Furthermore, selectively sending the blockable data to the downstream node according to the count of the counter of the NOC node, or keeping the blockable data stored in the blockable cache space further includes:

[0022] When part of the cache space is dynamically divided from all the cache spaces inside the NOC node and the divided part of the cache space is determined to be a blockable cache space, after the blockable data is transmitted to the downstream node, the divided part of the cache space is no longer used as a blockable cache space, and the maximum number of cacheable spaces of the NOC node is reduced by one.

[0023] Furthermore, setting at least one counter within each NOC node includes:

[0024] Determine the number N of downstream nodes of the NOC node;

[0025] N counters are set for the NOC node, wherein one counter corresponds to one downstream node, and is used to count the amount of blockable cache space occupied by blockable data in the corresponding downstream node.

[0026] Furthermore, allocating a blockable cache space to the blockable data from all cache spaces inside each NOC node on the blockable link, and determining the remaining cache space as a non-blockable cache space includes:

[0027] If there is blockable data that needs to be transmitted from the sending end to the receiving end, according to the preset strategy, part of the cache space is dynamically divided from all the cache space inside the NOC node, the divided part of the cache space is determined as the blockable cache space, and the remaining cache space after the division is determined as the non-blockable cache space.

[0028] Furthermore, it also includes:

[0029] receiving a data packet and parsing the data packet to obtain a blocking type tag carried by the data packet; wherein the blocking type tag is divided into blockable and non-blockable; the blockable blocking type tag is used to mark blockable data, and the non-blockable blocking type tag is used to mark non-blockable data;

[0030] If the blocking type is marked as blockable, the data carried by the data packet is blockable data, the blockable data is cached using a blockable buffer space, so as to obtain the blockable data from the blockable buffer space, and the blockable data is transmitted;

[0031] If the blocking type is marked as non-blockable, the data carried by the data packet is non-blockable data, and the non-blockable data is transmitted.

[0032] In a second aspect, the present invention further provides a data transmission system for a large bit-width on-chip network, for implementing the data transmission method for a large bit-width on-chip network as described in the first aspect; the data transmission system for the large bit-width on-chip network includes a transmitting end, a NOC node, and a receiving end, wherein the transmitting end sends blockable data or non-blockable data to the receiving end through at least one NOC node, wherein:

[0033] The NOC node is configured to: if there is no blockable data to be transmitted from the sending end to the receiving end, use all cache space within each NOC node between the sending end and the receiving end to transmit the non-blockable data between the sending end and the receiving end;

[0034] The method is further configured to: if there is blockable data that needs to be transmitted from the sending end to the receiving end, allocate blockable cache space to the blockable data from all cache spaces within each NOC node between the sending end and the receiving end, and determine the remaining cache space as non-blockable cache space; use the blockable cache space to transmit the blockable data between the sending end and the receiving end; and use the non-blockable cache space to transmit the non-blockable data between the sending end and the receiving end.

[0035] Furthermore, the NOC node is further configured to: when sending the blockable data to the downstream node, increase the count of its own counter by one, and send a counter decrement instruction to all upstream nodes;

[0036] It is also used to decrement the count of its own counter by one when receiving a counter decrement instruction from a downstream node;

[0037] It is further configured to selectively send the blockable data to the downstream node according to the count of its own counter, or keep storing the blockable data in the blockable cache space.

[0038] In a third aspect, the present invention further provides a non-volatile computer storage medium storing computer executable instructions, which are executed by one or more processors to complete the data transmission method of the large bit-width on-chip network described in the first aspect.

[0039] In a fourth aspect, a chip is provided, comprising: a processor and an interface, for calling and running a computer program stored in a memory, and executing the data transmission method of a large bit-width on-chip network as in the first aspect.

[0040] In a fifth aspect, a computer program product comprising instructions is provided, which, when executed on a computer or processor, enables the computer or processor to execute the data transmission method for a large bit-width on-chip network as described in the first to fourth aspects and any one of the above.

[0041] Different from the prior art, the present invention has at least the following beneficial effects:

[0042] The present invention divides data required to be transmitted by the on-chip network into blockable data and non-blockable data, and divides corresponding transmission links into blockable links and non-blockable links. When blockable data needs to be transmitted between a sending end and a receiving end, a blockable cache space is allocated by a NOC node for the blockable data, and the blockable cache space is used to transmit the blockable data, while the remaining cache space inside the NOC node is used to transmit the corresponding non-blockable data. This eliminates the need to reserve a huge cache space inside the receiving end, ensures continuous data transfer, and prevents the entire on-chip network from being blocked, thereby solving the problem of excessive chip area overhead and impracticality caused by reserving cache space at the receiving end. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. Those skilled in the art can also derive other drawings based on these drawings without inventive effort.

[0044] Figure 1 This is a schematic diagram of a specific example of a head-of-line blocking situation provided by an embodiment of the present invention;

[0045] Figure 2 This is a flow chart of a data transmission method for a large-bit-width on-chip network provided by an embodiment of the present invention;

[0046] Figure 3 This is a schematic diagram of a specific example of a data transmission system for a large-bit-width on-chip network provided by an embodiment of the present invention;

[0047] Figure 4 is a flow chart of step 20 provided in an embodiment of the present invention;

[0048] Figure 5 201 is a flowchart of step 201 provided by an embodiment of the present invention;

[0049] Figure 6 This is a flow chart of another large-bit-width on-chip network data transmission method provided by an embodiment of the present invention;

[0050] Figure 7 1 is a schematic diagram of the architecture of another large-bit-width on-chip network data transmission system provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0051] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0052] Unless the context requires otherwise, throughout the specification and claims, the term "including" is to be interpreted as meaning open inclusion, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" and the like are intended to indicate that the specific features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner, that is, although they may be carried in the embodiments or examples of the above terms due to reasons such as the order and position of appearance, it is not limited to that they can be carried in combination by one embodiment or example.

[0053] In the description of the present invention, it should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present disclosure and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present disclosure.

[0054] In the description of the present invention, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "multiple" means two or more. In addition, for example, the description may also use the method of adding "A" and "B" at the end to describe the same type of nouns as two independent individuals. In this case, the corresponding features defined as "A" and "B" are only used to distinguish the description purposes of the same type of individuals, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated.

[0055] When describing some embodiments, the expressions “coupled”, “coupled” and “connected” and their derivatives may be used. For example, when describing some embodiments, the term “connected” may be used to indicate that two or more components are in direct physical or electrical contact with each other. For another example, when describing some embodiments, the term “coupled” may be used to indicate that two or more components are in direct physical or electrical contact. However, the term “connected” or “coupled” may also mean that two or more components are not in direct contact with each other, but still cooperate or interact with each other, such as “optical coupling”, “wireless connection”, etc. The embodiments disclosed herein are not necessarily limited to the contents of the present invention.

[0056] In the description of the present invention, the expression "A and / or B" (where A and B are used to formally represent specific characteristic contents) will be involved, and the corresponding expressions include the following three combinations: only A, only B, and a combination of A and B.

[0057] As used herein, "about," "substantially," or "approximately" includes the stated value and an average value that is within an acceptable range of deviation from the particular value as determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0058] NOC is a communication technology used in System on Chip (SoC). NOC enables data exchange and communication between various modules within the chip by building a computer network-like structure within the chip. NOC is a network-based communication subsystem primarily used to connect the various modules within the SoC. Within a NOC node, a direct network structure using packet switching is employed, with each NOC node connected to adjacent NOC nodes via bidirectional channels. The network connections between NOC nodes are heterogeneous, requiring connections to different processing and storage components, resulting in uneven distribution of communication traffic.

[0059] For example, Figure 1 As shown in the figure, for a NOC with three input ports and three output ports, on the one hand, when both input port 2 and input port 1 want to output data to output port 2, and input port 1 has seized the right to use output port 2, input port 2 must wait until input port 1 has completed its data output and its occupation of output port 2 is released before it can output data to output port 2. On the other hand, because data in the NOC is transmitted in a first-in-first-out (FIFO) queue, input port 2 also wants to output data to output port 1, and this data is queued after the data to be output to output port 2. Therefore, input port 2 must wait until input port 2 has output data to output port 2 before it can output data to output port 1, resulting in data congestion.

[0060] The head-of-line blocking in the above example is not particularly severe because the output ports can continue to receive data, so the head-of-line blocking can be eliminated in a short time. However, if the output ports are temporarily unable to receive data for some reason, the head-of-line blocking will persist, causing the length of the blocked data queue to continue to increase.

[0061] In most chip designs, sufficient cache space is often reserved inside the receiving end to ensure that the on-chip network does not cause head-of-line blocking. When the receiving end finds that its own cache space is about to be fully occupied, it will no longer request data from the sending end.

[0062] However, in high-latency, high-bandwidth chip designs, a very large cache must be placed at the receiving end. This means that a significant amount of cache space must be reserved within the receiving end to cover the latency, resulting in excessive chip overhead and poor practicality. Taking Direct Memory Access (DMA) as an example, when the chip's bit width is 512 bits and the NOC latency is 500 cycles, to move data as quickly as possible, read commands must be continuously sent to the sending end. The sending end then continuously transmits the read data after receiving it. In this case, the read command sent in the first cycle will not return the corresponding read data until 500 cycles later. Since read commands must be continuously sent during these 500 cycles, a cache space of 500 * 512 bits = 31.25 kilobytes must be reserved to ensure the normal operation of the on-chip network. 31.25 kilobytes is a very large cache space. In chip design, it is often undesirable to consume such a large chip area. However, if the cache space is reduced, data transfer may be interrupted. If one wants uninterrupted data transfer but does not want to design such a large cache space inside the receiving end, then the read data returned by the read command may not be received, causing the read data to be blocked on the on-chip network, and the entire on-chip network will be blocked and unable to operate normally.

[0063] In order to solve the above problems, Figure 2 As shown, an embodiment of the present invention provides a data transmission method for a large bit-width on-chip network, including:

[0064] Step 10: If there is no blockable data to be transmitted from the sending end to the receiving end, the link from the sending end to the receiving end is determined to be a non-blockable link; and all cache spaces inside each NOC node on the non-blockable link are used to transmit the non-blockable data.

[0065] Among them, blockable data is data that can be blocked during transmission; similarly, non-blockable data is data that cannot be blocked during transmission and must be transmitted directly; whether data can be blocked is determined and marked by technical personnel in this field according to the specific usage scenario and is not limited here.

[0066] The following first describes the applicable scenarios of the embodiments of the present invention:

[0067] The application scenario of the embodiment of the present invention is to perform data transfer operations in an on-chip network, that is, to transfer data between a sending end and a receiving end. Figure 3In the network on chip shown, data can be transmitted from sender 1 to receiver 1 via NOC nodes 1 and 2; data can be transmitted from sender 2 to receiver 2 via NOC nodes 3 and 4; and data can also be transmitted from sender 1 to receiver 2 via NOC nodes 1, 3, and 4. The receiver is often a DMA, which is used to obtain data from an upstream node (e.g., a sender or NOC node), process the data, and then send the processed data to the corresponding downstream node.

[0068] In most cases, data congestion will not occur at the receiving end, and data is continuously transmitted between the sending and receiving ends. During this normal data transfer operation, there is no need to use the cache space inside the NOC node or the receiving end to cache the transferred data. Only when data congestion occurs at the receiving end, or the bandwidth of the receiving end is small, will the data congestion start from the receiving end and be transmitted step by step to the upstream node until the congestion affects the sending end. However, since data congestion will not occur at the receiving end in most cases, the embodiment of the present invention only specifically grades the data transmitted by the NOC node, avoiding the use of existing methods such as increasing the cache space to change the physical area of the chip.

[0069] The embodiment of the present invention sets up a virtual link for the on-chip network, that is, the link composed of the sending end, the NOC node and the receiving end is used as a virtual link, and the virtual link is divided into two levels, one is a blockable level, and the other is a non-blockable level, to obtain a blockable link and a non-blockable link. When there is no need to transmit blockable data from the sending end to the receiving end, it means that there is only non-blockable data from the sending end to the receiving end, so the embodiment of the present invention uses the NOC node between the sending end and the receiving end to directly transmit such data; wherein, the way in which the NOC node transmits non-transmittable data is selected by those skilled in the art according to the specific usage scenario and is not limited here. Under normal circumstances, if there is no blockable data to be transmitted, then the cache space inside each NOC node can be used to transmit non-blockable data.

[0070] Step 20: If there is blockable data that needs to be transmitted from the sending end to the receiving end, the link from the sending end to the receiving end is determined to be a blockable link; from all the cache spaces inside each NOC node on the blockable link, blockable cache space is allocated to the blockable data, and the remaining cache space is determined as non-blockable cache space; the blockable data is transmitted using the blockable cache space, and the corresponding non-blockable data is transmitted using the non-blockable cache space.

[0071] When blockable data needs to be transmitted from the sending end to the receiving end, if blockable data is found to be transmitted, each node allocates a portion of cache space for the blockable data; wherein, the amount of blockable cache space in all the cache spaces within the NOC node is selected by those skilled in the art according to the specific usage scenario; generally, the larger the allocated cache space, the faster the data transmission speed of the blockable link. In one embodiment, the same amount of cache space is allocated according to the number of downstream nodes of the NOC node; for example, Figure 3 As shown, in the process of transmitting data from the sending end 1 to the receiving end 1, for NOC node 1, its downstream nodes are NOC node 2 and the receiving end 1, and the corresponding number of downstream nodes is 2. There are a total of 4 cache spaces inside the NOC node 1, so the NOC node 1 allocates two cache spaces for blockable data and two cache spaces for non-blockable data.

[0072] Among them, when the blockable data is blocked, it only occupies the corresponding blockable cache space, and does not occupy all the cache space of the NOC node. The unblockable data still uses the unblockable space to be transmitted on the on-chip network.

[0073] In an optional embodiment, when a NOC node is designed with a total of four cache spaces, a maximum of two cache spaces can be randomly allocated from the four cache spaces to cache blockable data. If blockable data needs to be transmitted from the sender to the receiver, a portion of the cache space is dynamically divided from all cache spaces within the NOC node according to a preset policy, and the divided portion of cache space is determined as blockable cache space, while the remaining cache space after the division is determined as non-blockable cache space. For example, the preset policy can be: setting a maximum value for the storage space that can be occupied by each NOC node's blockable data on downstream nodes. In one embodiment, when the maximum value is 2, the storage space that can be occupied by the NOC node's blockable data on downstream nodes is 2, and similarly, the storage space that can be occupied by the NOC node's non-blockable data on downstream nodes is N-2, where N is the total storage space allocated to the NOC node by its downstream nodes. When there are two blockable data that need to be transmitted from the sender to the receiver, the NOC node has two blockable cache spaces and two non-blockable cache spaces among all cache spaces within the node. After the corresponding blockable data is transmitted, the cache space is no longer limited to blockable cache space, enabling dynamic allocation of cache space. That is, when there is no blockable data between a NOC node and its downstream node, all the storage space allocated to the NOC node by the downstream node is used to forward non-blockable data. When there is blockable data between a NOC node and its downstream node, the downstream node has two preset storage spaces for forwarding blockable data, and the remaining storage space is used to forward non-blockable data.

[0074] The present invention divides data required to be transmitted by the on-chip network into blockable data and non-blockable data, and divides corresponding transmission links into blockable links and non-blockable links. When blockable data needs to be transmitted between a sending end and a receiving end, a blockable cache space is allocated by a NOC node for the blockable data, and the blockable cache space is used to transmit the blockable data, while the remaining cache space inside the NOC node is used to transmit the corresponding non-blockable data. This eliminates the need to reserve a huge cache space inside the receiving end, ensures continuous data transfer, and prevents the entire on-chip network from being blocked, thereby solving the problem of excessive chip area overhead and impracticality caused by reserving cache space at the receiving end.

[0075] In order to further explain the process of transmitting data, Figure 4 As shown, in step 20, the using the blockable cache space to transmit the blockable data and the using the non-blockable cache space to transmit the corresponding non-blockable data includes:

[0076] Step 201: When blockable data is received, the blockable data is stored in a blockable cache space allocated thereto, and the count of a counter in a corresponding NOC node is modified so as to send the blockable data in the blockable cache space to a downstream node of the NOC node; wherein the count of the counter is used to represent: the amount of blockable cache space occupied by the blockable data in the downstream node.

[0077] At least one counter is set within each NOC node. In an optional embodiment, the number N of downstream nodes of the NOC node is determined; N counters are set for the NOC node, wherein one counter corresponds to each downstream node, and is used to count the amount of blockable cache space occupied by blockable data in the corresponding downstream node.

[0078] When a NOC node receives blockable data, it stores the blockable data in the blockable cache space allocated to it by the NOC node and modifies the count of the counter in the NOC node; subsequently, when the blockable data needs to be transmitted, the blockable data in the blockable cache space is sent to the downstream node of the NOC node; wherein the downstream node is the next node of the NOC node, and the downstream node can be a NOC node or a receiving end.

[0079] Step 202: When non-blockable data is received, the non-blockable data in the non-blockable buffer space is directly sent to the downstream node.

[0080] When a NOC node receives non-blockable data, it directly transmits it to the next node of the NOC node because the data is non-blockable.

[0081] The embodiment of the present invention classifies the data to be transmitted into two categories: blockable data and non-blockable data. When transmitting these two types of data, flow control is also performed separately, and different cache spaces in the NOC are used for transmission. It should be noted that during the transmission of non-blockable data, data congestion will basically not occur. Therefore, non-blockable cache space is generally not used to cache non-blockable data. Instead, non-blockable data is directly transferred between various upstream and downstream nodes. Only when data congestion occurs will the non-blockable cache space be used to cache non-blockable data to ensure the integrity of the non-blockable data.

[0082] In order to illustrate the transmission process of blocking data, Figure 5 As shown, step 201 includes:

[0083] Step 2011: When the NOC node sends the blockable data to the downstream node, the count of the counter of the NOC node is increased by one, and the NOC node sends a counter decrement instruction to all upstream nodes.

[0084] For example, Figure 3 As shown in the figure, each NOC node can cache four read data. That is, each NOC node has four cache spaces. When two cache spaces are allocated for blockable data, the blockable data is transmitted in the following manner:

[0085] A counter is set within each NOC node. In an optional embodiment, the number of bits occupied by the counter is 2. For example, according to the number of downstream nodes of the NOC node, the same number of counters are set within the NOC node. The downstream nodes of NOC node 1 are NOC node 2 and receiving end 1. Two counters are set within NOC node 1, each counter occupying 2 bits.

[0086] When the NOC node 1 sends the blockable data to the downstream node (i.e., NOC node 2), since the counter in the NOC node 1 is used to represent the amount of cache space occupied by the blockable data in the NOC node 2, the NOC node 1 adds one to its own counter and sends a counter subtraction instruction to all its upstream nodes (i.e., the sending end 1).

[0087] Step 2012: When the NOC node receives a counter decrement instruction from a downstream node, the count of the counter of the NOC node is decremented by one.

[0088] When the NOC node 1 receives a counter decrement instruction from the downstream node, it decrements the count of its own counter by one.

[0089] Step 2013: According to the count of the counter of the NOC node, selectively send the blockable data to the downstream node, or keep storing the blockable data in the blockable cache space.

[0090] In an optional embodiment, if the count of the counter is equal to the maximum cacheable space number of the NOC node, the NOC node suspends sending the blockable data to the downstream node; wherein the maximum cacheable space number is the number of blockable cache spaces allocated by the NOC node for blockable data; if the count of the counter of the NOC node is less than the maximum cacheable space number, the NOC node sends the blockable data to the downstream node.

[0091] For example, as long as the count of the counter of a NOC node is not 2, it means that the downstream node of the NOC node can receive blockable data; if the count of the counter is equal to 2, the NOC node can no longer send blockable data to the corresponding downstream node.

[0092] In this way, it can be ensured that the blockable data will not consume all the cache space of a NOC node; when the receiving end of the blockable link cannot receive data, the transmission of non-blockable data will not be blocked.

[0093] It should be noted that the embodiments of the present invention are optimized for wide-bit-width NoCs. The added counters and signals indicating whether or not they can be blocked are negligible relative to the overall chip area and power consumption. Furthermore, to minimize the inconvenience of back-end routing, the number of upstream and downstream nodes connected to a NoC node is limited; for example, in a two-dimensional network, a NoC node can connect to a maximum of two upstream nodes and two downstream nodes.

[0094] In one embodiment, in order to set and distinguish between blockable data and non-blockable data, as shown in FIG. Figure 6 As shown, the data transmission method of the large bit-width on-chip network according to the embodiment of the present invention further includes:

[0095] Step 301: Receive a data packet and parse the data packet to obtain a blocking type tag carried by the data packet; wherein the blocking type tag is divided into blockable and non-blockable; the blockable blocking type tag is used to mark blockable data, and the non-blockable blocking type tag is used to mark non-blockable data.

[0096] In an on-chip network, data is transmitted between a sender and a receiver in the form of data packets. The receiver requests the required data by sending data packets to the sender, and the sender returns the data requested by the receiver by sending data packets to the receiver.

[0097] When the receiving end requests data from the sending end, it will inform the sending end whether the requested data can be blocked. In an optional embodiment, a blocking type flag of 1 bit can be added to the packet header. When the sending end returns data to the receiving end, it will inform the sending end whether the returned data can be blocked. In an optional embodiment, the blocking type flag can be added to the packet header. When the sending end receives a packet with a blocking type flag indicating that the packet can be blocked, the sending end will also add the blocking type flag when generating the corresponding packet.

[0098] For the NOC node between the sending end and the receiving end, when a data packet is received, it is parsed to obtain the blocking type tag, and then determine whether the data in the data packet is blockable data or non-blockable data.

[0099] Step 302: If the blocking type is marked as blockable, the data carried by the data packet is blockable data, and the blockable data is cached using a blockable buffer space, so as to obtain the blockable data from the blockable buffer space and transmit the blockable data.

[0100] Step 303: If the blocking type is marked as non-blockable, the data carried by the data packet is non-blockable data, and the non-blockable data is transmitted.

[0101] In one embodiment, when dynamically allocating cache space for blockable data is selected, that is, when a portion of cache space is dynamically divided from all cache spaces within the NOC node and the divided portion of cache space is determined to be a blockable cache space, after the blockable data is transmitted to the downstream node, the divided portion of cache space is no longer used as a blockable cache space, but the portion of cache space is used as a non-blockable cache space to transmit non-blockable data, and when new blockable data appears, when dynamically allocating cache space for the new blockable data, the portion of cache space is used as an optional cache space, and the maximum number of cacheable spaces of the NOC node is reduced by one.

[0102] like Figure 7 As shown, in the prior art, if data is not classified into blockable and non-blockable data, the data sent to receiver 1 will quickly fill the buffer space in NOC node 1 and NOC node 2, resulting in receiver 2 being unable to receive any data, which is called head-of-line blocking. To ensure normal data transmission in the on-chip network, a large buffer space must be reserved in receiver 1.

[0103] It should be noted that, in order to dynamically allocate cache space, the NOC node of the embodiment of the present invention uses random access memory (RAM) as cache space to cache corresponding blockable data.

[0104] In an actual scenario, the data requested by the receiving end 1 is blockable data. After the receiving end 1 requests the data, the receiving end 2 also requests the blockable data from the sending end 1. Since the data in the NOC of the prior art is transmitted in a FIFO manner, the sending end 1 first returns the corresponding data to the receiving end 1, and then returns the corresponding data to the receiving end 2. However, at this time, the receiving end 1 cannot receive the data temporarily, while the receiving end 2 can receive the data. When the receiving end 1 cannot receive the data returned by the sending end 1 from the NOC node 2, the data returned by the sending end 1 to the receiving end 2 is also blocked in the NOC node 2, resulting in a head-of-line blocking phenomenon, which causes the on-chip network data to be unable to be transmitted normally.

[0105] The embodiment of the present invention performs hierarchical flow control on blockable data and non-blockable data. Once blockable data appears, the transmission links of blockable data and non-blockable data are decoupled, and blockable cache space is used to temporarily store blockable data. Since in actual usage scenarios, the number of senders, NOC nodes and receivers in the on-chip network is large and the network structure is relatively complex, the embodiment of the present invention allocates blockable cache space through software to cache blockable data in each NOC node in the on-chip network, and disperses blockable data in each NOC node as much as possible, reducing the impact on the bandwidth of the on-chip network. Therefore, the sender 1 is not affected by the inability of the receiver 1 to receive data, and the unreceivable data can be cached through the RAM in the NOC node 2. Then, the data sent by the sender 1 to the receiver 2 can be transmitted normally to the receiver 2. There is no need to reserve a large cache space through hardware inside the receiver 1, and data can be transmitted normally, and large-scale line head blocking will not occur in the entire on-chip network.

[0106] about Figure 7 When using this solution, in order to achieve dynamic allocation of cache, FIFO can no longer be used, but RAM must be used to store data, so that A2 can be sent before A1.

[0107] The present invention also provides a data transmission system for a large bit-width network-on-chip, which is used to implement the data transmission method for a large bit-width network-on-chip according to an embodiment of the present invention. The data transmission system for a large bit-width network-on-chip includes a transmitting end, a NOC node, and a receiving end. The transmitting end sends blockable data or non-blockable data to the receiving end through at least one NOC node, wherein:

[0108] The NOC node is used to: if there is no blockable data that needs to be transmitted from the sending end to the receiving end, use all the cache space inside each NOC node between the sending end and the receiving end to transmit the non-blockable data between the sending end and the receiving end; and is also used to: if there is blockable data that needs to be transmitted from the sending end to the receiving end, allocate blockable cache space for the blockable data from all the cache space inside each NOC node between the sending end and the receiving end, and determine the remaining cache space as non-blockable cache space; use the blockable cache space to transmit the blockable data between the sending end and the receiving end; and use the non-blockable cache space to transmit the non-blockable data between the sending end and the receiving end.

[0109] In one embodiment, the NOC node is further used to: when sending the blockable data to the downstream node, increase the count of its own counter by one, and send a counter decrement instruction to all upstream nodes; when receiving a counter decrement instruction from the downstream node, decrease the count of its own counter by one; and selectively send the blockable data to the downstream node according to the count of its own counter, or keep the blockable data stored in the blockable cache space.

[0110] It is worth noting that the information interaction, execution process, etc. between the modules and units within the above-mentioned devices and systems are based on the same concept as the processing method embodiment of the present invention. The specific content can be found in the description of the method embodiment of the present invention and will not be repeated here.

[0111] Those skilled in the art will understand that all or part of the steps in the various methods of the embodiments can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable storage medium, which may include: read-only memory (ROM), random access memory (RAM), a disk or an optical disk, etc.

[0112] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A data transmission method for a large bit-width on-chip network, characterized in that: include: If there is no blockable data to be transmitted from the sending end to the receiving end, determining the link from the sending end to the receiving end as a non-blockable link; Using all cache space inside each NOC node on the non-blocking link to transmit non-blocking data; If there is blockable data that needs to be transmitted from the sending end to the receiving end, the link from the sending end to the receiving end is determined to be a blockable link; from all the cache spaces inside each NOC node on the blockable link, blockable cache space is allocated to the blockable data, and the remaining cache space is determined as non-blockable cache space; the blockable cache space is used to transmit the blockable data, and the non-blockable cache space is used to transmit the corresponding non-blockable data.

2. The data transmission method of a large bit-width on-chip network according to claim 1, characterized in that: At least one counter is set inside each NOC node; The using the blockable cache space to transmit the blockable data and the using the non-blockable cache space to transmit corresponding non-blockable data comprises: When receiving blockable data, the blockable data is stored in a blockable cache space allocated thereto, and a count of a counter in a corresponding NOC node is modified so as to send the blockable data in the blockable cache space to a downstream node of the NOC node; wherein the count of the counter is used to represent the amount of blockable cache space occupied by the blockable data in the downstream node; When non-blockable data is received, the non-blockable data in the non-blockable buffer space is directly sent to the downstream node.

3. The data transmission method of a large bit-width on-chip network according to claim 2, characterized in that: When receiving the blockable data, storing the blockable data in a blockable cache space allocated thereto, and modifying the count of a counter in a corresponding NOC node so as to send the blockable data in the blockable cache space to a downstream node of the NOC node includes: When the NOC node sends the blockable data to the downstream node, the count of the counter of the NOC node is increased by one, and the NOC node sends a counter decrement instruction to all upstream nodes; When the NOC node receives a counter decrement instruction from a downstream node, the NOC node decrements the counter of the NOC node by one; According to the count of the counter of the NOC node, the blockable data is selectively sent to the downstream node, or the blockable data is kept stored in the blockable buffer space.

4. The data transmission method of a large bit-width on-chip network according to claim 3, characterized in that: The selectively sending the blockable data to the downstream node according to the count of the counter of the NOC node, or keeping the blockable data stored in the blockable cache space, comprises: If the count of the counter is equal to the maximum cacheable space number of the NOC node, suspending the sending of the blockable data to the downstream node; wherein the maximum cacheable space number is the number of blockable cache spaces allocated by the NOC node for the blockable data; If the count of the counter of the NOC node is less than the maximum cacheable space, the blockable data is sent to the downstream node.

5. The data transmission method of a large bit-width on-chip network according to claim 4, characterized in that: The selectively sending the blockable data to the downstream node according to the count of the counter of the NOC node, or keeping the blockable data stored in the blockable cache space further includes: When part of the cache space is dynamically divided from all the cache spaces inside the NOC node and the divided part of the cache space is determined to be a blockable cache space, after the blockable data is transmitted to the downstream node, the divided part of the cache space is no longer used as a blockable cache space, and the maximum number of cacheable spaces of the NOC node is reduced by one.

6. The data transmission method of a large bit-width on-chip network according to claim 2, characterized in that: The setting of at least one counter in each NOC node includes: Determine the number N of downstream nodes of the NOC node; N counters are set for the NOC node, wherein one counter corresponds to one downstream node, and is used to count the amount of blockable cache space occupied by blockable data in the corresponding downstream node.

7. The data transmission method of a large bit-width on-chip network according to claim 1, characterized in that: The allocating a blockable cache space to the blockable data from all the cache spaces inside each NOC node on the blockable link, and determining the remaining cache space as a non-blockable cache space comprises: If there is blockable data that needs to be transmitted from the sending end to the receiving end, according to the preset strategy, part of the cache space is dynamically divided from all the cache space inside the NOC node, the divided part of the cache space is determined as the blockable cache space, and the remaining cache space after the division is determined as the non-blockable cache space.

8. The data transmission method of a large bit-width on-chip network according to any one of claims 1 to 7, characterized in that: Also includes: receiving a data packet and parsing the data packet to obtain a blocking type tag carried by the data packet; wherein the blocking type tag is divided into blockable and non-blockable; the blockable blocking type tag is used to mark blockable data, and the non-blockable blocking type tag is used to mark non-blockable data; If the blocking type is marked as blockable, the data carried by the data packet is blockable data, the blockable data is cached using a blockable buffer space, so as to obtain the blockable data from the blockable buffer space, and the blockable data is transmitted; If the blocking type is marked as non-blockable, the data carried by the data packet is non-blockable data, and the non-blockable data is transmitted.

9. A data transmission system for a large bit-width on-chip network, characterized in that: A data transmission method for implementing the large bit-width on-chip network according to any one of claims 1 to 8; the data transmission system of the large bit-width on-chip network comprises a transmitting end, a NOC node, and a receiving end, wherein the transmitting end sends blockable data or non-blockable data to the receiving end through at least one NOC node, wherein: The NOC node is configured to: if there is no blockable data to be transmitted from the sending end to the receiving end, use all cache space within each NOC node between the sending end and the receiving end to transmit the non-blockable data between the sending end and the receiving end; The method is further configured to: if there is blockable data that needs to be transmitted from the sending end to the receiving end, allocate blockable cache space to the blockable data from all cache spaces within each NOC node between the sending end and the receiving end, and determine the remaining cache space as non-blockable cache space; use the blockable cache space to transmit the blockable data between the sending end and the receiving end; and use the non-blockable cache space to transmit the non-blockable data between the sending end and the receiving end.

10. The data transmission system of a large bit-width on-chip network according to claim 9, characterized in that: The NOC node is further configured to: when sending the blockable data to the downstream node, increase the count of its own counter by one, and send a counter decrement instruction to all upstream nodes; It is also used to decrement the count of its own counter by one when receiving a counter decrement instruction from a downstream node; It is further configured to selectively send the blockable data to the downstream node according to the count of its own counter, or keep storing the blockable data in the blockable cache space.

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