Display device
By setting light emitting diodes and light scattering layers in different regions in the subpixels of the display device, the problems of high cost of repairing LED defects and low light efficiency are solved, and cost reduction, efficiency improvement and process simplification are achieved.
Patent Information
- Application Number
- CN202410878219.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-02-05
- Filing Date
- 2024-07-02
- Publication Date
- 2025-08-08
AI Technical Summary
The existing display devices have high repair costs when LED defects occur, low light extraction efficiency, large differences in viewing angle brightness, and complex repair process.
A first and second regions of a plurality of sub-pixels are arranged in the display device, different light emitting diodes are respectively arranged, and a light scattering layer with different characteristics is provided on each LED to achieve defect transfer repair and improvement of light efficiency.
By transferring repair LEDs in only a specific subpixel, manufacturing costs are reduced, luminous efficiency differences in each LED are reduced, light extraction efficiency is improved, power consumption is reduced, and repair processes are simplified.
Smart Images

Figure CN120456703A_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims the benefit of Korean Patent Application No. 10-2024-0017687 filed on February 5, 2024, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference. Technical Field
[0003] The present disclosure relates to a display device, and more particularly, to a display device using a light emitting diode (LED). Background Art
[0004] As displays used for computers, televisions, mobile phones, and the like, there are organic light emitting display (OLED) devices that are self-luminous devices, liquid crystal display (LCD) devices that require a separate light source, and the like.
[0005] Application ranges of the display device include not only monitors of computers and televisions but also personal digital assistants, and research is underway on display devices having a large area and reduced size and weight.
[0006] In addition, display devices including light-emitting diodes (LEDs) have recently attracted attention as next-generation display devices. Because LEDs are made of inorganic materials rather than organic materials, they are highly reliable, resulting in a longer lifespan than liquid crystal display devices or organic light-emitting display devices. In addition, LEDs have a fast response speed, excellent luminous efficiency, and strong impact resistance, resulting in excellent stability and the ability to display images with high brightness. Summary of the Invention
[0007] One object to be achieved by the present disclosure is to provide a display device that reduces process costs by transferring and repairing LEDs only when defects occur.
[0008] Another object to be achieved by the present disclosure is to provide a display device capable of improving the light extraction efficiency of a repaired LED.
[0009] Yet another object to be achieved by the present disclosure is to provide a display device capable of reducing brightness differences based on viewing angles.
[0010] The objects of the present disclosure are not limited to the above objects, and those skilled in the art can clearly understand other objects not mentioned above from the following description.
[0011] According to one aspect of the present disclosure, a display device is provided. The display device includes a substrate defining a plurality of sub-pixels, each of the plurality of sub-pixels including a first region and a second region. The display device includes a plurality of first light-emitting diodes disposed in the first regions of the plurality of sub-pixels, respectively. The display device includes a second light-emitting diode disposed in the second region of at least one of the plurality of sub-pixels and different from the plurality of first light-emitting diodes. The display device includes a first light scattering layer disposed on the plurality of first light-emitting diodes. The display device includes a second light scattering layer disposed on the second light-emitting diodes and having different properties from the first light scattering layer.
[0012] Additional details of exemplary embodiments are included in the detailed description and accompanying drawings.
[0013] According to the present disclosure, the manufacturing cost of a display device can be reduced by transferring a repair LED only when a defect occurs in a specific sub-pixel.
[0014] According to the present disclosure, by providing different light scattering layers according to the type of LED, the difference in luminous efficiency of each LED can be reduced.
[0015] According to the present disclosure, by adjusting the shape of the light scattering layer which differs according to the type of LED, the difference in light emitting efficiency may be reduced.
[0016] According to the present disclosure, by improving the light extraction efficiency of the repaired LED, power consumption can be reduced.
[0017] According to the present disclosure, by adjusting the width of the repair LED, the repair process can be easily performed.
[0018] The effects according to the present disclosure are not limited to those exemplified above, and more various effects are included in the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] The above and other aspects, features and other advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which
[0020] Figure 1 is a schematic configuration diagram of a display device according to an exemplary embodiment of the present disclosure;
[0021] Figure 2 is a cross-sectional view of a sub-pixel of a display device according to an exemplary embodiment of the present disclosure;
[0022] Figures 3A to 3D is a plan view of a sub-pixel illustrating a repair process of a display device according to an exemplary embodiment of the present disclosure;
[0023] Figures 4A to 4D is a cross-sectional view of a sub-pixel illustrating a repair process of a display device according to an exemplary embodiment of the present disclosure;
[0024] Figure 5 is a graph illustrating an effect of a display device according to an exemplary embodiment of the present disclosure;
[0025] Figure 6 is a cross-sectional view of a display device according to another exemplary embodiment of the present disclosure;
[0026] Figure 7 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure. DETAILED DESCRIPTION
[0027] The advantages and features of the present disclosure and the methods for achieving these advantages and features are described in detail below and in the accompanying drawings. Figure 1 The exemplary embodiments described in detail below will become clear. However, the present disclosure is not limited to the exemplary embodiments disclosed herein, but will be implemented in various forms. The exemplary embodiments are provided only by way of example to enable those skilled in the art to fully understand the disclosure of the present invention and the scope of the present disclosure.
[0028] The shapes, sizes, proportions, angles, quantities, etc. shown in the accompanying drawings for the purpose of describing exemplary embodiments of the present disclosure are merely examples, and the present disclosure is not limited thereto. The same reference numerals generally represent the same elements throughout the application. In addition, in the description below the present disclosure, detailed explanations of known related arts may be omitted to avoid unnecessarily obscuring the subject matter of the present disclosure. Terms such as "including," "having," and "consisting of" used herein are generally intended to allow the addition of other components, unless the term "only" is used in these terms. Any reference in the singular may include the plural, unless otherwise expressly stated.
[0029] Even if not explicitly stated, parts are interpreted as including the usual margin of error.
[0030] When terms such as “on,” “above,” “below,” and “after” are used to describe the positional relationship between two parts, one or more parts may be set between the two parts unless these terms use the terms “immediately” or “directly”.
[0031] When an element or layer is referred to as being “on” another element or layer, the element or layer can be directly on the other element or layer or other elements or layers may be interposed therebetween.
[0032] Although the terms "first," "second," etc. are used to describe various components, these components are not limited by these terms. These terms are merely used to distinguish one component from other components. Therefore, within the technical concept of the present disclosure, the first component mentioned below may be the second component.
[0033] Like reference numbers generally refer to like elements throughout the application.
[0034] The size and thickness of each component shown in the drawings are shown for convenience of description, and the present disclosure is not limited to the size and thickness of the components shown in the drawings.
[0035] The features of the various embodiments of the present disclosure may be combined or coupled with each other in part or in whole, and may be interconnected and operated in various technical ways, and the various embodiments may be implemented independently of each other, or in association with each other.
[0036] Hereinafter, a display device according to an exemplary embodiment of the present disclosure will be described in detail with reference to the accompanying drawings.
[0037] Figure 1 : is a schematic configuration diagram of a display device according to an exemplary embodiment of the present disclosure. For ease of description, Figure 1 Only the display panel PN, the gate driver GD, the data driver DD, and the timing controller TC among various components of the display device 100 are illustrated.
[0038] Reference Figure 1 The display device 100 includes a display panel PN including a plurality of sub-pixels SP, and a gate driver GD and a data driver DD respectively configured to provide various signals to the display panel PN. In addition, the display device 100 includes a timing controller TC configured to control the gate driver GD and the data driver DD.
[0039] The gate driver GD provides a plurality of scan signals to the plurality of scan lines SL in response to a plurality of gate control signals provided from the timing controller TC. Figure 1 It is illustrated that one gate driver GD is provided spaced apart from one side of the display panel PN. However, the number and arrangement of the gate drivers GD are not limited thereto.
[0040] The data driver DD converts image data input from the timing controller TC into data voltages using reference gamma voltages in response to a plurality of data control signals provided from the timing controller TC. The data driver DD may provide the converted data voltages to a plurality of data lines DL.
[0041] The timing controller TC sequences externally input image data and supplies the image data to the data driver DD. The timing controller TC generates gate control signals and data control signals using externally input synchronization signals, such as a dot clock signal, a data enable signal, and horizontal / vertical synchronization signals. Furthermore, the timing controller TC supplies the generated gate control signals and data control signals to the gate driver GD and the data driver DD, respectively, to control the gate driver GD and the data driver DD.
[0042] The display panel PN is configured to display an image to a user and includes a plurality of sub-pixels SP. In the display panel PN, a plurality of scan lines SL and a plurality of data lines DL intersect each other, and each of the plurality of sub-pixels SP is connected to the scan lines SL and the data lines DL. In addition, although not shown in the figure, each of the plurality of sub-pixels SP can be connected to a high-potential power line, a low-potential power line, a reference line, etc.
[0043] A display area AA and a non-display area NA surrounding the display area AA may be defined in the display panel PN.
[0044] The display area AA is the area in the display device 100 where images are displayed. A plurality of sub-pixels SP constituting a plurality of pixels and circuits for driving the plurality of sub-pixels SP may be provided in the display area AA. The plurality of sub-pixels SP may represent the smallest unit of the display area AA. N sub-pixels SP may form one pixel. A light-emitting device and a thin-film transistor for driving the light-emitting device may be provided in each sub-pixel SP. The plurality of light-emitting devices may be defined differently depending on the type of the display panel PN. For example, when the display panel PN is an inorganic light-emitting display panel, the light-emitting device may be a light-emitting diode (LED) or a micro light-emitting diode (microLED).
[0045] A plurality of signal lines are provided in the display area AA for transmitting various signals to the plurality of sub-pixels SP. For example, the plurality of signal lines may include a plurality of data lines DL that respectively provide data voltages to the plurality of sub-pixels SP. Furthermore, the plurality of signal lines may include a plurality of scan lines SL that respectively provide gate voltages to the plurality of sub-pixels SP. The plurality of scan lines SL may extend in one direction in the display area AA and may be connected to the plurality of sub-pixels SP. Furthermore, the plurality of data lines DL may extend in a direction different from the one direction in the display area AA and may be connected to the plurality of sub-pixels SP. Low-potential power lines, high-potential power lines, and the like may further be provided in the display area AA. However, the present disclosure is not limited thereto.
[0046] The non-display area NA is an area where no image is displayed and can be defined as an area extending from the display area AA. Wiring and pad electrodes for transmitting signals to the sub-pixels SP arranged in the display area AA, as well as driver ICs such as a gate driver IC and a data driver IC, can be provided in the non-display area NA. The non-display area NA may be located on the rear surface of the display panel PN, i.e., on a surface where the sub-pixels SP are not provided, or may be omitted, without being limited to the example shown in this figure.
[0047] In addition, the driving unit including the gate driver GD, the data driver DD and the timing controller TC can be connected to the display panel PN in various ways. For example, the gate driver GD can be installed in the non-display area NA in a GIP (Gate In Panel) manner, or can be installed between multiple sub-pixels SP in the display area AA as a GIA (Gate In Active Area). For example, the data driver DD and the timing controller TC can be provided on a flexible film and a printed circuit board (PCB). In addition, the data driver DD and the timing controller TC can be connected to the display panel PN by combining the flexible film and the PCB with a pad electrode provided in the non-display area NA of the display panel PN. The gate driver GD can be installed as a GIP and the data driver DD and the timing controller TC can transmit signals to the display panel PN through the pad electrode provided in the non-display area NA. In this case, the non-display area NA requires space for placing the gate driver GD and the pad electrode, and thus the border increases.
[0048] However, the gate driver GD can be installed in the display area AA as a GIA, and side wiring can be provided to connect the signal lines on the front surface of the display panel PN to the pad electrodes on the rear surface of the display panel PN. Furthermore, a flexible film and a PCB can be bonded to the rear surface of the display panel PN. In this case, the non-display area NA on the front surface of the display panel PN can be minimized. That is, when the gate driver GD, data driver DD, and timing controller TC are connected to the display panel PN as described above, a zero-bezel design can be achieved.
[0049] Figure 2 1 is a cross-sectional view illustrating a sub-pixel of a display device according to an exemplary embodiment of the present disclosure. Figure 2In the display device 100 according to an exemplary embodiment of the present disclosure, each of the plurality of sub-pixels SP may be provided with a light shielding layer BSM and a driving transistor DT. Furthermore, each of the plurality of sub-pixels SP may be provided with a first capacitor C1, a second capacitor C2, a first reflective electrode RE1, a second reflective electrode RE2, and a third reflective electrode RE3. Furthermore, each of the plurality of sub-pixels SP may be provided with a plurality of light-emitting diodes (LEDs) ED, a first connection electrode CE1, a second connection electrode CE2, a third connection electrode CE3, and a plurality of bonding layers BDL. Furthermore, each of the plurality of sub-pixels SP may be provided with a plurality of power lines VL1, a bank BB, a protective layer 117, a first light scattering layer 181, and a second light scattering layer 182.
[0050] The plurality of inorganic insulating layers among the insulating layers disposed on the substrate 110 may include a buffer layer 111, a gate insulating layer 112, and a first interlayer insulating layer 113. The plurality of inorganic insulating layers may further include a second interlayer insulating layer 114, a first passivation layer 115a, and a second passivation layer 115b.
[0051] In addition, the plurality of organic insulating layers among the insulating layers provided on the substrate 110 may include a first planarization layer 116 a , an adhesive layer AD, a second planarization layer 116 b , and a third planarization layer 116 c .
[0052] First, the substrate 110 is configured to support various components included in the display device 100 and may be made of an insulating material. For example, the substrate 110 may be made of glass or resin. In addition, the substrate 110 may include a polymer or plastic and may be formed of a flexible material.
[0053] Reference Figure 2 , a light shielding layer BSM is provided on the substrate 110. The light shielding layer BSM can be used to block light incident on the active layer ACT of the plurality of transistors and minimize leakage current. For example, the light shielding layer BSM can be provided under the active layer ACT of the driving transistor DT to block light incident on the active layer ACT. When light is irradiated on the active layer ACT, leakage current may be generated, thereby deteriorating the reliability of the transistor. Therefore, a light shielding layer BSM configured to block light can be provided on the substrate 110 to improve the reliability of the driving transistor DT. The light shielding layer BSM can be made of an opaque conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr) or an alloy thereof, but is not limited thereto.
[0054] A buffer layer 111 is provided on the light shielding layer BSM. The buffer layer 111 is an inorganic insulating layer for suppressing the penetration of moisture or impurities through the substrate 110. The buffer layer 111 may be composed of a single layer or a double layer of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto. However, the buffer layer 111 may be omitted depending on the type of substrate 110 or the type of thin film transistor, but is not limited thereto.
[0055] A driving transistor DT including an active layer ACT, a gate electrode GE, a source electrode SE, and a drain electrode DE is disposed on the buffer layer 111 .
[0056] although Figure 2 Although not shown, an additional buffer layer is provided between the substrate 110 and the light shielding layer BSM. Like the buffer layer 111, the additional buffer layer is an inorganic insulating layer for inhibiting the penetration of moisture or impurities through the substrate 110. The additional buffer layer may be composed of, for example, a single layer or a double layer of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.
[0057] First, an active layer ACT of the driving transistor DT is provided on the buffer layer 111. The active layer ACT may be made of a semiconductor material such as an oxide semiconductor, amorphous silicon, or polycrystalline silicon, but is not limited thereto. Although not shown in the figure, other transistors such as a switching transistor, a sensing transistor, and a light-emitting control transistor may be provided in addition to the driving transistor DT. The active layers of these transistors may also be made of a semiconductor material such as an oxide semiconductor, amorphous silicon, or polycrystalline silicon, but are not limited thereto. In addition, the active layers of transistors such as the driving transistor DT, the switching transistor, the sensing transistor, the light-emitting control transistor, etc. included in the pixel circuit may be made of the same material or may be made of different materials from each other.
[0058] A gate insulating layer 112 is provided on the active layer ACT. The gate insulating layer 112 is an inorganic insulating layer for electrically insulating the active layer ACT from the gate electrode GE. The gate insulating layer 112 may be composed of a single layer or a double layer of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.
[0059] The gate electrode GE is disposed on the gate insulating layer 112. The gate electrode GE may be formed of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof, but is not limited thereto.
[0060] A first interlayer insulating layer 113 and a second interlayer insulating layer 114 are provided on the gate electrode GE. The first interlayer insulating layer 113 and the second interlayer insulating layer 114 include contact holes for connecting the source electrode SE and the drain electrode DE to the active layer ACT, respectively. The first interlayer insulating layer 113 and the second interlayer insulating layer 114 are inorganic insulating layers for protecting components provided thereunder. Each of the first interlayer insulating layer 113 and the second interlayer insulating layer 114 may be formed of a single layer or a double layer of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.
[0061] A source electrode SE and a drain electrode DE electrically connected to the active layer ACT are provided on the second interlayer insulating layer 114. The source electrode SE is connected to the second capacitor C2 and the first electrodes 124 and 134 of the LED ED, and the drain electrode DE is connected to other components of the pixel circuit. Each of the source electrode SE and the drain electrode DE can be made of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof, but is not limited thereto.
[0062] A plurality of power lines VL1 are provided on the second interlayer insulating layer 114. The plurality of power lines VL1 are used to transmit power voltages to the LEDs ED of the plurality of sub-pixels SP. For example, the plurality of power lines VL1 may transmit a high-potential power voltage or a low-potential power voltage. Each of the plurality of power lines VL1 may be made of a conductive material such as, but not limited to, copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof.
[0063] In addition, a first capacitor C1 is provided on the gate insulating layer 112. The first capacitor C1 includes a 1-1 capacitor electrode C1a and a 1-2 capacitor electrode C1b.
[0064] First, the 1-1th capacitor electrode C1a is disposed on the gate insulating layer 112. The 1-1th capacitor electrode C1a may be integrally formed with the gate electrode GE of the driving transistor DT.
[0065] The 1-2 capacitor electrode C1b is provided on the first interlayer insulating layer 113. The 1-2 capacitor electrode C1b is provided so as to overlap with the 1-1 capacitor electrode C1a with the first interlayer insulating layer 113 interposed therebetween.
[0066] Therefore, the first capacitor C1 may be connected to the gate electrode GE of the driving transistor DT to maintain the voltage of the gate electrode GE of the driving transistor DT for a predetermined period.
[0067] Furthermore, a second capacitor C2 is provided on the substrate 110. The second capacitor C2 includes a 2-1st capacitor electrode C2a, a 2-2nd capacitor electrode C2b, and a 2-3rd capacitor electrode C2c. The second capacitor C2 includes the 2-1st capacitor electrode C2a as a lower capacitor electrode, the 2-2nd capacitor electrode C2b as a middle capacitor electrode, and the 2-3rd capacitor electrode C2c as an upper capacitor electrode.
[0068] The 2-1st capacitor electrode C2a is disposed on the substrate 110. The 2-1st capacitor electrode C2a may be made of the same material as the light shielding layer BSM and disposed on the same layer as the light shielding layer BSM.
[0069] The 2-2nd capacitor electrode C2b is disposed on the gate insulating layer 112. The 2-2nd capacitor electrode C2b may be made of the same material as the gate electrode GE and disposed on the same layer as the gate electrode GE.
[0070] The 2-3 capacitor electrode C2c is disposed on the first interlayer insulating layer 113. The 2-3 capacitor electrode C2c may be composed of a first layer C2c1 and a second layer C2c2. The first layer C2c1 of the 2-3 capacitor electrode C2c may be made of the same material as the 1-2 capacitor electrode C1b and disposed on the same layer as the 1-2 capacitor electrode C1b. The first layer C2c1 may be disposed so as to overlap with the 2-1 capacitor electrode C2a and the 2-2 capacitor electrode C2b via the first interlayer insulating layer 113.
[0071] The second layer C2c2 of the 2-3 capacitor electrode C2c is disposed on the second interlayer insulating layer 114. The second layer C2c2 is a portion extending from the source electrode SE of the driving transistor DT and can be connected to the first layer C2c1 through a contact hole of the second interlayer insulating layer 114.
[0072] Therefore, the second capacitor C2 may be electrically connected between the source electrode SE of the driving transistor DT and the LED ED, thereby increasing the capacitance inherent in the LED ED and enabling the LED ED to emit light with higher brightness.
[0073] A first passivation layer 115a is provided on the driving transistor DT, the first capacitor C1, and the second capacitor C2. The first passivation layer 115a is an inorganic insulating layer for protecting components provided thereunder. The first passivation layer 115a may be made of an inorganic material such as silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.
[0074] A first planarization layer 116a is provided on the first passivation layer 115a. The first planarization layer 116a may be used to planarize the upper portion of the pixel circuit including the driving transistor DT. The first planarization layer 116a may be composed of a single layer or multiple layers and may be made of, for example, a benzocyclobutene or acrylic-based organic insulating layer, but is not limited thereto.
[0075] Reference Figure 2 A plurality of reflective electrodes, including a first reflective electrode RE1, a second reflective electrode RE2, and a third reflective electrode RE3, are disposed on the first planarization layer 116a. The first reflective electrode RE1, the second reflective electrode RE2, and the third reflective electrode RE3 can be used to electrically connect the plurality of LEDs ED to the plurality of power lines VL1 and the driving transistor DT. Furthermore, the first reflective electrode RE1, the second reflective electrode RE2, and the third reflective electrode RE3 can function as a reflective sheet that reflects light emitted from the plurality of LEDs ED toward above the substrate 110.
[0076] Each of the first to third reflective electrodes RE1, RE2, and RE3 may be made of a conductive material having high reflectivity and may reflect light emitted from the LED ED upward.
[0077] Taking into account light reflection efficiency and resistance, the first reflective electrode RE1, the second reflective electrode RE2, and the third reflective electrode RE3 may include various conductive layers. For example, the first reflective electrode RE1, the second reflective electrode RE2, and the third reflective electrode RE3 may include both an opaque conductive layer made of silver (Ag), aluminum (Al), molybdenum (Mo), titanium (Ti), or alloys thereof, and a transparent conductive layer made of indium tin oxide (ITO), etc. However, the structures of the first reflective electrode RE1, the second reflective electrode RE2, and the third reflective electrode RE3 are not limited thereto.
[0078] The first reflective electrode RE1 may be used to reflect light emitted from the plurality of LEDs ED toward above the first reflective electrode RE1 .
[0079] Reference Figure 2 The first reflective electrode RE1 can be connected to the source electrode SE or the drain electrode DE of the driving transistor DT through a contact hole formed in the first planarization layer 116a and the first passivation layer 115a. In addition, the first reflective electrode RE1 can be electrically connected to the plurality of LEDs ED. The first reflective electrode RE1 can be electrically connected to the first electrode 124 of the first LED ED1 through the first connection electrode CE1.
[0080] The second reflective electrode RE2 may be used to reflect light emitted from the LED ED toward above the second reflective electrode RE2 .
[0081] The second reflective electrode RE2 can electrically connect the plurality of power lines VL1 to the plurality of LEDs ED. The second reflective electrode RE2 can be electrically connected to the plurality of power lines VL1 through contact holes formed in the first planarization layer 116a and the first passivation layer 115a. In addition, the second reflective electrode RE2 can be electrically connected to the second electrode 125 of the first LED ED1 and the second electrode 135 of the second LED ED2 through the third connection electrode CE3.
[0082] The third reflective electrode RE3 may be used to reflect light emitted from the LED ED toward above the third reflective electrode RE3.
[0083] The third reflective electrode RE3 can electrically connect the driving transistor DT to the plurality of LEDs ED. The third reflective electrode RE3 can be electrically connected to the first electrode 134 of the second LED ED2 via the second connection electrode CE2. Although not shown in the figure, the third reflective electrode RE3 can be connected to the driving transistor DT via a contact hole formed in the first planarization layer 116a and the first passivation layer 115a. Thus, the third reflective electrode RE3 can electrically connect the second LED ED2 to the driving transistor DT.
[0084] in addition, Figure 2 The first reflective electrode RE1 is illustrated as being separated from the third reflective electrode RE3. However, the present disclosure is not limited thereto. The first reflective electrode RE1 may be formed integrally with the third reflective electrode RE3.
[0085] In addition, the first LED ED1 and the second LED ED2 may be driven by the same driving transistor DT, but the present disclosure is not limited thereto. The first LED ED1 and the second LED ED2 may be driven by different driving transistors DT.
[0086] In addition, all of the plurality of LEDs ED may also be connected to the plurality of power lines VL1 without being connected to the first reflective electrode RE1, the second reflective electrode RE2, and the third reflective electrode RE3. However, the present disclosure is not limited thereto.
[0087] Reference Figure 2 A second passivation layer 115b is disposed on the first reflective electrode RE1, the second reflective electrode RE2, and the third reflective electrode RE3. The second passivation layer 115b is an inorganic insulating layer for protecting components disposed thereunder. The second passivation layer 115b may be composed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.
[0088] The second passivation layer 115b may include a plurality of contact holes for connecting the first connection electrode CE1, the second connection electrode CE2, and the third connection electrode CE3 to the first reflective electrode RE1, the second reflective electrode RE2, and the third reflective electrode RE3, respectively. Thus, the upper surfaces of the first reflective electrode RE1, the second reflective electrode RE2, and the third reflective electrode RE3 may be exposed through the plurality of contact holes of the second passivation layer 115b.
[0089] An adhesive layer AD is disposed on the second passivation layer 115b. The adhesive layer AD may be disposed on the front surface of the substrate 110 to secure the LED ED disposed on the adhesive layer AD. The adhesive layer AD may be configured as an organic insulating layer. The adhesive layer AD may be made of a photocurable adhesive material that is cured by light. For example, the adhesive layer AD may be made of an acrylic-based material containing a photosensitizer, but is not limited thereto.
[0090] The adhesive layer AD may planarize the upper portions of the first, second, and third reflective electrodes RE1, RE2, and RE3. For example, the adhesive layer AD may cover the areas between the first, second, and third reflective electrodes RE1, RE2, and RE3, which are separated from each other. Furthermore, the adhesive layer AD may planarize the upper portions of the first, second, and third reflective electrodes RE1, RE2, and RE3. However, the present disclosure is not limited thereto.
[0091] The adhesive layer AD may include a plurality of contact holes for connecting the first connection electrode CE1, the second connection electrode CE2, and the third connection electrode CE3 to the first reflective electrode RE1, the second reflective electrode RE2, and the third reflective electrode RE3, respectively. Thus, the upper surfaces of the first reflective electrode RE1, the second reflective electrode RE2, and the third reflective electrode RE3 may be exposed through the plurality of contact holes of the adhesive layer AD.
[0092] Reference Figure 2 , a plurality of LEDs ED are disposed on the adhesive layer AD in each of the plurality of sub-pixels SP.
[0093] The plurality of LEDs ED may include a first LED ED1 and a second LED ED2.
[0094] A first LED ED1 among the plurality of LEDs ED is disposed in a first area A1 in each of the plurality of sub-pixels SP.
[0095] The first LED ED1 is an LED transferred to the substrate during the initial manufacturing process of the display device. That is, regardless of whether there is a defect in the first LED ED1, the first LED ED1 is provided in each of the plurality of sub-pixels SP. Therefore, the first LED ED1 may also be referred to as a main LED.
[0096] The first LED ED1 may include a first red LED, a first green LED, and a first blue LED.
[0097] Reference Figure 2 Each first LED ED1 includes a first semiconductor layer 121 , a light emitting layer 122 , a second semiconductor layer 123 , a first electrode 124 , a second electrode 125 and an encapsulation film 126 .
[0098] Hereinafter, description will be made assuming that the first LED ED1 has a lateral structure, but the type of the first LED ED1 is not limited thereto.
[0099] The first semiconductor layer 121 of the first LED ED1 is disposed on the adhesive layer AD, and the second semiconductor layer 123 is disposed above the first semiconductor layer 121. Each of the first semiconductor layer 121 and the second semiconductor layer 123 can be formed by doping a specific material with n-type or p-type impurities. For example, each of the first semiconductor layer 121 and the second semiconductor layer 123 can be formed by doping a material such as gallium nitride (GaN), indium aluminum phosphide (InAlP), or gallium arsenide (GaAs) with n-type or p-type impurities. The p-type impurity can be magnesium (Mg), zinc (Zn), beryllium (Be), etc., and the n-type impurity can be silicon (Si), germanium (Ge), tin (Sn), etc. However, the present disclosure is not limited thereto.
[0100] The light emitting layer 122 is provided between the first semiconductor layer 121 and the second semiconductor layer 123. The light emitting layer 122 can emit light when holes and electrons are supplied from the first semiconductor layer 121 and the second semiconductor layer 123. The light emitting layer 122 may be composed of a single layer or a multiple quantum well (MQW) structure and, for example, may be made of indium gallium nitride (InGaN) or gallium nitride (GaN), but is not limited thereto.
[0101] The light emitting layer 122 and the second semiconductor layer 123 of the first LED ED1 may protrude upward from the upper surface of the first semiconductor layer 121 .
[0102] The first electrode 124 of the first LED ED1 is disposed on the first semiconductor layer 121. The first electrode 124 is used to electrically connect the drive transistor DT to the first semiconductor layer 121. In this case, the first semiconductor layer 121 may be a semiconductor layer doped with n-type impurities, and the first electrode 124 may be a cathode. The first electrode 124 may be disposed on the upper surface of the first semiconductor layer 121 exposed from the light emitting layer 122 and the second semiconductor layer 123.
[0103] The first electrode 124 may be made of a conductive material, for example, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO); or an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), or alloys thereof, but is not limited thereto.
[0104] The second electrode 125 of the first LED ED1 is disposed on the second semiconductor layer 123. The second electrode 125 may be in contact with the upper surface of the second semiconductor layer 123. The second electrode 125 is used to electrically connect the plurality of power lines VL1 to the second semiconductor layer 123. In this case, the second semiconductor layer 123 may be a semiconductor layer doped with p-type impurities, and the second electrode 125 may be an anode.
[0105] The second electrode 125 may be made of a conductive material, for example, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO); or an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), or alloys thereof, but is not limited thereto.
[0106] Then, an encapsulation film 126 is provided to surround the first semiconductor layer 121, the light emitting layer 122, the second semiconductor layer 123, the first electrode 124, and the second electrode 125. The encapsulation film 126 is made of an insulating material and can be used to protect the first semiconductor layer 121, the light emitting layer 122, and the second semiconductor layer 123. Furthermore, the encapsulation film 126 includes contact holes for exposing the first electrode 124 and the second electrode 125. Thus, the encapsulation film 126 can electrically connect the first connection electrode CE1 and the third connection electrode CE3 to the first electrode 124 and the second electrode 125, respectively.
[0107] Thereafter, a second planarization layer 116 b and a third planarization layer 116 c are provided on the adhesive layer AD.
[0108] The second planarization layer 116b may be disposed to surround the side of the first LED ED1 in the first area A1, thereby fixing and protecting the first LED ED1. For example, the second planarization layer 116b may be disposed to surround the lower side surface of the first LED ED1 in the first area A1.
[0109] The second planarization layer 116b may be composed of a single layer or multiple layers and may be made of, for example, a benzocyclobutene or acrylic-based organic insulating layer. The second planarization layer 116b may be formed using a halftone mask. The portion of the second planarization layer 116b located closer to the first LED ED1 may be formed to have a smaller thickness. In addition, the portion of the second planarization layer 116b located farther from the first LED ED1 may be formed to have a greater thickness.
[0110] The second planarization layer 116 b may cover the side surface of the first LED ED1 to suppress contact failure and short circuit between the first and third connection electrodes CE1 , CE3 and the first LED ED1 .
[0111] The second planarization layer 116b may include a plurality of contact holes for connecting the first connection electrode CE1, the second connection electrode CE2, and the third connection electrode CE3 to the first reflective electrode RE1, the second reflective electrode RE2, and the third reflective electrode RE3, respectively. Thus, the upper surfaces of the first reflective electrode RE1, the second reflective electrode RE2, and the third reflective electrode RE3 may be exposed through the plurality of contact holes of the second planarization layer 116b.
[0112] The third planarization layer 116 c may cover the second planarization layer 116 b and an upper portion of the first LED ED1 in the first area A1 .
[0113] The third planarization layer 116 c may be composed of a single layer or multiple layers, and may be made of, for example, photoresist or an acrylic-based organic insulating material.
[0114] In addition, the second planarization layer 116b and the third planarization layer 116c may not be provided in the second area A2. For example, the second planarization layer 116b and the third planarization layer 116c may be provided in areas other than the second area A2 in the plurality of sub-pixels SP, but is not limited thereto.
[0115] A first connection electrode CE1 , a second connection electrode CE2 , and a third connection electrode CE3 may be disposed on the third planarization layer 116 c .
[0116] The first connection electrode CE1 may connect the first LED ED1 to the plurality of first reflective electrodes RE1 in the first area A1. In addition, the first connection electrode CE1 may electrically connect the first LED ED1 to the plurality of driving transistors DT.
[0117] The second connection electrode CE2 may electrically connect the second LED ED2 to the plurality of driving transistors DT in the second area A2.
[0118] The third connection electrode CE3 connects the first LED ED1 to the second LED ED2 in the first and second areas A1 and A2 and can be electrically connected to the second reflective electrode RE2. In addition, the third connection electrode CE3 can electrically connect the power line VL1 to the first and second LEDs ED1 and ED2 in one subpixel SP.
[0119] Each of the first, second, and third connection electrodes CE1, CE2, and CE3 may be made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), but is not limited thereto.
[0120] The first connection electrode CE1 and the first reflective electrode RE1 are electrically connected to the source electrode SE of the driving transistor DT. However, the third connection electrode CE3 and the second reflective electrode RE2 may also be connected to the drain electrode DE of the driving transistor DT, but are not limited thereto.
[0121] Each of the first link electrode CE1, the second link electrode CE2, and the third link electrode CE3 may be disposed to have a step along the surface of the insulating layer disposed thereunder. Figure 2 The first connection electrode CE1 may be disposed flatly along the surface of the third planarization layer 116c in the first area A1. Furthermore, each of the second connection electrode CE2 and the third connection electrode CE3 may be disposed along the surface of the adhesive layer AD in the second area A2. Thus, the distance from the first connection electrode CE1 to the substrate 110 in the first area A1 may be greater than the distance from the second connection electrode CE2 and the third connection electrode CE3 to the substrate 110 in the second area A2.
[0122] In addition, the second and third link electrodes CE2 and CE3 may cover side surfaces of the second and third planarization layers 116b and 116c in the second area A2.
[0123] Reference Figure 2 A bank BB is provided on the first connection electrode CE1, the second connection electrode CE2, and the third connection electrode CE3. The bank BB may be made of an opaque material to suppress color mixing between the plurality of sub-pixels SP. For example, the bank BB may be made of black resin, but is not limited thereto.
[0124] The bank BB may be disposed at a predetermined interval from the plurality of LEDs ED, and at least a portion of the bank BB may overlap with the first, second, and third reflective electrodes RE1, RE2, and RE3.
[0125] The bank BB may include an opening corresponding to the second area A2. Thus, the bank BB may not overlap with the first light scattering layer 181 disposed in the first area A1, and may not overlap with the second light scattering layer 182 disposed in the second area A2.
[0126] The opening of the bank BB may overlap with the second LED ED2. The bank BB may surround the side of the second LED ED2 in the second area A2.
[0127] Reference Figure 2 In the second area A2, a plurality of bonding layers BDL are provided on the second and third connection electrodes CE2 and CE3. The plurality of bonding layers BDL may be used to fix the second LED ED2 to the substrate 110.
[0128] A plurality of bonding layers BDL may be disposed in the second area A2 of each of the plurality of sub-pixels SP. The plurality of bonding layers BDL are disposed on the second and third connection electrodes CE2 and CE3 exposed by the bank BB.
[0129] The plurality of bonding layers BDL may be disposed so as to overlap with the second LED ED2 among the plurality of LEDs ED. Here, the lower surfaces of the plurality of bonding layers BDL may contact the second connection electrode CE2 and the third connection electrode CE3. Furthermore, the upper surfaces of the plurality of bonding layers BDL may contact the first electrode 134 and the second electrode 135 of the second LED ED2. Thus, the plurality of bonding layers BDL may be connected to the first electrode 134 and the first semiconductor layer 131 of the second LED ED2 to electrically connect the second LED ED2 to the driving transistor DT. Furthermore, the plurality of bonding layers BDL may be electrically connected to the second electrode 135 and the second semiconductor layer 133 of the second LED ED2 to electrically connect the second LED ED2 to the plurality of power lines VL1.
[0130] The multiple bonding layers BDL may be made of a conductive material. In addition, the multiple bonding layers BDL may be made of a reflective material. For example, the multiple bonding layers BDL may be made of silver (Ag) or a silver (Ag) alloy, but is not limited thereto. In addition, the multiple bonding layers BDL may be made of one of silver (Ag) paste, aluminum (Al) paste, gold (Au) paste, and copper (Cu) paste. Alternatively, the multiple bonding layers BDL may be made of silver (Ag), aluminum (Al), molybdenum (Mo), titanium (Ti), or an alloy thereof, but is not limited thereto.
[0131] Reference Figure 2 , a second LED ED2 is provided on the plurality of bonding layers BDL.
[0132] The second LED ED2 is disposed in at least one sub-pixel among the plurality of sub-pixels SP. The second LED ED2 may be disposed in a second area A2 in the sub-pixel SP.
[0133] The second LED ED2 is an LED that is transferred to the substrate 110 when the first LED ED1 provided in the corresponding sub-pixel is defective. Therefore, the second LED ED2 may also be referred to as a repair LED. Therefore, the second LED ED2 may be a normal LED, and the first LED ED1 provided in the same sub-pixel may be a defective LED.
[0134] For example, if the first red LED in the first LED ED1 is defective, a second red LED may be provided in the same subpixel as the first red LED. Thus, the second green LED and the second blue LED may not be provided in the same subpixel that already has normal first green and blue LEDs. However, the present disclosure is not limited thereto. If the first green LED is defective, the second green LED may be provided in the same subpixel as the first green LED. Furthermore, if the first blue LED is defective, the second blue LED may be provided in the same subpixel as the first blue LED.
[0135] The second LED ED2 includes a first semiconductor layer 131 , a light emitting layer 132 , a second semiconductor layer 133 , a first electrode 134 , a second electrode 135 , and an encapsulation film 136 .
[0136] The second semiconductor layer 133 of the second LED ED2 is disposed over the second connection electrode CE2, the third connection electrode CE3, and the plurality of bonding layers BDL. Furthermore, the first semiconductor layer 131 of the second LED ED2 is disposed over the second semiconductor layer 133. Each of the first semiconductor layer 131 and the second semiconductor layer 133 can be formed by doping a particular material with n-type or p-type impurities. For example, each of the first semiconductor layer 131 and the second semiconductor layer 133 can be formed by doping a material such as gallium nitride (GaN), indium aluminum phosphide (InAlP), or gallium arsenide (GaAs) with n-type or p-type impurities. The p-type impurity can be magnesium (Mg), zinc (Zn), beryllium (Be), or the like, while the n-type impurity can be silicon (Si), germanium (Ge), tin (Sn), or the like. However, the present disclosure is not limited thereto.
[0137] The light emitting layer 132 of the second LED ED2 is provided between the first semiconductor layer 131 and the second semiconductor layer 133. The light emitting layer 132 can emit light when provided with holes and electrons from the first semiconductor layer 131 and the second semiconductor layer 133. The light emitting layer 132 may be composed of a single layer or a multiple quantum well (MQW) structure and may be made of, for example, indium gallium nitride (InGaN) or gallium nitride (GaN), but is not limited thereto.
[0138] The light emitting layer 132 and the second semiconductor layer 133 of the second LED ED2 may protrude downward from a lower surface of the first semiconductor layer 131 .
[0139] The first electrode 134 of the second LED ED2 is disposed under the first semiconductor layer 131. The first electrode 134 is used to electrically connect the driving transistor DT to the first semiconductor layer 131. In this case, the first semiconductor layer 131 may be a semiconductor layer doped with n-type impurities, and the first electrode 134 may be a cathode.
[0140] The first electrode 134 may be made of a conductive material, for example, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO); or an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), or an alloy thereof, but is not limited thereto.
[0141] The second electrode 135 of the second LED ED2 is disposed under the second semiconductor layer 133. The second electrode 135 may make contact with the second semiconductor layer 133. The second electrode 135 serves to electrically connect the plurality of power lines VL1 to the second semiconductor layer 133.
[0142] The second electrode 135 may be made of a conductive material, for example, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO); or an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), or an alloy thereof, but is not limited thereto.
[0143] Then, an encapsulation film 136 is provided to surround the first semiconductor layer 131, the light emitting layer 132, the second semiconductor layer 133, the first electrode 134, and the second electrode 135. The encapsulation film 136 is made of an insulating material and can be used to protect the first semiconductor layer 131, the light emitting layer 132, and the second semiconductor layer 133. In addition, the encapsulation film 136 includes contact holes that expose the first electrode 134 and the second electrode 135. Thus, the encapsulation film 136 can electrically connect the plurality of bonding layers BDL to the first electrode 134 and the second electrode 135.
[0144] The second LED ED2 may have the same configuration as the first LED ED1, and the stacking order of the second LED ED2 may be opposite to that of the first LED ED1. For example, the first LED ED1 may be a lateral LED, and the second LED ED2 may be a flip-chip type LED.
[0145] A protective layer 117 is disposed on the first connection electrode CE1, the second connection electrode CE2, the third connection electrode CE3, and the bank BB. The protective layer 117 is used to protect components disposed thereunder. The protective layer 117 may be composed of a single layer or multiple layers and may be made of, for example, benzocyclobutene, a transparent epoxy resin, a photoresist, or an acrylic-based organic material, but is not limited thereto.
[0146] The protective layer 117 may be disposed to overlap at least some of the plurality of LEDs ED. For example, the protective layer 117 may be disposed in the first area A1 to overlap only the first LED ED1 among the plurality of LEDs ED.
[0147] In addition, the protective layer 117 may include an opening corresponding to the second area A2. The opening of the protective layer 117 may overlap with the opening of the bank BB. For example, in the opening of the protective layer 117, the side surface of the protective layer 117 may be arranged on the same plane as the side surface of the bank BB. However, the present disclosure is not limited thereto.
[0148] A light scattering layer 180 may be disposed on the protective layer 117 .
[0149] The light scattering layer 180 may be made of an organic material in which light scattering particles are dispersed. For example, each of the first light scattering layer 181 and the second light scattering layer 182 may be made of a photoresist, an acrylic organic material, or a transparent epoxy resin in which light scattering particles are dispersed.
[0150] The light scattering particles may be nanometer-sized spherical inorganic oxide particles having light scattering properties. The light scattering particles may be, for example, titanium dioxide (TiO2) particles, silicon dioxide (SiO2) particles, zinc oxide (ZnO) particles, and aluminum oxide (AlO4) particles, but are not limited thereto. In addition, the light scattering particles may be spherical, porous, or fibrous, but are not limited thereto.
[0151] Reference Figure 2 The light scattering layer 180 may include a first light scattering layer 181 and a second light scattering layer 182 .
[0152] The first light scattering layer 181 may be disposed in other regions other than the second region A2 . Thus, the first light scattering layer 181 may be disposed to be spaced apart from the first LED ED1 and the first connection electrode CE1 , and may be disposed along the flat upper surface of the protective layer 117 .
[0153] The first light scattering layer 181 may be provided in all areas except the second area A2. Thus, the first light scattering layer 181 may be made of a low-viscosity material so as to be uniformly distributed in a large area.
[0154] In addition, the first light scattering layer 181 may be made of a thermosetting material. Thus, the first light scattering layer 181 disposed in a large area may be cured on the substrate 110.
[0155] The second light scattering layer 182 may be disposed in the second area A2 and have different characteristics from the first light scattering layer 181 .
[0156] The second light scattering layer 182 may fill the opening of the protective layer 117 and the opening of the bank BB in the second area A2. In addition, the second light scattering layer 182 may cover the second LED ED2 disposed in the second area A2 to fix and protect the second LED ED2. In addition, the second light scattering layer 182 may contact the side surface of the bank BB and the side surface of the first light scattering layer 181, but is not limited thereto.
[0157] The second light scattering layer 182 may cover the second LED ED2 and a portion of the second and third connection electrodes CE2 and CE3 disposed under the second LED ED2.
[0158] The second light scattering layer 182 may include a material having a different viscosity from that of the first light scattering layer 181. For example, the second light scattering layer 182 may have a higher viscosity than that of the first light scattering layer 181. The second light scattering layer 182 is provided only in the second area A2 and only in the opening of the protective layer 117 and the opening of the bank BB. Thus, the second light scattering layer 182 may be made of a high-viscosity material so as to be provided only in a local area.
[0159] In addition, the second light scattering layer 182 can be made of a UV curable material. For example, the second light scattering layer 182 can contain a photoinitiator that can cause UV polymerization. Thus, only the second area A2 provided with the second light scattering layer 182 among all areas on the substrate 110 is selectively irradiated with UV laser to cure the second light scattering layer 182. In addition, the time required to cure the second light scattering layer 182 can be reduced.
[0160] In addition, the number of light scattering particles dispersed in the second light scattering layer 182 per unit area may be greater than the number of light scattering particles dispersed in the first light scattering layer 181 per unit area. For example, the number of light scattering particles dispersed in the second light scattering layer 182 per unit area may be approximately 10% to approximately 20% greater than the number of light scattering particles dispersed in the first light scattering layer 181 per unit area. For example, when the light scattering particles dispersed in the first light scattering layer 181 per unit area account for 10 wt %, the light scattering particles dispersed in the second light scattering layer 182 per unit area may account for 20 wt % to 30 wt %.
[0161] Since the number of light scattering particles is different between the first light scattering layer 181 and the second light scattering layer 182, the first light scattering layer 181 may have a different transmittance from the second light scattering layer 182. For example, the transmittance of the first light scattering layer 181, in which a smaller number of light scattering particles are dispersed, may be higher than the transmittance of the second light scattering layer 182. In addition, the transmittance of the second light scattering layer 182, in which a larger number of light scattering particles are dispersed, may be lower than the transmittance of the first light scattering layer 181.
[0162] Furthermore, the first light scattering layer 181 may have a different refractive index than the second light scattering layer 182. For example, the second light scattering layer 182 may have a higher refractive index than the first light scattering layer 181. When the second LED ED2 is a micro-LED, the second LED ED2 may have higher brightness in the side direction than in the front direction. As a result, the second LED ED2 may have different brightness depending on the viewing angle. To reduce the brightness difference of the second LED ED2 depending on the viewing angle, the second light scattering layer 182 may include a material with a relatively high refractive index.
[0163] although Figure 2 Although not shown, an optical film may be provided on the entire surface of the substrate 110 to cover the upper portions of the first light scattering layer 181 and the second light scattering layer 182. The optical film may be a functional film that protects the display device 100 and achieves higher quality images. For example, the optical film may include an anti-scattering film, an anti-glare film, an anti-reflection film, a low-reflection film, an OLED transmittance controllable film, or a polarizer, but is not limited thereto.
[0164] In the following, reference will be made to 3A to 4D A repair process of a display device according to an exemplary embodiment of the present disclosure is described in detail.
[0165] Figures 3A to 3D is a plan view of a sub-pixel illustrating a repair process of a display device according to an exemplary embodiment of the present disclosure. Figures 4A to 4D is a cross-sectional view of a sub-pixel illustrating a repair process of a display device according to an exemplary embodiment of the present disclosure. Figure 4A yes Figure 3A A cross-sectional view of Figure 4B yes Figure 3B A cross-sectional view of Figure 4C yes Figure 3C A cross-sectional view of Figure 4D yes Figure 3D sectional view.
[0166] Reference Figure 3A and Figure 4A , each sub-pixel SP includes a first area A1 and a second area A2.
[0167] The first LED ED1 is disposed in the first area A1 of the sub-pixel SP, but the second LED ED2 is not disposed in the second area A2.
[0168] The first, second and third link electrodes CE1, CE2 and CE3, the bank BB and the first light scattering layer 181 are sequentially disposed over the first LED ED1.
[0169] Reference Figure 4AThe first and third connection electrodes CE1 and CE3 are disposed above the first LED ED1 in the first area A1. In addition, the second and third connection electrodes CE2 and CE3 cover an upper portion of the adhesive layer AD in the second area A2.
[0170] Reference Figure 3A and Figure 4A The bank BB and the first light scattering layer 181 are provided on the first to third link electrodes CE1 to CE2 in the entire first and second areas A1 and A2.
[0171] Then, a lighting inspection is performed on the first LEDs ED1 disposed in the first area A1 of the plurality of sub-pixels SP, and any defective sub-pixels SP are repaired.
[0172] Reference Figure 3B and Figure 4B The bank BB, protective layer 117, and first light scattering layer 181 are removed from the second area A2 of the defective sub-pixel SP to form an opening. For example, the bank BB, protective layer 117, and first light scattering layer 181 located in the second area A2 can be removed using a laser process. The laser process can be performed with a width greater than that of the second LED ED2 to be located in the second area A2. Portions of the upper surfaces of the second and third connection electrodes CE2 and CE3 corresponding to the area of the second LED ED2 can be exposed in the opening.
[0173] Then, a bonding layer BDL is disposed on the exposed second and third link electrodes CE2 and CE3 , and the second LED ED2 as a repair LED is transferred onto the bonding layer BDL.
[0174] Reference Figure 4C A bonding layer BDL is provided on the second link electrode CE2 and the third link electrode CE3 in the second area A2.
[0175] The bonding layer BDL may be made of, for example, one of metal organic ion ink, metal nanoparticle ink, and metal nanoparticle paste.
[0176] Reference Figure 3C and Figure 4C , the second LED ED2 is transferred onto the bonding layer BDL. The second LED ED2 may be partially transferred by using a stamp, but is not limited thereto.
[0177] The second semiconductor layer 133 of the second LED ED2 is disposed below the first semiconductor layer 131. Here, the second electrode 135 of the second LED ED2 is electrically connected to the bonding layer BDL disposed on the third connection electrode CE3. In addition, the first electrode 134 of the second LED ED2 is electrically connected to the bonding layer BDL disposed on the second connection electrode CE2.
[0178] Then, refer to Figure 3D and Figure 4D , a second light scattering layer 182 is coated on the second LED ED2.
[0179] The second light scattering layer 182 is disposed to cover upper portions of the second and third link electrodes CE2 and CE3 and the second LED ED2 in the second area A2.
[0180] Then, the second LED ED2 is fixed in the second area A2 through a curing process.
[0181] Figure 5 is a graph illustrating effects of a display device according to an exemplary embodiment of the present disclosure. Figure 5 Graphs illustrating luminance distribution according to viewing angles according to a comparative example and an embodiment. Figure 5 The example in corresponds to the display device 100 according to an exemplary embodiment of the present disclosure. The comparative example differs from the example only in that the second light scattering layer 182 is not provided. Figure 5 In the graph, the X-axis represents the viewing angle and the Y-axis represents the brightness. Figure 5 The graph shows relative brightness based on the center brightness 1 in the comparative example.
[0182] Reference Figure 5 , in the comparative example and the embodiment, the brightness is higher in the side direction than in the front direction and is highest at about 60°.
[0183] Reference Figure 5 , the central brightness of the comparative example is 1, and the central brightness of the embodiment is about 1.2. Therefore, it can be seen that the central brightness of the display device according to an exemplary embodiment of the present disclosure is improved by about 20% compared with the comparative example.
[0184] In addition, refer to Figure 5 , the maximum brightness of the comparative example is about 1.25, and the maximum brightness of the embodiment is about 1.35. Therefore, it can be seen that the maximum brightness of the display device according to an exemplary embodiment of the present disclosure is improved by about 8% compared with the comparative example.
[0185] In addition, the difference between the center brightness and the maximum brightness of the comparative example is about 0.25, and the difference between the center brightness and the maximum brightness of the embodiment is about 0.15. Therefore, it can be seen that the difference between the center brightness and the maximum brightness of the display device according to an exemplary embodiment of the present disclosure is reduced by about 40% compared with the comparative example.
[0186] Typically, multiple sub-pixels arranged on a substrate may include defective sub-pixels that emit abnormal light. Therefore, after a lighting inspection in a display device, only a second LED emitting the same color as the defective first LED is transferred to the sub-pixel containing the defective first LED. For example, after the lighting inspection, a local repair is performed using a laser process.
[0187] In addition, a light scattering layer is provided on the upper portion of the display device to improve light extraction efficiency. In order to transfer the second LED to the defective sub-pixel after lighting inspection, the light scattering layer provided in the repair area is removed together with the embankment. The second LED is then transferred to the area where the light scattering layer and embankment have been removed. Afterwards, an insulating layer made of a transparent material is provided on the second LED to secure and protect the second LED. When the second LED is transferred to the area where the light scattering layer has been removed, the light scattering layer is not provided on the second LED. As a result, the second LED has lower light extraction efficiency than the first LED.
[0188] Thus, in the display device 100 according to an exemplary embodiment of the present disclosure, a first light scattering layer 181 is provided on the first LED ED1. In addition, a second light scattering layer 182 is provided on the second LED ED2 disposed in the region where the first light scattering layer 181 is removed. Therefore, light emitted from the second LED ED2 is scattered by the second light scattering layer 182, thereby improving light extraction efficiency of the second LED ED2.
[0189] Furthermore, the display device 100 according to an exemplary embodiment of the present disclosure includes a second light scattering layer 182 made of a material having a higher viscosity than that of the first light scattering layer 181. The second light scattering layer 182 is provided only in the second region A2, which serves as a repair area, and only in defective sub-pixels SP among the plurality of sub-pixels SP. Thus, when the second light scattering layer 182 is made of a low-viscosity material, it is possible to suppress overflow and over-coating of the second light scattering layer 182 onto the first region A1 of the adjacent sub-pixel SP.
[0190] Typically, the first LED installed in a display device is a horizontal LED. Therefore, the display device is designed to improve light extraction from the horizontal LED. For example, a light extraction pattern may be provided on the lower surface of the first LED, and the display device may be designed so that light refracted by the light extraction pattern propagates upwards. Therefore, when a flip-chip LED is used as the second LED, the second LED installed in the repair area may have lower light extraction efficiency than the first LED installed in a normal sub-pixel. Furthermore, the second LED may have significant differences depending on the viewing angle.
[0191] Therefore, in the display device 100 according to an exemplary embodiment of the present disclosure, a second light scattering layer 182 having different properties from the first light scattering layer 181 is provided. This is to improve the light extraction efficiency of the second LED ED2. For example, when a flip-chip LED is transferred as the second LED ED2, the second LED ED2 may have lower light extraction efficiency than the first LED ED1. Therefore, dispersing a larger number of light scattering particles in the second light scattering layer 182 than in the first light scattering layer 181 can improve the light extraction efficiency of the second LED ED2. Therefore, in the display device 100 according to an exemplary embodiment of the present disclosure, the brightness can be increased, thereby reducing the power consumption of the display device 100.
[0192] Figure 6 is a cross-sectional view of a display device according to another exemplary embodiment of the present disclosure.
[0193] Figure 6 The display device 600 shown in FIG. Figures 1 to 5 , except for the second LED ED2. Therefore, repeated descriptions will be omitted.
[0194] The second LED ED2 is disposed in the second area A2.
[0195] The second LED ED2 includes a first semiconductor layer 631 , a light emitting layer 632 , a second semiconductor layer 633 , a first electrode 634 , a second electrode 635 , and an encapsulation film 636 .
[0196] The second LED ED2 may have a width greater than that of each of the plurality of first LEDs ED1. Figure 6 The first semiconductor layer 631, the light-emitting layer 632, the second semiconductor layer 633, the first electrode 634, the second electrode 635 and the packaging film 636 in each second LED ED2 may be respectively larger in width than the first semiconductor layer 121, the light-emitting layer 122, the second semiconductor layer 123, the first electrode 124, the second electrode 125 and the packaging film 126 in the first LED ED1.
[0197] The maximum width of the second LED ED2 overlapping the substrate 110 may be greater than the maximum width of the first LED ED1 overlapping the substrate 110. Figure 6 , a lower surface of the first semiconductor layer 121 of the first LED ED1 may have a first width W1. In addition, an upper surface of the first semiconductor layer 631 of the second LED ED2 may have a second width W2 greater than the first width W1.
[0198] In the display device 600 according to another exemplary embodiment of the present disclosure, a second light scattering layer 182 in which a larger number of light scattering particles are dispersed is provided on the second LED ED2 than in the first light scattering layer 181. Therefore, in the display device 600 according to another exemplary embodiment of the present disclosure, the brightness of the second area A2 in which the second LED ED2 is provided can be increased, and thus the power consumption of the display device 600 can be reduced.
[0199] In addition, in the display device 600 according to another exemplary embodiment of the present disclosure, a second light scattering layer 182 having high viscosity is provided in the second area A2 where the second LED ED2 is provided. Thus, the second light scattering layer 182 can be suppressed from overflowing and being excessively coated onto the first area A1 of its adjacent sub-pixel SP.
[0200] Furthermore, when transferring the second LED to the repair area, contact failures may occur between the multiple connection electrodes, the bonding layer, and the second LED. For example, the position of the second LED may shift due to manufacturing process errors. This can reduce the contact area between the first and second electrodes of the second LED and the bonding layer, and increase resistance. This can increase power consumption and reduce lifespan.
[0201] Thus, in a display device 600 according to another exemplary embodiment of the present disclosure, a second LED ED2 having a width greater than that of each of the plurality of first LEDs ED1 is transferred to the repair area. Consequently, the area of the first electrode 634 and the second electrode 635 in the second LED ED2 can be increased. Furthermore, the contact area between the bonding layer BDL, the second and third connection electrodes CE2 and CE3, and the first and second electrodes 634 and 635 can be increased. Therefore, even if errors occur during the transfer process of the second LED ED2, the contact area between the second LED ED2, the bonding layer BDL, the second and third connection electrodes CE2 and CE3 can be ensured. Thus, contact failure and resistance issues can be resolved. Therefore, the display device 600 according to another exemplary embodiment of the present disclosure can be realized as a display device capable of low power consumption and a long life by suppressing contact failure of the second LED ED2.
[0202] Furthermore, in a display device 600 according to another exemplary embodiment of the present disclosure, a second LED ED2 having a width greater than that of each of the plurality of first LEDs ED1 is transferred to the repair region. Consequently, the light-emitting area of the second LED ED2 can be increased. For example, the light-emitting layer 632 of the second LED ED2 can be larger in area than the light-emitting layer 132 of the first LED ED1. Consequently, the second LED ED2 can emit a greater amount of light than each of the plurality of first LEDs ED1. Therefore, even when the display device 600 is designed to improve light extraction efficiency from the plurality of first LEDs ED1, the light-emitting area of the second LED ED2 can be increased. Consequently, a greater amount of light can be emitted from the second LED ED2.
[0203] Figure 7 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure. Figure 7 The display device 700 shown in FIG. Figures 1 to 5 The display device 100 shown in FIG. 1 is the same as that shown in FIG. 1 except for the light scattering layer 780. Therefore, repeated description will be omitted.
[0204] The light scattering layer 780 is disposed on the plurality of LEDs ED.
[0205] The light scattering layer 780 includes a first light scattering layer 781 disposed on the plurality of first LEDs ED1 and a second light scattering layer 782 disposed on the second LEDs ED2.
[0206] Reference Figure 7 , the upper surface of the second light scattering layer 782 may protrude above the substrate 110. Thus, the upper surface of the second light scattering layer 782 may be inclined relative to the substrate 110. For example, the upper surface of the second light scattering layer 782 may protrude more than the upper surface of the first light scattering layer 781 parallel to the substrate 110.
[0207] although Figure 7 The second light scattering layer 782 is illustrated as protruding above the substrate 110, but the second light scattering layer 782 may protrude below the substrate 110. However, the present disclosure is not limited thereto. The second light scattering layer 782 may have a plurality of corrugations.
[0208] In the display device 700 according to still another exemplary embodiment of the present disclosure, a second light scattering layer 782 in which a larger number of light scattering particles are dispersed is provided on the second LED ED2 than in the first light scattering layer 781. Therefore, in the display device 700 according to still another exemplary embodiment of the present disclosure, the brightness of the second area A2 in which the second LED ED2 is provided can be increased, and thus the power consumption of the display device 700 can be reduced.
[0209] In addition, in the display device 700 according to another exemplary embodiment of the present disclosure, a second light scattering layer 782 having high viscosity is provided in the second area A2 where the second LED ED2 is provided. Thus, the second light scattering layer 782 can be suppressed from overflowing and being excessively coated onto the first area A1 of its adjacent sub-pixel SP.
[0210] In the display device 700 according to another exemplary embodiment of the present disclosure, the upper surface of the second light scattering layer 782 is inclined relative to the substrate 110. As a result, light propagating toward the side of the second LED ED2 can be refracted toward the front. This improves the light extraction efficiency of the second LED ED2 and reduces differences in viewing angle. Therefore, the display device 700 according to another exemplary embodiment of the present disclosure can have a long lifespan and require low power consumption.
[0211] Exemplary embodiments of the present disclosure may also be described as follows:
[0212] According to one aspect of the present disclosure, a display device is provided. The display device includes a substrate defining a plurality of sub-pixels, each of the plurality of sub-pixels including a first region and a second region. The display device includes a plurality of first light-emitting diodes disposed in the first regions of the plurality of sub-pixels, respectively. The display device includes a second light-emitting diode disposed in the second region of at least one of the plurality of sub-pixels and different from the plurality of first light-emitting diodes. The display device includes a first light scattering layer disposed on the plurality of first light-emitting diodes. The display device includes a second light scattering layer disposed on the second light-emitting diodes and having different properties from the first light scattering layer.
[0213] Each of the first light scattering layer and the second light scattering layer may include an organic material in which light scattering particles are dispersed.
[0214] The number of light scattering particles dispersed in the second light scattering layer per unit area may be greater than the number of light scattering particles dispersed in the first light scattering layer per unit area.
[0215] The number of light scattering particles dispersed in the second light scattering layer per unit area may be greater by about 10% to about 20% than the number of light scattering particles dispersed in the first light scattering layer per unit area.
[0216] The first light scattering layer may have a transmittance higher than that of the second light scattering layer.
[0217] The second light scattering layer may have a higher refractive index than the first light scattering layer.
[0218] The second light scattering layer may have a different viscosity from that of the first light scattering layer.
[0219] The second light scattering layer has a higher viscosity than the first light scattering layer.
[0220] The first light scattering layer may include a thermal curing material, and the second light scattering layer may include a UV curing material.
[0221] The display device may further include a bank defining the plurality of sub-pixels, wherein the first light scattering layer may be disposed on the bank so as to overlap the bank, and the second light scattering layer may be disposed so as not to overlap the bank.
[0222] The second light scattering layer may be in contact with the side surface of the bank and the side surface of the first light scattering layer.
[0223] The second light emitting diode may be a normal light emitting diode, and the first light emitting diode provided in the same sub-pixel as the second light emitting diode may be a defective light emitting diode.
[0224] Each of the plurality of first light-emitting diodes and the second light-emitting diodes may include: a first semiconductor layer; a second semiconductor layer having a width smaller than that of the first semiconductor layer; a light-emitting layer having a width smaller than that of the first semiconductor layer and disposed between the first semiconductor layer and the second semiconductor layer; a first electrode in contact with the first semiconductor layer; and a second electrode in contact with the second semiconductor layer, wherein a stacking order of the first light-emitting diodes may be opposite to a stacking order of the second light-emitting diodes.
[0225] The display device may further include a plurality of reflective electrodes disposed on the substrate, wherein the plurality of first light emitting diodes and the second light emitting diodes may be disposed on the plurality of reflective electrodes.
[0226] The display device may further include a plurality of connection electrodes disposed on and connected to the reflective electrode, wherein the first light scattering layer may be spaced apart from the plurality of connection electrodes, and the second light scattering layer may cover a portion of upper surfaces of the plurality of connection electrodes.
[0227] The plurality of connection electrodes may be disposed above the plurality of first light emitting diodes in the first region, and below the second light emitting diodes in the second region.
[0228] The second light emitting diode may have a width greater than a width of each of the plurality of light emitting diodes.
[0229] An upper surface of the first light scattering layer may be parallel to an upper surface of the substrate, and an upper surface of the second light scattering layer may be inclined with respect to an upper surface of the substrate.
[0230] The upper surface of the second light scattering layer may have a plurality of corrugations.
[0231] Although the exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto, and the present disclosure can be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided only for the purpose of illustration and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are merely illustrative in all aspects and do not limit the present disclosure. The scope of protection of the present disclosure should be interpreted based on the subsequent claims, and all technical concepts within the equivalent scope should be interpreted as falling within the scope of the present disclosure.
Claims
1. A display device comprising: a substrate defining a plurality of sub-pixels, each of the plurality of sub-pixels comprising a first region and a second region; a plurality of first light emitting diodes respectively disposed in the first regions of the plurality of sub-pixels; a second light emitting diode disposed in the second region of at least one sub-pixel among the plurality of sub-pixels and different from the plurality of first light emitting diodes; a first light scattering layer disposed on the plurality of first light emitting diodes; and A second light scattering layer is disposed on the second light emitting diode and has different properties from the first light scattering layer. 2 . The display device according to claim 1 , wherein each of the first light scattering layer and the second light scattering layer comprises an organic material in which light scattering particles are dispersed. 3 . The display device according to claim 2 , wherein the number of light scattering particles dispersed in the second light scattering layer per unit area is greater than the number of light scattering particles dispersed in the first light scattering layer per unit area. 4 . The display device according to claim 3 , wherein the number of light scattering particles dispersed in the second light scattering layer per unit area is greater than the number of light scattering particles dispersed in the first light scattering layer per unit area by about 10% to about 20%. The display device according to claim 1 , wherein the first light scattering layer has a transmittance higher than that of the second light scattering layer. The display device according to claim 1 , wherein the second light scattering layer has a higher refractive index than the first light scattering layer. 7 . The display device according to claim 1 , wherein the second light scattering layer has a higher viscosity than the first light scattering layer. 8 . The display device according to claim 1 , wherein the first light scattering layer comprises a thermal curing material, and the second light scattering layer comprises a UV curing material.
9. The display device according to claim 1, further comprising: defining banks of the plurality of sub-pixels, wherein the first light scattering layer is disposed on the bank portion so as to overlap the bank portion, and The second light scattering layer is provided so as not to overlap with the bank. 10 . The display device according to claim 9 , wherein the second light scattering layer is in contact with a side surface of the bank and a side surface of the first light scattering layer. 11 . The display device according to claim 1 , wherein the second light emitting diode is a normal light emitting diode, and the first light emitting diode provided in the same sub-pixel as the second light emitting diode is a defective light emitting diode.
12. The display device according to claim 1, wherein each of the plurality of first light emitting diodes and the second light emitting diode comprises: a first semiconductor layer; a second semiconductor layer having a width smaller than that of the first semiconductor layer; a light emitting layer having a width smaller than that of the first semiconductor layer and disposed between the first semiconductor layer and the second semiconductor layer; a first electrode in contact with the first semiconductor layer; and a second electrode in contact with the second semiconductor layer, The stacking order of the first light-emitting diodes is opposite to the stacking order of the second light-emitting diodes.
13. The display device according to claim 1, further comprising: A plurality of reflective electrodes are provided on the substrate, The plurality of first light emitting diodes and the second light emitting diodes are arranged on the plurality of reflective electrodes.
14. The display device according to claim 13, further comprising: a plurality of connection electrodes provided on the reflective electrode and connected to the reflective electrode, wherein the first light scattering layer is separated from the plurality of connecting electrodes, and The second light scattering layer covers a portion of upper surfaces of the plurality of connection electrodes. 15 . The display device according to claim 14 , wherein the plurality of connection electrodes are disposed above the plurality of first light emitting diodes in the first region, and are disposed below the second light emitting diodes in the second region. 16 . The display device of claim 1 , wherein the second light emitting diode has a width greater than a width of each of the plurality of light emitting diodes. 17 . The display device according to claim 1 , wherein an upper surface of the first light scattering layer is parallel to an upper surface of the substrate, and an upper surface of the second light scattering layer is inclined with respect to an upper surface of the substrate. The display device according to claim 17 , wherein an upper surface of the second light scattering layer has a plurality of corrugations.
Citation Information
Patent Citations
Dual resolution spectrometer, and spectrometric measurement apparatus and method using the spectrometer
KR1020240017687A