Display device and electronic device including the same
By setting an input sensing layer with a grid pattern on the display panel, the influence of the input sensing layer conductor on the light output efficiency and external light reflectivity is solved, and the visibility and light output efficiency of the display device are improved.
Patent Information
- Application Number
- CN202510133189.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-02-06
- Filing Date
- 2025-02-06
- Publication Date
- 2025-08-08
AI Technical Summary
The conductors input to the sensing layer may affect the light output efficiency and external light reflectivity of the display device, resulting in a decrease in frontal brightness.
An input sensing layer is provided on the display panel, including a first insulating layer directly disposed on the packaging layer, and a plurality of sensing electrodes, the sensing electrodes having a grid pattern that partially overlaps the light emitting region, and includes a plurality of openings to optimize the light output.
The visibility of the display device is improved, the reduction of the front brightness is prevented or suppressed, and the light output efficiency is enhanced.
Smart Images

Figure CN120456740A_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims priority from Korean Patent Application No. 10-2024-0017927, filed on February 6, 2024, the disclosure of which is incorporated herein by reference in its entirety. Technical Field
[0003] Embodiments of the present disclosure relate to a display device and an electronic device including the display device, and more particularly, to a display device including an input sensing layer and an electronic device including the display device. Background Art
[0004] Multimedia devices such as televisions, mobile phones, tablet computers, navigation systems, and game consoles typically include a display device that displays images to a user via a display screen. The display device may include a display panel configured to generate images and an input sensing layer configured to sense a user's touch.
[0005] The input sensing layer may include a conductor configured to sense an external input, and the conductor of the input sensing layer disposed on the display panel may affect light output efficiency of the display device or external light reflectivity of the display device. Summary of the Invention
[0006] Embodiments of the inventive concept provide a display device in which a reduction in front brightness can be prevented or suppressed.
[0007] Embodiments of the inventive concept provide a display device including an input sensing layer and having improved visibility.
[0008] According to an embodiment of the present inventive concept, a display device includes: a display panel having multiple light-emitting regions and non-light-emitting regions, and including a display element layer and an encapsulation layer disposed on the display element layer; and an input sensing layer including a first insulating layer disposed directly on the encapsulation layer and a plurality of sensing electrodes disposed on the first insulating layer. Each of the plurality of sensing electrodes includes a mesh pattern having a plurality of openings defined within the mesh pattern. In plan view, a portion of the mesh pattern overlaps a portion of each of the plurality of light-emitting regions.
[0009] In an embodiment, the portion of the grid pattern overlaps with an outer portion of each of the plurality of light emitting areas.
[0010] In an embodiment, each of the plurality of light emitting areas includes a plurality of outer sides, and at least one of the plurality of outer sides is covered by a grid pattern on a plane.
[0011] In an embodiment, the grid pattern includes: a plurality of first grid lines extending along one direction and arranged along an intersecting direction intersecting the one direction; and a plurality of second grid lines extending along the intersecting direction and arranged along the one direction. The plurality of openings are surrounded by the plurality of first grid lines and the plurality of second grid lines.
[0012] In an embodiment, the plurality of outer sides of each of the plurality of light-emitting areas include: a first side and a second side facing each other in the intersecting direction and each extending in the one direction; and a third side and a fourth side facing each other in the one direction and each extending in the intersecting direction. At least some of the first side and the second side are covered in a plane by a plurality of first grid lines, and at least some of the third side and the fourth side are covered in a plane by a plurality of second grid lines.
[0013] In an embodiment, the plurality of openings defined in the grid pattern includes a plurality of central openings at least partially overlapping the plurality of light emitting regions and a plurality of peripheral openings not overlapping the plurality of light emitting regions.
[0014] In an embodiment, the grid pattern covers all of the plurality of outer sides of each of the plurality of light emitting areas, and each of the plurality of central openings is plane-disposed within a corresponding light emitting area among the plurality of light emitting areas.
[0015] In an embodiment, the multiple peripheral openings include: a plurality of first peripheral openings, which are arranged between the adjacent central openings in the above-mentioned one direction among the multiple central openings or between the adjacent central openings in the above-mentioned cross direction among the multiple central openings; and a plurality of second peripheral openings, which are spaced apart from the adjacent central openings among the multiple central openings in the oblique direction of the above-mentioned one direction and the above-mentioned cross direction.
[0016] In an embodiment, the plurality of outer sides of each of the plurality of light-emitting areas include: a first side and a second side facing each other in the aforementioned intersecting direction and each extending in the aforementioned one direction; and a third side and a fourth side facing each other in the aforementioned one direction and each extending in the aforementioned intersecting direction. The first side, the fourth side, the second side, and the third side are sequentially connected to each other in a clockwise direction, and a grid pattern covers two interconnected sides of the plurality of outer sides of each of the plurality of light-emitting areas. Two different sides of the first to fourth sides are covered by the grid pattern.
[0017] In an embodiment, at least some of the plurality of central openings overlap a portion of each of two or more light emitting areas among the plurality of light emitting areas.
[0018] In an embodiment, at least some of the plurality of central openings overlap with a different number of light emitting regions among the plurality of light emitting regions.
[0019] In an embodiment, the plurality of light-emitting zones include: a first group of light-emitting zones having a first side and a fourth side covered by a grid pattern in a plane; a second group of light-emitting zones having a first side and a third side covered by a grid pattern in a plane; a third group of light-emitting zones having a second side and a fourth side covered by a grid pattern in a plane; and a fourth group of light-emitting zones having a second side and a third side covered by a grid pattern in a plane. Within a predetermined unit area, the same number of light-emitting zones of the first group, the second group, the third group, and the fourth group are arranged.
[0020] In an embodiment, on a plane, a separation distance in a direction from an outer side of the light emitting area covered by the grid pattern to adjacent central openings among the plurality of central openings is less than or equal to a width of the grid pattern in the direction.
[0021] In an embodiment, the cutting portion configured to connect two adjacent peripheral openings to each other among the plurality of peripheral openings is defined in a grid pattern.
[0022] In an embodiment, the cutting portion is spaced apart from the plurality of central openings.
[0023] In an embodiment, the plurality of sensing electrodes includes: a plurality of first sensing electrodes extending in a first direction that is an oblique direction between the one direction and the intersecting direction and arranged in a second direction intersecting the first direction; and a plurality of second sensing electrodes extending in the second direction and arranged in the first direction. Each of the plurality of first sensing electrodes includes a plurality of first sensing portions arranged in the first direction, and each of the plurality of second sensing electrodes includes a plurality of second sensing portions arranged in the second direction. The cut portion is defined within the plurality of first sensing portions or the plurality of second sensing portions.
[0024] In an embodiment, the plurality of sensing electrodes includes: a plurality of first sensing electrodes extending in a first direction that is an oblique direction between the aforementioned one direction and the aforementioned intersecting direction and arranged in a second direction intersecting the first direction; and a plurality of second sensing electrodes extending in the second direction and arranged in the first direction. Each of the plurality of first sensing electrodes includes a plurality of first sensing portions arranged in the first direction, and each of the plurality of second sensing electrodes includes a plurality of second sensing portions arranged in the second direction. A boundary cutting portion is defined between adjacent first and second sensing portions among the plurality of first sensing portions and the plurality of second sensing portions. The boundary cutting portion is spaced apart from the plurality of central openings.
[0025] In an embodiment, the plurality of light-emitting areas includes a plurality of unit light-emitting areas arranged along each of the one direction and the intersecting direction. Each of the plurality of unit light-emitting areas includes: a first light-emitting area and a third light-emitting area spaced apart from each other in a first direction that is an oblique direction between the one direction and the intersecting direction; and two second light-emitting areas spaced apart from each other in a second direction intersecting the first direction. The first light-emitting area, the second light-emitting area, and the third light-emitting area respectively emit a first color light, a second color light, and a third color light that are different from each other.
[0026] In an embodiment, the plurality of light-emitting zones include: first and second light-emitting zones, arranged alternately along the one direction; and third light-emitting zones, spaced apart from the first and second light-emitting zones along the intersecting direction. The first, second, and third light-emitting zones respectively emit a first, second, and third color of light, which are different from each other.
[0027] In an embodiment, the third light-emitting area is disposed closer to the first light-emitting area than the second light-emitting area in the one direction, and the grid pattern further includes third grid lines spaced apart from the plurality of second grid lines. The third grid lines extend along the intersecting direction and cover an outer side of the third light-emitting area adjacent to the second light-emitting area.
[0028] In an embodiment, the input sensing layer further includes: a second insulating layer disposed on the first insulating layer; a first conductive layer disposed between the first and second insulating layers; and a second conductive layer disposed on the second insulating layer. The plurality of sensing electrodes includes: a plurality of first sensing electrodes extending in one direction and arranged in a cross direction intersecting the one direction; and a plurality of second sensing electrodes extending in the cross direction and arranged in the one direction. Each of the plurality of first sensing electrodes includes a plurality of first sensing portions arranged in the one direction and a connection pattern connecting the plurality of first sensing portions to one another, and each of the plurality of second sensing electrodes includes a plurality of second sensing portions arranged in the cross direction and an extension pattern connecting the plurality of second sensing portions to one another. The plurality of first sensing portions, the plurality of second sensing portions, and the extension pattern are included in the second conductive layer, and the connection pattern is included in the first conductive layer.
[0029] In an embodiment, a display device includes a display panel having a plurality of light-emitting areas and a non-light-emitting area and including a display element layer and an encapsulation layer disposed on the display element layer. The display device further includes an input sensing layer including a first insulating layer directly disposed on the encapsulation layer and a plurality of sensing electrodes disposed on the first insulating layer. Each of the plurality of sensing electrodes includes a grid pattern having a plurality of openings, the plurality of openings being defined in the grid pattern. The plurality of openings defined in the grid pattern include: a plurality of central openings that at least partially overlap with the plurality of light-emitting areas; and a plurality of peripheral openings that do not overlap with the plurality of light-emitting areas. A cutting portion connecting two adjacent peripheral openings among the plurality of peripheral openings is defined in the grid pattern.
[0030] In an embodiment, the cutting portion is spaced apart from the plurality of central openings.
[0031] In an embodiment, each of the plurality of light emitting areas includes a plurality of outer sides, and at least one of the plurality of outer sides is covered by a grid pattern on a plane.
[0032] In an embodiment, each of the plurality of central openings is disposed in a plane within a corresponding light-emitting area among the plurality of light-emitting areas, and a plurality of outer sides of each of the plurality of light-emitting areas are covered by a grid pattern.
[0033] In an embodiment, each of the plurality of light emitting regions is disposed in a plane within a corresponding central opening among the plurality of central openings, and the grid pattern does not overlap with the plurality of light emitting regions.
[0034] In an embodiment, an electronic device includes: a display panel having multiple light-emitting regions and non-light-emitting regions, and including a display element layer and an encapsulation layer disposed on the display element layer; and an input sensing layer including a first insulating layer disposed directly on the encapsulation layer and a plurality of sensing electrodes disposed on the first insulating layer. The electronic device further includes an anti-reflection layer disposed on the input sensing layer. Each of the plurality of sensing electrodes includes a grid pattern having a plurality of openings defined within the grid pattern. In plan view, a portion of the grid pattern overlaps a portion of each of the plurality of light-emitting regions.
[0035] In an embodiment, an electronic device includes a display panel having a plurality of light-emitting areas and a non-light-emitting area and including a display element layer and an encapsulation layer disposed on the display element layer. The electronic device further includes an input sensing layer including a first insulating layer directly disposed on the encapsulation layer and a plurality of sensing electrodes disposed on the first insulating layer. The electronic device further includes an anti-reflection layer disposed on the input sensing layer. Each of the plurality of sensing electrodes includes a grid pattern having a plurality of openings, and the plurality of openings are defined in the grid pattern. The plurality of openings defined in the grid pattern include: a plurality of central openings that at least partially overlap with the plurality of light-emitting areas; and a plurality of peripheral openings that do not overlap with the plurality of light-emitting areas. A cutting portion connecting two adjacent peripheral openings among the peripheral openings is defined in the grid pattern. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] The above and other features of the present inventive concept will become more apparent by describing in detail embodiments of the present inventive concept with reference to the accompanying drawings, in which:
[0037] Figure 1 is a perspective view of a display device according to an embodiment of the inventive concept;
[0038] Figure 2 is a cross-sectional view of a display device according to an embodiment of the inventive concept;
[0039] Figure 3 is a plan view of a display panel according to an embodiment of the inventive concept;
[0040] Figures 4A to 4C is an enlarged plan view of a display area according to an embodiment of the inventive concept;
[0041] Figure 4D is a cross-sectional view of a display panel according to an embodiment of the inventive concept;
[0042] Figure 5A is a plan view of an input sensing layer according to an embodiment of the inventive concept;
[0043] Figure 5B is a cross-sectional view of some components of a display module according to an embodiment of the inventive concept;
[0044] Figure 5C is a cross-sectional view of some components of a display module according to an embodiment of the inventive concept;
[0045] Figure 5D According to the embodiment of the present invention, Figure 5A A cross-sectional view of the input sensing layer corresponding to line II';
[0046] Figure 6is an enlarged plan view of a portion of an input sensing layer according to an embodiment of the inventive concept;
[0047] Figure 7A is with Figure 6 An enlarged plan view of the grid pattern corresponding to area AA';
[0048] Figure 7B shows a light emitting area and a pixel area corresponding to each other according to an embodiment of the inventive concept;
[0049] Figure 7C According to the embodiment of the present invention, Figure 7A A cross-sectional view of the display module corresponding to line II-II';
[0050] Figure 7D is an enlarged plan view of a grid pattern showing a state in which a pixel shrinkage phenomenon has occurred;
[0051] Figure 8 is an enlarged plan view of a mesh pattern according to an embodiment of the present inventive concept;
[0052] Figure 9 is an enlarged plan view of a mesh pattern according to an embodiment of the present inventive concept;
[0053] Figure 10A and Figure 10B is an enlarged plan view of a mesh pattern according to an embodiment of the present inventive concept;
[0054] Figure 11A is an enlarged plan view of a mesh pattern according to an embodiment of the present inventive concept;
[0055] Figure 11B According to the embodiment of the present invention, Figure 11A A cross-sectional view of the display module corresponding to line III-III';
[0056] Figure 12A is an enlarged plan view of a mesh pattern according to an embodiment of the present inventive concept;
[0057] Figure 12B shows a light emitting area and a pixel area corresponding to each other according to an embodiment of the inventive concept;
[0058] Figure 12C According to the embodiment of the present invention, Figure 12A A cross-sectional view of the display module corresponding to line IV-IV';
[0059] Figure 12D is an enlarged plan view of a mesh pattern according to an embodiment of the present inventive concept;
[0060] 13A to 13D is an enlarged plan view of a mesh pattern according to an embodiment of the present inventive concept;
[0061] Figure 14 is an enlarged plan view of a mesh pattern according to an embodiment of the present inventive concept; and
[0062] Figure 15 is an enlarged plan view of a mesh pattern according to an embodiment of the inventive concept. DETAILED DESCRIPTION
[0063] Embodiments of the inventive concept will be described more fully hereinafter with reference to the accompanying drawings, in which like reference numerals may refer to like elements throughout.
[0064] It will be understood that when a component such as a film, region, layer, etc. is referred to as being "on," "connected to," "coupled to," or "adjacent" another component, the component can be directly on, connected to, coupled to, or adjacent to the other component, or there may be intervening components. It will also be understood that when a component is referred to as being "between" two components, the component can be the only component between the two components, or there may also be one or more intervening components. It will also be understood that when a component is referred to as "overlying" another component, the component can be the only component overlying the other component, or one or more intervening components may also overly the other component. Other words used to describe relationships between components should be interpreted in a similar manner.
[0065] As used herein, the term "and / or" includes any and all combinations that may be defined by the relevant configurations.
[0066] It will be understood that the terms "first," "second," "third," etc. are used herein to distinguish one element from another, and the elements are not limited by these terms. Thus, a "first" element in one embodiment may be described as a "second" element in another embodiment.
[0067] For ease of description, spatially relative terms such as "below," "beneath," "under," "above," "upper," etc. may be used herein to describe the relationship of one element or feature relative to another element or feature as shown in the accompanying drawings. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, an element described as "below," "beneath," or "below" another element or feature would then be oriented "above" the other element or feature. Thus, the exemplary terms "below" and "under" may encompass both above and below orientations.
[0068] It will be understood that when used in this specification, the terms "comprising" and / or "having" specify the presence of stated features, integers, steps, operations, elements, parts and / or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups thereof.
[0069] Figure 1 is a perspective view of a display device DD according to an embodiment of the inventive concept.
[0070] The display device DD can be activated according to an electrical signal and can display an image IM. For example, the display device DD can be used in large devices such as televisions and outdoor billboards, as well as small and medium-sized devices such as monitors, mobile phones, tablet computers, navigation systems, and game consoles. However, the above-described embodiments of the display device DD are examples, and examples of the display device DD are not limited to any of these embodiments, as long as they do not depart from the spirit and scope of the present inventive concept.
[0071] refer to Figure 1 The display device DD may include a display module DM configured to display an image IM and sense external input. In a plan view, the display module DM may have a rectangular shape having long sides extending in a first direction DR1 and short sides extending in a second direction DR2 intersecting the first direction DR1. However, the display module DM is not limited thereto and may have various shapes, such as a circle or other polygonal shapes.
[0072] In an embodiment, the third direction DR3 may be defined as a direction substantially perpendicular to a plane defined by the first direction DR1 and the second direction DR2. The front (or upper) surface and the rear (or lower) surface of each member constituting the display device DD may be opposite to each other in the third direction DR3, and the normal direction of each of the front and rear surfaces may be substantially parallel to the third direction DR3. The separation distance between the front and rear surfaces defined along the third direction DR3 may correspond to the thickness of the member.
[0073] In this specification, the expression "on a plane" can be defined as viewing in the third direction DR3. In this specification, the expression "on a cross-section" can be defined as viewing in the first direction DR1 or the second direction DR2. The directions indicated by the first to third directions DR1, DR2, and DR3 are relative concepts and can be converted into other directions.
[0074] The display device DD can be rigid or flexible. The term "flexible" implies a bendable property, and flexible structures can include everything from fully foldable structures to structures that can be bent down to a few nanometers. For example, a flexible display device DD can include a curved device, a rollable device, a slidable device, or a foldable device.
[0075] The upper surface of the display module DM may be defined as a display surface DS, and the display surface DS may have a plane defined by a first direction DR1 and a second direction DR2. The display module DM may display a generated image IM to a user through the display surface DS. The display surface DS may include a display area DA and a non-display area NDA.
[0076] The image IM may be displayed in the display area DA, and the image IM is not displayed in the non-display area NDA. The non-display area NDA may be adjacent to the display area DA. For example, the non-display area NDA may surround the display area DA. The non-display area NDA may correspond to an area printed in a predetermined color and may define the boundary of the display module DM. For example, the non-display area NDA may correspond to a bezel area.
[0077] The display module DM can sense input applied from outside the display module DM. The external input may include various types of input such as force, pressure, temperature, or light. In the embodiment, the external input is shown as a user's hand US applied to the front surface of the display device DD. However, this is shown as an example, and the external input may include, for example, a touch of a pen or an input such as hovering applied near the display device DD.
[0078] Figure 2 is a schematic cross-sectional view of a display device DD according to an embodiment of the inventive concept.
[0079] refer to Figure 2 The display device DD may include a display module DM and an anti-reflection layer ARL, and the display module DM may include a display panel DP and an input sensing layer ISP. The display panel DP may include a base substrate SUB, a circuit element layer CL, a display element layer OL, and a thin film encapsulation layer TFE.
[0080] The display panel DP according to an embodiment of the present inventive concept may be a light-emitting display panel. However, the embodiment is not particularly limited thereto. For example, the display panel DP may be an organic light-emitting display panel or an inorganic light-emitting display panel. The light-emitting layer of an organic light-emitting display panel may include an organic light-emitting material. The light-emitting layer of an inorganic light-emitting display panel may include, for example, quantum dots and / or quantum rods. Hereinafter, the display panel DP will be described as an organic light-emitting display panel.
[0081] The base substrate SUB may provide a base surface on which the circuit element layer CL is disposed. The base substrate SUB may be a rigid substrate or a flexible substrate that can be bent, folded, or rolled. The base substrate SUB may be, for example, a glass substrate, a metal substrate, or a polymer substrate. However, embodiments of the present inventive concept are not limited thereto, and the base substrate SUB may be, for example, an inorganic layer, an organic layer, or a composite material layer.
[0082] The base substrate SUB may have a multi-layer structure. For example, the base substrate SUB may include a synthetic resin layer and a multi-layer or single inorganic layer disposed between the synthetic resin layers. The synthetic resin layer may include, for example, acrylic resin, methacrylic resin, polyisoprene resin, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and / or perylene resin. However, embodiments of the present inventive concept are not particularly limited thereto.
[0083] The circuit element layer CL may be disposed on the base substrate SUB. The circuit element layer CL may include, for example, an insulating layer, a semiconductor pattern, and a conductive pattern. The insulating layer, semiconductor pattern, and conductive pattern included in the circuit element layer CL may form driving elements, signal lines, and pads within the circuit element layer CL.
[0084] The display element layer OL may be disposed on the circuit element layer CL. The display element layer OL may include a light-emitting element disposed in the display area DA. The light-emitting element may include, for example, an organic light-emitting element, an inorganic light-emitting element, a micro-LED, or a nano-LED. However, embodiments of the present inventive concept are not particularly limited thereto. The light-emitting element of the display element layer OL may be electrically connected to a driving element of the circuit element layer CL and may generate light within the display area DA based on a signal provided by the driving element.
[0085] The thin film encapsulation layer (TFE) may be disposed on the display element layer OL and may seal the light emitting element. The thin film encapsulation layer (TFE) may include at least one thin film that improves the optical efficiency of the display element layer OL or protects the display element layer OL. The thin film encapsulation layer (TFE) may include at least one of an inorganic layer and an organic layer.
[0086] The input sensing layer ISP may be disposed on the display panel DP. The input sensing layer ISP may be formed on a substrate surface provided by the display panel DP through a continuous process. The input sensing layer ISP may be disposed directly on the display panel DP without using a separate adhesive layer. However, embodiments of the present inventive concept are not particularly limited thereto. For example, according to embodiments, the input sensing layer ISP may be bonded to the display panel DP via a separate adhesive layer.
[0087] The input sensing layer ISP can sense external input and can provide an input signal including information about the external input so that the display panel DP can display an image corresponding to the external input. The input sensing layer ISP can be driven by various methods such as a capacitive method, a resistive film method, an infrared method, an acoustic wave method, or a pressure method. For example, as long as the driving method of the input sensing layer ISP can sense external input, the embodiments of the present inventive concept are not limited to any one method. In the embodiments, the input sensing layer ISP is described as an input sensing panel driven by a capacitive method.
[0088] The anti-reflection layer (ARL) may be disposed on the input sensing layer (ISP). The anti-reflection layer (ARL) may be disposed directly on the input sensing layer (ISP) without using a separate adhesive layer. However, the present invention is not limited thereto and the anti-reflection layer (ARL) may be bonded to the input sensing layer (ISP) via a separate adhesive layer. The anti-reflection layer (ARL) may reduce the reflectivity of external light incident from outside the display device (DD).
[0089] In an embodiment, the anti-reflection layer ARL may include a retarder and / or a polarizer. Each of the retarder and the polarizer may be provided as a film type or a liquid crystal coating type. The retarder and the polarizer may be provided in the form of a single polarizing film.
[0090] In an embodiment, the anti-reflection layer ARL may include a color filter. The color filter may be provided to correspond to the arrangement and emission color of the pixels included in the display panel DP. The color filter may filter external light incident from outside the display device DD into the same color as the light emitted by the corresponding pixel. The anti-reflection layer ARL may further include a light blocking pattern adjacent to the color filter.
[0091] Figure 2 An embodiment in which the input sensing layer ISP and the anti-reflection layer ARL are sequentially disposed on the display panel DP is shown. However, embodiments of the present inventive concept are not limited thereto. For example, the stacking order of the anti-reflection layer ARL and the input sensing layer ISP may be changed.
[0092] Figure 3 is a plan view of a display panel DP according to an embodiment of the inventive concept.
[0093] refer to Figure 3 The display panel DP may include a base substrate SUB, pixels PX, signal lines SL1 to SLm, DL1 to DLn, EL1 to ELm, and PL electrically connected to the pixels PX, signal lines CSL1 and CSL2, a scan driver SDV (also referred to as a scan driver circuit), a data driver DDV (also referred to as a data driver circuit), and a light emitting driver EDV (also referred to as a light emitting driver circuit). Each of m and n is a positive integer.
[0094] The base substrate SUB may provide a base surface on which elements and lines of the display panel DP are arranged on a plane parallel to each of the first and second directions DR1 and DR2. The base substrate SUB may include a display area DA and a non-display area NDA of the display panel DP.
[0095] The display area DA may be an area in which pixels PX are arranged and an image is displayed. The non-display area NDA may be adjacent to the display area DA and may be an area in which no image is displayed. A scan driver SDV, a data driver DDV, and a light emitting driver EDV configured to drive the pixels PX may be disposed in the non-display area NDA. However, according to embodiments, to reduce the area of the non-display area NDA, at least one of the scan driver SDV, the data driver DDV, and the light emitting driver EDV may be disposed in the display area DA.
[0096] Each of the pixels PX may include a pixel driving circuit including a plurality of transistors (e.g., a switching transistor and a driving transistor, etc.) and at least one capacitor, and a light-emitting element electrically connected to the pixel driving circuit. Each of the pixels PX may display an image in the display area DA by emitting light in response to an electrical signal applied to the pixel PX. Some of the pixels PX may include transistors disposed in the non-display area NDA, and the present inventive concept is not limited to any one embodiment.
[0097] The signal lines SL1 to SLm, DL1 to DLn, EL1 to ELm, CSL1, CSL2, and PL may include scan lines SL1 to SLm, data lines DL1 to DLn, emission lines EL1 to ELm, first and second control lines CSL1 and CSL2, and a power line PL.
[0098] The data lines DL1 to DLn may be insulated from the scan lines SL1 to SLm and the emission lines EL1 to ELm, and may intersect the scan lines SL1 to SLm and the emission lines EL1 to ELm in a plane. For example, the scan lines SL1 to SLm may extend in the second direction DR2 and may be electrically connected to the scan driver SDV. The data lines DL1 to DLn may extend in the first direction DR1 and may be electrically connected to the data driver DDV. The emission lines EL1 to ELm may extend in the second direction DR2 and may be electrically connected to the emission driver EDV.
[0099] The power line PL may include a portion extending in the first direction DR1 and a portion extending in the second direction DR2. The portion of the power line PL extending in the first direction DR1 may be disposed in the non-display area NDA. The portion of the power line PL extending in the second direction DR2 may be electrically connected to the pixel PX and the portion of the power line PL extending in the first direction DR1. The portion of the power line PL extending in the second direction DR2 may be disposed on a different layer from the portion of the power line PL extending in the first direction DR1 and may be connected to the portion of the power line PL extending in the first direction DR1 via a contact hole, or may have a unitary shape with the portion of the power line PL extending in the first direction DR1 located on the same layer.
[0100] The first control line CSL1 may be electrically connected to the scan driver SDV, and the second control line CSL2 may be electrically connected to the light emitting driver EDV.
[0101] The first pads PD1 may be adjacent to the lower end of the non-display area NDA. The first pads PD1 may be disposed closer to the lower end of the display panel DP than the data driver DDV. The first pads PD1 may be spaced apart from each other along the second direction DR2.
[0102] The first pads PD1 may be defined as display pads electrically connected to the pixels PX. Each of the first pads PD1 may be connected to a corresponding signal line among the signal lines SL1 to SLm, DL1 to DLn, EL1 to ELm, CSL1, CSL2, and PL. For example, the first pads PD1 may be electrically connected to the power line PL, the first control line CSL1, the second control line CSL2, and the data lines DL1 to DLn, respectively.
[0103] The scan driver SDV may generate a scan signal in response to a scan control signal. The scan signal may be applied to the pixels PX via the scan lines SL1 to SLm. The data driver DDV may generate a data voltage corresponding to an image signal in response to the data control signal. The data voltage may be applied to the pixels PX via the data lines DL1 to DLn. The light emitting driver EDV may generate a light emitting signal in response to a light emitting control signal. The light emitting signal may be applied to the pixels PX via the light emitting lines EL1 to ELm.
[0104] The pixel PX may receive a data voltage in response to a scan signal. The pixel PX may display an image by emitting light having a brightness corresponding to the data voltage in response to a light emission signal. The light emission time of the pixel PX may be controlled by the light emission signal.
[0105] Figures 4A to 4C is an enlarged plan view of a display area DA according to an embodiment of the inventive concept.
[0106] refer to Figure 4A and Figure 4B The display area DA may include a plurality of light emitting areas LA1, LA2, and LA3 and a non-light emitting area NLA adjacent to the plurality of light emitting areas LA1, LA2, and LA3. The non-light emitting area NLA sets a boundary of the light emitting areas LA1, LA2, and LA3.
[0107] The light emitting areas LA1, LA2 and LA3 may be arranged to correspond to Figure 3 Each of the pixels PX may include a light emitting element, and the light emitting areas LA1, LA2, and LA3 may be areas where light is emitted from the light emitting element. Figure 4D The arrangement relationship between the light emitting areas LA1, LA2, and LA3 and the non-light emitting area NLA is described in more detail.
[0108] The light-emitting areas LA1, LA2, and LA3 may include a first light-emitting area LA1 (or first color light-emitting area) emitting a first color light, a second light-emitting area LA2 (or second color light-emitting area) emitting a second color light, and a third light-emitting area LA3 (or third color light-emitting area) emitting a third color light. In an embodiment, the first color light may be red light, the second color light may be green light, and the third color light may be blue light.
[0109] The first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3 may define one unit light emitting area UA. The unit light emitting area UA is a repeated arrangement unit of light emitting areas provided in the display area DA.
[0110] In the embodiment, one type of unit light emitting area UA0 is provided in the display area DA. The unit light emitting area UA0 includes a second light emitting area LA2 spaced apart from each other in the second direction DR2 and a first light emitting area LA1 and a third light emitting area LA3 spaced apart from each other in the first direction DR1. The four light emitting areas LA1, LA2, and LA3 of the unit light emitting area UA0 are arranged in a diamond shape.
[0111] The unit light emitting areas UA0 of each pixel row PXR are arranged along the second direction DR2. The unit light emitting areas UA0 of adjacent pixel rows PXR may be staggered along the second direction DR2. The unit light emitting areas UA0 of each pixel column PXC are arranged along the first direction DR1. The unit light emitting areas UA0 of adjacent pixel columns PXC may be staggered along the first direction DR1.
[0112] The first light-emitting areas LA1 and the third light-emitting areas LA3 may be alternately arranged along each of the first direction DR1 and the second direction DR2. The second light-emitting areas LA2 may be arranged along each of the first direction DR1 and the second direction DR2. The second light-emitting areas LA2 and each of the first light-emitting areas LA1 and the third light-emitting areas LA3 may be spaced apart from each other along the first oblique direction DR4 or the second oblique direction DR5. The first oblique direction DR4 may intersect each of the first direction DR1 and the second direction DR2 on a plane defined by the first direction DR1 and the second direction DR2. The second oblique direction DR5 may intersect each of the first direction DR1, the second direction DR2, and the fourth direction DR4 on a plane defined by the first direction DR1 and the second direction DR2.
[0113] In an embodiment, Figure 4A As shown in FIG, the first light emitting area LA1, the second light emitting area LA2 and the third light emitting area LA3 may have the same area as each other. However, it is not limited thereto. Figure 4B As shown in , the areas of the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3 may be different from each other. For example, the second light emitting area LA2 may have the smallest area, and the third light emitting area LA3 may have the largest area.
[0114] refer to Figure 4C In the embodiment, the unit light emitting area UA may include a first unit light emitting area UA1 and a second unit light emitting area UA2. Referring to the first unit light emitting area UA1 and the second unit light emitting area UA2, the first light emitting area LA1 and the second light emitting area LA2 may be spaced apart from each other in the first direction DR1, and the third light emitting area LA3 may be spaced apart from the first light emitting area LA1 and the second light emitting area LA2 in the second direction DR2. The first light emitting area LA1 may be spaced apart from one side of the third light emitting area LA3 in the first direction DR1 ( Figure 4C The second light emitting area LA2 may be disposed on one side (in the upper side) of the first light emitting area LA1 in the first direction DR1. Figure 4C the lower side of the center).
[0115] Regarding the first and second light-emitting areas LA1 and LA2, the position of the third light-emitting area LA3 of the first unit light-emitting area UA1 in the first direction DR1 may differ from the position of the third light-emitting area LA3 of the second unit light-emitting area UA2 in the first direction DR1. With reference to the first unit light-emitting area UA1, the third light-emitting area LA3 is positioned relatively below the position of the first and second light-emitting areas LA1 and LA2 in the first direction DR1. With reference to the second unit light-emitting area UA2, the third light-emitting area LA3 is positioned relatively above the position of the first and second light-emitting areas LA1 and LA2 in the first direction DR1. The degree of offset of the third light-emitting area LA3 of the first unit light-emitting area UA1 relative to the first and second light-emitting areas LA1 and LA2 in the first direction DR1 may differ from the degree of offset of the third light-emitting area LA3 of the second unit light-emitting area UA2 relative to the first and second light-emitting areas LA1 and LA2 in the first direction DR1. In an embodiment, the third light-emitting area LA3 of the second unit light-emitting area UA2 may be relatively further offset in the first direction DR1 relative to the first and second light-emitting areas LA1 and LA2. However, not limited thereto, the degree of displacement of the third light-emitting area LA3 of the first unit light-emitting area UA1 relative to the first light-emitting area LA1 and the second light-emitting area LA2 in the first direction DR1 and the degree of displacement of the third light-emitting area LA3 of the second unit light-emitting area UA2 relative to the first light-emitting area LA1 and the second light-emitting area LA2 in the first direction DR1 may be the same as each other.
[0116] The first unit light emitting areas UA1 and the second unit light emitting areas UA2 may be alternately arranged along the second direction DR2 in the pixel row PXR. The first unit light emitting areas UA1 and the second unit light emitting areas UA2 may be alternately arranged along the first direction DR1 in the pixel column PXC.
[0117] One third light-emitting area LA3 of the first unit light-emitting area UA1 and one third light-emitting area LA3 of the second unit light-emitting area UA2, which are adjacent to each other, are spaced apart by a first distance DT1 and are arranged relatively close to each other. The third light-emitting area LA3 of the first unit light-emitting area UA1 and the third light-emitting area LA3 of the second unit light-emitting area UA2, which are spaced apart by the first distance DT1, define a light-emitting area pair UP. The light-emitting area pair UP may be spaced apart by a second distance DT2 within each pixel column PXC. The second distance DT2 may be greater than the first distance DT1.
[0118] The light-emitting element arranged in the third light-emitting area LA3 of the first unit light-emitting area UA1 and the light-emitting element arranged in the third light-emitting area LA3 of the second unit light-emitting area UA2 may include light-emitting layers having a shape integral with each other. That is, the light-emitting layer arranged in the third light-emitting area LA3 of the first unit light-emitting area UA1 and the light-emitting layer arranged in the third light-emitting area LA3 of the second unit light-emitting area UA2 can be deposited by using one mask. The openings corresponding to the light-emitting area pair UP can be defined in the corresponding mask. As a result, the number of openings in the mask can be reduced, and the width of the blocking area of the mask arranged between the openings in the first direction DR1 can be ensured. The blocking area is defined as a portion of the mask in which no opening is defined. The defect of the mask sagging during the deposition process can be suppressed.
[0119] Figure 4D is a cross-sectional view of a display panel DP according to an embodiment of the inventive concept. Figure 4D The display panel DP is shown as an example. Figure 3 The cross section corresponding to any one pixel PX shown in FIG.
[0120] refer to Figure 4D , pixel PX (see Figure 3 ) may include a transistor TR and a light emitting element OLED. The transistor TR and the light emitting element OLED may be disposed on a base substrate SUB. Figure 4D One transistor TR is shown, but the embodiment is not limited thereto. For example, according to the embodiment, the pixel PX (see Figure 3 ) may include multiple transistors and at least one capacitor for driving the light-emitting element OLED.
[0121] The circuit element layer CL may be provided on the base substrate SUB. The circuit element layer CL may include a shielding electrode BML, a transistor TR, a connection electrode CNE, and a plurality of insulating layers BFL and INS1 to INS6. The plurality of insulating layers BFL and INS1 to INS6 may include a buffer layer BFL and first to sixth insulating layers INS1 to INS6. However, Figure 4D The stacking structure of the circuit element layer CL shown in FIG is an example, and the stacking structure of the circuit element layer CL may be different depending on the pixel PX (see FIG. Figure 3 ) configuration and the process of the circuit element layer CL.
[0122] The shielding electrode BML may be provided on the base substrate SUB. The shielding electrode BML may overlap with the transistor TR. The shielding electrode BML may protect the transistor TR by blocking light from being incident on the transistor TR from the bottom of the display panel DP. The shielding electrode BML may include a conductive material. In an embodiment, the shielding electrode BML may be connected to a power line PL (see Figure 3) to receive a voltage. When a voltage is applied to the shielding electrode BML, the threshold voltage of the transistor TR provided on the shielding electrode BML can be maintained. In an embodiment, the shielding electrode BML can be a floating electrode. In an embodiment, the shielding electrode BML can be omitted.
[0123] The buffer layer BFL may be disposed on the base substrate SUB and may cover the shielding electrode BML. The buffer layer BFL may include an inorganic layer. The buffer layer BFL may improve the bonding strength between the semiconductor pattern or conductive pattern disposed on the buffer layer BFL and the base substrate SUB.
[0124] The transistor TR may include a source S, a channel C, a drain D, and a gate G. The source S, channel C, and drain D of the transistor TR may be formed of a semiconductor pattern. The semiconductor pattern of the transistor TR may include, for example, polysilicon, amorphous silicon, or metal oxide, and the present inventive concept is not limited to any one embodiment as long as the material has semiconductor characteristics.
[0125] The semiconductor pattern may include a plurality of regions divided according to the level of conductivity. The region of the semiconductor pattern doped with a dopant or in which the metal oxide is reduced may have high conductivity and may basically serve as the source electrode and drain electrode of the transistor TR. The region with high conductivity in the semiconductor pattern may correspond to the source S and drain D of the transistor TR. The region of the semiconductor pattern that is not doped or doped at a low concentration or has low conductivity due to the metal oxide not being reduced may correspond to the channel C (or active portion) of the transistor TR.
[0126] The first insulating layer INS1 may cover the semiconductor pattern of the transistor TR and may be disposed on the buffer layer BFL. The gate G of the transistor TR may be disposed on the first insulating layer INS1. The gate G may overlap with the channel C of the transistor TR. In an embodiment, the gate G may be used as a mask in a process of doping the semiconductor pattern of the transistor TR.
[0127] The second insulating layer INS2 may cover the gate G and may be disposed on the first insulating layer INS1. The third insulating layer INS3 may be disposed on the second insulating layer INS2.
[0128] The connection electrode CNE may include a first connection electrode CNE1 and a second connection electrode CNE2 that electrically connect the transistor TR and the light-emitting element OLED. However, the present invention is not limited to the embodiment in which the connection electrode CNE connects the transistor TR and the light-emitting element OLED. For example, depending on the embodiment, one of the first connection electrode CNE1 and the second connection electrode CNE2 may be omitted, or an additional connection electrode may be further included.
[0129] The first connection electrode CNE1 may be disposed on the third insulating layer INS3. The first connection electrode CNE1 may be connected to the drain electrode D through a first contact hole CH1 that passes through the first insulating layer INS1 to the third insulating layer INS3. The fourth insulating layer INS4 may cover the first connection electrode CNE1 and may be disposed on the third insulating layer INS3. The fifth insulating layer INS5 may be disposed on the fourth insulating layer INS4.
[0130] The second connection electrode CNE2 may be disposed on the fifth insulating layer INS5. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through a second contact hole CH2 passing through the fourth insulating layer INS4 and the fifth insulating layer INS5. The sixth insulating layer INS6 may cover the second connection electrode CNE2 and may be disposed on the fifth insulating layer INS5.
[0131] Each of the first to sixth insulating layers INS1 to INS6 may include an inorganic layer or an organic layer. For example, the inorganic layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. The organic layer may include, for example, at least one of acrylic resin, methacrylic resin, polyisoprene resin, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin.
[0132] The display element layer OL may include a pixel definition layer PDL and a light emitting element OLED. The light emitting element OLED may include a first electrode AE, a hole control layer HCL, an electron control layer ECL, a light emitting layer EML, and a second electrode CE.
[0133] The first electrode AE may be disposed on the sixth insulating layer INS6 and connected to the second connection electrode CNE2 through a third contact hole CH3 passing through the sixth insulating layer INS6. The first electrode AE may be electrically connected to the drain D of the transistor TR through the first and second connection electrodes CNE1 and CNE2.
[0134] The pixel definition film PDL may be provided on the sixth insulating layer INS6. A light emitting opening PX_OP exposing a portion of the first electrode AE may be defined in the pixel definition film PDL. The portion of the first electrode AE exposed by the light emitting opening PX_OP may be defined as a light emitting area LA. The light emitting area LA may be the same as the first to third light emitting areas LA1, LA2, and LA3 described above (see FIG. Figure 4A 、 Figure 4B and Figure 4C ) corresponds to one of the .
[0135] The area in which the pixel defining film PDL is disposed may correspond to the non-emission area NLA. The non-emission area NLA may surround the emission area LA within the display area DA.
[0136] The hole control layer HCL may be disposed on the first electrode AE and the pixel defining layer PDL. The hole control layer HCL may be provided as a common layer overlapping the emission area LA and the non-emission area NLA. The hole control layer HCL may include at least one of a hole transport layer, a hole injection layer, and an electron blocking layer.
[0137] The light-emitting layer EML may be disposed on the hole control layer HCL. The light-emitting layer EML may be disposed in a region corresponding to the light-emitting opening PX_OP. However, the present invention is not limited thereto. For example, according to an embodiment, the light-emitting layer EML may be provided as a common layer. The light-emitting layer EML may include an organic material and / or an inorganic material. The light-emitting layer EML may emit light of any one of red, green, and blue colors.
[0138] The electron control layer ECL may be disposed on the light emitting layer EML. The electron control layer ECL may be provided as a common layer overlapping the light emitting area LA and the non-light emitting area NLA. The electron control layer ECL may include at least any one of an electron transport layer, an electron injection layer, and a hole blocking layer.
[0139] The second electrode CE may be provided on the electronic control layer ECL. The second electrode CE may be provided as a common layer overlapping the light emitting area LA and the non-light emitting area NLA. The second electrode CE may be commonly provided in each pixel PX (see FIG. Figure 3 ) and a voltage can be applied to each pixel PX (see Figure 3 ).
[0140] The thin film encapsulation layer (TFE) may be disposed on the second electrode CE and may cover the light-emitting element OLED. The thin film encapsulation layer (TFE) may include multiple thin films EN1, EN2, and EN3. The thin film encapsulation layer (TFE) may include an inorganic film disposed on the second electrode CE and an organic film disposed between the inorganic films. For example, the first thin film EN1 may be disposed on the display element layer OL. The second thin film EN2 may be disposed on the first thin film EN1, and the third thin film EN3 may be disposed on the second thin film EN2.
[0141] Each of the first to third thin films EN1, EN2, and EN3 may include an inorganic film or an organic film. For example, the first and third thin films EN1 and EN3 may include inorganic films, and the second thin film EN2 may include an organic film. The inorganic film of the thin film encapsulation layer TFE may protect the light-emitting element OLED from moisture or oxygen, and the organic film of the thin film encapsulation layer TFE may protect the light-emitting element OLED from foreign matter such as dust particles. However, the thin film encapsulation layer TFE according to the embodiment is not necessarily limited thereto.
[0142] A first voltage may be applied to the first electrode AE through the transistor TR, and a second voltage having a level lower than the first voltage may be applied to the second electrode CE. Holes and electrons injected into the light-emitting layer EML may recombine to form excitons, and when the excitons transition to a ground state, the light-emitting element OLED may emit light.
[0143] Figure 5A is a plan view of an input sensing layer ISP according to an embodiment of the inventive concept. Figure 5B 2 is a cross-sectional view of some components of a display module DM according to an embodiment of the inventive concept. Figure 5C 2 is a cross-sectional view of some components of a display module DM according to an embodiment of the inventive concept. Figure 5D According to the embodiment of the present invention, Figure 5A A cross-sectional view of the input sensing layer ISP corresponding to line II'. Figure 5B The cross-sections of the thin film encapsulation layer TFE and the input sensing layer ISP are schematically shown. Figure 5C The cross sections of the display panel DP and the input sensing layer ISP are schematically shown.
[0144] refer to Figure 5A The input sensing layer ISP can be arranged on the display panel DP (see Figure 3 ) on the display panel DP. The input sensing layer ISP may be directly formed on the display panel DP (see Figure 3 ) is provided on the surface of the substrate. In an embodiment, the input sensing layer ISP can be driven by a mutual capacitance method. However, the input sensing layer ISP can also be driven by a self-capacitance method, and is not limited to the mutual capacitance method.
[0145] The input sensing layer ISP may include a first sensing insulating layer TIL1 , a first sensing electrode SE1 , a second sensing electrode SE2 , a first sensing line TXL, a second sensing line RXL, a second pad PD2 , and a third pad PD3 .
[0146] The first sensing insulating layer TIL1 may provide a substrate surface on which electrodes and lines of the input sensing layer ISP are disposed. In an embodiment, the first sensing insulating layer TIL1 may be directly disposed on the display panel DP (see FIG. Figure 4D ) thin film encapsulation layer TFE (see Figure 4D However, the embodiment is not limited thereto. For example, according to an embodiment, the electrodes and lines of the input sensing layer ISP may be directly disposed on the thin film encapsulation layer TFE (see Figure 4D )superior.
[0147] The first sensing insulating layer TIL1 may include an active area AA and a peripheral area NAA. The active area AA may be aligned with the display area DA (see FIG. Figure 3 ) and the peripheral area NAA may overlap with the non-display area NDA (see Figure 3 )overlapping.
[0148] Each of the first sensing electrodes SE1 may extend in the first direction DR1, and the first sensing electrodes SE1 may be arranged in the second direction DR2. As an example, Figure 5A Four first sensing electrodes SE1 are shown, but the number of first sensing electrodes SE1 included in the input sensing layer ISP is not limited thereto. Each of the first sensing electrodes SE1 may include a first sensing part SP1 and a connection pattern CP configured to connect the first sensing parts SP1 to each other.
[0149] The first sensing parts SP1 may be arranged along the first direction DR1. Each of the connection patterns CP may be provided between adjacent first sensing parts SP1 in the first direction DR1 to electrically connect the first sensing parts SP1 to each other. Each of the connection patterns CP may extend in the first direction DR1. In a planar view, the connection pattern CP may overlap with the first sensing parts SP1 adjacent to it in the first direction DR1. However, the shape of the connection pattern CP is not limited to any one shape, as long as it can electrically connect adjacent first sensing parts SP1 to each other.
[0150] The connection pattern CP may be provided at a different layer from the first sensing portion SP1. The connection pattern CP may be connected to the corresponding first sensing portion SP1 through a contact hole T-CH. The contact hole T-CH may be formed by passing through an insulating layer provided between the connection pattern CP and the first sensing portion SP1.
[0151] Each of the second sensing electrodes SE2 may extend in the second direction DR2, and the second sensing electrodes SE2 may be arranged in the first direction DR1. As an example, Figure 5A Five second sensing electrodes SE2 are shown, but the number of second sensing electrodes SE2 included in the input sensing layer ISP is not limited thereto. Each of the second sensing electrodes SE2 may include a second sensing portion SP2 and an extension pattern EP connecting the second sensing portions SP2 to each other.
[0152] The second sensing parts SP2 may be arranged along the second direction DR2. Each of the extension patterns EP may be disposed between the second sensing parts SP2 adjacent to each other in the second direction DR2, and may electrically connect the second sensing parts SP2 to each other.
[0153] Each of the extension patterns EP may extend in the second direction DR2. The extension pattern EP may be insulated from the connection pattern CP and may intersect the connection pattern CP in a plane. The extension pattern EP may extend from the corresponding second sensing portion SP2. In other words, the extension pattern EP may have a shape integral with the second sensing portion SP2 located on the same layer.
[0154] The first sensing electrode SE1 and the second sensing electrode SE2 may be electrically insulated from each other and may cross each other on a plane. The input sensing layer ISP may sense external input by a change in capacitance between the first sensing electrode SE1 and the second sensing electrode SE2. The first sensing electrode SE1 and the second sensing electrode SE2 may be disposed adjacent to the display area DA (see FIG. Figure 3 ) in the overlapping active area AA. Accordingly, the display device DD (see Figure 1 ) can be viewed through the display area DA (see Figure 1 ) to display an image, and at the same time can sense the voltage applied to the display area DA (see Figure 1 ) external input.
[0155] The first sensing lines TXL may be disposed in the peripheral area NAA and may be electrically connected to the first sensing electrodes SE1, respectively. For example, the first sensing lines TXL may be electrically connected to the lower ends of the first sensing electrodes SE1, respectively. In a plane, the first sensing lines TXL may be adjacent to the lower portion of the peripheral area NAA. The first sensing lines TXL may extend from the lower ends of the first sensing electrodes SE1 toward the second pads PD2, respectively.
[0156] The first sensing lines TXL may be electrically connected to the second pads PD2, respectively. The first sensing lines TXL may be provided at a different layer from the second pads PD2 and connected to the second pads PD2 through contact holes, or may have an integral shape with the second pads PD2.
[0157] The second sensing lines RXL may be disposed in the peripheral area NAA and may be electrically connected to the second sensing electrodes SE2, respectively. For example, the second sensing lines RXL may be electrically connected to the right ends of the second sensing electrodes SE2, respectively. In a plane, the second sensing lines RXL may be adjacent to the right side of the peripheral area NAA. However, the embodiments of the present invention are not limited thereto, and in a plane, the second sensing lines RXL may be adjacent to the left side of the peripheral area NAA, or in a plane, the second sensing lines RXL may be separately adjacent to the left and right sides of the peripheral area NAA. The second sensing lines RXL may extend from the right ends of the second sensing electrodes SE2 toward the third pad PD3, respectively.
[0158] The second sensing lines RXL may be electrically connected to the third pads PD3, respectively. The second sensing lines RXL may be provided at a different layer from the third pads PD3 and connected to the third pads PD3 through contact holes, or may have an integral shape with the third pads PD3.
[0159] The touch controller that controls the input sensing layer ISP may be electrically connected to the second pad PD2 and the third pad PD3 through a circuit board. The second pad PD2 and the third pad PD3 may be arranged along a second direction DR2. The second pad PD2 may be adjacent to the lower left end of the peripheral area NAA in a plane, and the third pad PD3 may be adjacent to the lower right end of the peripheral area NAA in a plane.
[0160] Display panel DP (see Figure 3 ) can be provided between the second pad PD2 and the third pad PD3. The second pad PD2 and the third pad PD3 can be provided substantially at the same layer as the first pad PD1. However, not limited thereto, according to an embodiment, the second pad PD2 and the third pad PD3 can be provided at a different layer from the first pad PD1. Figure 3 and Figure 5A The arrangement of the pads PD1 , PD2 , and PD3 shown in FIG. 1 is an example, and embodiments of the inventive concept are not limited thereto.
[0161] refer to 5A to 5D According to an embodiment, the input sensing layer ISP may include a plurality of conductive layers MTL1 and MTL2 and a plurality of sensing insulating layers TIL1, TIL2, and TIL3. The sensing insulating layers TIL1, TIL2, and TIL3 may include a first sensing insulating layer TIL1 (or a first insulating layer), a second sensing insulating layer TIL2 (or a second insulating layer), and a third sensing insulating layer TIL3 (or a third insulating layer). However, this is shown as an example, and the number of insulating layers constituting the sensing insulating layer is not limited thereto.
[0162] The first sensing insulating layer TIL1 may be directly disposed on the thin film encapsulation layer TFE. The first sensing insulating layer TIL1 may be directly disposed on the third thin film EN3 of the thin film encapsulation layer TFE. In an embodiment, the first sensing insulating layer TIL1 may be an inorganic layer including, for example, at least any one of silicon nitride, silicon oxynitride, and silicon oxide. In an embodiment, the first sensing insulating layer TIL1 may be an organic layer including, for example, an epoxy resin, an acrylic resin, or an imide resin. The first sensing insulating layer TIL1 may have a single-layer structure or a multi-layer structure in which layers are stacked along the third direction DR3.
[0163] The conductive layers MTL1 and MTL2 may include a first conductive layer MTL1 and a second conductive layer MTL2. The first conductive layer MTL1 may be disposed on the first sensing insulating layer TIL1 and may be covered by the second sensing insulating layer TIL2, and the second conductive layer MTL2 may be disposed on the second sensing insulating layer TIL2 and may be covered by the third sensing insulating layer TIL3. A portion of the second conductive layer MTL2 may be connected to the first conductive layer MTL1 via a contact hole formed in the second sensing insulating layer TIL2. Each of the conductive layers MTL1 and MTL2 may have a single-layer structure or a multi-layer structure in which layers are stacked along the third direction DR3.
[0164] The single-layer conductive layer may include a metal layer or a transparent conductive layer. The metal layer may include, for example, molybdenum, silver, titanium, copper, aluminum, or alloys thereof. The transparent conductive layer may include, for example, a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium zinc tin oxide (IZTO). The transparent conductive layer may include, for example, a conductive polymer such as PEDOT, metal nanowires, and / or graphene.
[0165] The multi-layer conductive layer may include a metal layer. The metal layer may have a three-layer structure of, for example, titanium / aluminum / titanium. The multi-layer conductive layer may include at least one metal layer and at least one transparent conductive layer.
[0166] Each of the first conductive layer MTL1 and the second conductive layer MTL2 may include a transparent conductive oxide and may have a metal mesh shape formed of an opaque conductive material. The first conductive layer MTL1 and the second conductive layer MTL2 may have various materials and various shapes, and the present invention is not limited to any one embodiment as long as the visibility of an image displayed by light generated by the display element layer OL is not reduced.
[0167] Components included in the first and second sensing electrodes SE1 and SE2 may be included in any one of the first and second conductive layers MTL1 and MTL2 .
[0168] According to the embodiment, Figure 5D As shown in FIG, the second sensing portion SP2 and the extension pattern EP of the second sensing electrode SE2 and the first sensing portion SP1 of the first sensing electrode SE1 may be provided in the same layer, and the connection pattern CP of the first sensing electrode SE1 may be provided in a different layer from the second sensing portion SP2 and the extension pattern EP of the second sensing electrode SE2 and the first sensing portion SP1 of the first sensing electrode SE1. In an embodiment, the second sensing electrode SE2 and the first sensing portion SP1 may be included in the second conductive layer MTL2, and the connection pattern CP may be included in the first conductive layer MTL1. The connection pattern CP may be connected to the first sensing portion SP1 through a contact hole T-CH formed in the second sensing insulating layer TIL2.
[0169] The first sensing line TXL and the second sensing line RXL may be included in at least any one of the first conductive layer MTL1 and the second conductive layer MTL2. For example, the first sensing line TXL and the second sensing line RXL may be provided as a layer included in only one of the first conductive layer MTL1 and the second conductive layer MTL2, or the first sensing line TXL and the second sensing line RXL may be provided as two layers included in both the first conductive layer MTL1 and the second conductive layer MTL2, and the present inventive concept is not limited to any one embodiment.
[0170] At least one of the second sensing insulating layer TIL2 and the third sensing insulating layer TIL3 may include an inorganic film, such as aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.
[0171] In an embodiment, at least one of the second sensing insulating layer TIL2 and the third sensing insulating layer TIL3 may include an organic film. The organic film may include, for example, at least any one of acrylic resin, methacrylic resin, polyisoprene resin, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin.
[0172] Figure 6 is an enlarged plan view of a portion of an input sensing layer ISP according to an embodiment of the inventive concept. Figure 6 A portion of the first sensing portion SP1 of the input sensing layer ISP is exemplarily shown. The description of the first sensing portion SP1 provided below can also be applied to the second sensing portion SP2 (see Figure 5A ).
[0173] refer to Figure 4A and Figure 6 , display device DD (see Figure 1) may include pixel areas PXA1, PXA2, and PXA3 and non-pixel areas NPXA adjacent thereto. In this specification, the pixel areas PXA1, PXA2, and PXA3 may be defined as areas where the display device DD (see FIG. Figure 1 ) when operating from the light emitting element OLED (see Figure 4D ) is emitted to the display device DD (see Figure 1 ) and is viewed by the user. The non-pixel area NPXA may be defined as the display area DA (see Figure 1 ) except the pixel areas PXA1, PXA2 and PXA3.
[0174] Pixel areas PXA1, PXA2, and PXA3 may be provided to correspond one-to-one with the light-emitting areas LA1, LA2, and LA3, and each of the pixel areas PXA1, PXA2, and PXA3 may be defined as at least a portion of the corresponding light-emitting area LA1, LA2, or LA3. According to an embodiment of the inventive concept, pixel areas PXA1, PXA2, and PXA3 may be defined to correspond to a portion of the light-emitting areas LA1, LA2, and LA3, or pixel areas PXA1, PXA2, and PXA3 may be defined to correspond to the same area as the light-emitting areas LA1, LA2, and LA3.
[0175] In an embodiment, the pixel areas PXA1, PXA2, and PXA3 may include first to third pixel areas PXA1, PXA2, and PXA3 according to the luminous color. The first to third pixel areas PXA1, PXA2, and PXA3 may be arranged to correspond to the first to third luminous areas LA1, LA2, and LA3, respectively. Each of the first to third pixel areas PXA1, PXA2, and PXA3 may be provided in plural numbers and may be arranged in a predetermined arrangement on a plane. The arrangement of the first to third pixel areas PXA1, PXA2, and PXA3 may substantially correspond to the arrangement of the first to third luminous areas LA1, LA2, and LA3. Figure 4A The description of the arrangement of the first to third light emitting areas LA1, LA2 and LA3 provided can be applied similarly to the arrangement of the first to third light emitting areas LA1, LA2 and LA3 according to the reference Figure 6 The arrangement of the first to third pixel areas PXA1 , PXA2 , and PXA3 of the embodiment is described.
[0176] The first sensing portion SP1 may include a mesh pattern MP. The mesh pattern MP may include a conductive material. The mesh pattern MP may include mesh lines MSL1 and MSL2. The mesh lines MSL1 and MSL2 may include a first mesh line MSL1 and a second mesh line MSL2. The first mesh line MSL1 and the second mesh line MSL2 may be connected to each other and may have an integral shape.
[0177] Each of the first grid lines MSL1 may extend along a first oblique direction DR4, and the first grid lines MSL1 may be arranged along a second oblique direction DR5. Each of the second grid lines MSL2 may extend along a second oblique direction DR5, and the second grid lines MSL2 may be arranged along the first oblique direction DR4. The second grid lines MSL2 may intersect the first grid lines MSL1 in a plane and may have a shape integral with the first grid lines MSL1.
[0178] The first and second mesh lines MSL1 and MSL2 may define an opening OP-M. The opening OP-M may be defined to be surrounded by the first and second mesh lines MSL1 and MSL2.
[0179] The opening OP-M may include a central opening OP-MC and a peripheral opening OP-MS. The central opening OP-MC may be defined as an opening among the openings OP-M that includes a portion overlapping at least one of the pixel areas PXA1, PXA2, and PXA3. The peripheral opening OP-MS may be defined as the remaining openings among the openings OP-M excluding the central opening OP-MC. In an embodiment, the peripheral opening OP-MS does not overlap with the pixel areas PXA1, PXA2, and PXA3, and overlaps with the non-pixel area NPXA.
[0180] The shape of the opening OP-M, the arrangement of the opening OP-M, and the arrangement relationship between the opening OP-M and the pixel areas PXA1, PXA2, and PXA3 may vary depending on the embodiment of the inventive concept. A detailed description of the opening OP-M according to an embodiment of the inventive concept will be provided below.
[0181] Figure 7A is with Figure 6 An enlarged plan view of the mesh pattern MP corresponding to area AA'. Figure 7B One light emitting region and one pixel region corresponding to each other according to an embodiment of the inventive concept are illustrated. Figure 7C According to the embodiment of the present invention, Figure 7A FIG. 5 is a cross-sectional view of the display module DM corresponding to line II-II′. Figure 7D : is an enlarged plan view of the mesh pattern MP showing a state where a pixel shrinkage phenomenon has occurred.
[0182] Figure 7A Is associated with a unit luminous area UA0 (see Figure 4A ) is an enlarged view of the corresponding area. Figure 7B The first light emitting area LA1 among the first to third light emitting areas LA1, LA2, and LA3 and the first pixel area PXA1 among the first to third pixel areas PXA1, PXA2, and PXA3 are representatively shown. Figure 6 and 7A to 7C , a portion of the mesh pattern MP according to the embodiment may overlap a portion of each of the light emitting areas LA1, LA2, and LA3 on a plane. The mesh pattern MP may cover a portion of each of the light emitting areas LA1, LA2, and LA3 on a plane. The mesh pattern MP may cover an outer portion of each of the light emitting areas LA1, LA2, and LA3 on a plane.
[0183] For example, each of the light-emitting areas LA1, LA2, and LA3 may include an outer portion, and the mesh pattern MP may cover at least a portion of the outer portion including the outer portion. The outer portion of each of the light-emitting areas LA1, LA2, and LA3 may include first to fourth sides LS1, LS2, LS3, and LS4. Each of the first side LS1 and the second side LS2 may extend in a first diagonal direction DR4, and the first side LS1 and the second side LS2 may be spaced apart from each other in a second diagonal direction DR5. Each of the third side LS3 and the fourth side LS4 may extend in a second diagonal direction DR5, and the third side LS3 and the fourth side LS4 may be spaced apart from each other in the first diagonal direction DR4. The mesh pattern MP may at least partially cover the first to fourth sides LS1, LS2, LS3, and LS4. In this specification, the expression "the mesh pattern covers the outer portion of the light-emitting area" or "the outer portion of the light-emitting area is covered by the mesh pattern" means that when the outer portion of the light-emitting area overlaps with the mesh pattern in a plan view, the outer portion of the light-emitting area is covered by the mesh pattern when viewed in a plan view.
[0184] In an embodiment, the mesh pattern MP may cover all of the first to fourth sides LS1, LS2, LS3, and LS4 of each of the light emitting areas LA1, LA2, and LA3. That is, the mesh pattern MP may include portions extending along four outer sides of each of the light emitting areas LA1, LA2, and LA3.
[0185] Each of the central openings OP-MC may be defined by a portion of the mesh pattern MP extending along four outer sides of the corresponding light-emitting area LA1, LA2, or LA3. Accordingly, each of the central openings OP-MC may overlap with the corresponding light-emitting area LA1, LA2, or LA3. Each of the central openings OP-MC may be arranged in a plane within the corresponding light-emitting area LA1, LA2, or LA3.
[0186] The central opening OP-MC may include first to third central openings OP1-MC, OP2-MC, and OP3-MC. The first central opening OP1-MC may overlap with the first light emitting area LA1, the second central opening OP2-MC may overlap with the second light emitting area LA2, and the third central opening OP3-MC may overlap with the third light emitting area LA3.
[0187] In an embodiment, pixel areas PXA1, PXA2, and PXA3 may be defined by a central opening OP-MC of a mesh pattern MP. Each of pixel areas PXA1, PXA2, and PXA3 may correspond to an area of the corresponding light-emitting area LA1, LA2, or LA3 that is exposed by the corresponding central opening OP-MC. That is, on a plane, each of pixel areas PXA1, PXA2, and PXA3 may correspond to an area of the corresponding light-emitting area LA1, LA2, or LA3 that overlaps with the central opening OP-MC. The first pixel area PXA1 may correspond to an area of the first light-emitting area LA1 that is exposed by the first central opening OP1-MC, the second pixel area PXA2 may correspond to an area of the second light-emitting area LA2 that is exposed by the second central opening OP2-MC, and the third pixel area PXA3 may correspond to an area of the third light-emitting area LA3 that is exposed by the third central opening OP3-MC.
[0188] like Figure 7A and Figure 7B As shown in FIG, on a plane, the outer side of each of the pixel areas PXA1, PXA2, and PXA3 may include first to fourth sides PS1, PS2, PS3, and PS4. Each of the first side PS1 and the second side PS2 may extend in a first oblique direction DR4, and the first side PS1 and the second side PS2 may be spaced apart from each other in a second oblique direction DR5. Each of the third side PS3 and the fourth side PS4 may extend in a second oblique direction DR5, and the third side PS3 and the fourth side PS4 may be spaced apart from each other in the first oblique direction DR4. In an embodiment, the first to fourth sides PS1, PS2, PS3, and PS4 of each of the pixel areas PXA1, PXA2, and PXA3 may be defined by one side of each of the grid lines MSL1 and MSL2. The first side PS1 and the second side PS2 of each of the pixel areas PXA1, PXA2, and PXA3 may be defined by a first grid line MSL1 facing each other. The third side PS3 and the fourth side PS4 of each of the pixel areas PXA1 , PXA2 , and PXA3 may be defined by the second mesh line MSL2 facing each other.
[0189] Figure 7C Schematically illustrates a cross section of the light emitting elements OLED1 and OLED2 configured to provide light to the first light emitting area LA1 and the second light emitting area LA2, respectively, and a mesh pattern MP disposed thereon. Figure 7CAs shown in FIG, a portion of the mesh pattern MP may be provided above the first electrode AE exposed by the light emitting opening PX_OP of the pixel defining film PDL. That is, a portion of the mesh pattern MP may overlap with the outer portion of each of the first electrodes AE exposed by the light emitting opening PX_OP. Each of the central openings OP-MC may overlap with the light emitting opening PX_OP defining the corresponding light emitting area LA1 or LA2. Light provided from the light emitting elements OLED1 and OLED2 and passing through the area exposed by the central opening OP-MC may be emitted to the display device DD (see FIG. Figure 1 ) and can be viewed by a user. Each of the pixel areas PXA1 and PXA2 may correspond to an opening area in a corresponding central opening OP-MC.
[0190] In an embodiment, the peripheral opening OP-MS may include a first peripheral opening OP1-MS and a second peripheral opening OP2-MS. Each of the peripheral openings OP-MS may completely overlap with the non-emission area NLA. Each of the peripheral openings OP-MS may completely overlap with the pixel definition film PDL.
[0191] The first peripheral openings OP1-MS may extend along the outer sides of adjacent central openings OP-MC (or the outer sides of the defined central openings OP-MC of the mesh pattern MP). Some of the first peripheral openings OP1-MS may extend along the first oblique direction DR4, and other first peripheral openings OP1-MS may extend along the second oblique direction DR5. In an embodiment, the central openings OP-MC and the first peripheral openings OP1-MS may be alternately arranged in each of the first oblique direction DR4 and the second oblique direction DR5.
[0192] In an embodiment, the second peripheral openings OP2-MS do not include a portion extending along the outer side of the central opening OP-MC and adjacent to the outer side of the central opening OP-MC. The second peripheral openings OP2-MS may be spaced apart from the adjacent central openings OP-MC in the first direction DR1 or the second direction DR2. The second peripheral openings OP2-MS may be disposed between the adjacent central openings OP-MC in the first direction DR1 or between the adjacent central openings OP-MC in the second direction DR2. In an embodiment, the second peripheral openings OP2-MS may be alternately arranged in the first oblique direction DR4 using the first peripheral openings OP1-MS extending along the first oblique direction DR4. In an embodiment, the second peripheral openings OP2-MS may be alternately arranged in the second oblique direction DR5 using the first peripheral openings OP1-MS extending along the second oblique direction DR5.
[0193] The peripheral openings OP-MS may be arranged to surround each of the central openings OP-MC. One central opening OP-MC may be surrounded by four first peripheral openings OP1-MS and four second peripheral openings OP2-MS.
[0194] Two second grid lines MSL2 may be repeatedly disposed between adjacent pixel areas PXA1, PXA2, and PXA3 in the first oblique direction DR4. Two first grid lines MSL1 may be repeatedly disposed between adjacent pixel areas PXA1, PXA2, and PXA3 in the second oblique direction DR5.
[0195] In an embodiment, a side of the grid lines MSL1 and MLS2 defining the peripheral opening OP-MS may include a portion substantially aligned with the outer sides of the emission areas LA1, LA2, and LA3. In a plane, a separation distance d from the outer sides of the emission areas LA1, LA2, and LA3 to the central opening OP-MC overlapping with the corresponding emission areas LA1, LA2, or LA3 may be substantially equal to the width w of the first grid line MSL1 or the second grid line MSL2. In other words, in a plane, a separation distance d from the outer sides of the emission areas LA1, LA2, and LA3 to the corresponding pixel areas PXA1, PXA2, and PXA3 may be substantially equal to the width w of the first grid line MSL1 or the second grid line MSL2.
[0196] refer to Figure 7D , with the display device DD (see Figure 1 ) over time, a pixel shrinkage phenomenon may occur. The pixel shrinkage phenomenon is a phenomenon in which an area that can normally emit light (eg, a light-emitting area) is reduced due to the penetration of moisture or unnecessary gas into the light-emitting element. Figure 7D The light emitting element OLED (see FIG. Figure 4D ) has occurred in the pixel shrinkage phenomenon, so compared with the initial time, the area of the above-mentioned one light-emitting area LA has been reduced. Figure 7A The pixel shrinkage phenomenon may occur in the first to third light emitting areas LA1, LA2, and LA3, and may be referred to as the initial light emitting area LA. The outer sides of the initial light emitting area LA (e.g., the first to fourth sides LS1, LS2, LS3, and LS4) are shown as dotted lines, and the outer sides LS1s, LS2s, LS3s, and LS4s of the light emitting area LAs where the pixel shrinkage phenomenon has occurred are shown as solid lines.
[0197] Although the outer sides LS1s, LS2s, LS3s, and LS4s of the reduced light-emitting area LAs due to the pixel shrinkage phenomenon move inward, the outer sides LS1s, LS2s, LS3s, and LS4s of the reduced light-emitting area LAs can be covered by the mesh pattern MP in a planar manner. Since the corresponding pixel area PXA is defined by one side of each of the grid lines MSL1 and MSL2, the area of the pixel area PXA can remain unchanged within the range where the outer sides LS1s, LS2s, LS3s, and LS4s of the reduced light-emitting area LAs are not exposed by the mesh pattern MP. Accordingly, a reduction in frontal brightness due to the pixel shrinkage phenomenon can be prevented or suppressed. On the other hand, when the pixel area PXA is defined to be the same as the light-emitting area LA, the pixel area PXA decreases in accordance with the extent of the reduction in the light-emitting area LA due to the pixel shrinkage phenomenon, and the brightness may decrease as the light-emitting area LA decreases.
[0198] The ratio of the area of the light-emitting area LA covered by the mesh pattern MP to the total area of the light-emitting area LA can be designed based on the predicted result of the area of the light-emitting area LA that is reduced when the pixel shrinkage phenomenon occurs. According to an embodiment of the inventive concept, due to the pixel shrinkage phenomenon, the first to third light-emitting areas LA1, LA2 and LA3 (see FIG. Figure 7A ) can be varied in the degree of area reduction, and the first to third light emitting areas LA1, LA2 and LA3 (see Figure 7A ) can be designed differently from each other in terms of the ratio of the area covered by the mesh pattern MP to the total area thereof. In this case, with respect to the first to third light emitting areas LA1, LA2 and LA3 (see Figure 7A ) from the outside of the light emitting area LA to the center opening OP-MC overlapping with the light emitting area LA (see Figure 7A ) can be set differently from each other. According to an embodiment of the inventive concept, the width w of the grid lines MSL1 and MSL2 (see Figure 7A ) can be used to cover the first to third light emitting areas LA1, LA2 and LA3 (see Figure 7A ) parts are set differently from each other.
[0199] Figure 8 is an enlarged plan view of a mesh pattern MP according to an embodiment of the inventive concept. Figure 8 Is associated with a unit luminous area UA0 (see Figure 4A ) is an enlarged view of the corresponding area. For ease of explanation, the light emitting areas LA1, LA2 and LA3 are shown together. The same / similar reference numerals are used to Figures 6 to 7C The components described are the same / similar components, and duplicate descriptions are omitted.
[0200] refer to Figure 8In this embodiment, the first to fourth sides LS1, LS2, LS3, and LS4 of each of the emission areas LA1, LA2, and LA3 may be spaced apart from one side of the grid lines MSL1 and MSL2 in a plane, without any portion substantially aligned with the one side of the grid lines MSL1 and MSL2. In a plane, a separation distance d from the outer side of the emission area LA1, LA2, or LA3 to the center opening OP-MC overlapping with the corresponding emission area LA1, LA2, or LA3 may be less than the width w of the first grid line MSL1 or the second grid line MSL2. In other words, in a plane, a separation distance d from the outer side of the emission area LA1, LA2, or LA3 to the corresponding pixel area PXA1, PXA2, or PXA3 may be less than the width w of the first grid line MSL1 or the second grid line MSL2.
[0201] Figure 9 is an enlarged plan view of a mesh pattern MP according to an embodiment of the inventive concept. Figure 9 1 is an enlarged view of an area corresponding to the first light emitting area LA1 and the second light emitting area LA2 adjacent to each other in the second oblique direction DR5.
[0202] refer to Figure 4B and Figure 9 , the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3 may have different areas. Figure 9 The first light emitting area LA1 and the second light emitting area LA2 having different areas among the first to third light emitting areas LA1, LA2, and LA3 are exemplarily shown.
[0203] The mesh pattern MP according to the embodiment may cover an outer portion of each of the first and second light emitting areas LA1 and LA2. The mesh pattern MP may cover all of the four outer sides (e.g., first to fourth sides LS1, LS2, LS3, and LS4) of each of the first and second light emitting areas LA1 and LA2. The same / similar reference numerals are used as in the reference numerals. Figures 6 to 8 The components described are the same / similar components, and duplicate descriptions are omitted.
[0204] In an embodiment, the second grid line MSL2 may include a bend portion BP. The second grid line MSL2 may generally extend along the second oblique direction DR5, but the second grid line MSL2 may include the bend portion BP to cover the outer portions of the light-emitting areas LA1 and LA2 having different areas. According to an embodiment of the present inventive concept, in order to cover the outer portions of each of the first and second light-emitting areas LA1 and LA2 having different areas, the second grid line MSL2 may include a bend portion BP between the first and second light-emitting areas LA1 and LA2, and may include a portion extending in a direction slightly different from the second oblique direction DR5 between the bend portions BP.
[0205] Figure 9 While the portion of the grid pattern MP covering the outer portions of the first and second light-emitting areas LA1 and LA2 adjacent to each other in the second oblique direction DR5 is exemplarily shown, the portion of the grid pattern MP covering the outer portions of the light-emitting areas adjacent to each other in the first oblique direction DR4 (e.g., the first and second light-emitting areas LA1 and LA2 or the second and third light-emitting areas LA2 and LA3) may be similar to the portion of the grid pattern MP covering the outer portions of the first and second light-emitting areas LA1 and LA2 adjacent to each other in the second oblique direction DR5. That is, the first grid line MSL1 may also generally extend along the first oblique direction DR4, but in order to cover the outer portions of each of the light-emitting areas having different areas, the first grid line MSL1 may include a bent portion. The first grid line MSL1 may include a portion extending in a direction slightly different from the first oblique direction DR4 between the bent portions.
[0206] In an embodiment, the first peripheral opening OP1-MS may at least partially have a quadrilateral shape with different inner angles in a plane. Figure 9 The first peripheral opening OP1-MS is exemplarily shown to have a trapezoidal shape in a plane, but embodiments of the inventive concept are not limited thereto. For example, according to an embodiment, the first peripheral opening OP1-MS may have an atypical quadrilateral shape with four different inner angles.
[0207] Figure 9 The bent portion BP is exemplarily shown as being located in the outer portion of the corresponding light emitting areas LA1 and LA2 on a plane, but the shape of the mesh pattern MP is not limited thereto. For example, the shape of the mesh pattern MP may be designed so that the bent portion BP is spaced apart from the light emitting areas LA1 and LA2 on a plane.
[0208] Figure 10A and Figure 10B is an enlarged plan view of a mesh pattern MP according to an embodiment of the inventive concept. Figure 10A and Figure 10B is with Figure 4A FIG1 is an enlarged view of an area corresponding to one unit light emitting area UA0 in FIG1 , and for the convenience of explanation, light emitting areas LA1, LA2 and LA3 are shown together. The same / similar reference numerals are used to refer to FIG1 . Figures 6 to 9 The components described are the same / similar components, and duplicate descriptions are omitted.
[0209] refer to Figure 10A , the mesh pattern MP according to the embodiment can cover all of the four outer sides of each of the emission areas LA1, LA2, and LA3. As a result, although the pixel shrinkage phenomenon may occur and the area of the emission areas LA1, LA2, and LA3 is reduced, the reduction of the front brightness can be prevented or suppressed.
[0210] In an embodiment, a cutting portion CT may be defined in at least any one of the first and second mesh lines MSL1 and MSL2 . The cutting portion CT may be formed by removing a portion of the mesh lines MSL1 and MSL2 . Figure 10A The mesh pattern MP in the first sensing portion SP1 is exemplarily shown, and the second sensing portion SP2 (see Figure 5A ) may also have a similar shape. The cutting portion CT may be limited to the first sensing portion SP1 or the second sensing portion SP2 (see Figure 5A ) inside. The cutting portion CT may be connected to the first sensing portion SP1 or the second sensing portion SP2 (see Figure 5A ) boundaries.
[0211] Some of the first grid lines MSL1 may include a plurality of portions spaced apart from each other in a first oblique direction DR4 by cut portions CT defined in the first grid lines MSL1. Some of the second grid lines MSL2 may include a plurality of portions spaced apart from each other in a second oblique direction DR5 by cut portions CT defined in the second grid lines MSL2.
[0212] The cutting portion CT may have a shape that is integral with adjacent openings OP-M among the openings OP-M. That is, the cutting portion CT may be connected to adjacent openings OP-M to form an integral space. In an embodiment, the cutting portion CT may be defined in a portion of the grid lines MSL1 and MSL2 that is adjacent to the peripheral openings OP-MS. Accordingly, the cutting portion CT may be connected to adjacent peripheral openings OP-MS to form an integral space.
[0213] For example, the cutting portion CT may be defined between the first and second peripheral openings OP1-MS and OP2-MS adjacent to each other among the grid lines MSL1 and MSL2. Accordingly, the cutting portion CT may be connected to the adjacent first and second peripheral openings OP1-MS and OP2-MS to form an integral space.
[0214] The cutout portion CT may be spaced apart from the central opening OP-MC. Accordingly, in this embodiment, the central opening OP-MC does not form a unified space by being connected to the adjacent peripheral openings OP-MS via the cutout portion CT. That is, in this embodiment, the central opening OP-MC is not opened by the cutout portion CT. Accordingly, each of the pixel areas PXA1, PXA2, and PXA3 may be completely surrounded by the grid lines MSL1 and MSL2 that define the central opening OP-MC.
[0215] The first sensing portion SP1 and the second sensing portion SP2 (see Figure 5A ) may have a relatively high light reflectivity, which may cause a problem of being visible to the user. According to an embodiment, since the cutting portion CT is defined in the first sensing portion SP1 or the second sensing portion SP2 (see Figure 5A ) in the mesh pattern MP inside, thus reducing the first sensing portion SP1 and the second sensing portion SP2 (see Figure 5A As the reflectivity increases in the region where the cutting portion CT is defined, the reflectivity may be reduced between the first sensing portion SP1 and the second sensing portion SP2 (see FIG. Figure 5A ) and the boundary between the first sensing portion SP1 or the second sensing portion SP2 (see Figure 5A )'s internal differences.
[0216] In addition, according to the embodiment, since the cutting portion CT is spaced apart from the central opening OP-MC so that the central opening OP-MC is not opened, it is possible to prevent the light emitting element OLED (see FIG. 1 ) from being irradiated. Figure 4D ) is transmitted to the adjacent other openings in the process of passing through the corresponding central opening OP-MC. Unlike this configuration, when the cut portion CT is defined as opening the central opening OP-MC, the light from the light emitting element OLED (see Figure 4D ) may reach other openings through the opened area within the central opening OP-MC. In this case, when adjacent central openings OP-MC are opened and connected, the lights passing through the central openings OP-MC may interfere with each other. In this case, since the lights reflected from the boundaries having a regularly repeated shape are repeatedly combined with each other, a moiré phenomenon may occur. On the other hand, according to the embodiment, it is possible to suppress the reflection of the light from each light emitting element OLED (see Figure 4D ) to prevent or reduce the Moire effect by transmitting light to other openings.
[0217] Therefore, according to the embodiment, it is possible to suppress or prevent the reduction of the front brightness due to the pixel shrinkage phenomenon, and at the same time, it is possible to provide a mesh pattern MP in which the moire phenomenon is reduced or prevented. Figure 2 ) of the display device DD (see Figure 1 ) can be provided with improved visibility.
[0218] Figure 10A The positions of the cutting portions CT formed in the grid lines MSL1 and MSL2 and the ... Figure 4A ) The number of cutting portions CT in the area corresponding to the center opening OP-MC. Within the range in which the center opening OP-MC is not opened, the positions where the cutting portions CT are formed and the number of the cutting portions CT may be variously set.
[0219] refer to Figure 10B , the mesh pattern MP according to the embodiment can cover all of the four outer sides of each of the emission areas LA1, LA2, and LA3. As a result, although the pixel shrinkage phenomenon may occur and the area of the emission areas LA1, LA2, and LA3 is reduced, the reduction of the front brightness can be prevented or suppressed.
[0220] In an embodiment, a boundary cutting portion CT-A may be defined in at least any one of the first and second mesh lines MSL1 and MSL2. The boundary cutting portion CT-A may be formed by removing a portion of the mesh lines MSL1 and MSL2. Figure 10B The mesh pattern MP of each of the first sensing portion SP1 and the second sensing portion SP2 is exemplarily shown, and a boundary cutting portion CT-A is not defined inside the first sensing portion SP1 and the second sensing portion SP2 but may be defined at a boundary between the first sensing portion SP1 and the second sensing portion SP2. The first sensing portion SP1 and the second sensing portion SP2 adjacent thereto may be spaced apart from each other and electrically insulated from each other, and the boundary cutting portion CT-A may be defined between the first sensing portion SP1 and the second sensing portion SP2 that are insulated from each other.
[0221] The boundary cutting portion CT-A may have the same shape as the above-mentioned cutting portion CT (see Figure 10A ) in the same shape. The boundary cutting portion CT-A may be defined in portions of the grid lines MSL1 and MSL2 adjacent to the peripheral opening OP-MS. Accordingly, the boundary cutting portion CT-A may be connected to the peripheral openings OP-MS adjacent to each other to form an integrated space.
[0222] The boundary cutting portion CT-A may be spaced apart from the central opening OP-MC. Accordingly, in an embodiment, the central opening OP-MC does not form an integral space by being connected to the adjacent peripheral opening OP-MS by means of the boundary cutting portion CT-A. That is, in an embodiment, the central opening OP-MC is not opened by the boundary cutting portion CT-A, and each of the pixel areas PXA1, PXA2, and PXA3 may be completely surrounded by the grid lines MSL1 and MSL2 defining the central opening OP-MC. As a result, the light emission from each light emitting element OLED (see Figure 4D ) provides transmission of light to other openings.
[0223] Figure 11A is an enlarged plan view of a mesh pattern MP- 1 according to an embodiment of the inventive concept. Figure 11B According to the embodiment of the present invention, Figure 11A FIG. 5 is a cross-sectional view of the display module DM corresponding to line III-III′. Figure 11A is with Figure 4A FIG1 is an enlarged view of an area corresponding to one unit light emitting area UA0 in FIG1 , and for the convenience of explanation, light emitting areas LA1, LA2 and LA3 are shown together. The same / similar reference numerals are used to refer to FIG1 . Figures 6 to 10B The components described are the same / similar components, and duplicate descriptions are omitted.
[0224] refer to Figure 11A and Figure 11B , according to the embodiment, the grid pattern MP-1 does not overlap with the light-emitting areas LA1, LA2, and LA3. That is, the grid pattern MP-1 does not cover the light-emitting areas LA1, LA2, and LA3 in a plane. The grid pattern MP-1 can completely overlap with the pixel definition film PDL. Each of the light-emitting areas LA1, LA2, and LA3 can be arranged inside the corresponding center opening OP-MC. Accordingly, the pixel areas PXA1, PXA2, and PXA3 can be defined as areas corresponding to the light-emitting areas LA1, LA2, and LA3. That is, each of the pixel areas PXA1, PXA2, and PXA3 in the embodiment can be defined as a portion of the first electrode AE exposed by the corresponding light-emitting opening PX_OP.
[0225] In the embodiment, in the first sensing portion SP1 (see Figure 5A ) or the second sensing portion SP2 (see Figure 5A ) inside, the cutting portion CT may be defined in at least any one of the first mesh line MSL1 and the second mesh line MSL2. As a result, the first sensing portion SP1 (see Figure 5A ) and the second sensing portion SP2 (see Figure 5A) is visible.
[0226] The cutting portion CT may be connected to the adjacent peripheral opening OP-MS to form an integral space. According to the embodiment, since the cutting portion CT is spaced apart from the central opening OP-MC, the central opening OP-MC is not opened by the cutting portion CT. As a result, the light emitting element OLED (see FIG. 1 ) may be prevented from being exposed to the light emitting element OLED. Figure 4D ) is transmitted to other adjacent openings during the process of passing through the corresponding central opening OP-MC, and the moire phenomenon can be prevented or reduced. Accordingly, the input sensing layer ISP (see Figure 2 ) of the display device DD (see Figure 1 ) can be provided with improved visibility.
[0227] Figure 12A is an enlarged plan view of a mesh pattern MPa according to an embodiment of the inventive concept. Figure 12B One light emitting region and one pixel region corresponding to each other according to an embodiment of the inventive concept are illustrated. Figure 12C According to the embodiment of the present invention, Figure 12A FIG. 5 is a cross-sectional view of the display module DM corresponding to line IV-IV′. Figure 12A is with Figure 4A This is an enlarged view of an area corresponding to one unit light emitting area UA0 , and for convenience of explanation, the light emitting areas LA1 , LA2 , and LA3 are shown together. Figure 12B The first light emitting area LA1 among the first to third light emitting areas LA1, LA2, and LA3 and the first pixel area PXA1 among the first to third pixel areas PXA1, PXA2, and PXA3 are representatively shown. Figures 6 to 9 The components described are the same / similar components, and duplicate descriptions are omitted.
[0228] refer to 12A to 12C In an embodiment, the mesh pattern MPa may cover two of the four outer sides of each of the light emitting areas LA1, LA2, and LA3. The first side LS1 or the second side LS2 may be covered by the first mesh line MSL1, and the third side LS3 or the fourth side LS4 may be covered by the second mesh line MSL2. Figure 12A It is exemplarily shown that the mesh pattern MPa covers the first side LS1 and the fourth side LS4 of each of the first to third light emitting areas LA1 , LA2 , and LA3 .
[0229] Each of the central openings OP-MCa may overlap a portion of the corresponding light-emitting area LA1, LA2, or LA3 and a portion of the non-light-emitting area NLA adjacent thereto. Each of the pixel areas PXA1, PXA2, and PXA3 may correspond to a region of the corresponding light-emitting area LA1, LA2, or LA3 that is exposed by the central opening OP-MCa. That is, each of the pixel areas PXA1, PXA2, and PXA3 may correspond to a region of the corresponding light-emitting area LA1, LA2, or LA3 that overlaps with the central opening OP-MCa.
[0230] Two outer sides (e.g., first side PS1 and fourth side PS4) of the four outer sides (e.g., first to fourth sides PS1, PS2, PS3, and PS4) of each of the pixel areas PXA1, PXA2, and PXA3 may be defined by one side of each of the first and second grid lines MSL1 and MSL2. One of the two outer sides (e.g., first side PS1) may be defined by one side of the first grid line MSL1, and the other of the two outer sides (e.g., fourth side PS4) may be defined by one side of the second grid line MSL2. Of the four outer sides (e.g., first to fourth sides PS1, PS2, PS3, and PS4), the remaining two outer sides (e.g., second side PS2 and third side PS3) are not covered by the mesh pattern MPa and may therefore be defined as portions of the outer sides (e.g., second side LS2 and third side LS3) of the corresponding light-emitting area LA1, LA2, or LA3 that are not covered by the mesh pattern MPa.
[0231] like Figure 12C As shown in FIG, in cross section, a portion of the mesh pattern MPa may be disposed to partially overlap only one side of the light emitting area LA1 or LA2 in the second oblique direction DR5. Figure 12C The cross section viewed in the first oblique direction DR4 is exemplarily shown, and even in the cross section viewed in the second oblique direction DR5, a portion of the mesh pattern MPa may be provided to overlap only one side portion of the light-emitting area LA1 or LA2 in the first oblique direction DR4. Light provided from one side portion of the light-emitting area LA1 or LA2 may be blocked by the mesh pattern MPa. Light provided from the light-emitting elements OLED1 and OLED2 and passing through the area exposed by the central opening OP-MCa may be emitted to the display device DD (see FIG. 1 ). Figure 1 ) so that it can be viewed by users.
[0232] In an embodiment, one second grid line MSL2 may be disposed between adjacent pixel areas PXA1, PXA2, and PXA3 in the first oblique direction DR4, and one first grid line MSL1 may be disposed between adjacent pixel areas PXA1, PXA2, and PXA3 in the second oblique direction DR5.
[0233] Figure 12A In the example, the separation distance d from the outer side of the light-emitting area LA1, LA2, or LA3 covered by the mesh pattern MPa to the central opening OP-MCa overlapping with the corresponding light-emitting area LA1, LA2, or LA3 is shown to be substantially equal to the width w of the first grid line MSL1 or the second grid line MSL2. However, without limitation thereto, the separation distance d from the outer side of the light-emitting area LA1, LA2, or LA3 covered by the mesh pattern MPa to the central opening OP-MCa overlapping with the corresponding light-emitting area LA1, LA2, or LA3 may be less than the width w of the first grid line MSL1 or the second grid line MSL2.
[0234] Although the luminous area LAs is reduced due to the pixel shrinkage phenomenon (see Figure 7D ) of the outer LS1s, LS2s, LS3s, and LS4s (see Figure 7D ) moves inward, but the reduced luminous area LAs (see Figure 7D ) of the outer LS1s, LS2s, LS3s, and LS4s (see Figure 7D ) can be covered by the mesh pattern MPa on a plane. Therefore, the ratio of the pixel area reduction can be reduced compared to the ratio of the light-emitting area reduction due to the pixel shrinkage phenomenon. In other words, the degree of reduction in frontal brightness due to the pixel shrinkage phenomenon can be relatively suppressed.
[0235] Figure 12D is an enlarged plan view of a mesh pattern MPa according to an embodiment of the inventive concept. Figure 12D is with Figure 4A FIG1 is an enlarged view of an area corresponding to one unit light emitting area UA0 in FIG1 , and for the convenience of explanation, light emitting areas LA1, LA2 and LA3 are shown together. The same / similar reference numerals are used to refer to FIG1 . 12A to 12C The components described are the same / similar components, and duplicate descriptions are omitted.
[0236] In embodiments, the two outer sides of the light-emitting areas LA1, LA2, and LA3 covered by the grid pattern MPa can be selected in different combinations. For example, a portion of the first side LS1 and the fourth side LS4 of the light-emitting areas LA1, LA2, and LA3 can be covered by the grid pattern MPa, and the remaining portions of the light-emitting areas LA1, LA2, and LA3 on the first side LS1 and the third side LS3 can be covered by the grid pattern MPa. Accordingly, the two outer sides of the outer sides of the pixel areas PXA1, PXA2, and PXA3 defined by one side of each of the grid lines MSL1 and MSL2 can also be selected in different combinations. For example, in a portion of the pixel areas PXA1, PXA2, and PXA3, the first side PS1 and the fourth side PS4 can be defined by one side of each of the grid lines MSL1 and MSL2, and in the remaining portions of the pixel areas PXA1, PXA2, and PXA3, the first side PS1 and the third side PS3 can be defined by one side of each of the grid lines MSL1 and MSL2.
[0237] In an embodiment, at least some of the central opening OP-MCa may overlap with some of the plurality of light-emitting areas LA1, LA2, and LA3 and a portion of the non-light-emitting area NLA adjacent thereto. Accordingly, the plurality of pixel areas PXA1, PXA2, and PXA3 may be arranged in one central opening OP-MCa on a plane. Figure 12D In the example, the central opening OP-MCa is shown to overlap with a portion of two light-emitting areas (e.g., the first and second light-emitting areas LA1 and LA2, or the second and third light-emitting areas LA2 and LA3) spaced apart from each other in the first oblique direction DR4. Accordingly, two pixel areas (e.g., the first and second pixel areas PXA1 and PXA2, or the second and third pixel areas PXA2 and PXA3) spaced apart from each other in the first oblique direction DR4 can be disposed within one central opening OP-MCa.
[0238] However, not limited to this, the number of light-emitting areas overlapping with one central opening OP-MCa among the light-emitting areas LA1, LA2 and LA3 may be greater, and accordingly, the number of pixel areas set within one central opening OP-MCa among the pixel areas PXA1, PXA2 and PXA3 may also be greater.
[0239] Between pixel areas adjacent in the first oblique direction DR4 among pixel areas PXA1, PXA2, and PXA3, one second grid line MSL2 may be provided, or no second grid line MSL2 may be provided, depending on the location. That is, the number of grid lines MSL1 and MSL2 provided between adjacent pixel areas among pixel areas PXA1, PXA2, and PXA3 may vary depending on the location. According to an embodiment of the present inventive concept, in another portion not shown, two first grid lines MSL1 or two second grid lines MSL2 may be provided between adjacent pixel areas among pixel areas PXA1, PXA2, and PXA3.
[0240] 13A to 13D : is an enlarged plan view of a mesh pattern MPb according to an embodiment of the present inventive concept. For ease of explanation, Figure 13B Focusing on the first light emitting area LA1 and the first pixel area PXA1, Figure 13C Focused on the second light emitting area LA2 and the second pixel area PXA2, and Figure 13D Concentrated on the third light emitting area LA3 and the third pixel area PXA3.
[0241] refer to Figure 4A and 13A to 13D , display device DD (see Figure 1 ) may include first to third pixel areas PXA1, PXA2, and PXA3. The arrangement of the first to third pixel areas PXA1, PXA2, and PXA3 may substantially correspond to the arrangement of the first to third light emitting areas LA1, LA2, and LA3. Figure 4A The description of the arrangement of the first to third light emitting areas LA1, LA2 and LA3 provided can be applied similarly to the arrangement of the first to third light emitting areas LA1, LA2 and LA3 according to the reference 13A to 13D The arrangement of the first to third pixel areas PXA1 , PXA2 , and PXA3 of the embodiment is described.
[0242] The mesh pattern MPb may include mesh lines MSL1 and MSL2 defining a central opening OP-MCb and peripheral openings OP-MSb. In an embodiment, the central opening OP-MCb may include both an opening overlapping one light-emitting area LA1, LA2, or LA3 and an opening overlapping multiple light-emitting areas among the light-emitting areas LA1, LA2, and LA3. The central opening OP-MCb may include openings having different areas and / or shapes. Figure 13AIt is exemplarily shown that the central opening OP-MCb includes an opening overlapping with two light-emitting areas among the light-emitting areas LA1, LA2 and LA3, an opening overlapping with one light-emitting area among the light-emitting areas LA1, LA2 and LA3, and an opening overlapping with four light-emitting areas among the light-emitting areas LA1, LA2 and LA3, and the number of multiple light-emitting areas among the light-emitting areas LA1, LA2 and LA3 overlapping with the central opening OP-MCb is not limited thereto.
[0243] The peripheral openings OP-MSb may include a first peripheral opening OP1-MSb and a second peripheral opening OP2-MSb. The first peripheral opening OP1-MSb may extend along the outer sides of adjacent central openings OP-MCb. The first peripheral opening OP1-MSb may be disposed between two adjacent central openings OP-MCb in the first oblique direction DR4, or between two adjacent central openings OP-MCb in the second oblique direction DR5. The first peripheral openings OP1-MSb may also include openings having different areas and / or shapes.
[0244] The second peripheral openings OP2-MSb may be spaced apart from adjacent central openings OP-MCb in the first direction DR1 or the second direction DR2. The second peripheral openings OP2-MSb may be disposed between adjacent central openings OP-MCb in the first direction DR1 or between adjacent central openings OP-MCb in the second direction DR2. Furthermore, the second peripheral openings OP2-MSb may be disposed between adjacent first peripheral openings OP1-MSb in the first oblique direction DR4 or between adjacent first peripheral openings OP1-MSb in the second oblique direction DR5.
[0245] As referenced above Figure 7A Compared to the embodiment described in which the central opening OP-MC and the first peripheral opening OP1-MS are alternately arranged in each of the first oblique direction DR4 and the second oblique direction DR5, in the embodiment described here, only the predetermined central opening OP-MCb can be continuously arranged in the first oblique direction DR4 or the second oblique direction DR5.
[0246] In an embodiment, the mesh pattern MPb may cover two of four outer sides of each of the light emitting areas LA1 , LA2 , and LA3 . 13A to 13D The shape of the mesh pattern MPb that can reduce the viewing angle deviation is exemplarily shown.
[0247] First, if Figure 13BAs shown in FIG, the first light-emitting area LA1 may include four groups G11, G12, G13, and G14. The first side LS1 and the fourth side LS4 of the first light-emitting area LA1 of the first group G11 may be covered by the mesh pattern MPb, and the first side LS1 and the third side LS3 of the first light-emitting area LA1 of the second group G12 may be covered by the mesh pattern MPb. The second side LS2 and the fourth side LS4 of the first light-emitting area LA1 of the third group G13 may be covered by the mesh pattern MPb, and the second side LS2 and the third side LS3 of the first light-emitting area LA1 of the fourth group G14 may be covered by the mesh pattern MPb.
[0248] Figure 13B The unit light emitting areas UA0 (see FIG. Figure 4A ). For example, the first light-emitting areas LA1 of the first to fourth rows R11 to R14 and the first to fourth columns C11 to C14 are shown. The first light-emitting areas LA1 of each of the first to fourth rows R11 to R14 may be arranged along a first oblique direction DR4, and the first light-emitting areas LA1 of each of the first to fourth columns C11 to C14 may be arranged along a second oblique direction DR5.
[0249] According to an embodiment of the inventive concept, in each of the first row R11 and the third row R13, the first light-emitting areas LA1 of the third group G13 and the first light-emitting areas LA1 of the fourth group G14 may be alternately arranged along the first oblique direction DR4. In each of the second row R12 and the fourth row R14, the first light-emitting areas LA1 of the first group G11 and the first light-emitting areas LA1 of the second group G12 may be alternately arranged along the first oblique direction DR4.
[0250] According to an embodiment of the inventive concept, in each of the first column C11 and the third column C13, the first light-emitting areas LA1 of the first group G11 and the first light-emitting areas LA1 of the third group G13 may be alternately arranged along the second oblique direction DR5. In each of the second column C12 and the fourth column C14, the first light-emitting areas LA1 of the second group G12 and the first light-emitting areas LA1 of the fourth group G14 may be alternately arranged along the second oblique direction DR5.
[0251] Accordingly, the first light emitting areas LA1 of the first to fourth groups G11 to G14 may be uniformly arranged within a predetermined unit area.
[0252] Figure 13BThe two groups of first light-emitting areas LA1 are exemplarily shown as being arranged alternately one-to-one in each row and column. However, embodiments of the present inventive concept are not limited thereto. For example, the two groups of first light-emitting areas LA1 may be arranged alternately in a row or column, or three or four groups of first light-emitting areas LA1 may be arranged alternately in a row or column.
[0253] According to embodiments of the present invention, as long as the first light-emitting areas LA1 of the first to fourth groups G11 to G14 can be arranged to have the same number within a predetermined unit area, they may not be arranged to have a predetermined regularity in rows or columns or to be arranged alternately in rows or columns according to a predetermined regularity, or they may be arranged randomly. The predetermined unit area may refer to a unit area that can be uniformly arranged to reduce viewing angle deviation and may be set differently depending on the product to be applied, taking into account the arrangement form and resolution of the unit light-emitting areas, the area ratio of the area covered by the grid pattern, and the like. For example, the predetermined unit area may be set based on an area in which m rows and n columns of unit light-emitting areas are arranged, where each of m and n is a positive integer. However, embodiments of the present invention are not limited thereto.
[0254] like Figure 13C As shown in FIG, the second light-emitting area LA2 may include four groups G21, G22, G23, and G24. The first side LS1 and the fourth side LS4 of the second light-emitting area LA2 of the first group G21 may be covered by the mesh pattern MPb, and the first side LS1 and the third side LS3 of the second light-emitting area LA2 of the second group G22 may be covered by the mesh pattern MPb. The second side LS2 and the fourth side LS4 of the second light-emitting area LA2 of the third group G23 may be covered by the mesh pattern MPb, and the second side LS2 and the third side LS3 of the second light-emitting area LA2 of the fourth group G24 may be covered by the mesh pattern MPb.
[0255] Figure 13C The unit light emitting areas UA0 (see FIG. Figure 4A), and the second light-emitting areas LA2 of the 1-1 row R21a to the 4-2 row R24b and the 1-1 column C21a to the 4-2 column C24b are shown. The second light-emitting areas LA2 of the 1-1 row R21a, the 2-1 row R22a, the 3-1 row R23a, and the 4-1 row R24a and the 1-1 column C21a, the 2-1 column C22a, the 3-1 column C23a, and the 4-1 column C24a can be arranged along the first oblique direction DR4 and the second oblique direction DR5. The second light emitting areas LA2 of the 1-2 row R21b, the 2-2 row R22b, the 3-2 row R23b, and the 4-2 row R24b and the 1-2 column C21b, the 2-2 column C22b, the 3-2 column C23b, and the 4-2 column C24b may be arranged along the first oblique direction DR4 and the second oblique direction DR5. The second light emitting areas LA2 of adjacent rows (e.g., the 1-1 row R21a and the 1-2 row R21b) and adjacent columns (e.g., the 1-1 column C21a and the 1-2 column C21b) may be arranged to be staggered with each other.
[0256] In an embodiment, in each of the 1-1 row R21a and the 3-1 row R23a, and the 2-2 row R22b and the 4-2 row R24b, the second light-emitting areas LA2 of the first group G21 and the second light-emitting areas LA2 of the second group G22 may be alternately arranged. In each of the 2-1 row R22a and the 4-1 row R24a, and the 1-2 row R21b and the 3-2 row R23b, the second light-emitting areas LA2 of the third group G23 and the second light-emitting areas LA2 of the fourth group G24 may be alternately arranged.
[0257] In an embodiment, in each of the 1-1 column C21a and the 3-1 column C23a and the 1-2 column C21b and the 3-2 column C23b, the second light-emitting area LA2 of the first group G21 and the second light-emitting area LA2 of the third group G23 may be alternately arranged, and in each of the 2-1 column C22a and the 4-1 column C24a and the 2-2 column C22b and the 4-2 column C24b, the second light-emitting area LA2 of the second group G22 and the second light-emitting area LA2 of the fourth group G24 may be alternately arranged.
[0258] Accordingly, the second light emitting areas LA2 of the first to fourth groups G21 to G24 may be uniformly arranged within a predetermined unit area.
[0259] exist Figure 13C In the embodiment, the two groups of second light-emitting areas LA2 are arranged alternately one by one in each row and column. However, the embodiments of the present inventive concept are not limited thereto. For example, the two groups of second light-emitting areas LA2 may be arranged alternately in a row or column, or three or four groups of second light-emitting areas LA2 may be arranged alternately in a row or column.
[0260] According to an embodiment of the present invention, as long as the second light-emitting areas LA2 of the first group G21 to the fourth group G24 can be set to have the same number as each other within a predetermined unit area, they may not be arranged to have a predetermined rule in rows or columns or may not be arranged alternately according to a predetermined rule in rows or columns, or may be arranged randomly.
[0261] like Figure 13D As shown in FIG, the third light-emitting area LA3 may include four groups G31, G32, G33, and G34. The first side LS1 and the fourth side LS4 of the third light-emitting area LA3 of the first group G31 may be covered by the mesh pattern MPb, and the first side LS1 and the third side LS3 of the third light-emitting area LA3 of the second group G32 may be covered by the mesh pattern MPb. The second side LS2 and the fourth side LS4 of the third light-emitting area LA3 of the third group G33 may be covered by the mesh pattern MPb, and the second side LS2 and the third side LS3 of the third light-emitting area LA3 of the fourth group G34 may be covered by the mesh pattern MPb.
[0262] Figure 13D The unit light emitting areas UA0 (see FIG. Figure 4A ) and the third light-emitting areas LA3 of the first to fourth rows R31 to R34 and the first to fourth columns C31 to C34 are shown. The third light-emitting areas LA3 of each of the first to fourth rows R31 to R34 may be arranged along a first oblique direction DR4, and the third light-emitting areas LA3 of each of the first to fourth columns C31 to C34 may be arranged along a second oblique direction DR5.
[0263] According to an embodiment of the inventive concept, in each of the first row R31 and the third row R33, the third light-emitting areas LA3 of the first group G31 and the third light-emitting areas LA3 of the second group G32 may be alternately arranged along the first oblique direction DR4. In each of the second row R32 and the fourth row R34, the third light-emitting areas LA3 of the third group G33 and the third light-emitting areas LA3 of the fourth group G34 may be alternately arranged along the first oblique direction DR4.
[0264] According to an embodiment of the inventive concept, in each of the first column C31 and the third column C33, the third light-emitting areas LA3 of the first group G31 and the third light-emitting areas LA3 of the third group G33 may be alternately arranged along the second oblique direction DR5. In each of the second column C32 and the fourth column C34, the third light-emitting areas LA3 of the second group G32 and the third light-emitting areas LA3 of the fourth group G34 may be alternately arranged along the second oblique direction DR5.
[0265] Accordingly, the third light emitting areas LA3 of the first to fourth groups G31 to G34 may be uniformly arranged within a predetermined unit area.
[0266] Figure 13D In the exemplary embodiment, two groups of third light-emitting areas LA3 are arranged alternately one by one in each row and column. However, embodiments of the present inventive concept are not limited thereto. For example, two groups of third light-emitting areas LA3 may be arranged alternately in a row or column, or three or four groups of third light-emitting areas LA3 may be arranged alternately in a row or column.
[0267] According to an embodiment of the present invention, as long as the third light-emitting areas LA3 of the first group G31 to the fourth group G34 can be set to have the same number as each other within a predetermined unit area, they may not be arranged to have a predetermined rule in rows or columns or may not be arranged alternately according to a predetermined rule in rows or columns, or may be arranged randomly.
[0268] according to 13A to 13D In an embodiment, based on a center line extending along the first direction DR1 or the second direction DR2, the grid pattern MPb may cover one side of the light-emitting areas LA1, LA2 and LA3, but not the other side of the light-emitting areas LA1, LA2 and LA3. In this case, the viewing angle of one side of the light-emitting areas LA1, LA2 and LA3 may be different from the viewing angle of the other side of the light-emitting areas LA1, LA2 and LA3. According to an embodiment, the two sides covered by the grid pattern MPb among the first to fourth sides LS1, LS2, LS3 and LS4 of the light-emitting areas LA1, LA2 and LA3 may be equally selected and uniformly distributed within a predetermined unit area. Accordingly, within a predetermined unit area, based on the center line extending in the first direction DR1, the viewing angle deviation relative to one side and the other side of the second direction DR2 may be reduced, and based on the center line extending in the second direction DR2, the viewing angle deviation relative to one side and the other side of the first direction DR1 may be reduced. Accordingly, a method including an input sensing layer ISP (see Figure 2 ) and has a small difference in visibility depending on the viewing angle (see Figure 1 ).
[0269] Figure 14 : is an enlarged plan view of a mesh pattern MPb according to an embodiment of the present inventive concept. For ease of explanation, Figure 14 The light emitting areas LA1, LA2 and LA3 are shown together. The same / similar reference numerals are used to Figures 6 to 13D The components described are the same / similar components, and duplicate descriptions are omitted.
[0270] See also Figure 14According to an embodiment, the mesh pattern MPb may cover two of the four outer sides of each of the emission areas LA1, LA2, and LA3. As a result, although a pixel shrinkage phenomenon may occur and the area of the emission areas LA1, LA2, and LA3 may decrease, a reduction in front brightness may be prevented or suppressed.
[0271] In an embodiment, the cutting portion CT may be defined in at least any one of the first and second mesh lines MSL1 and MSL2. The cutting portion CT may be defined in the first sensing portion SP1 (see Figure 5A ) or the second sensing portion SP2 (see Figure 5A As a result, the first sensing portion SP1 (see Figure 5A ) and the second sensing portion SP2 (see Figure 5A ) is observed.
[0272] The cutting portion CT can connect adjacent peripheral openings OP-MSb to form a unified space. For example, the cutting portion CT can be defined between adjacent first peripheral openings OP1-MSb or between adjacent first peripheral openings OP1-MSb and second peripheral openings OP2-MSb on grid lines MSL1 and MSL2. Accordingly, the cutting portion CT can connect adjacent first peripheral openings OP1-MSb and second peripheral openings OP2-MSb to form a unified space.
[0273] The cutting portion CT may be spaced apart from the central opening OP-MCb. Accordingly, in the embodiment, the central opening OP-MCb does not form an integral space by being connected to the adjacent peripheral opening OP-MSb by means of the cutting portion CT. That is, the central opening OP-MCb is not opened by the cutting portion CT. As a result, the light emitting element OLED (see Figure 4D ) is transmitted to other adjacent openings during the process of passing through the corresponding central opening OP-MCb, and the moire phenomenon can be prevented or reduced. Accordingly, the input sensing layer ISP (see Figure 2 ) of the display device DD (see Figure 1 ) can be provided with improved visibility.
[0274] Figure 14 The positions where the cutting portions CT are formed within the grid lines MSL1 and MSL2 and the number of the cutting portions CT formed within the predetermined area are exemplarily shown. Within the range where the central opening OP-MCb is not opened, the positions where the cutting portions CT are formed and the number of the cutting portions CT may be set differently.
[0275] Figure 14It is exemplarily shown that the cutting portion CT is defined in at least some of the grid lines MSL1 and MSL2, but as mentioned above with reference to Figure 10B As described, in the first sensing portion SP1 (see Figure 10B ) and the second sensing portion SP2 (see Figure 10B ) boundary, the boundary cutting part CT-A (see Figure 10B ) may be defined in at least some of the grid lines MSL1 and MSL2. Figure 10B ) may have substantially the same shape as that of the above-described cutting portion CT. According to an embodiment, the boundary cutting portion CT-A (see Figure 10B ) may be spaced apart from the center opening OP-MCb, and therefore, the center opening OP-MCb does not pass through the boundary cutting portion CT-A (see Figure 10B )Open.
[0276] Figure 15 1 is an enlarged plan view of a mesh pattern MP' according to an embodiment of the present invention. Figure 15 The light emitting areas LA1 ', LA2' and LA3' are shown together. The same / similar reference numerals are used to Figures 6 to 14 The components described are the same / similar components, and duplicate descriptions are omitted.
[0277] refer to Figure 4C and Figure 15 , the unit light emitting area UA according to the embodiment may include a first unit light emitting area UA1 and a second unit light emitting area UA2. Figure 15 The arrangement of the first to third light emitting areas LA1', LA2' and LA3' shown in FIG. Figure 4C The arrangements of the first to third light emitting areas LA1, LA2 and LA3 are the same, so further detailed description thereof is omitted.
[0278] In an embodiment, the mesh pattern MP' may cover the outer portion of each of the light-emitting areas LA1', LA2', and LA3'. The mesh pattern MP' may cover all of the four outer sides of each of the light-emitting areas LA1', LA2', and LA3'. As a result, although a pixel shrinkage phenomenon may occur and the area of the light-emitting areas LA1', LA2', and LA3' may decrease, a reduction in front brightness may be prevented or suppressed.
[0279] The mesh pattern MP' may include first, second, and third mesh lines MSL1', MSL2', and MSL3'. The first, second, and third mesh lines MSL1', MSL2', and MSL3' may be connected to each other to have a unified shape.
[0280] Each of the first grid lines MSL1' may extend along the first direction DR1 and may be arranged in the second direction DR2. Each of the second grid lines MSL2' may extend along the second direction DR2 and may be arranged in the first direction DR1. The second grid lines MSL2' may intersect with the first grid lines MSL1' on a plane and may have an integral shape.
[0281] Some of the second grid lines MSL2' may include a cut portion so as not to intersect with the central portion of the third light emitting area LA3' in a plane. In an embodiment, some of the second grid lines MSL2' may extend discontinuously along the second direction DR2 and may include sub-grid lines MSL2s arranged along the second direction DR2. Each of the sub-grid lines MSL2s may extend along the second direction DR2.
[0282] In an embodiment, the grid lines MSL1', MSL2', and MSL3' may further include a third grid line MSL3'. The third grid line MSL3' may overlap the third light-emitting area LA3'. The third grid line MSL3' may correspond to a cut portion of the discontinuously extending second grid line MSL2', be offset in the first direction DR1, and overlap the outer portion of the third light-emitting area LA3'.
[0283] The mesh pattern MP' may include openings OP-M' defined by first, second, and third mesh lines MSL1', MSL2', and MSL3'. The openings OP-M' may include central openings OP-MC' and peripheral openings OP-MS'.
[0284] Each of the central openings OP-MC' may overlap with the corresponding light-emitting area LA1', LA2', or LA3'. Each of the central openings OP-MC' may be arranged in the corresponding light-emitting area LA1', LA2', or LA3' on a plane. Each of the pixel areas PXA1', PXA2', and PXA3' may correspond to an area of the corresponding light-emitting area LA1', LA2', or LA3' that is exposed by the corresponding central opening OP-MC'. The central openings OP-MC' may include first to third central openings OP1-MC', OP2-MC', and OP3-MC' that overlap with the first to third light-emitting areas LA1', LA2', and LA3', respectively.
[0285] The peripheral openings OP-MS' may include first peripheral openings OP1-MS' and second peripheral openings OP2-MS'. The first peripheral openings OP1-MS' may extend in one direction along the outer sides of the adjacent central openings OP-MC' (or along the outer sides of the defined central openings OP-MC' of the mesh pattern MP'). Some of the first peripheral openings OP1-MS' may extend along the first direction DR1, and the other first peripheral openings OP1-MS' may extend along the second direction DR2.
[0286] According to an embodiment, the second peripheral opening OP2-MS' does not include a portion adjacent to and extending along the outer side of the central opening OP-MC'. The second peripheral opening OP2-MS' may include a 2-1st peripheral opening OP2-MS1' and a 2-2nd peripheral opening OP2-MS2'.
[0287] The 2-1st peripheral opening OP2-MS1′ may be spaced apart from the adjacent central opening OP-MC′ in the first oblique direction DR4 or the second oblique direction DR5. Each of the first to third central openings OP1-MC′, OP2-MC′, and OP3-MC′ may be surrounded by the first peripheral opening OP1-MS′ and the 2-1st peripheral opening OP2-MS1′.
[0288] One first peripheral opening OP1-MS' may be provided between the third light emitting areas LA3' included in one light emitting area pair UP. Between adjacent light emitting area pairs UP, two first peripheral openings OP1-MS' spaced apart from each other in the first direction DR1 and a 2-2nd peripheral opening OP2-MS2' provided between the two first peripheral openings OP1-MS' may be provided.
[0289] The shape and arrangement of the peripheral opening OP-MS' are not limited to the following: Figure 15 For example, one first peripheral opening OP1-MS' may extend along the entire side of the third central opening OP3-MC' extending in the first direction DR1. In an embodiment, only one first peripheral opening OP1-MS' may be included between adjacent pairs of light-emitting areas UP, and the 2nd-2nd peripheral opening OP2-MS2' may be omitted.
[0290] The mesh pattern MP' may be designed differently to suit the arrangement shape of the unit light emitting areas UA. For example, the mesh lines MSL1' and MSL2' forming an integral shape may be designed differently to cover the outer portions of the light emitting areas LA1', LA2', and LA3'.
[0291] Reference above Figures 8 to 14 The described embodiments can be similarly applied to Figure 15 That is, the mesh pattern MP' may cover only two of the four outer sides of the light emitting areas LA1', LA2', and LA3', or the cutting portion CT may be defined in the mesh lines MSL1' and MSL2'.
[0292] According to embodiments of the present invention, the grid pattern of the input sensing layer included in a display device can cover a portion of the outer portion of each light-emitting area in a planar surface. Accordingly, while pixel shrinkage may occur, a reduction in frontal brightness can be prevented or suppressed. According to embodiments of the present invention, a grid pattern can be provided that prevents or suppresses a reduction in frontal brightness while also preventing or suppressing viewing angle deviation.
[0293] According to an embodiment of the present inventive concept, an input sensing layer included in a display device may include a grid pattern having cutout portions defined therein. Because the positions of the cutout portions of the grid pattern are designed with consideration given to the positions of the light-emitting areas, defects such as partial areas of the grid pattern being visible from outside the display device can be prevented or suppressed. As a result, the visibility of a display device including an input sensing layer including a grid pattern can be improved.
[0294] According to the tradition of the field of the present invention, the embodiment is described with functional blocks, units and / or modules and shown in the accompanying drawings. It will be understood by those skilled in the art that these blocks, units and / or modules are physically implemented by electronic (or optical) circuits (such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wiring connections, etc.) that can be formed using semiconductor-based manufacturing technology or other manufacturing technology. In the case where blocks, units and / or modules are implemented by microprocessors or similar parts, these blocks, units and / or modules can be programmed using software (e.g., microcode) to perform the various functions discussed in this article, and can optionally be driven by firmware and / or software. Alternatively, each block, unit and / or module can be implemented by dedicated hardware, or can be implemented as a combination of dedicated hardware for performing some functions and a processor (e.g., one or more programmed microprocessors and associated circuits) for performing other functions.
[0295] While the inventive concept has been particularly shown and described with reference to embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the inventive concept as defined by the claims.
Claims
1. A display device comprising: A display panel having a plurality of light-emitting areas and a non-light-emitting area, and comprising a display element layer and an encapsulation layer provided on the display element layer; as well as an input sensing layer, comprising a first insulating layer directly disposed on the encapsulation layer and a plurality of sensing electrodes disposed on the first insulating layer; wherein each of the plurality of sensing electrodes comprises a grid pattern having a plurality of openings, the plurality of openings being defined in the grid pattern, and Wherein, on a plane, a portion of the grid pattern overlaps with a portion of each of the plurality of light-emitting areas.
2. The display device according to claim 1, wherein The portion of the grid pattern overlaps an outer portion of each of the plurality of light emitting areas.
3. The display device according to claim 1, wherein Each of the plurality of light emitting areas includes a plurality of outer sides, and at least one of the plurality of outer sides is covered by the grid pattern on the plane.
4. The display device according to claim 3, wherein The grid pattern includes: a plurality of first grid lines extending along one direction and arranged along a crossing direction crossing the one direction; and a plurality of second grid lines extending along the cross direction and arranged along the one direction, The plurality of openings are surrounded by the plurality of first grid lines and the plurality of second grid lines.
5. The display device according to claim 4, wherein The plurality of outer sides of each of the plurality of light-emitting areas include: a first side and a second side facing each other in the intersecting direction and each extending in the one direction; and a third side and a fourth side facing each other in the one direction and each extending in the cross direction, in: At least some of the first side and the second side are covered by the plurality of first grid lines on the plane, and At least some of the third side and the fourth side are covered by the second plurality of grid lines on the plane. The display device according to claim 4 , wherein: The plurality of openings defined in the grid pattern include: a plurality of central openings at least partially overlapping the plurality of light emitting regions; and The plurality of peripheral openings do not overlap with the plurality of light emitting areas.
7. The display device according to claim 6, wherein: The grid pattern covers all of the plurality of outer sides of each of the plurality of light emitting areas, and Each of the plurality of central openings is disposed in a corresponding light emitting region among the plurality of light emitting regions on the plane.
8. The display device according to claim 7, wherein: The plurality of peripheral openings include: a plurality of first peripheral openings disposed between adjacent central openings in the one direction among the plurality of central openings or between adjacent central openings in the cross direction among the plurality of central openings; and A plurality of second peripheral openings are spaced apart from adjacent central openings among the plurality of central openings in an oblique direction between the one direction and the intersecting direction.
9. The display device according to claim 6, wherein: The plurality of outer sides of each of the plurality of light-emitting areas include: a first side and a second side facing each other in the intersecting direction and each extending in the one direction; and a third side and a fourth side facing each other in the one direction and each extending in the cross direction, in: The first side, the fourth side, the second side, and the third side are sequentially connected to each other in a clockwise direction, and The grid pattern covers two interconnected sides among the plurality of outer sides of each of the plurality of light emitting areas, Wherein, different two sides among the first to fourth sides are covered by the grid pattern.
10. The display device according to claim 9, wherein At least some of the plurality of central openings overlap a portion of each of two or more light emitting areas among the plurality of light emitting areas.
11. The display device according to claim 9, wherein At least some of the plurality of central openings overlap with a different number of light emitting areas among the plurality of light emitting areas.
12. The display device according to claim 9, wherein The plurality of light-emitting areas include: a first group of light-emitting areas having the first side and the fourth side covered by the grid pattern on the plane; a second group of light-emitting areas having the first side and the third side covered by the grid pattern on the plane; a third group of light-emitting areas having the second side and the fourth side covered by the grid pattern on the plane; and a fourth group of light-emitting areas having the second side and the third side covered by the grid pattern on the plane, Wherein, within a predetermined unit area, the same number of the light-emitting areas of the first group, the light-emitting areas of the second group, the light-emitting areas of the third group, and the light-emitting areas of the fourth group are arranged.
13. The display device according to claim 6, wherein: On the plane, a separation distance in a direction from the outer side of the light emitting area covered by the grid pattern to adjacent central openings among the plurality of central openings is less than or equal to a width of the grid pattern in the direction.
14. The display device according to claim 6, wherein A cutting portion configured to connect two adjacent peripheral openings to each other among the plurality of peripheral openings is defined in the grid pattern.
15. The display device according to claim 14, wherein The cutting portion is spaced apart from the plurality of central openings.
16. The display device according to claim 14, wherein: The plurality of sensing electrodes include: a plurality of first sensing electrodes extending in a first direction that is an oblique direction of the one direction and the intersecting direction and arranged in a second direction intersecting the first direction; and a plurality of second sensing electrodes extending in the second direction and arranged in the first direction, in: Each of the plurality of first sensing electrodes includes a plurality of first sensing portions arranged in the first direction; and Each of the plurality of second sensing electrodes includes a plurality of second sensing portions arranged in the second direction, The cutting portion is defined within the plurality of first sensing portions or the plurality of second sensing portions.
17. The display device according to claim 6, wherein: The plurality of sensing electrodes include: a plurality of first sensing electrodes extending in a first direction that is an oblique direction of the one direction and the intersecting direction and arranged in a second direction intersecting the first direction; and a plurality of second sensing electrodes extending in the second direction and arranged in the first direction, in: Each of the plurality of first sensing electrodes includes a plurality of first sensing portions arranged in the first direction, and Each of the plurality of second sensing electrodes includes a plurality of second sensing portions arranged in the second direction, wherein a boundary cutting portion is defined between a first sensing portion and a second sensing portion adjacent to each other among the plurality of first sensing portions and the plurality of second sensing portions, and Wherein, the boundary cutting portion is spaced apart from the plurality of central openings.
18. The display device according to claim 4, wherein: The plurality of light emitting areas include a plurality of unit light emitting areas arranged along each of the one direction and the cross direction, Each of the plurality of unit light-emitting areas includes: a first light emitting area and a third light emitting area spaced apart from each other in a first direction that is an oblique direction of the one direction and the crossing direction; and two second light emitting areas are spaced apart from each other in a second direction crossing the first direction, and The first light-emitting area, the second light-emitting area and the third light-emitting area respectively emit a first color light, a second color light and a third color light that are different from each other.
19. The display device according to claim 4, wherein The plurality of light-emitting areas include: The first light emitting areas and the second light emitting areas are alternately arranged along the one direction; and a third light-emitting area, spaced apart from the first light-emitting area and the second light-emitting area along the intersection direction; The first light-emitting area, the second light-emitting area and the third light-emitting area respectively emit a first color light, a second color light and a third color light that are different from each other.
20. The display device according to claim 19, wherein: The third light emitting area is arranged closer to the first light emitting area than the second light emitting area in the one direction, and The grid pattern further includes third grid lines spaced apart from the plurality of second grid lines, and The third grid lines extend along the intersection direction and cover the outer side of the third light-emitting area adjacent to the second light-emitting area.
21. The display device according to claim 1, wherein The input sensing layer further comprises: a second insulating layer, disposed on the first insulating layer; a first conductive layer disposed between the first insulating layer and the second insulating layer; and a second conductive layer, disposed on the second insulating layer; Wherein, the plurality of sensing electrodes include: a plurality of first sensing electrodes extending in one direction and arranged in a crossing direction crossing the one direction; and a plurality of second sensing electrodes extending in the crossing direction and arranged in the one direction, in: Each of the plurality of first sensing electrodes includes a plurality of first sensing portions arranged in the one direction and a connection pattern connecting the plurality of first sensing portions to each other; and Each of the plurality of second sensing electrodes includes a plurality of second sensing portions arranged in the crossing direction and an extension pattern connecting the plurality of second sensing portions to each other. in: The plurality of first sensing parts, the plurality of second sensing parts, and the extension pattern are included in the second conductive layer, and The connection pattern is included in the first conductive layer.
22. A display device comprising: A display panel having a plurality of light-emitting areas and a non-light-emitting area, and comprising a display element layer and an encapsulation layer provided on the display element layer; as well as an input sensing layer, comprising a first insulating layer directly disposed on the encapsulation layer and a plurality of sensing electrodes disposed on the first insulating layer; Each of the plurality of sensing electrodes includes a grid pattern having a plurality of openings, wherein the plurality of openings are defined in the grid pattern. wherein the plurality of openings defined in the grid pattern include: a plurality of central openings at least partially overlapping the plurality of light emitting regions; and a plurality of peripheral openings that do not overlap with the plurality of light emitting regions, and Here, a cut portion connecting two adjacent peripheral openings among the plurality of peripheral openings is defined in the grid pattern.
23. The display device according to claim 22, wherein: The cutting portion is spaced apart from the plurality of central openings.
24. The display device according to claim 22, wherein: Each of the plurality of light emitting regions includes a plurality of outer sides, and At least one of the plurality of outer sides is covered by the grid pattern in a plane.
25. The display device according to claim 24, wherein: Each of the plurality of central openings is disposed in a corresponding light emitting area among the plurality of light emitting areas on the plane, and The plurality of outer sides of each of the plurality of light emitting areas are covered by the grid pattern.
26. The display device according to claim 22, wherein: Each of the plurality of light emitting areas is arranged in a plane within a corresponding central opening among the plurality of central openings, and The grid pattern does not overlap with the plurality of light emitting areas.
27. An electronic device comprising: The display device according to any one of claims 1 to 26; as well as The anti-reflection layer is disposed on the input sensing layer.
Citation Information
Patent Citations
3D map encoding device and method
KR1020240017927A