Display device and method for manufacturing display device

Abstract

The invention relates to a display device and a method for manufacturing the same. The display device includes: a substrate including a light emitting area and a non-light emitting area; a pixel defining layer at the non-emission area, and defining a first opening; a bank layer over the pixel defining layer, and the bank layer defining a second opening; the auxiliary electrode is arranged above the bank layer, and the auxiliary electrode completely covers the bank layer; a first cathode electrode at the light emitting region, and the first cathode electrode contacting the auxiliary electrode; and a first quantum dot layer over the first cathode electrode.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2024-0018079, filed on February 6, 2024, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates to a display device and a method for manufacturing the display device. Background Art

[0004] With the development of the information society, the demand for display devices for displaying images is increasing in various forms. For example, display devices have been applied to various electronic devices such as smart phones, digital cameras, laptop computers, navigation devices and smart TVs. The display device can be a flat panel display device such as a liquid crystal display device, a field emission display device or a light-emitting display device (organic light-emitting display device). Among the flat panel display devices, the light-emitting display device may include a light-emitting element (wherein each of the pixels of the display panel can emit light by itself), thereby displaying an image without a backlight unit providing light to the display panel.

[0005] Recently, display devices have been applied to eyeglass-type devices to provide virtual reality and augmented reality. For display devices applied to eyeglass-type devices, the display device is preferably implemented in a relatively small size of two inches or less, and also preferably has a high pixel integration to achieve high resolution. For example, the display device may have a high pixel integration of 1000 pixels per inch (PPI) or higher. Summary of the Invention

[0006] Aspects of the present disclosure are directed to providing a high-resolution and high-efficiency display device and to simplifying a process of manufacturing the high-resolution and high-efficiency display device.

[0007] However, aspects of the present disclosure are not limited to the aspects described herein. The above and other aspects of the present disclosure will become more apparent to those skilled in the art to which the present disclosure applies by referring to the detailed description of the present disclosure given below.

[0008] Details of other embodiments are included in the detailed description and accompanying drawings.

[0009] According to some embodiments of the present disclosure, a display device includes: a substrate, including a light-emitting area and a non-light-emitting area; a pixel defining layer, at the non-light-emitting area, and the pixel defining layer defines a first opening; a embankment layer, above the pixel defining layer, and the embankment layer defines a second opening; an auxiliary electrode, above the embankment layer, and the auxiliary electrode completely covers the embankment layer; a first cathode electrode, at the light-emitting area, and the first cathode electrode contacts the auxiliary electrode; and a first quantum dot layer, above the first cathode electrode.

[0010] The bank layer may be completely surrounded by the pixel defining layer and the auxiliary electrode.

[0011] The bank layer may have a reverse tapered shape.

[0012] A height of the bank layer in a direction substantially perpendicular to the substrate may be greater than a height of the pixel defining layer.

[0013] The bank layer may include an organic material, wherein the auxiliary electrode includes a conductive metal.

[0014] The first cathode electrode may be electrically connected to the auxiliary electrode.

[0015] The display device may further include: a light-emitting layer located between the substrate and the first cathode electrode in a direction substantially perpendicular to the substrate; an organic pattern above the embankment layer, the organic pattern and the light-emitting layer including the same material, and the organic pattern being separated from the light-emitting layer; and an electrode pattern above the organic pattern, the electrode pattern and the first cathode electrode including the same material, and the electrode pattern being separated from the first cathode electrode.

[0016] The display device may further include: a first inorganic layer above the first cathode electrode and the electrode pattern, wherein the auxiliary electrode includes a first portion contacting the light-emitting layer, a second portion contacting the organic pattern, and a third portion contacting the first inorganic layer, and wherein the first portion and the second portion are spaced apart from each other, and the third portion is between the first portion and the second portion.

[0017] The display device may further include: a second inorganic layer over the first inorganic layer, wherein the first quantum dot layer is completely surrounded by the first inorganic layer and the second inorganic layer in a portion overlapping the light emitting region.

[0018] The display device may further include: a second cathode electrode spaced apart from the first cathode electrode with a bank layer interposed between the first cathode electrode and the second cathode electrode, and the second cathode electrode is electrically connected to the first cathode electrode through the auxiliary electrode; and

[0019] A second quantum dot layer is above the second cathode electrode.

[0020] The first quantum dot layer and the second quantum dot layer may be spaced apart from each other in a direction substantially parallel to the substrate, with the organic pattern and the electrode pattern interposed between the first quantum dot layer and the second quantum dot layer.

[0021] The first quantum dot layer and the second quantum dot layer may each include a quantum dot material.

[0022] The display device may further include a residual pattern between the substrate and the pixel defining layer in a direction substantially perpendicular to the substrate, wherein the residual pattern overlaps the auxiliary electrode in the direction substantially perpendicular to the substrate.

[0023] The residual pattern may contact the light emitting layer, and the residual pattern may include an oxide semiconductor.

[0024] The display device may further include a color filter over the first quantum dot layer, wherein the light emitting layer is configured to emit light to the outside through the first quantum dot layer and the color filter.

[0025] The first opening may be completely surrounded by the second opening in plan view.

[0026] According to some embodiments of the present disclosure, a method for manufacturing a display device includes: forming an anode electrode above a substrate; forming a sacrificial layer above the anode electrode; forming a pixel defining layer above the sacrificial layer; forming a dam layer having a reverse tapered shape above the pixel defining layer; forming an auxiliary electrode that completely covers the dam layer; forming a photoresist above the auxiliary electrode; removing a portion of the auxiliary electrode, the pixel defining layer, and the sacrificial layer; forming a light-emitting layer and a cathode electrode above the anode electrode; forming a first inorganic layer above the cathode electrode; forming a quantum dot layer above the first inorganic layer; and forming a second inorganic layer covering the first inorganic layer and the quantum dot layer.

[0027] In the removal of a portion of the auxiliary electrode, the auxiliary electrode may expose a portion of the anode electrode.

[0028] The formation of the light emitting layer and the cathode electrode can be performed without using a separate fine metal mask.

[0029] The cathode electrode may contact and may be electrically connected to the auxiliary electrode.

[0030] Since the display device according to one or more embodiments includes a bank structure positioned to overlap the non-luminescent region, the light-emitting element positioned to overlap each luminescent region can be formed without a separate fine metal mask. Therefore, the display device according to one or more embodiments can provide a high-resolution display device and the suitability for manufacturing a high-resolution display device.

[0031] Furthermore, since the display device according to one or more embodiments includes the reflective layer on the side surface of the bank structure and the quantum dot layer positioned to overlap each light emitting element, a highly efficient display device may be provided.

[0032] However, aspects of the embodiments are not limited to the aspects described herein. The above and other aspects of the embodiments will become more apparent to those skilled in the art to which the embodiments apply by referring to the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The above and other aspects of the present disclosure will become more apparent by describing in detail embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0034] Figure 1 is a schematic perspective view showing an electronic device according to one or more embodiments;

[0035] Figure 2 is a perspective view showing a display device included in an electronic device according to one or more embodiments;

[0036] Figure 3 yes Figure 2 A schematic cross-sectional view of a display device;

[0037] Figure 4 It shows Figure 3 a plan view of an arrangement of light emitting areas in a display area;

[0038] Figure 5 It is along Figure 4 A schematic cross-sectional view of the display device taken along line X1-X1';

[0039] Figure 6 yes Figure 5 An enlarged cross-sectional view of a display element layer and a quantum dot layer positioned in a portion overlapping with a first light emitting region;

[0040] Figure 7 yes Figure 5 An enlarged cross-sectional view of a display element layer and a quantum dot layer positioned in a portion overlapping with a non-luminescent region between a first luminescent region and a second luminescent region; and

[0041] Figures 8 to 16 is a schematic diagram showing the method for making Figure 5 A cross-sectional view of the method of displaying the element layer and the quantum dot layer. DETAILED DESCRIPTION

[0042] By referring to the detailed description and drawings of the embodiments, it is easier to understand the aspects of some embodiments of the present disclosure and the methods for implementing the aspects of the embodiments. The described embodiments are provided as examples so that the present disclosure will be thorough and complete, and will fully convey the aspects of the present disclosure to those skilled in the art. Therefore, processes, elements and techniques that are redundant, irrelevant or unrelated to the description of the embodiments, or are not necessary for a complete understanding of the aspects of the present disclosure for those of ordinary skill in the art may be omitted. Unless otherwise noted, throughout the drawings and written description, the same figure numerals, characters or combinations thereof represent the same elements, and therefore, repeated descriptions thereof may be omitted.

[0043] The described embodiments may have various modifications and may be implemented in different forms and should not be construed as limited to only the embodiments shown herein. The use of "can," "may," or "may not" when describing embodiments corresponds to one or more embodiments of the present disclosure.

[0044] It will be understood by those skilled in the art that, in view of the entire content of the present disclosure, unless otherwise stated or implied, the present disclosure covers all modifications, equivalents and alternatives within the scope of the ideas and technology of the present disclosure, each of the features of the embodiments of the present disclosure may be combined with each other in part or in whole, and various interlocking and operations are technically possible, and each embodiment may be implemented independently of each other, or may be implemented together in association.

[0045] In the accompanying drawings, for the purpose of clarity and / or description, the relative sizes of elements, layers and regions may be exaggerated. In other words, because the size and thickness of the elements in the drawings are arbitrarily shown for ease of description, the present disclosure is not limited thereto. In addition, the use of cross hatching and / or shadows is generally provided in the drawings to make the boundaries between adjacent elements clear. Thus, unless otherwise specified, the presence or absence of cross hatching or shadows does not convey or indicate any preference or requirement for the specific material, material properties, size, ratio, commonality between the elements shown and / or any other characteristics, attributes, properties, etc. of the elements.

[0046] Various embodiments are described herein with reference to cross-sectional views that are schematic illustrations of embodiments and / or intermediate structures. As such, variations in the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are anticipated. In addition, the specific structural or functional descriptions disclosed herein are merely illustrative for the purpose of describing embodiments according to the concepts of the present disclosure. Therefore, the embodiments disclosed herein should not be construed as limited to the shapes of the elements, layers, or regions shown, but rather include deviations in shapes due to, for example, manufacturing.

[0047] For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and / or a gradient of implant concentration at its edges rather than a binary change from implanted to non-implanted region. Likewise, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place.

[0048] For ease of interpretation, spatially relative terms such as "under," "beneath," "down," "underside," "beneath," "above," "upper," "over," "throughout," "higher," "upper," and "side" (e.g., as in "sidewall") may be used herein to describe the relationship of one element or feature to another element(s) or feature(s) as shown in the accompanying drawings. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientations depicted in the accompanying drawings. For example, if the device in the drawings is turned over, an element described as being "under," "beneath," or "beneath" other elements or features would then be oriented as being "above" the other elements or features. Thus, the example terms "under" and "under" are capable of encompassing both above and below orientations. The device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein should be interpreted accordingly. Similarly, when a first component is described as being disposed “on” a second component, this indicates that the first component is disposed at the upper side or lower side of the second component, and is not limited to the upper side of the second component based on the gravity direction.

[0049] In addition, the phrase "in a plan view" means when an object portion is viewed from above, and the phrase "in a schematic cross-sectional view" means when a schematic cross-sectional view obtained by vertically cutting an object portion is viewed from the side. The term "overlap" or "overlapped" means that a first object can be above or below a second object or to the side of the second object, and vice versa. In addition, the term "overlap" can include stacking, facing or facing, extending across, covering or partially covering, or any other appropriate term as will be appreciated and understood by a person of ordinary skill in the art. The expression "non-overlapping" can include meanings such as "spaced from," "offset from," "separated from," or any other appropriate equivalents as will be appreciated and understood by a person of ordinary skill in the art. The terms "facing" and "facing" can mean that a first object can be directly or indirectly opposite to a second object. In the case where a third object is between the first and second objects, although still facing each other, the first and second objects can be understood to be indirectly opposite to each other.

[0050] It will be understood that when an element, layer, region, or component is referred to as being "formed on," "on," "connected to," or "(operably or communicatively) coupled to" another element, layer, region, or component, the element, layer, region, or component can be directly formed on, directly on, directly connected to, or coupled to the other element, layer, region, or component, or indirectly formed on, indirectly on, indirectly connected to, or coupled to the other element, layer, region, or component such that one or more intervening elements, layers, regions, or components may be present. Furthermore, this may be collectively referred to as direct or indirect coupling or connection, and integral or non-integrated coupling or connection. For example, when a layer, region, or component is referred to as being "electrically connected" or "electrically coupled" to another layer, region, or component, the layer, region, or component can be directly electrically connected or coupled to the other layer, region, or component, or one or more intervening layers, regions, or components may be present. One or more intervening components may include switches, resistors, and / or capacitors, etc. When describing embodiments, unless explicitly described as being directly connected, statements about connection indicate electrical connection, and "directly connected / directly coupled" or "directly on..." means that one component is directly connected or coupled to another component, or is directly on another component, with no intervening components.

[0051] In addition, in this specification, when a part of a layer, film, region or plate, etc. is formed on another part, the formation direction is not limited to the upward direction, but includes forming the part on the side surface or in the downward direction. On the contrary, when a part of a layer, film, region or plate, etc. is formed "below" another part, this includes not only the case where the part is "directly under" the other part, but also the case where there is another part between the part and the other part. At the same time, other expressions such as "between...", "immediately between...", "adjacent to..." or "immediately adjacent to..." that describe the relationship between components can be interpreted similarly. It will be understood that when an element or layer is referred to as "between" two elements or layers, the element or layer can be the only element or layer between the two elements or layers, or one or more intervening elements or layers can also be present.

[0052] For the purposes of this disclosure, when expressions such as “at least one of ...,” “any one of ...,” or “one or more of ...,” follow a list of elements, they modify the entire list of elements, without modifying the individual elements in the list. For example, “at least one of X, Y, and Z,” and “at least one selected from the group comprising X, Y, and Z” may be interpreted as any combination of only X, only Y, only Z, two or more of X, Y, and Z, such as, for example, XYZ, XYY, YZ, and ZZ, or any variants thereof. Similarly, the expression “at least one of A and B” may include A, B, or A and B. As used herein, “or” generally means “and / or,” and the term “and / or” includes any and all combinations of one or more of the associated listed items. For example, the expression “A and / or B” may include A, B, or A and B. Similarly, expressions such as "at least one of," "a plurality of," "one of," and other prepositional phrases, when preceding or following a list of elements, modify the entire list of elements and do not modify the individual elements in the list. Unless otherwise specified, when "C to D" is stated, it means C or greater and D or less.

[0053] It will be understood that, although the terms "first," "second," "third," etc. may be used herein to describe various elements, components, areas, layers, and / or sections, these elements, components, areas, layers, and / or sections should not be limited by these terms. These terms do not correspond to a specific order, position, or advantage, and are only used to distinguish one element, component, component, area, region, layer, section, or portion from another element, component, component, area, region, layer, section, or portion. Therefore, without departing from the spirit and scope of the present disclosure, the first element, first component, first area, first layer, or first section described below can be named as the second element, second component, second area, second layer, or second section. Describing an element as a "first" element may not require or imply the presence of a second element or other elements. The terms "first," "second," etc. may also be used herein to distinguish elements of different categories or groups. For the sake of brevity, the terms "first," "second," etc. may respectively represent "first category (or first group)," "second category (or second group)," etc.

[0054] In this example, the X-axis, Y-axis, and Z-axis are not limited to the three axes of a rectangular coordinate system and can be interpreted in a broader sense. For example, the X-axis, Y-axis, and Z-axis can be substantially perpendicular to each other, or can represent different directions that are not substantially perpendicular to each other. The same applies to the first direction, the second direction, and / or the third direction.

[0055] The terms used herein are for the purpose of describing the embodiments only and are not intended to limit the present disclosure. As used herein, unless the context clearly indicates otherwise, the singular forms "a" and "an" are also intended to include the plural forms, and the plural forms are also intended to include the singular forms. It will also be understood that when used in this specification, the terms "comprises / comprising", "have / having" and "includes / including" illustrate the presence of stated features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof.

[0056] When one or more embodiments are implemented differently, a specific process order may be performed differently from the described order. For example, two consecutively described processes may be performed substantially simultaneously or in a reverse order to the described order.

[0057] As used herein, the terms "substantially," "about," "approximately," and similar terms are used as approximate terms rather than terms of degree, and are intended to illustrate inherent deviations in measured or calculated values that will be recognized by those of ordinary skill in the art. For example, "substantially" may include a range of + / - 5% of the corresponding value. Taking into account the measurement in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system), "approximately" or "approximately" as used herein include the stated value and mean within an acceptable range of deviations for the particular value determined by those of ordinary skill in the art. For example, "approximately" may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value. Additionally, "may" is used when describing embodiments of the present disclosure to refer to "one or more embodiments of the present disclosure."

[0058] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will also be understood that, unless expressly defined as such herein, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their context in the relevant art and / or in this specification, and should not be interpreted in an idealized or overly formal sense.

[0059] Figure 1 is a schematic perspective view showing an electronic device 1 according to one or more embodiments.

[0060] Reference Figure 1, the electronic device 1 displays a moving image or a still image. The electronic device 1 may refer to any electronic device that provides a display screen. For example, the electronic device 1 may include a television that provides a display screen, a laptop computer, a monitor, a billboard, an Internet of Things device, a mobile phone, a smartphone, a tablet personal computer (PC), an electronic watch, a smart watch, a watch phone, a head-mounted display, a mobile communication terminal, an electronic notebook, an electronic book, a portable multimedia player (PMP), a navigation device, a game console, a digital camera, a video camera, etc.

[0061] exist Figure 1 , a first direction (X-axis direction), a second direction (Y-axis direction) and a third direction (Z-axis direction) are defined. The first direction (X-axis direction) and the second direction (Y-axis direction) may be substantially perpendicular to each other, the first direction (X-axis direction) and the third direction (Z-axis direction) may be substantially perpendicular to each other, and the second direction (Y-axis direction) and the third direction (Z-axis direction) may be substantially perpendicular to each other. It will be understood that the first direction (X-axis direction) means the horizontal direction in the drawings, the second direction (Y-axis direction) means the vertical direction in the drawings, and the third direction (Z-axis direction) means the up and down direction in the drawings, that is, the thickness direction. In the following description, unless otherwise specified, the term "direction" may refer to two directions extending toward both sides along the direction. In addition, when the two "directions" extending to both sides need to be distinguished from each other, one side will be referred to as "one side in that direction", and the other side will be referred to as "the other side in that direction". In Figure 1 , a direction pointed by an arrow indicating a direction is referred to as one side, and a direction opposite to the direction pointed by the arrow indicating a direction is referred to as the other side.

[0062] Hereinafter, for the sake of convenience of explanation, when referring to the surface of the electronic device 1 or each component constituting the electronic device 1, one surface on one side facing the direction of displaying the image (i.e., the third direction (Z-axis direction)) is referred to as the upper surface, and the opposite surface of the one surface is referred to as the other surface. However, the present disclosure is not limited to this, and one surface and the other surface of the component may be referred to as the front surface and the rear surface, respectively, or may also be referred to as the first surface or the second surface. In addition, when describing the relative position of each component of the electronic device 1, one side on the third direction (Z-axis direction) may be referred to as the upper side, and the other side on the third direction (Z-axis direction) may be referred to as the lower side.

[0063] The shape of the electronic device 1 can be variously changed. For example, the electronic device 1 can have a rectangular shape with a long width, a rectangular shape with a long length, a square shape, a quadrilateral shape with rounded corners (vertices), other polygonal shapes, or a circular shape.

[0064] The electronic device 1 may include a display area DA and a non-display area NDA. The display area DA is an area where an image can be displayed, and the non-display area NDA is an area where an image is not displayed. The display area DA may also be referred to as an active area, and the non-display area NDA may also be referred to as a non-active area. The display area DA may generally occupy the center of the electronic device 1.

[0065] Figure 2 is a perspective view illustrating a display device 10 included in an electronic device 1 according to one or more embodiments.

[0066] Reference Figure 2 According to one or more embodiments, the electronic device 1 may include a display device 10. The display device 10 may provide a picture displayed by the electronic device 1. Examples of the display device 10 may include an inorganic light-emitting diode display device, an organic light-emitting display device, a quantum dot light-emitting display device, a plasma display device, and a field emission display device. Hereinafter, an organic light-emitting diode display device is shown as an example of a display device, but the present disclosure is not limited thereto and may also be applied to other display devices as long as the same technical concept is applicable to the other display devices.

[0067] The display device 10 may have a planar shape similar to that of the electronic device 1. For example, the display device 10 may have a shape similar to a rectangular shape having short sides in a first direction (X-axis direction) and long sides in a second direction (Y-axis direction). The corner where the short side in the first direction (X-axis direction) and the long side in the second direction (Y-axis direction) intersect may be rounded to have a curvature, but is not limited thereto and may also be formed at a right angle. The planar shape of the display device 10 is not limited to a quadrilateral shape and may be formed in a planar shape similar to other polygonal shapes, a circular shape, or an elliptical shape.

[0068] The display device 10 includes a display panel 100 , a display driver 200 , and a circuit board 300 .

[0069] The display panel 100 may include a main area MA and a sub-area SBA. The main area MA may include a display area DA including pixels displaying an image and a non-display area NDA positioned around the display area DA.

[0070] The display area DA can emit light from multiple light-emitting areas or multiple openings described later. For example, the display panel 100 may include a pixel circuit including a switching element, a pixel defining layer defining a light-emitting area or an opening, and a self-luminous element. For example, the self-luminous element may include, but is not limited to, an organic light-emitting diode (LED) including an organic light-emitting layer, a quantum dot LED including a quantum dot light-emitting layer, an inorganic LED including an inorganic semiconductor, and at least one of a micro-LED. In the following figures, the self-luminous element is shown to be an organic light-emitting diode.

[0071] The non-display area NDA may be an area outside the display area DA. The non-display area NDA may be defined as an edge area of the main area MA of the display panel 100.

[0072] The sub-area SBA may be an area extending from one side of the main area MA. The sub-area SBA may include a flexible material that can be bent, folded, or curled. For example, when the sub-area SBA is bent, the sub-area SBA may overlap with the main area MA in the thickness direction (e.g., the third direction (Z-axis direction)). The sub-area SBA may include a display driver 200 and a pad portion connected to the circuit board 300. In one or more other embodiments, the sub-area SBA may be omitted, and the display driver 200 and the pad portion may be positioned in the non-display area NDA.

[0073] The display driver 200 can output signals and voltages for driving the display panel 100. The display driver 200 can be formed as an integrated circuit (IC) and mounted on the display panel 100 using a chip-on-glass (COG) method, a chip-on-plastic (COP) method, or an ultrasonic bonding method. For example, the display driver 200 can be positioned in the sub-area SBA and can overlap with the main area MA in the thickness direction by bending the sub-area SBA. As another example, the display driver 200 can be mounted on the circuit board 300.

[0074] The circuit board 300 may be attached to the pad portion of the display panel 100 using an anisotropic conductive film (ACF). The circuit board 300 may be a flexible film such as a flexible printed circuit board, a printed circuit board, or a chip on film.

[0075] Figure 3 yes Figure 2 Schematic cross-sectional view of a display device 10.

[0076] Reference Figure 3 The display panel 100 may include a display layer DPL, a color filter layer CF, and an overcoat layer OC. The display layer DPL may include a substrate 110, a thin film transistor layer 130, a display element layer 150, and a quantum dot layer 160.

[0077] The substrate 110 may be a base substrate or a base member. The substrate 110 may be a flexible substrate that can be bent, folded, or rolled. For example, the substrate 110 may include a polymer resin such as polyimide (PI), but is not limited thereto. In one or more other embodiments, the substrate 110 may include a glass material or a metal material.

[0078] The thin film transistor layer 130 may be positioned on the substrate 110. The thin film transistor layer 130 may be positioned in the display area DA, the non-display area NDA, and the sub-area SBA. The thin film transistor layer 130 may include components constituting the pixel ( Figure 4 A plurality of thin film transistors ( Figure 5 "Thin Film Transistor TFT" in the text).

[0079] The display element layer 150 may be positioned on the thin film transistor layer 130. The display element layer 150 may overlap the display area DA. The display element layer 150 may include a self-luminous element, and the self-luminous element may emit light.

[0080] The quantum dot layer 160 may be positioned on the display element layer 150. The quantum dot layer 160 may overlap the display area DA and the non-display area NDA. The quantum dot layer 160 may change or transmit the wavelength of light emitted from the display element layer 150 and may protect the display element layer 150 from external oxygen and moisture.

[0081] The color filter layer CF may be positioned on the quantum dot layer 160. The color filter layer CF may overlap the display area DA and the non-display area NDA. The color filter layer CF may transmit or reflect a portion of the light emitted from the display element layer 150 and the quantum dot layer 160. In addition, the color filter layer CF may absorb a portion of the light introduced from outside the display device 10 to reduce reflected light caused by the external light.

[0082] The overcoat layer OC may be positioned on the color filter layer CF. The overcoat layer OC may overlap the display area DA and the non-display area NDA. A level difference in a lower structure of the overcoat layer OC may be flattened.

[0083] like Figure 3 As shown in , a portion of the display layer DPL overlapping the sub-area SBA may be bent. When a portion of the display layer DPL is bent, the display driver 200 and the circuit board 300 may overlap the main area MA in the third direction (Z-axis direction).

[0084] Figure 4 It shows Figure 3 1 is a plan view of the arrangement of the light emitting areas EA in the display area DA.

[0085] Reference Figure 4According to one or more embodiments, the display area DA may include a plurality of first light emitting areas EA1, a plurality of second light emitting areas EA2, a plurality of third light emitting areas EA3, and a non-light emitting area NLA. The non-light emitting area NLA may surround the plurality of first light emitting areas EA1, the plurality of second light emitting areas EA2, and the plurality of third light emitting areas EA3.

[0086] The non-emission area NLA can block each light emitted from the plurality of first light-emitting areas EA1, the plurality of second light-emitting areas EA2, and the plurality of third light-emitting areas EA3. As a result, the non-emission area NLA can help reduce or prevent mixing of light emitted from the first light-emitting area EA1, the second light-emitting area EA2, and the third light-emitting area EA3.

[0087] The light-emitting area EA may include a first light-emitting area EA1, a second light-emitting area EA2, and a third light-emitting area EA3 that emit light of different colors. Each of the first light-emitting area EA1, the second light-emitting area EA2, and the third light-emitting area EA3 may emit red light, green light, or blue light, respectively, and the color of the light emitted from each of the first light-emitting area EA1, the second light-emitting area EA2, and the third light-emitting area EA3 may vary depending on the type of the quantum dot layer 160 and / or the color filter layer CF, which will be described later. In one or more embodiments, the first light-emitting area EA1 may emit red light of a first color, the second light-emitting area EA2 may emit green light of a second color, and the third light-emitting area EA3 may emit blue light of a third color, but the present disclosure is not limited thereto. The accompanying drawings show that the size and shape of each of the first light-emitting area EA1, the second light-emitting area EA2, and the third light-emitting area EA3 are the same, but the present disclosure is not limited thereto. The size and shape of each of the first light-emitting area EA1, the second light-emitting area EA2, and the third light-emitting area EA3 can be freely adjusted according to the desired characteristics.

[0088] A plurality of first light emitting areas EA1, a plurality of second light emitting areas EA2, and a plurality of third light emitting areas EA3 may be defined by the first opening OP1 and the second opening OP2. In a plan view, the first opening OP1 may be completely surrounded by the second opening OP2.

[0089] In some embodiments, at least one first light-emitting area EA1, at least one second light-emitting area EA2, and at least one third light-emitting area EA3 positioned adjacent to each other may form a pixel group PXG. The pixel group PXG may be the smallest unit that emits white light. However, the type and / or number of the first light-emitting area EA1, the second light-emitting area EA2, and the third light-emitting area EA3 that constitute the pixel group PXG may vary depending on the embodiment.

[0090] Figure 5 It is along Figure 4Schematic cross-sectional view of the display device 10 taken along line X1 - X1 ′. Figure 5 A schematic cross section of the display layer DPL of the display device 10 according to one or more embodiments is shown. Figure 3 The substrate 110 is described, so the description of the substrate 110 will be omitted.

[0091] Reference Figure 5 The thin film transistor layer 130 may be positioned on the substrate 110. The thin film transistor layer 130 may include a first buffer layer 111, a thin film transistor TFT, a gate insulating layer 113, a first interlayer insulating layer 121, a capacitor electrode CPE, a second interlayer insulating layer 123, a first connection electrode CNE1, a first via layer 125, a second connection electrode CNE2, and a second via layer 127.

[0092] The first buffer layer 111 may be positioned on the substrate 110. The first buffer layer 111 may include an inorganic film capable of reducing or preventing the permeation of air or moisture. For example, the first buffer layer 111 may include a plurality of inorganic films alternately stacked.

[0093] A thin film transistor (TFT) may be positioned on the first buffer layer 111 and may constitute a pixel circuit connected to each of the plurality of pixels. As an example, the thin film transistor (TFT) may be a driving transistor or a switching transistor of the pixel circuit. The thin film transistor (TFT) may include an active layer (ACT), a source electrode (SE), a drain electrode (DE), and a gate electrode (GE).

[0094] The active layer ACT may be positioned on the first buffer layer 111. The active layer ACT may overlap with the gate electrode GE in the third direction (Z-axis direction) and may be insulated from the gate electrode GE by the gate insulating layer 113. In a portion of the active layer ACT, the material of the active layer ACT may become a conductor to form the source electrode SE and the drain electrode DE.

[0095] The gate electrode GE may be positioned on the gate insulating layer 113. The gate electrode GE may overlap the active layer ACT with the gate insulating layer 113 interposed therebetween.

[0096] The gate insulating layer 113 may be positioned on the active layer ACT. The gate insulating layer 113 may cover the active layer ACT and the first buffer layer 111 and may insulate the active layer ACT and the gate electrode GE from each other. The gate insulating layer 113 may include a contact hole through which the first connection electrode CNE1 penetrates.

[0097] The first interlayer insulating layer 121 may cover the gate electrode GE and the gate insulating layer 113. The first interlayer insulating layer 121 may include a contact hole through which the first connection electrode CNE1 penetrates. The contact hole of the first interlayer insulating layer 121 may be connected to the contact hole of the gate insulating layer 113 and the contact hole of the second interlayer insulating layer 123.

[0098] The capacitor electrode CPE may be positioned on the first interlayer insulating layer 121. The capacitor electrode CPE may overlap the gate electrode GE in the third direction (Z-axis direction). The capacitor electrode CPE and the gate electrode GE may form a capacitor.

[0099] The second interlayer insulating layer 123 may cover the capacitor electrode CPE and the first interlayer insulating layer 121. The second interlayer insulating layer 123 may include a contact hole through which the first connection electrode CNE1 penetrates. The contact hole of the second interlayer insulating layer 123 may be connected to the contact hole of the first interlayer insulating layer 121 and the contact hole of the gate insulating layer 113.

[0100] The first connection electrode CNE1 may be positioned on the second interlayer insulating layer 123. The first connection electrode CNE1 may electrically connect the drain electrode DE of the thin film transistor TFT and the second connection electrode CNE2 to each other. The first connection electrode CNE1 may be inserted into a contact hole formed in the first interlayer insulating layer 121, the second interlayer insulating layer 123, and the gate insulating layer 113, and may contact the drain electrode DE of the thin film transistor TFT.

[0101] The first via layer 125 may cover the first connection electrode CNE1 and the second interlayer insulating layer 123. The first via layer 125 may planarize the lower structure. The first via layer 125 may include a contact hole through which the second connection electrode CNE2 penetrates.

[0102] The second connection electrode CNE2 may be positioned on the first via layer 125. The second connection electrode CNE2 may be inserted into a contact hole formed in the first via layer 125 and may contact the first connection electrode CNE1. The second connection electrode CNE2 may electrically connect the first connection electrode CNE1 to the first, second, and third anode electrodes AE1, AE2, and AE3.

[0103] The second via layer 127 may cover the second connection electrode CNE2 and the first via layer 125. The second via layer 127 may include contact holes through which the first anode electrode AE1, the second anode electrode AE2, and the third anode electrode AE3 penetrate.

[0104] The display element layer 150 may be positioned on the second via layer 127. The display element layer 150 may include a light emitting element ED, a pixel defining layer 151, a residual pattern 153, an auxiliary electrode AX, a capping layer CPL, and a bank layer 159.

[0105] According to one or more embodiments, the light-emitting element ED may include a first light-emitting element ED1 positioned in a portion overlapping the first light-emitting area EA1, a second light-emitting element ED2 positioned in a portion overlapping the second light-emitting area EA2, and a third light-emitting element ED3 positioned in a portion overlapping the third light-emitting area EA3. The first light-emitting element ED1 may include a first anode electrode AE1, a first light-emitting layer EL1, and a first cathode electrode CE1. The second light-emitting element ED2 may include a second anode electrode AE2, a second light-emitting layer EL2, and a second cathode electrode CE2. The third light-emitting element ED3 may include a third anode electrode AE3, a third light-emitting layer EL3, and a third cathode electrode CE3. The first light-emitting element ED1, the second light-emitting element ED2, and the third light-emitting element ED3 may be separated from each other by a pixel defining layer 151 and a bank layer 159, which will be described later.

[0106] The anode electrode AE according to one or more embodiments may be positioned on the second via layer 127. The anode electrode AE may be electrically connected to the drain electrode DE of the thin film transistor TFT through the first and second connection electrodes CNE1 and CNE2.

[0107] The anode electrode AE according to one or more embodiments may include a first anode electrode AE1 positioned in the first light emitting area EA1, a second anode electrode AE2 positioned in the second light emitting area EA2, and a third anode electrode AE3 positioned in the third light emitting area EA3. The first anode electrode AE1, the second anode electrode AE2, and the third anode electrode AE3 may be spaced apart from each other on the second via layer 127.

[0108] The anode electrode AE according to one or more embodiments may have a stacked film structure in which a material layer having a high work function made of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium oxide (In2O3) and a reflective material layer made of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pb), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or a mixture thereof are stacked. As an example, the first anode electrode AE1, the second anode electrode AE2, and the third anode electrode AE3 may have a multilayer structure of ITO / Mg, ITO / MgF2, ITO / Ag, and ITO / Ag / ITO, but are not limited thereto. The residual pattern 153 will be described later.

[0109] The pixel-defining layer 151 according to one or more embodiments may be positioned on the second via layer 127 and the anode electrode AE in a portion overlapping the non-emission area NLA. The pixel-defining layer 151 may separate and insulate the first anode electrode AE1, the second anode electrode AE2, and the third anode electrode AE3 from one another. The pixel-defining layer 151 may define a first opening OP1 and may expose the anode electrode AE in a portion of the pixel-defining layer 151 overlapping the first opening OP1. In other words, the pixel-defining layer 151 may surround the first opening OP1.

[0110] The bank layer 159 according to one or more embodiments may be positioned on the pixel defining layer 151 in a portion overlapping the non-emission area NLA. The bank layer 159 may separate and insulate the first light emitting element ED1, the second light emitting element ED2, and the third light emitting element ED3 from each other. The bank layer 159 according to one or more embodiments may define a second opening OP2. The bank layer 159 may surround the second opening OP2.

[0111] The bank layer 159 according to one or more embodiments may have a reverse tapered shape. Therefore, the light emitting layer EL and the cathode electrode CE according to one or more embodiments may be formed in a portion overlapping each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 without a separate fine metal mask. The manufacturing process will be described later.

[0112] The residual pattern 153 according to one or more embodiments may be positioned in the third direction (Z-axis direction) between the anode electrode AE and the pixel defining layer 151. The residual pattern 153 will be described later.

[0113] The light-emitting layer EL according to one or more embodiments may be positioned on the anode electrode AE. The light-emitting layer EL may include a first light-emitting layer EL1, a second light-emitting layer EL2, and a third light-emitting layer EL3 located in a first light-emitting region EA1, a second light-emitting region EA2, and a third light-emitting region EA3, respectively. The first light-emitting layer EL1, the second light-emitting layer EL2, and the third light-emitting layer EL3 according to one or more embodiments may be separated from the first light-emitting region EA1, the second light-emitting region EA2, and the third light-emitting region EA3 by a pixel defining layer 151 and a bank layer 159.

[0114] The light-emitting layer EL according to one or more embodiments may include a series structure. In other words, the light-emitting layer EL according to one or more embodiments may include a structure in which a plurality of light-emitting organic layers are stacked. As an example, the light-emitting layer EL may include a first light-emitting organic layer, a second light-emitting organic layer, and a third light-emitting organic layer stacked sequentially, and the first light-emitting organic layer, the second light-emitting organic layer, and the third light-emitting organic layer may overlap each other in a third direction (Z-axis direction). The first to third light-emitting organic layers may emit the same color or different colors. For example, the light-emitting layer EL may emit blue light or white light. However, the number of organic light-emitting layers, the stacking order of the organic light-emitting layers, and the emission band of the organic light-emitting layers are not limited thereto.

[0115] The cathode electrode CE according to one or more embodiments may be positioned on the light-emitting layer EL. The cathode electrode CE according to one or more embodiments may include a first cathode electrode CE1 positioned in the first light-emitting area EA1, a second cathode electrode CE2 positioned in the second light-emitting area EA2, and a third cathode electrode CE3 positioned in the third light-emitting area EA3. The first cathode electrode CE1, the second cathode electrode CE2, and the third cathode electrode CE3 may be spaced apart from each other, with the pixel defining layer 151 and the bank layer 159 interposed therebetween.

[0116] The cathode electrode CE may include a transparent conductive material. As an example, the cathode electrode CE may include a material layer having a low work function, such as Li, Ca, LiF, Al, Mg, Ag, Pt, Pd, Ni, Au, Nd, Ir, Cr, BaF2, Ba, or a compound or mixture thereof (e.g., a mixture of Ag and Mg, etc.), or a multilayer structure material such as LiF / Ca or LiF / Al. The cathode electrode CE may also include a transparent metal oxide layer positioned on the material layer having a low work function.

[0117] The capping layer CPL according to one or more embodiments may be positioned on the cathode electrode CE. The capping layer CPL may reduce or prevent damage to the plurality of light-emitting elements ED due to external air. Furthermore, the capping layer CPL may reduce or prevent the plurality of light-emitting elements ED from being peeled off during the manufacturing process of the display device 10.

[0118] The capping layer CPL may include a first capping layer CPL1 positioned in a portion overlapping the first light emitting area EA1, a second capping layer CPL2 positioned in a portion overlapping the second light emitting area EA2, and a third capping layer CPL3 positioned in a portion overlapping the third light emitting area EA3. The first capping layer CPL1, the second capping layer CPL2, and the third capping layer CPL3 may be spaced apart from each other, and the pixel defining layer 151 and the embankment layer 159 are interposed between the first capping layer CPL1, the second capping layer CPL2, and the third capping layer CPL3.

[0119] The capping layer CPL may include an inorganic insulating material. As an example, the capping layer CPL may include aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide (ZnO x , which may be ZnO or ZnO2), silicon oxide, silicon nitride and / or silicon oxynitride.

[0120] The auxiliary electrode AX according to one or more embodiments may be positioned on the bank layer 159. The auxiliary electrode AX may completely cover the bank layer 159 and may be in contact with the bank layer 159. In addition, a portion of the auxiliary electrode AX may be in contact with the light emitting layer EL and the cathode electrode CE.

[0121] The auxiliary electrode AX may electrically connect the first cathode electrode CE1, the second cathode electrode CE2, and the third cathode electrode CE3. In other words, the first cathode electrode CE1, the second cathode electrode CE2, and the third cathode electrode CE3, which are spaced apart from each other, may be electrically connected via the auxiliary electrode AX. Furthermore, the auxiliary electrode AX according to one or more embodiments may reflect light incident from the quantum dot layer 160, which will be described later, toward the auxiliary electrode AX.

[0122] The organic pattern ELP, the electrode pattern CEP, and the capping pattern CP according to one or more embodiments will be described later.

[0123] The quantum dot layer 160 according to one or more embodiments may be positioned on the display element layer 150. The quantum dot layer 160 may include a first inorganic layer 161, a first quantum dot layer 163, a second quantum dot layer 165, a third quantum dot layer 167, and a second inorganic layer 169.

[0124] The first inorganic layer 161 according to one or more embodiments may be positioned on the capping layer CPL and the capping pattern CP. The first inorganic layer 161 may protect the light-emitting element ED from the penetration of oxygen and moisture into the light-emitting element ED. The first inorganic layer 161 may be formed to have a substantially uniform thickness along the contour of the lower structure. Therefore, the first inorganic layer 161 according to one or more embodiments may include a level difference in a portion overlapping the light-emitting area EA and the non-light-emitting area NLA.

[0125] The first inorganic layer 161 may include an inorganic insulating material. As an example, the first inorganic layer 161 may include aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide (ZnO x , which may be any one of ZnO or ZnO2), silicon oxide, silicon nitride and silicon oxynitride.

[0126] According to one or more embodiments, the first quantum dot layer 163, the second quantum dot layer 165, and the third quantum dot layer 167 may be positioned on the first inorganic layer 161. The first quantum dot layer 163 may be positioned in a portion overlapping with the first light emitting area EA1, the second quantum dot layer 165 may be positioned in a portion overlapping with the second light emitting area EA2, and the third quantum dot layer 167 may be positioned in a portion overlapping with the third light emitting area EA3. The first quantum dot layer 163, the second quantum dot layer 165, and the third quantum dot layer 167 may be spaced apart in the first direction (X-axis direction), and the bank layer 159 is interposed between the first quantum dot layer 163, the second quantum dot layer 165, and the third quantum dot layer 167.

[0127] Hereinafter, although the configurations between the first quantum dot layer 163, the second quantum dot layer 165 and the third quantum dot layer 167 are distinguished by adding the ordinal numbers "first", "second" and "third" to each configuration when naming the base resin, scatterer and / or wavelength shifter included in the first quantum dot layer 163, the second quantum dot layer 165 and the third quantum dot layer 167, the ordinal numbers "first", "second" and "third" written in combination with each component of the first quantum dot layer 163, the second quantum dot layer 165 and the third quantum dot layer 167 are not limited to this and can be written in combination with each component by changing their order.

[0128] The first quantum dot layer 163 according to one or more embodiments may be positioned on the first inorganic layer 161 in a portion overlapping the first light-emitting area EA1. The first quantum dot layer 163 may not overlap the non-light-emitting area NLA. The first quantum dot layer 163 may convert or shift incident light having a peak wavelength into light having another corresponding peak wavelength, and may emit the converted or shifted light. As an example, the first quantum dot layer 163 may convert source light provided by the first light-emitting element ED1 into red light having a peak wavelength in the range of approximately 610 nm to approximately 650 nm, and may emit the converted red light.

[0129] The first quantum dot layer 163 may include a first base resin 163 a , and a first scatterer 163 b and a first wavelength shifter 163 c dispersed in the first base resin 163 a .

[0130] The first matrix resin 163a according to one or more embodiments may be made of a material having high light transmittance. In one or more embodiments, the first matrix resin 163a may be made of an organic material. For example, the first matrix resin 163a may include an organic material such as epoxy resin, acrylic resin, carbonate resin, or imide resin.

[0131] The first scatterer 163b according to one or more embodiments may have a refractive index different from that of the first matrix resin 163a and may form an optical interface with the first matrix resin 163a. The first scatterer 163b may scatter light in random directions without substantially converting the wavelength of light transmitted through the first quantum dot layer 163, regardless of the incident direction of the incident light.

[0132] The first scatterers 163b may be metal oxide particles or organic particles. Examples of metal oxides may include titanium oxide (TiO2), zirconium oxide (ZrO2), aluminum oxide (Al2O3), indium oxide (In2O3), zinc oxide (ZnO), or tin oxide (SnO2), and examples of materials of organic particles may include acrylic resin and urethane resin.

[0133] The first wavelength shifter 163c according to one or more embodiments may convert or shift the peak wavelength of incident light to another corresponding peak wavelength. For example, the first wavelength shifter 163c may convert the light provided from the first light emitting element ED1 into red light having a single peak wavelength in the range of about 610 nm to about 650 nm, and may emit red light.

[0134] The first wavelength shifter 163c may include a quantum dot material. The quantum dot may be a semiconductor nanocrystal material and may have a corresponding band gap depending on the composition and size of the semiconductor nanocrystal material to absorb light and then emit light having a unique wavelength. Examples of semiconductor nanocrystals that are quantum dots may include Group IV nanocrystals, Group II-VI compound nanocrystals, Group III-V compound nanocrystals, Group IV-VI nanocrystals, or combinations thereof.

[0135] The II-VI compound may be selected from the group consisting of binary compounds, ternary compounds, and quaternary compounds, wherein the binary compound is selected from the group consisting of CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnO, HgS, HgSe, HgTe, MgSe, MgS, or a mixture thereof; the ternary compound is selected from the group consisting of InZnP, AgInS, CuInS, CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgS Te, CdZnS, CdZnSe, CdZnTe, CdHgS, CdHgSe, CdHgTe, HgZnS, HgZnSe, HgZnTe, MgZnSe, MgZnS or a mixture thereof; and the quaternary compound is selected from the group including HgZnTeS, CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe, HgZnSTe or a mixture thereof.

[0136] The III-V compound may be selected from the group comprising binary compounds, ternary compounds and quaternary compounds, wherein the binary compound is selected from the group comprising GaN, GaP, GaAs, GaSb, AlN, AlP, AlAs, AlSb, InN, InP, InAs, InSb or a mixture thereof; the ternary compound is selected from the group comprising GaNP, GaNAs, GaNSb, GaPAs, GaPSb, AlNP, AlNAs, AlNSb, AlPAs, AlPSb, InGaP, InNP, InAlP, InNAs, InNSb, InPAs, InPSb or a mixture thereof; and the quaternary compound is selected from the group comprising GaAlNAs, GaAlNSb, GaAlPAs, GaAlPSb, GaInNP, GaInNAs, GaInNSb, GaInPAs, GaInPSb, InAlNP, InAlNAs, InAlNSb, InAlPAs, InAlPSb, GaAlNP or a mixture thereof.

[0137] The IV-VI compound may be selected from the group consisting of binary compounds, ternary compounds, and quaternary compounds, wherein the binary compound is selected from the group consisting of SnS, SnSe, SnTe, PbS, PbSe, PbTe, or mixtures thereof; the ternary compound is selected from the group consisting of SnSeS, SnSeTe, SnSTe, PbSeS, PbSeTe, PbSTe, SnPbS, SnPbSe, SnPbTe, or mixtures thereof; and the quaternary compound is selected from the group consisting of SnPbSSe, SnPbSeTe, SnPbSTe, or mixtures thereof. The IV group element may be selected from the group consisting of Si, Ge, or mixtures thereof. The IV group compound may be a binary compound selected from the group consisting of SiC, SiGe, or mixtures thereof.

[0138] In this case, the binary compound, ternary compound, or quaternary compound may be present in the particle at a substantially uniform concentration, or may be present in the same particle in a state of partially different concentration distribution. In addition, the quantum dot may have a core-shell structure in which one quantum dot surrounds another quantum dot. The interface between the core and the shell may have a concentration gradient in which the concentration of the element present in the shell decreases toward the center.

[0139] According to one or more embodiments, quantum dots may have a core-shell structure including a core containing the above-described nanocrystals and a shell surrounding the core. The shell of the quantum dot may serve as a protective layer for maintaining semiconductor properties by reducing or preventing chemical modification of the core, and / or as a charging layer for imparting electrophoretic properties to the quantum dot. The shell may be a single layer or a multilayer. Examples of the shell of the quantum dot may include metal or non-metal oxides, semiconductor compounds, or combinations thereof.

[0140] For example, examples of metal or non-metal oxides may include binary compounds such as SiO2, Al2O3, TiO2, ZnO, MnO, Mn2O3, Mn3O4, CuO, FeO, Fe2O3, Fe3O4, CoO, Co3O4 or NiO, or ternary compounds such as MgAl2O4, CoFe2O4, NiFe2O4 or CoMn2O4, but the present disclosure is not limited thereto.

[0141] In addition, examples of semiconductor compounds may include CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnSeS, ZnTeS, GaAs, GaP, GaSb, HgS, HgSe, HgTe, InAs, InP, InGaP, InSb, AlAs, AlP, and AlSb, etc., but the present disclosure is not limited thereto.

[0142] The light emitted by the first wavelength shifter 163c may have an emission wavelength spectrum full width at half maximum (FWHM) of about 45 nm or less, about 40 nm or less, or about 30 nm or less, and thereby further improve the color purity and color reproducibility of the color displayed by the display device 10. In addition, the light emitted by the first wavelength shifter 163c may be emitted in several directions regardless of the incident direction of the incident light. Thus, the side visibility of the first color displayed in the first light emitting area EA1 may be improved.

[0143] The second quantum dot layer 165 according to one or more embodiments may be positioned on the first inorganic layer 161 in a portion overlapping the second light-emitting area EA2. The second quantum dot layer 165 may not overlap the non-light-emitting area NLA. The second quantum dot layer 165 may convert or shift incident light having a peak wavelength into light having another corresponding peak wavelength, and may emit the converted or shifted light. As an example, the second quantum dot layer 165 may convert source light provided by the second light-emitting element ED2 into green light having a peak wavelength in the range of approximately 510 nm to approximately 550 nm, and may emit the converted green light.

[0144] The second quantum dot layer 165 according to one or more embodiments may include a second base resin 165 a , and second scatterers 165 b and second wavelength shifters 165 c dispersed in the second base resin 165 a .

[0145] The second matrix resin 165a may be made of a material having high light transmittance. Since the material and properties of the second matrix resin 165a according to one or more embodiments are substantially the same or similar to those of the first matrix resin 163a, repeated description will be omitted.

[0146] The second scatterer 165b may have a refractive index different from that of the second matrix resin 165a and may form an optical interface with the second matrix resin 165a. Since the material and properties of the second scatterer 165b according to one or more embodiments are substantially the same as or similar to those of the first scatterer 163b, repeated descriptions will be omitted.

[0147] The second wavelength shifter 165c can convert or shift the peak wavelength of the incident light to another corresponding peak wavelength. The second wavelength shifter 165c according to one or more embodiments can convert the light provided from the second light emitting element ED2 into green light having a single peak wavelength in the range of about 510 nm to about 550 nm, and can emit green light.

[0148] The second wavelength shifter 165c may include a quantum dot material. Since the material and properties of the second wavelength shifter 165c are substantially the same as or similar to those of the first wavelength shifter 163c, a repeated description will be omitted. However, the particle size of the quantum dots constituting the first wavelength shifter 163c may be larger than the particle size of the quantum dots constituting the second wavelength shifter 165c.

[0149] The third quantum dot layer 167 according to one or more embodiments may be positioned in a portion overlapping the third light emitting area EA3 on the first inorganic layer 161. The third quantum dot layer 167 may scatter and transmit source light provided from the third light emitting element ED3.

[0150] The third quantum dot layer 167 may further include a third matrix resin 167 a and third scatterers 167 b dispersed in the third matrix resin 167 a .

[0151] The third matrix resin 167a may be made of a material having high light transmittance. Since the material and properties of the third matrix resin 167a according to one or more embodiments are substantially the same or similar to those of the first matrix resin 163a, repeated description will be omitted.

[0152] The third scatterer 167b may have a refractive index different from that of the third matrix resin 167a and may form an optical interface with the third matrix resin 167a. Since the material and characteristics of the third scatterer 167b according to one or more embodiments are substantially the same as or similar to those of the first scatterer 163b, repeated descriptions will be omitted.

[0153] The second inorganic layer 169 according to one or more embodiments may be positioned on the first inorganic layer 161, the first quantum dot layer 163, the second quantum dot layer 165, and the third quantum dot layer 167. The second inorganic layer 169 may completely cover the first inorganic layer 161, the first quantum dot layer 163, the second quantum dot layer 165, and the third quantum dot layer 167. The second inorganic layer 169 may reduce or prevent the penetration of impurities (such as moisture or air) from the outside to damage or contaminate the first quantum dot layer 163, the second quantum dot layer 165, and the third quantum dot layer 167.

[0154] The second inorganic layer 169 may be made of an inorganic material, such as silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, and / or silicon oxynitride.

[0155] The color filter layer CF according to one or more embodiments may be positioned on the quantum dot layer 160. The color filter layer CF may block or absorb a portion of light emitted from the display element layer 150 and the quantum dot layer 160. The color filter layer CF may include a first color filter CF1, a second color filter CF2, and / or a third color filter CF3.

[0156] The first color filter CF1 may be positioned in a portion overlapping the first light emitting area EA1 and the non-light emitting area NLA on the second inorganic layer 169. The first color filter CF1 may overlap the first light emitting element ED1 and the first quantum dot layer 163. In other words, the source light provided from the first light emitting element ED1 may be incident on the first color filter CF1 through the first quantum dot layer 163.

[0157] The first color filter CF1 may selectively transmit light of a first color (eg, red light), and may block or absorb light of a second color (eg, green light) and light of a third color (eg, blue light).

[0158] The first color filter CF1 can block or absorb a portion of the light emitted from the first light-emitting element ED1 and the first quantum dot layer 163. For example, a portion of the source light provided by the first light-emitting element ED1 may not be converted into red light by the first quantum dot layer 163. However, the portion of the source light that is not converted into red light can be blocked by the first color filter CF1 positioned on the upper side. On the other hand, the red light within the source light that is converted by the first quantum dot layer 163 can be transmitted through the first color filter CF1 and can be emitted to the outside. Therefore, a user outside the display device 10 can recognize red light in the portion overlapping the first light-emitting area EA1.

[0159] For example, the first color filter CF1 may be a red color filter and may include a red colorant such as a red dye or a red pigment. Herein, the colorant is a concept including both a dye and a pigment.

[0160] The first color pattern CF1P may be spaced apart from the first color filter CF1 and may be positioned in a portion overlapping the non-emission area NLA on the second inorganic layer 169. The first color pattern CF1P may be positioned in a portion not overlapping the emission area EA and overlapping the non-emission area NLA.

[0161] The second color filter CF2 may be positioned on the first color filter CF1 in a portion overlapping the second light emitting area EA2 and the non-light emitting area NLA. The second color filter CF2 may overlap the second light emitting element ED2 and the second quantum dot layer 165. In other words, the source light provided from the second light emitting element ED2 may be incident on the second color filter CF2 through the second quantum dot layer 165.

[0162] The second color filter CF2 may selectively transmit light of a second color (eg, green light), and may block or absorb light of a first color (eg, red light) and light of a third color (eg, blue light).

[0163] The second color filter CF2 can block or absorb a portion of the light emitted from the second light-emitting element ED2 and the second quantum dot layer 165. For example, a portion of the source light provided by the second light-emitting element ED2 may not be converted into green light by the second quantum dot layer 165. However, the portion of the source light that is not converted into green light can be blocked by the second color filter CF2 positioned on the upper side. On the other hand, the green light converted by the second quantum dot layer 165 within the source light can be transmitted through the second color filter CF2 and can be emitted to the outside. Therefore, a user located outside the display device 10 can recognize the green light in the portion overlapping with the second light-emitting area EA2.

[0164] For example, the second color filter CF2 may be a green color filter and may include a green colorant such as a green dye or a green pigment.

[0165] The second color pattern CF2P may be spaced apart from the second color filter CF2 and may be positioned on the first color filter CF1 and the first color pattern CF1P. The second color pattern CF2P may not overlap the emission area EA and may overlap the non-emission area NLA.

[0166] However, the colors specified by the first and second color filters CF1 and CF2 are not limited thereto, and the first color filter CF1 may correspond to the second color light (eg, green light), and the second color filter CF2 may correspond to the first color light (eg, red light).

[0167] The third color filter CF3 may be positioned on the second color filter CF2 in a portion overlapping the third light emitting area EA3 and the non-light emitting area NLA. The third color filter CF3 may overlap the third light emitting element ED3 and the third quantum dot layer 167. In other words, the source light provided from the third light emitting element ED3 may be incident on the third color filter CF3 through the third quantum dot layer 167.

[0168] The third color filter CF3 may selectively transmit light of a third color (eg, blue light), and may block or absorb light of a first color (eg, red light) and light of a second color (eg, green light).

[0169] The third color filter CF3 can block or absorb a portion of the light emitted from the third light-emitting element ED3 and the third quantum dot layer 167. For example, a portion of the source light provided by the third light-emitting element ED3 can be transmitted through the third quantum dot layer 167 and can be incident on the third color filter CF3. In this case, light other than blue light in the source light can be blocked by the third color filter CF3 positioned on the upper side. Therefore, a user outside the display device 10 can recognize blue light in the portion overlapping the third light-emitting area EA3.

[0170] For example, the third color filter CF3 may be a blue color filter and may include a blue colorant such as a blue dye or a blue pigment.

[0171] The third color pattern CF3P may be spaced apart from the third color filter CF3 and may be positioned on the second color filter CF2 and the second color pattern CF2P. The third color pattern CF3P may overlap the non-emission area NLA and may not overlap the emission area EA.

[0172] The overcoat layer OC according to one or more embodiments may be positioned on the color filter layer CF. The overcoat layer OC may planarize an upper side of the color filter layer CF.

[0173] The overcoat layer OC may be made of an organic material, such as acrylic resin, methacrylate resin, polyisoprene resin, imide resin, vinyl resin, epoxy resin, urethane resin, cellulose resin, and / or perylene resin.

[0174] Figure 6 yes Figure 5 FIG. 1 is an enlarged cross-sectional view of the display element layer 150 and the quantum dot layer 160 positioned in a portion overlapping the first light emitting area EA1.

[0175] Reference Figure 6 The residual pattern 153 according to one or more embodiments may be positioned between the pixel defining layer 151 and the first anode electrode AE1 in the third direction (Z-axis direction). The residual pattern 153 according to one or more embodiments may be positioned to contact both sides of the first light emitting layer EL1 in the first direction (X-axis direction).

[0176] The display device 10 according to one or more embodiments may include a sacrificial layer ( Figure 8The sacrificial layer SFL may be located between the pixel defining layer 151 and the anode electrode AE and may be partially removed by a subsequent etching process. In this case, the portion of the sacrificial layer SFL that is not removed may remain as a residual pattern 153 between the pixel defining layer 151 and the anode electrode AE. The manufacturing process will be described later.

[0177] The residual pattern 153 according to one or more embodiments may include an oxide semiconductor. As an example, the residual pattern 153 may include at least one of indium gallium zinc oxide (IGZO), zinc tin oxide (ZTO), and indium tin oxide (IZO).

[0178] The pixel defining layer 151 according to one or more embodiments may be positioned to contact the second via layer 127 and the first anode electrode AE1. The pixel defining layer 151 may contact the anode electrode AE, the residual pattern 153, the first light emitting layer EL1, and the auxiliary electrode AX in a portion overlapping the first light emitting area EA1, and may contact the bank layer 159 in a portion overlapping the non-light emitting area NLA.

[0179] The pixel defining layer 151 may include an inorganic insulating material and may include, for example, silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, aluminum oxide, tantalum oxide, hafnium oxide, zinc oxide (ZnO x , which may be at least one of ZnO or ZnO2) and an amorphous silicon layer, but is not limited thereto.

[0180] In some embodiments, the pixel defining layer 151 may include an upper surface 151a and a side surface 151c. The upper surface 151a of the pixel defining layer 151 may be a surface facing the bank layer 159, and the side surface 151c of the pixel defining layer 151 may be a surface facing the first opening OP1. A portion of the upper surface 151a of the pixel defining layer 151 may be covered by and may be in contact with the auxiliary electrode AX. In addition, the side surface 151c of the pixel defining layer 151 may be completely covered by and may be in contact with the first light emitting layer EL1.

[0181] The bank layer 159 according to one or more embodiments may contact the pixel defining layer 151 .

[0182] In some embodiments, the bank layer 159 according to one or more embodiments may include an upper surface 159a and a side surface 159c. The upper surface 159a of the bank layer 159 may be a surface facing the second inorganic layer 169, and the side surface 159c of the bank layer 159 may be a surface facing the first opening OP1.

[0183] The side surface 159c of the bank layer 159 may be recessed in the first direction (X-axis direction) relative to the side surface 151c of the pixel defining layer 151. In other words, the side surface 151c of the pixel defining layer 151 according to one or more embodiments may have a shape that protrudes more toward the first light emitting area EA1 in the first direction (X-axis direction) than the side surface 159c of the bank layer 159. In addition, the upper surface 159a and the side surface 159c of the bank layer 159 may be completely covered by the auxiliary electrode AX and may be in full contact with the auxiliary electrode AX. In other words, the upper surface 159a and the side surface 159c of the bank layer 159 may be surrounded by the auxiliary electrode AX.

[0184] The bank layer 159 may include an organic light blocking material and may include, for example, acrylic resin, methacrylate resin, polyisoprene resin, vinyl resin, epoxy resin, urethane resin, cellulose resin and / or perylene resin. The dye or pigment may include carbon black or the like.

[0185] In some embodiments, a height H151 of the pixel defining layer 151 may be lower than a height H159 of the bank layer 159 .

[0186] The auxiliary electrode AX according to one or more embodiments may cover the upper surface 151a of the pixel defining layer 151 together with the upper surface 159a and the side surface 159c of the bank layer 159, or overlap with the upper surface 151a of the pixel defining layer 151 together with the upper surface 159a and the side surface 159c of the bank layer 159, and the auxiliary electrode AX may be in contact with the upper surface 151a of the pixel defining layer 151 together with the upper surface 159a and the side surface 159c of the bank layer 159. The auxiliary electrode AX may surround the first opening OP1. That is, the auxiliary electrode AX may expose the first opening OP1.

[0187] The auxiliary electrode AX may be electrically connected to the first cathode electrode CE1 and may reflect light incident from the first quantum dot layer 163 toward the auxiliary electrode AX.

[0188] The auxiliary electrode AX may be a conductive metal having a reflective property. As an example, the auxiliary electrode AX may include any one of Al, Cu, Ag, Au, Mg, Pt, Pd, Ni, Nd, Ir, Cr, BaF2, and Ba.

[0189] In some embodiments, the auxiliary electrode AX may include a first portion x1, a second portion x2, a third portion x3, a fourth portion x4, and a fifth portion x5, depending on the structure of the contact in the direction toward the first opening OP1. The first portion x1 may be a portion in contact with the light-emitting layer EL, the second portion x2 may be a portion in contact with the organic pattern ELP, and the third portion x3 may be a portion in contact with the first inorganic layer 161. The first portion x1 and the second portion x2 may be spaced apart from each other, with the third portion x3 interposed between the first portion x1 and the second portion x2. In addition, the fourth portion x4 may be a portion in contact with the cathode electrode CE, and the fifth portion x5 may be a portion in contact with the capping layer CPL. In one or more embodiments, the cathode electrode CE and the auxiliary electrode AX may be electrically connected via the fourth portion x4, and / or the fifth portion x5 may be omitted.

[0190] The organic pattern ELP according to one or more embodiments may be positioned on the auxiliary electrode AX in a portion overlapping the bank layer 159. The organic pattern ELP according to one or more embodiments may surround the first opening OP1.

[0191] As described above, the light-emitting layer EL according to one or more embodiments can be formed through deposition and photo-patterning processes without using a separate fine metal mask in the manufacturing process. Therefore, the material forming the light-emitting layer EL can be deposited not only on the anode electrode AE, but also on the bank layer 159. That is, since the bank layer 159 according to one or more embodiments is formed in a reverse tapered shape, the organic pattern ELP according to one or more embodiments can be formed in a state in which the material forming the light-emitting layer EL deposited on the bank layer 159 is disconnected from the material forming the light-emitting layer EL deposited on the anode electrode AE. Therefore, the organic pattern ELP can include the same material as the light-emitting layer EL and can be spaced apart from the light-emitting layer EL. In other words, since the display device 10 according to one or more embodiments includes the organic pattern ELP on the bank layer 159, it can be seen that the process of forming the light-emitting layer EL is performed as a photo-patterning process. However, depending on the process, the organic pattern ELP can also be removed.

[0192] The electrode pattern CEP according to one or more embodiments may be positioned on the organic pattern ELP in a portion overlapping the bank layer 159. The electrode pattern CEP according to one or more embodiments may surround the first opening OP1. The stacking relationship between the electrode pattern CEP and the organic pattern ELP may be the same as the stacking relationship between the cathode electrode CE and the light emitting layer EL.

[0193] As described above, the cathode electrode CE according to one or more embodiments can be formed through deposition and photo-patterning processes without using a separate fine metal mask in the manufacturing process. Therefore, the material forming the cathode electrode CE can be deposited not only on the anode electrode AE but also on the bank layer 159. That is, since the bank layer 159 according to one or more embodiments is formed in a reverse tapered shape, the electrode pattern CEP according to one or more embodiments can be formed in a state where the material forming the cathode electrode CE deposited on the bank layer 159 is disconnected from the material forming the cathode electrode CE deposited on the anode electrode AE. Therefore, the electrode pattern CEP can include the same material as the cathode electrode CE and can be spaced apart from the cathode electrode CE. In other words, since the display device 10 according to one or more embodiments includes the electrode pattern CEP on the bank layer 159, it can be seen that the process of forming the cathode electrode CE is performed as a photo-patterning process. However, depending on the process, the electrode pattern CEP can also be removed.

[0194] The capping pattern CP according to one or more embodiments may be positioned on the electrode pattern CEP in a portion overlapping the bank layer 159. The capping pattern CP according to one or more embodiments may surround the first opening OP1. The stacking relationship between the capping pattern CP and the electrode pattern CEP may be the same as the stacking relationship between the capping layer CPL and the cathode electrode CE.

[0195] As described above, the capping layer CPL according to one or more embodiments can be formed by deposition and photo-patterning processes without using a separate fine metal mask in the manufacturing process. Therefore, the material forming the capping layer CPL can be deposited not only on the anode electrode AE, but also on the embankment layer 159. That is, since the embankment layer 159 according to one or more embodiments is formed in a reverse tapered shape, the capping pattern CP according to one or more embodiments can be formed in a state in which the material forming the capping layer CPL deposited on the embankment layer 159 is disconnected from the material forming the capping layer CPL deposited on the anode electrode AE. Therefore, the capping pattern CP can include the same material as the capping layer CPL and can be spaced apart from the capping layer CPL. In other words, since the display device 10 according to one or more embodiments includes the capping pattern CP on the embankment layer 159, it can be seen that the process of forming the capping layer CPL is performed as a photo-patterning process. However, depending on the process, the capping pattern CP can also be removed.

[0196] The first inorganic layer 161 according to one or more embodiments may completely cover and contact the first capping layer CPL1 , the auxiliary electrode AX, and the capping pattern CP in a portion overlapping the first light emitting area EA1 .

[0197] The first quantum dot layer 163 according to one or more embodiments may be positioned in a portion overlapping with the first opening OP1 and may not overlap with the second opening OP2 and the non-light emitting area NLA. The first quantum dot layer 163 may be completely surrounded by the first inorganic layer 161 and the second inorganic layer 169 in a portion overlapping with the first light emitting area EA1. Since the first base resin 163a included in the first quantum dot layer 163, and the first scatterers 163b and the first wavelength shifters 163c dispersed in the first base resin 163a have been mentioned, repeated description thereof will be omitted.

[0198] The second inorganic layer 169 according to one or more embodiments may cover the first quantum dot layer 163 in a portion overlapping the first opening OP1 and may be in contact with the first quantum dot layer 163. In addition, the second inorganic layer 169 may cover the first inorganic layer 161 in a portion overlapping the second opening OP2 and the non-light emitting area NLA and may be in contact with the first inorganic layer 161.

[0199] The first and second inorganic layers 161 and 169 according to one or more embodiments may overlap the residual pattern 153 , the organic pattern ELP, the electrode pattern CEP, and the capping pattern CP in the third direction (Z-axis direction). Other redundant descriptions will be omitted.

[0200] Figure 7 yes Figure 5 FIG. 1 is an enlarged cross-sectional view of the display element layer 150 and the quantum dot layer 160 positioned in a portion overlapping the non-emission area NLA between the first and second emission areas EA1 and EA2.

[0201] Reference Figure 7 , the first light emitting element ED1 and the second light emitting element ED2 according to one or more embodiments may be spaced apart from each other in the first direction (X-axis direction) by the pixel defining layer 151 and the bank layer 159. In addition, the residual pattern 153 (see FIG. 154 ) in contact with the first light emitting layer EL1 Figure 5 ) and the residual pattern 153 in contact with the second light emitting layer EL2 may be spaced apart from each other by the pixel defining layer 151. In addition, the first quantum dot layer 163 and the second quantum dot layer 165 may be spaced apart from each other in the first direction (X-axis direction) by the bank layer 159.

[0202] In some embodiments, the upper surface 151a of the pixel defining layer 151 may be divided into a first portion a1 and a second portion a2 according to the portion in contact with the upper surface 151a. The first portion a1 may be a portion in contact with the auxiliary electrode AX, and the second portion a2 may be a portion in contact with the bank layer 159. The first portion a1 may be formed in plurality, and the plurality of first portions a1 may be spaced apart from each other, with the second portion a2 interposed between the plurality of first portions a1.

[0203] The bank layer 159 according to one or more embodiments may be completely surrounded by the auxiliary electrode AX and the pixel defining layer 151 .

[0204] In some embodiments, the bank layer 159 may further include a lower surface 159b in addition to the upper surface 159a. As described above, the bank layer 159 according to one or more embodiments may have a reverse tapered shape. Therefore, the width W159a of the upper surface 159a of the bank layer 159 may be greater than the width W159b of the lower surface 159b of the bank layer 159.

[0205] The organic pattern ELP, the electrode pattern CEP, and the capping pattern CP according to one or more embodiments may be positioned in a portion overlapping the first light-emitting area EA1, the second light-emitting area EA2, and the non-light-emitting area NLA. The electrode pattern CEP according to one or more embodiments may completely cover the upper surface of the organic pattern ELP, and the capping pattern CP according to one or more embodiments may completely cover the upper surface of the electrode pattern CEP.

[0206] The first inorganic layer 161 and the second inorganic layer 169 according to one or more embodiments may contact each other in a portion overlapping the non-emission area NLA. Other redundant descriptions will be omitted.

[0207] The first and second color filters CF1 and CF2 according to one or more embodiments may overlap the residual pattern 153 , the organic pattern ELP, the electrode pattern CEP, and the capping pattern CP in the third direction (Z-axis direction). Other redundant descriptions will be omitted.

[0208] Figures 8 to 16 is a schematic diagram showing the method for making Figure 5 A cross-sectional view of the method of displaying the element layer 150 and the quantum dot layer 160 in FIG.

[0209] Reference Figure 8 and Figure 9 , the anode electrode AE, the sacrificial layer SFL and the pixel definition material layer 151L are formed on the thin film transistor layer 130 (as used herein, "formed on" may mean "formed above"). Because the structure of the thin film transistor layer 130 is the same as that of the above reference Figure 5The structures described are the same, so repeated detailed descriptions thereof will be omitted.

[0210] The anode electrode AE may include a first anode electrode AE1, a second anode electrode AE2, and a third anode electrode AE3 that are spaced apart from each other on the thin film transistor layer 130. A sacrificial layer SFL may be positioned on each of the first anode electrode AE1, the second anode electrode AE2, and the third anode electrode AE3. The sacrificial layer SFL may help reduce or prevent the possibility that the upper surfaces of the first anode electrode AE1, the second anode electrode AE2, and the third anode electrode AE3 will come into contact with the pixel defining material layer 151L.

[0211] The pixel-defining material layer 151L may be positioned on the first anode electrode AE1, the second anode electrode AE2, the third anode electrode AE3, and the sacrificial layer SFL. The pixel-defining material layer 151L may completely cover the sacrificial layer SFL and the thin film transistor layer 130. Therefore, the pixel-defining material layer 151L may be in contact with the thin film transistor layer 130 and the sacrificial layer SFL.

[0212] Next, if Figure 9 As shown in FIG, a bank layer 159 is formed on the pixel defining material layer 151L by a photopatterning process. The bank layer 159 can be formed in a plurality, and the plurality of bank layers 159 can be spaced apart from each other in the first direction (X-axis direction). The pixel defining material layer 151L overlapping with each region between the plurality of bank layers 159 spaced apart from each other can be exposed. In this process, the bank layer 159 can be formed into a reverse tapered shape.

[0213] Next, refer to Figures 10 to 12 , the auxiliary electrode material layer AXL is completely formed on the pixel defining material layer 151L and the bank layer 159. The auxiliary electrode material layer AXL may be formed to have a substantially uniform thickness along a contour formed by the pixel defining material layer 151L and the bank layer 159. The auxiliary electrode material layer AXL may be in contact with the pixel defining material layer 151L and the bank layer 159.

[0214] Next, if Figure 11 As shown in FIG, a photoresist PR is formed on the auxiliary electrode material layer AXL to overlap with the bank layer 159. The photoresist PR may be formed in plurality, and the plurality of photoresists PR may be spaced apart from each other. The auxiliary electrode material layer AXL overlapping each region between the plurality of spaced-apart photoresists PR may be exposed.

[0215] Next, a first etching process is performed using the plurality of photoresists PR as a mask. As an example, in the first etching process, a dry etching process and a wet etching process may be alternately performed.

[0216] First, the first etching process may be performed as a wet etching process. In this process, a portion of the auxiliary electrode material layer AXL that does not overlap with the photoresist PR may be removed, and a portion of the pixel defining material layer 151L may be exposed.

[0217] Next, after the wet etching process, the first etching process may be performed as a dry etching process. In this process, a portion of the pixel defining material layer 151L that does not overlap with the photoresist PR may be removed, thereby exposing a portion of the sacrificial layer SFL.

[0218] Finally, after the dry etching process, the first etching process may be performed as a wet etching process. In this process, a portion of the sacrificial layer SFL that does not overlap with the photoresist PR may be removed, and a portion of the anode electrode AE may be exposed.

[0219] like Figure 12 As shown in FIG, through this process, the pixel definition material layer 151L and the auxiliary electrode material layer AXL can be formed as Figure 5 The pixel defining layer 151 and the auxiliary electrode AX are shown in FIG, and the sacrificial layer SFL may be formed as Figure 5 The form of the residual pattern 153 is shown in FIG.

[0220] Next, refer to Figure 13 , a light emitting layer EL, a cathode electrode CE and a capping layer CPL are deposited on the anode electrode AE.

[0221] The process of forming the light-emitting layer EL according to one or more embodiments can be formed by a thermal deposition process. In the process of forming the light-emitting layer EL according to one or more embodiments, since the bank layer 159 is formed in a reverse tapered shape, the first light-emitting layer EL1, the second light-emitting layer EL2, and the third light-emitting layer EL3 can be spaced apart from each other without using a separate fine metal mask. As described above, the first light-emitting layer EL1, the second light-emitting layer EL2, and the third light-emitting layer EL3 can be formed in a series structure, and as a result, the first light-emitting layer EL1, the second light-emitting layer EL2, and the third light-emitting layer EL3 can include the same material.

[0222] In this process, the material forming the light emitting layer EL may be formed not only on the anode electrode AE but also on the auxiliary electrode AX positioned to overlap with the bank layer 159. The material forming the light emitting layer EL (which is formed on the auxiliary electrode AX) may be formed in the following manner: Figure 5 Therefore, the organic pattern ELP and the light emitting layer EL may be spaced apart from each other and may include the same material.

[0223] The process of forming the cathode electrode CE according to one or more embodiments can be formed by a thermal deposition process. In the process of forming the cathode electrode CE according to one or more embodiments, since the bank layer 159 is formed in a reverse tapered shape, the first cathode electrode CE1, the second cathode electrode CE2, and the third cathode electrode CE3 can be spaced apart from each other without using a separate fine metal mask. Therefore, the first cathode electrode CE1, the second cathode electrode CE2, and the third cathode electrode CE3 may include the same material.

[0224] However, compared to the process for forming the light-emitting layer EL, the deposition process for forming the cathode electrode CE according to one or more embodiments can be performed at an angle of approximately 15° or greater and approximately 30° or less in the direction toward the anode electrode AE. In other words, compared to the deposition process for forming the light-emitting layer EL, the deposition process for forming the cathode electrode CE can be performed at an angle that is relatively more horizontal. As a result, the step coverage of the deposition process for forming the cathode electrode CE can be higher than that of the deposition process for forming the light-emitting layer EL. Therefore, according to one or more embodiments, the cathode electrode CE can not only be formed on the light-emitting layer EL but can also contact the auxiliary electrode AX. As a result, according to one or more embodiments, the cathode electrode CE and the auxiliary electrode AX can be electrically connected.

[0225] In this process, the material forming the cathode electrode CE may be formed not only on the anode electrode AE but also on the auxiliary electrode AX positioned to overlap the bank layer 159. The material forming the cathode electrode CE (which is formed on the auxiliary electrode AX) may be formed in the following manner: Figure 5 The electrode pattern CEP and the cathode electrode CE may be spaced apart from each other and may include the same material.

[0226] The process of forming the capping layer CPL according to one or more embodiments may be formed by a thermal deposition process or a sputtering deposition process. In the process of forming the capping layer CPL according to one or more embodiments, since the bank layer 159 is formed in a reverse tapered shape, the first capping layer CPL1, the second capping layer CPL2, and the third capping layer CPL3 can be spaced apart from each other without using a separate fine metal mask. Therefore, the first capping layer CPL1, the second capping layer CPL2, and the third capping layer CPL3 may include the same material. In one or more embodiments, the process of forming the capping layer CPL may be omitted.

[0227] In this process, the material forming the capping layer CPL may be formed not only on the anode electrode AE but also on the auxiliary electrode AX positioned to overlap with the bank layer 159. The material forming the capping layer CPL (which is formed on the auxiliary electrode AX) may be formed in the following manner: Figure 5The capping pattern CP and the capping layer CPL may be spaced apart from each other and may include the same material.

[0228] Through this process, it is possible to form Figure 5 The first light emitting element ED1, the second light emitting element ED2 and the third light emitting element ED3 are shown in FIG.

[0229] Next, refer to Figures 14 to 16 , forming a first inorganic layer 161 that completely covers the capping layer CPL and the capping pattern CP. The first inorganic layer 161 may be formed by a chemical vapor deposition process and may be formed with the same thickness along the contour of the lower structure.

[0230] Next, if Figure 15 , a first quantum dot layer 163 is applied on the first inorganic layer 161 positioned in a portion overlapping with the first light-emitting element ED1, a second quantum dot layer 165 is applied on the first inorganic layer 161 positioned in a portion overlapping with the second light-emitting element ED2, and a third quantum dot layer 167 is applied on the first inorganic layer 161 positioned in a portion overlapping with the third light-emitting element ED3. The first quantum dot layer 163, the second quantum dot layer 165, and the third quantum dot layer 167 can be applied by an inkjet method.

[0231] Next, if Figure 16 As shown in FIG, the second inorganic layer 169 is completely formed on the first quantum dot layer 163, the second quantum dot layer 165, the third quantum dot layer 167, and the first inorganic layer 161. The second inorganic layer 169 may be in contact with the first quantum dot layer 163, the second quantum dot layer 165, the third quantum dot layer 167, and the first inorganic layer 161.

[0232] As a result, it can be formed Figure 5 . Since the display device 10 according to one or more embodiments includes the bank layer 159 having a reverse tapered shape, a high-resolution light-emitting element ED can be appropriately manufactured. Furthermore, since the display device 10 according to one or more embodiments includes the auxiliary electrode AX covering the bank layer 159, it can assist in the electrical connection of the cathode electrode CE and can reflect a portion of the source light scattered from the quantum dot layer 160. Therefore, the display device 10 according to one or more embodiments can provide a product with high efficiency and high resolution.

[0233] It should be understood that the embodiments described herein should be considered in a descriptive sense rather than for purposes of limitation. The description of aspects in each embodiment should generally be considered applicable to other similar aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope defined by the appended claims and their equivalents.

Claims

1. A display device, wherein: The display device includes: a substrate comprising a light-emitting region and a non-light-emitting region; a pixel defining layer at the non-light emitting area, wherein the pixel defining layer defines a first opening; a bank layer above the pixel defining layer, wherein the bank layer defines a second opening; an auxiliary electrode, above the bank layer, and the auxiliary electrode completely covers the bank layer; a first cathode electrode at the light emitting region, the first cathode electrode contacting the auxiliary electrode; and A first quantum dot layer is above the first cathode electrode.

2. The display device according to claim 1, wherein The bank layer is completely surrounded by the pixel defining layer and the auxiliary electrode.

3. The display device according to claim 2, wherein: The bank layer has a reverse tapered shape.

4. The display device according to claim 3, wherein A height of the bank layer in a direction perpendicular to the substrate is greater than a height of the pixel defining layer.

5. The display device according to claim 4, wherein The bank layer includes an organic material, and Wherein, the auxiliary electrode comprises a conductive metal. The display device according to claim 1 , wherein: The first cathode electrode is electrically connected to the auxiliary electrode.

7. The display device according to claim 1, wherein The display device further includes: a light-emitting layer located between the substrate and the first cathode electrode in a direction perpendicular to the substrate; an organic pattern over the bank layer, the organic pattern including the same material as the light emitting layer and spaced apart from the light emitting layer; and An electrode pattern is provided over the organic pattern, the electrode pattern including the same material as the first cathode electrode and spaced apart from the first cathode electrode.

8. The display device according to claim 7, wherein: The display device further includes: a first inorganic layer above the first cathode electrode and the electrode pattern, The auxiliary electrode includes a first portion contacting the light emitting layer, a second portion contacting the organic pattern, and a third portion contacting the first inorganic layer, and The first portion and the second portion are spaced apart from each other, and the third portion is located between the first portion and the second portion.

9. The display device according to claim 8, wherein The display device further includes: a second inorganic layer, above the first inorganic layer, Wherein, in a portion overlapping with the light emitting region, the first quantum dot layer is completely surrounded by the first inorganic layer and the second inorganic layer.

10. The display device according to claim 7, wherein: The display device further includes: a second cathode electrode spaced apart from the first cathode electrode with the bank layer interposed between the first cathode electrode and the second cathode electrode, and the second cathode electrode being electrically connected to the first cathode electrode through the auxiliary electrode; and A second quantum dot layer is above the second cathode electrode.

11. The display device according to claim 10, wherein: The first quantum dot layer and the second quantum dot layer are spaced apart from each other in a direction parallel to the substrate, and the organic pattern and the electrode pattern are interposed between the first quantum dot layer and the second quantum dot layer.

12. The display device according to claim 11, wherein The first quantum dot layer and the second quantum dot layer each include a quantum dot material.

13. The display device according to claim 7, wherein: The display device further includes a residual pattern located between the substrate and the pixel defining layer in the direction perpendicular to the substrate, The residual pattern overlaps with the auxiliary electrode in the direction perpendicular to the substrate.

14. The display device according to claim 13, wherein: The residual pattern contacts the light emitting layer, and the residual pattern includes an oxide semiconductor.

15. The display device according to claim 7, wherein: The display device further includes: a color filter, above the first quantum dot layer, The light-emitting layer is configured to emit light to the outside through the first quantum dot layer and the color filter.

16. The display device according to claim 1, wherein The first opening is completely surrounded by the second opening in a plan view.

17. A method for manufacturing a display device, wherein: The method comprises: forming an anode electrode above the substrate; forming a sacrificial layer above the anode electrode; forming a pixel defining layer over the sacrificial layer; forming a bank layer having a reverse tapered shape above the pixel defining layer; forming an auxiliary electrode that completely covers the bank layer; forming a photoresist above the auxiliary electrode; removing the auxiliary electrode, the pixel defining layer, and a portion of the sacrificial layer; forming a light-emitting layer and a cathode electrode above the anode electrode; forming a first inorganic layer above the cathode electrode; forming a quantum dot layer over the first inorganic layer; and A second inorganic layer is formed covering the first inorganic layer and the quantum dot layer.

18. The method according to claim 17, wherein In the removing of the portion of the auxiliary electrode, the auxiliary electrode exposes a portion of the anode electrode.

19. The method according to claim 18, wherein The forming of the light emitting layer and the cathode electrode is performed without using a separate fine metal mask.

20. The method according to claim 19, wherein The cathode electrode contacts and is electrically connected to the auxiliary electrode.

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