Display panel, preparation method thereof and display device

By setting a conductive layer in the OLED display panel to achieve electrical connection between the cathode and the isolation structure, the problem of poor overlap between the cathode and the isolation structure is solved, the reliability of the display panel is improved and the manufacturing process is simplified.

CN120456757BActive Publication Date: 2025-11-21HEFEI VISIONOX TECH CO LTD
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Patent Information

Application Number
CN202510955276.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-07-11
Publication Date
2025-11-21
Estimated Expiration
2045-07-11

AI Technical Summary

Technical Problem

The reliability of existing OLED display panels needs to be improved, especially the problem of dark spots or dark patches caused by poor bonding between the cathode and the isolation structure.

Method used

A conductive layer is placed between the substrate and the pixel definition layer, so that the cathode and the isolation structure are respectively connected to the conductive layer, thereby realizing the electrical connection between the cathode and the isolation structure, reducing process requirements and ensuring the connection effect.

Benefits of technology

It improves the reliability of the display panel, avoids the occurrence of dark spots or blemishes, expands the process edge, and simplifies the manufacturing process.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application provides a display panel, a preparation method thereof and a display device. The display panel comprises a substrate, a pixel definition layer located on one side of the substrate, the pixel definition layer being provided with a plurality of first-type openings and a plurality of second-type openings, a plurality of light-emitting units, at least part of the light-emitting units being located in the first-type openings, the light-emitting units comprising a first electrode, a light-emitting functional layer and a second electrode which are sequentially stacked away from the substrate, an isolation structure located on the side of the pixel definition layer away from the substrate, the isolation structure enclosing a plurality of isolated openings, the orthographic projection of the first-type openings on the substrate being located in the orthographic projection of the isolated openings on the substrate, a conductive layer located between the substrate and the pixel definition layer, the second-type openings exposing at least part of the conductive layer, and the second electrode and the isolation structure being electrically connected through the conductive layer. The technical scheme of the application can improve the lap joint and improve the reliability of the display panel.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel, a preparation method thereof and a display device. BACKGROUND

[0002] Organic Light Emitting Diode (OLED) display technology is considered as the most potential new display technology of the next generation. Compared with liquid crystal display technology, OLED display technology has the advantages of low energy consumption, low cost, self-luminous, wide viewing angle and fast response speed.

[0003] In the preparation process of a traditional OLED display panel, a fine metal mask (FMM) is usually used to realize the patterning of a light-emitting pixel. The FMM technology is mature and has rich mass production experience. However, the FMM technology also has the problems of limited precision and high cost. The fine metal mask-free technology eliminates the limitations of the traditional OLED process on the size, resolution and other performance of the display screen, and has the advantages of high performance, full-size and agile delivery. The patents CN118251982A, CN115666161A, CN116648095A, CN117062489A, CN118678742A, CN118785761A, CN115224220A, CN118678729A, CN118660529A and CN118660589A disclose the related content of the fine metal mask-free technology, which are referred to for reference.

[0004] However, the reliability of the current display panel needs to be improved. SUMMARY

[0005] In order to overcome the technical problems mentioned in the background art, the embodiments of the present application provide a display panel, a preparation method thereof and a display device.

[0006] In a first aspect, the embodiments of the present application provide a display panel, comprising: a substrate; a pixel definition layer located on one side of the substrate, the pixel definition layer being provided with a plurality of first-type openings and a plurality of second-type openings; a plurality of light-emitting units, at least part of the light-emitting units being located in the first-type openings, the light-emitting units comprising a first electrode, a light-emitting functional layer and a second electrode which are sequentially stacked away from the substrate; an isolation structure located on the side of the pixel definition layer away from the substrate, the isolation structure enclosing a plurality of isolated openings, the orthographic projection of the first-type openings on the substrate being located in the orthographic projection of the isolated openings on the substrate; a conductive layer located between the substrate and the pixel definition layer, at least part of the conductive layer being exposed by the second-type openings, the second electrode and the isolation structure being electrically connected through the conductive layer.

[0007] In combination with the first aspect, the second type of opening includes a plurality of first openings and a second opening arranged adjacently, the second opening is located on a side of the first opening away from the first type of opening; the first opening exposes a first portion of the conductive layer, and the second opening exposes a second portion of the conductive layer; the second electrode is in contact with the first portion of the conductive layer, and the isolation structure is in contact with the second portion of the conductive layer; the second electrode covers the first type of opening and extends towards the first opening and covers at least part of the first opening.

[0008] In combination with the first aspect, the pixel definition layer includes a first side surface corresponding to the first opening, a first included angle between the first side surface and a surface of the pixel definition layer close to the substrate is greater than 0 and less than or equal to 45°.

[0009] In combination with the first aspect, the second type of opening includes a plurality of third openings, the third openings expose at least part of the conductive layer, and the second electrode and the isolation structure are respectively in electrical connection with the conductive layer exposed by the third openings; the second electrode covers the first type of opening and extends towards the third opening and covers at least part of the third opening.

[0010] In combination with the first aspect, the pixel definition layer includes a second side surface corresponding to the third opening, a second included angle between the second side surface and a surface of the pixel definition layer close to the substrate is greater than 0 and less than or equal to 45°.

[0011] In combination with the first aspect, the isolation structure includes a first part and a second part arranged in a stacked manner along a direction away from the substrate, a projection of the first part on the substrate is located within a projection of the second part on the substrate, and the first part is in contact with the conductive layer; or, the isolation structure includes a third part, a first part and a second part arranged in a stacked manner along a direction away from the substrate, a projection of the first part on the substrate is located within a projection of the second part on the substrate, a projection of the third part on the substrate is located within a projection of the second part on the substrate, and the third part is in contact with the conductive layer.

[0012] In combination with the first aspect, a projection of at least part of a side surface of the first part facing the isolation opening on the substrate is located within a projection of the conductive layer on the substrate; and / or, a projection of at least part of a side surface of the third part facing the isolation opening on the substrate is located within a projection of the conductive layer on the substrate.

[0013] In combination with the first aspect, the conductive layer includes a plurality of conductive parts arranged at intervals, and a projection of the conductive part on the substrate at least partially surrounds a projection of the first electrode on the substrate.

[0014] In combination with the first aspect, a projection of the conductive part on the substrate surrounds a projection of the first electrode on the substrate.

[0015] In combination with the first aspect, a projection of the conductive layer on the substrate includes a grid structure, the conductive layer is provided with a plurality of grid holes, and a projection of the first electrode on the substrate is located within a projection of the grid hole on the substrate.

[0016] In combination with the first aspect, a projection of the grid hole on the substrate at least partially overlaps with a projection of the isolation opening on the substrate; preferably, the projection of the grid hole on the substrate is located within the projection of the isolation opening on the substrate.

[0017] In combination with the first aspect, the conductive layer is provided in the same layer and of the same material as the first electrode; preferably, the conductive layer comprises a first sub-conductive layer and a second sub-conductive layer which are sequentially stacked in a direction away from the substrate; or, the conductive layer comprises a third sub-conductive layer, a first sub-conductive layer and a second sub-conductive layer which are sequentially stacked in a direction away from the substrate; preferably, the first sub-conductive layer is made of metal, and the second sub-conductive layer and the third sub-conductive layer are made of transparent conductive oxide.

[0018] In combination with the first aspect, the display panel further comprises a first encapsulation layer located on a side of the light emitting unit away from the substrate, the first encapsulation layer comprises a plurality of encapsulation units which are spaced apart, the encapsulation units correspond to the light emitting units, and a projection of the light emitting unit on the substrate is located within a projection of the encapsulation unit on the substrate; preferably, the display panel further comprises a second encapsulation layer and a third encapsulation layer which are sequentially stacked in a direction away from the substrate and are located on a side of the first encapsulation layer away from the substrate; preferably, the first encapsulation layer comprises an inorganic encapsulation layer, the second encapsulation layer comprises an organic encapsulation layer, and the third encapsulation layer comprises an inorganic encapsulation layer.

[0019] In combination with the second aspect, the pixel definition layer comprises a second side surface corresponding to the third opening, a first included angle between the second side surface and a surface of the pixel definition layer close to the substrate is greater than 0 and less than or equal to 45°; preferably, the second electrode covers the first opening and extends in a direction close to the third opening and covers at least part of the third opening; preferably, the conductive layer and the first electrode are provided in the same layer and of the same material; preferably, the conductive layer comprises a plurality of conductive portions which are spaced apart, and the conductive portions at least partially surround the first electrode; or, a projection of the conductive layer on the substrate comprises a grid structure, the conductive layer is provided with a plurality of grid holes, and the first electrode is located in the grid hole.

[0020] In combination with the second aspect, the pixel definition layer comprises a second side surface corresponding to the third opening, a first included angle between the second side surface and a surface of the pixel definition layer close to the substrate is greater than 0 and less than or equal to 45°; preferably, the second electrode covers the first opening and extends in a direction close to the third opening and covers at least part of the third opening; preferably, the conductive layer and the first electrode are provided in the same layer and of the same material; preferably, the conductive layer comprises a plurality of conductive portions which are spaced apart, and the conductive portions at least partially surround the first electrode; or, a projection of the conductive layer on the substrate comprises a grid structure, the conductive layer is provided with a plurality of grid holes, and the first electrode is located in the grid hole.

[0021] In a third aspect, the embodiments of the present application further provide a display panel, comprising: a substrate; a pixel definition layer located on one side of the substrate, the pixel definition layer being provided with a plurality of first-type openings and a plurality of second-type openings; a plurality of light-emitting units, at least part of the light-emitting units being located in the first-type openings, the light-emitting units comprising a first electrode, a light-emitting functional layer and a second electrode which are sequentially stacked away from the substrate; an isolation structure located on the side of the pixel definition layer away from the substrate, the isolation structure enclosing a plurality of isolated openings, a normal projection of the first-type openings on the substrate being located within a normal projection of the isolated openings on the substrate; and a conductive layer located between the substrate and the pixel definition layer, a normal projection of the conductive layer on the substrate comprising a grid structure, the conductive layer being provided with a plurality of grid holes, a normal projection of the first-type openings on the substrate being located within a normal projection of the grid holes on the substrate, the second-type openings exposing at least part of the conductive layer, the conductive layer being in contact with the isolation structure and the second electrode respectively.

[0022] In combination with the third aspect, the isolation structure comprises a first part and a second part which are sequentially stacked away from the substrate, a normal projection of the first part on the substrate being located within a normal projection of the second part on the substrate, the first part being in contact with the conductive layer; or the isolation structure comprises a third part, a first part and a second part which are sequentially stacked away from the substrate, a normal projection of the first part on the substrate being located within a normal projection of the second part on the substrate, a normal projection of the third part on the substrate being located within a normal projection of the second part on the substrate, the third part being in contact with the conductive layer.

[0023] In combination with the third aspect, a normal projection of the first part on the substrate is located within a normal projection of the conductive layer on the substrate; and / or, a normal projection of the third part on the substrate is located within a normal projection of the conductive layer on the substrate.

[0024] In combination with the third aspect, the second-type openings comprise third openings, a normal projection of the first part and / or the third part on the substrate being located within a normal projection of the third openings on the substrate.

[0025] In combination with the third aspect, the light-emitting units comprise a first electrode, a light-emitting functional layer and a second electrode which are sequentially stacked away from the substrate, the conductive layer being in contact with the second electrode; preferably, the second-type openings comprise a plurality of first openings and second openings which are adjacently arranged, the second openings being located on a side of the first openings away from the first-type openings; the first openings expose a first part of the conductive layer, the second openings expose a second part of the conductive layer, the second electrode being in contact with the first part of the conductive layer, the isolation structure being in contact with the second part of the conductive layer; or the second-type openings comprise a plurality of third openings, the third openings exposing at least part of the conductive layer, the second electrode and the isolation structure being respectively electrically connected with the conductive layer exposed by the third openings.

[0026] Fourthly, embodiments of this application also provide a method for fabricating a display panel, comprising: fabricating a first electrode and a conductive layer on a substrate, the first electrode and the conductive layer being spaced apart; fabricating a pixel definition layer and an isolation structure on the side of the first electrode and the conductive layer away from the substrate, the pixel definition layer having a plurality of first type openings and a plurality of second type openings, the first type openings exposing at least a portion of the first electrode, the second type openings exposing at least a portion of the conductive layer, the isolation structure enclosing a plurality of isolation openings, the orthographic projection of the first type openings on the substrate being located within the orthographic projection of the isolation openings on the substrate; fabricating a light-emitting functional layer and a second electrode within the isolation openings, the second electrode and the isolation structure being electrically connected through the conductive layer.

[0027] In conjunction with the fourth aspect, a pixel definition layer and an isolation structure are fabricated on the side of the first electrode and conductive layer away from the substrate, comprising: fabricating a pixel definition material layer on the side of the first electrode and conductive layer away from the substrate; performing a first patterning process on the pixel definition material layer to obtain a second type of opening; fabricating an isolation structure on the side of the pixel definition material layer away from the substrate, the isolation structure covering a portion of the second type of opening to contact the conductive layer; and performing a second patterning process on the pixel definition material layer to obtain a first type of opening.

[0028] Fifthly, embodiments of this application also provide a display device, including: the display panel described above, or a display panel prepared according to the preparation method described above.

[0029] By using the above technical solution, a conductive layer is set between the substrate and the pixel definition layer. The cathode (i.e., the second electrode) and the isolation structure are respectively connected to the conductive layer. That is, the cathode is connected to the conductive layer, and the conductive layer is connected to the isolation structure. This achieves electrical connection between the cathode and the isolation structure, reduces the process requirements for connecting the isolation structure and the cathode, widens the process margin, and ensures the connection effect, avoiding dark spots or dark patches and improving the reliability of the display panel. Attached Figure Description

[0030] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 This is a schematic diagram of the structure of a display panel provided in one embodiment of this application.

[0032] Figure 2 This is a schematic cross-sectional view of a display panel provided in an embodiment of this application.

[0033] Figure 3FIG. 1 is a structural schematic diagram of a substrate of a display panel according to an embodiment of the present application.

[0034] Figure 4 FIG. 2 is a pixel circuit diagram of a display panel according to an embodiment of the present application.

[0035] Figure 5 FIG. 3 is a cross-sectional structural schematic diagram of a display panel according to another embodiment of the present application.

[0036] Figure 6 FIG. 4 is a cross-sectional structural schematic diagram of a display panel according to another embodiment of the present application.

[0037] Figure 7 FIG. 5 is a cross-sectional structural schematic diagram of a display panel according to another embodiment of the present application.

[0038] Figure 8 FIG. 6 is a cross-sectional structural schematic diagram of a display panel according to another embodiment of the present application.

[0039] Figure 9 FIG. 7 is a cross-sectional structural schematic diagram of a display panel according to another embodiment of the present application.

[0040] Figure 10 FIG. 8 is a cross-sectional structural schematic diagram of a display panel according to another embodiment of the present application.

[0041] Figure 11 FIG. 9 is a cross-sectional structural schematic diagram of a display panel according to another embodiment of the present application.

[0042] Figure 12 FIG. 10 is a cross-sectional structural schematic diagram of a display panel according to another embodiment of the present application.

[0043] Figure 13 FIG. 11 is a cross-sectional structural schematic diagram of a display panel according to another embodiment of the present application.

[0044] Figure 14 FIG. 12 is a flowchart of a preparation method of a display panel according to an embodiment of the present application.

[0045] Figure 15 FIG. 13 is a structural schematic diagram of a display device according to an embodiment of the present application.

[0046] Legend of reference signs:

[0047] 100, display panel; 10, substrate; 101, transistor; 102, planarization layer; 20, pixel definition layer; 210, first type of opening; 220, second type of opening; 221, first opening; 222, second opening; 223, third opening; 30, light emitting unit; 310, first electrode; 320, light emitting functional layer; 330, second electrode; 40, isolation structure; 401, isolation opening; 410, first portion; 420, second portion; 430, third portion; 50, conductive layer; 510, conductive portion; 610, first encapsulation layer; 611, encapsulation unit; 620, second encapsulation layer; 630, third encapsulation layer. DETAILED DESCRIPTION

[0048] In order to make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the following will be combined with the accompanying drawings for a clear and complete description of the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only some but not all of the embodiments of the present application. The components of the embodiments of the present application described and shown in the accompanying drawings can be arranged and designed in various different configurations.

[0049] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. All other embodiments obtained by a person of ordinary skill in the art without creative work based on the embodiments in the present application are within the scope of protection of the present application.

[0050] It should be noted that: similar reference numerals and letters represent similar items in the following drawings, therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. It should be noted that, in the case of no conflict, different features in the embodiments of the present application can be combined with each other.

[0051] For easy understanding, the X-axis, Y-axis, and Z-axis that are orthogonal to each other are recorded in the accompanying drawings. The direction along the X-axis is referred to as the X direction, the direction along the Y-axis is referred to as the Y direction, and the direction along the Z-axis is referred to as the Z direction. The Z direction is the normal direction with respect to the plane containing the X direction and the Y direction. In addition, the case of observing various elements in parallel with the plane containing the X direction and the Y direction is referred to as a top view. Or the plane of the X direction and the Y direction is a plane parallel to the display surface of the display panel, and the Z direction is a direction parallel to the thickness direction of the display panel.

[0052] For some elements, sometimes the terms "upper" or "above" are used when describing the position of an element in the Z direction, and the terms "lower" or "below" are used when describing the position of an element in the opposite direction. In addition, when the terms "upper", "above", "lower", "below", "relative" and the like are used to define the positional relationship between two elements, they not only include the state in which the two elements are directly connected, but also include the state in which the two elements are separated by a gap, other elements. In addition, the terms "first", "second", "third" and the like are only used for differentiation and cannot be understood as indicating or implying relative importance.

[0053] In the present application, without using a mask plate, the whole surface evaporation process is adopted to evaporate and encapsulate different color light emitting units (also referred to as different sub-pixels), and the alignment accuracy problem during evaporation does not need to be considered, so that the gap between the light emitting units can be designed to be smaller, thereby improving the pixel density. In this method, a separation structure is arranged between adjacent light emitting units, the separation structure can separate adjacent light emitting units, and the cathode needs to be overlapped with the separation structure to reduce the overall resistance and improve the display uniformity. However, the inventors have found that there is a phenomenon of poor overlap between the cathode and the separation structure, which increases the reliability risk of the display panel.

[0054] The inventors have found that one of the reasons for the poor overlap is that the separation structure is usually a titanium-aluminum-molybdenum three-layer structure, and the three-layer separation structure is obtained by first dry etching and then wet etching. The uniformity of each process such as deposition film forming process, dry etching process and wet etching process during the preparation process of the separation structure is more than 10%, and the stability after the superposition of each process cannot be controlled within 10%, resulting in that the horizontal distance from the edge of the titanium layer to the edge of the aluminum layer (i.e. the SA length) is too long or too short, or the length of the molybdenum layer protruding from the aluminum layer is too short or inwardly retracted relative to the aluminum layer. Such will cause poor overlap between the cathode and the separation structure, and further cause dark spots or dark spots.

[0055] Based on the above problems, the display panel provided by the embodiments of the present application sets a conductive layer between the substrate and the pixel definition layer, and the cathode (i.e. the second electrode) and the separation structure are overlapped with the conductive layer, i.e. the cathode is overlapped with the conductive layer, and the conductive layer is overlapped with the separation structure, so as to realize the electrical connection between the cathode and the separation structure, reduce the process requirement of the overlap between the separation structure and the cathode, widen the process margin (Margin), and ensure the overlap effect, avoid the occurrence of dark spots or dark spots, and improve the reliability of the display panel.

[0056] Figure 1is a structural schematic diagram of a display panel provided by an embodiment of the present application. The display panel 100 can be an organic light emitting diode display panel (OLED) or a quantum dot light emitting diodes display panel (QLED). The display panel 100 includes a display area AA having a display function and a non-display area NA.

[0057] The display area AA of the display panel 100 can have a rectangular shape, or a square, circular, or elliptical shape, etc.

[0058] The display area AA includes a plurality of pixels PX arranged in an X direction and a Y direction. The pixel PX includes a plurality of sub-pixels SPX displaying different colors. In some embodiments, the pixel PX includes a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3, for example, the first sub-pixel SPX1 is a blue sub-pixel, the second sub-pixel SPX2 is a green sub-pixel SPX2, and the third sub-pixel SPX3 is a red sub-pixel SPX3. In some embodiments, the pixel PX includes a sub-pixel SPX emitting white or other color light in addition to the sub-pixels SPX1, SPX2, and SPX3. The arrangement order of the plurality of sub-pixels SPX is only an example and is not limited thereto.

[0059] The sub-pixel SPX includes a pixel circuit and a light emitting unit driven by the pixel circuit to emit light of a corresponding color. The first sub-pixel SPX1 includes a first light emitting unit, the second sub-pixel SPX2 includes a second light emitting unit, and the third sub-pixel SPX3 includes a third light emitting unit. One pixel circuit drives at least one light emitting unit to emit light. For example, the display area AA includes a normal display area and a light transmission display area, the light transmission display area is a display area corresponding to a sensor and having a light transmission performance, and the normal display area is a display area not corresponding to the sensor, one pixel circuit drives one light emitting unit to emit light in the normal display area, and one pixel circuit drives one or more light emitting units to emit light in the light transmission display area.

[0060] Figure 2 is a cross-sectional structural schematic diagram of a display panel provided by an embodiment of the present application. Specifically, Figure 2 is a partial film layer cross-sectional structural schematic diagram of a local area of the display panel in a B-B direction. Figure 1 As shown in the figure, the display panel 100 includes a substrate 10, a pixel definition layer 20, a plurality of light emitting units 30, an isolation structure 40, and a conductive layer 50. Figure 2

[0061] In the embodiments of the present application, as Figure 3 ​As shown, the substrate 10 includes a pixel circuit layer and a planarization layer 102, the pixel circuit layer includes a pixel circuit for driving the light emitting unit 30 to emit light, Figure 3 The transistor 101 in the pixel circuit is shown, the planarization layer 102 is provided with a via, and the first electrode 310 is electrically connected with the transistor 101 in the pixel circuit layer through the via. In addition, the pixel circuit layer further includes at least one insulating layer, which can include at least one of an inorganic layer and an organic layer. In addition, the substrate 10 further includes a scan line for providing a scan signal Scan and a data line for providing a data signal Data.

[0062] Reference Figure 4 The pixel circuit includes a drive transistor T1 and a data transistor T2, the source of the data transistor T2 is connected with the data line for providing the data signal Data, the gate of the data transistor T2 is connected with the scan line for providing the scan signal Scan, the drain of the data transistor T2 is connected with the gate of the drive transistor T1, the two ends of the storage capacitor C1 are respectively connected with the gate and the source of the drive transistor T1, and the drain of the drive transistor T1 is connected with the light emitting unit. Figure 4 The pixel circuit is one embodiment of the pixel circuit, and the pixel circuit of the present application is not limited to Figure 4 The 2T1C pixel circuit shown can also be other pixel circuits, such as 5T1C, 6T1C, 7T1C, 8T1C pixel circuits, etc.

[0063] In the embodiment of the present application, the substrate 10 further includes a substrate, which can be a rigid substrate, for example, a glass, a Polymethyl Methacrylate (PMMA), a silicon substrate, etc., or a flexible substrate, for example, a Polyethylene Terephthalate (PET), a Polyimide (PI), a Polyethylene Naphthalate (PEN), etc.

[0064] Continuing to refer to Figure 2 The pixel definition layer 20 is located on one side of the substrate 10, and the pixel definition layer 20 is provided with a plurality of first type openings 210 and a plurality of second type openings 220. For example, the pixel definition layer 20 encloses the plurality of first type openings 210 and the plurality of second type openings 220. In the embodiment of the present application, the pixel definition layer 20 includes an organic material or an inorganic material, which is not limited in the present application. Optionally, the material of the pixel definition layer is an inorganic material, for example, the pixel definition layer is prepared by using an inorganic insulating material of at least one of silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON). In Figure 2In the embodiment, the second type of opening 220 includes a first opening 221 and a second opening 222. The second opening 222 is located on a side of the first opening 221 away from the first type of opening 210.

[0065] At least part of the light emitting unit 30 is located in the first type of opening 210. The light emitting unit 30 includes a first electrode 310, a light emitting functional layer 320 and a second electrode 330 which are sequentially stacked away from the substrate 10. In the embodiment, the first electrode 310 includes an anode, and the second electrode 330 includes a cathode; or, the first electrode 310 includes a cathode, and the second electrode 330 includes an anode. The first electrode 310 is located between the substrate 10 and the pixel definition layer 20, and the first type of opening 210 exposes at least part of the first electrode 310. The first electrode 310 can include a multi-layer structure, for example, the first electrode 310 includes a reflective layer, and a pair of conductive oxide layers covering the upper surface and the lower surface of the reflective layer, respectively. The reflective layer can be formed by using a metal material with excellent light reflection, for example, silver. Each conductive oxide layer can be formed by using a transparent conductive oxide, for example, ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide) or IGZO (Indium Gallium Zinc Oxide). The second electrode 330 is formed by using a metal material, for example, an alloy of magnesium and silver (MgAg).

[0066] In the embodiment, the light emitting functional layer 320 includes a plurality of film layers which are stacked. Optionally, the light emitting functional layer 320 includes at least one of a hole injection layer, a hole transport layer, an electron blocking layer, a light emitting layer, a hole blocking layer, an electron transport layer and an electron injection layer.

[0067] In order for the light-emitting functional layer 320 to emit light, a pixel voltage is provided to the first electrode 310 and a common voltage is provided to the second electrode 330, forming a potential difference between the first electrode 310 and the second electrode 330, causing the light-emitting functional layer 320 disposed between the first electrode 310 and the second electrode 330 to emit light. For example, if a potential difference is formed between the first electrode 310 and the second electrode 330 of a blue light-emitting unit, the light-emitting functional layer 320 emits blue light; if a potential difference is formed between the first electrode 310 and the second electrode 330 of a green light-emitting unit, the light-emitting functional layer 320 emits filtered light; if a potential difference is formed between the first electrode 310 and the second electrode 330 of a red light-emitting unit, the light-emitting functional layer 320 emits red light. The pixel voltage of the first electrode 310 is provided by the pixel circuit, and the common voltage of the second electrode 330 is provided by the isolation structure 40. Specifically, the second electrode 330 is electrically connected to the isolation structure 40, and the common voltage is supplied to the second electrode 330 by providing the isolation structure 40. That is, the isolation structure 40 has the function of supplying a common voltage to the second electrode 330.

[0068] The isolation structure 40 is located on the side of the pixel definition layer 20 facing away from the substrate 10. The isolation structure 40 encloses a plurality of isolation openings 401. The orthographic projection of the first type of opening 210 on the substrate 10 is located within the orthographic projection of the isolation opening 401 on the substrate 10, that is, the first type of opening 210 is connected to the isolation opening 401. Optionally, the orthographic projection of the isolation structure 40 on the substrate 10 includes a grid-like structure.

[0069] The conductive layer 50 is located between the substrate 10 and the pixel definition layer 20. A second type of opening 220 exposes at least a portion of the conductive layer 50, and the second electrode 330 and the isolation structure 40 are electrically connected through the conductive layer 50. Specifically... Figure 2 In the first opening 221, a first portion of the conductive layer 50 is exposed, and a second opening 222 exposes a second portion of the conductive layer 50. The second electrode 330 contacts the first portion of the conductive layer 50, and the isolation structure 40 contacts the second portion of the conductive layer 50. Thus, the second electrode 330 overlaps with the conductive layer 50, and the conductive layer 50 overlaps with the isolation structure 40, thereby achieving an electrical connection between the second electrode 330 and the isolation structure 40. In this embodiment, the conductive layer 50 is disposed between the substrate 10 and the pixel definition layer 20. The conductive layer 50 is formed simultaneously with the fabrication of the first electrode 310, without adding additional fabrication steps and with lower process requirements, reducing process difficulty and cost. Furthermore, the overlap between the second electrode 330 and the conductive layer 50 reduces the difficulty of overlap and ensures a good overlap effect, avoiding dark spots or blemishes and improving the reliability of the display panel 100. In addition, this solution reduces the process requirements for the isolation structure 40. Even if the length of the molybdenum layer (i.e., the third part 430) extending out of the aluminum layer is too short or is recessed relative to the aluminum layer, it will not affect the electrical connection between the cathode and the isolation structure 40.

[0070] Optionally, such as Figure 2 As shown, the isolation structure 40 includes a first part 410 (also called an isolation part) and a second part 420 (also called a blocking part) stacked sequentially along a direction away from the substrate 10. The orthographic projection of the first part 410 on the substrate 10 lies within the orthographic projection of the second part 420 on the substrate 10, that is, the two ends of the second part 420 protrude from the sides of the first part 410. The shape of this isolation structure 40 is called a hanging structure. Optionally, the first part 410 and the second part 420 are made of different materials, and the etching rate of the first part 410 is greater than that of the second part 420 to obtain a hanging structure. Optionally, the material of the first part 410 includes a conductive material, such as aluminum (Al) or an aluminum alloy, wherein the aluminum alloy may include at least one of aluminum-neodymium alloy (AlNd), aluminum-yttrium alloy (AlY), or aluminum-silicon alloy (AlSi). The second part 420 can be a single-layer or multi-layer structure. When the second part 420 is a single-layer structure, its material includes at least one of titanium, titanium nitride, molybdenum, tungsten, a molybdenum-tungsten alloy, or a molybdenum-niobium alloy. When the second part 420 is a multi-layer structure, one layer of the second part 420 is made of at least one of titanium, titanium nitride, molybdenum, tungsten, a molybdenum-tungsten alloy, or a molybdenum-niobium alloy, and the other layer of the second part 420 may include a conductive oxide or an inorganic insulating material. The conductive oxide may be, for example, indium tin oxide (ITO) or indium zinc oxide (IZO). For example, the first part 410 is made of aluminum, and the second part 420 is made of titanium. Figure 2 As shown, the first part 410 is in contact with the conductive layer 50. The orthographic projection of at least a portion of the side of the first part 410 facing the isolation opening 401 onto the substrate 10 lies within the orthographic projection of the conductive layer 50 onto the substrate 10. That is, the orthographic projection of the first part 410 onto the substrate 10 at least partially overlaps with the orthographic projection of the conductive layer 50 onto the substrate 10, thereby achieving contact between the first part 410 and the conductive layer 50.

[0071] Optionally, such as Figure 5As shown, the isolation structure 40 includes a third part 430 (also called a base), a first part 410 (also called an isolation part), and a second part 420 (also called a blocking part) stacked sequentially along a direction away from the substrate 10. The orthographic projection of the first part 410 on the substrate 10 lies within the orthographic projection of the second part 420 on the substrate 10, and the orthographic projection of the third part 430 on the substrate 10 lies within the orthographic projection of the second part 420 on the substrate 10. This application embodiment does not limit the length of the first part 410 and the third part 430. The third part 430 may protrude relative to the first part 410, or the third part 430 may be recessed relative to the first part 410, meaning that this application has lower process requirements for the isolation structure 40. For a description of the first part 410 and the second part 420, please refer to the description in other parts of this application; it will not be repeated here. The material of the third part 430 includes at least one of molybdenum (Mo), titanium (Ti), titanium nitride (TiN), molybdenum-tungsten alloy (MoW), or molybdenum-niobium alloy (MoNb). Figure 5 As shown, the third portion 430 contacts the conductive layer 50. In this embodiment, the orthographic projection of at least a portion of the side of the third portion 430 facing the isolation opening 401 onto the substrate 10 lies within the orthographic projection of the conductive layer 50 onto the substrate 10. That is, the orthographic projection of the third portion 430 onto the substrate 10 at least partially overlaps with the orthographic projection of the conductive layer 50 onto the substrate 10, thus achieving contact between the third portion 430 and the conductive layer 50. Optionally, the orthographic projection of at least a portion of the side of the first portion 410 facing the isolation opening 401 onto the substrate 10 lies within the orthographic projection of the conductive layer 50 onto the substrate 10. That is, the orthographic projection of the first portion 410 onto the substrate 10 at least partially overlaps with the orthographic projection of the conductive layer 50 onto the substrate 10.

[0072] It should be noted that, since the side surface of the first part 410 (e.g., aluminum) is easily oxidized during the manufacturing process, a third part 430 (e.g., molybdenum) is required. The second electrode 330 first overlaps with the third part 430, and the second electrode 330 is then connected to the first part 410 through the third part 430. In the embodiments of this application, since the first part 410 can directly contact the conductive layer 50, and the second electrode 330 overlaps with the first part 410 through the conductive layer 50, the third part 430 can be omitted.

[0073] In the embodiment of the present application, the pixel definition layer 20 includes a first side surface corresponding to the first opening 221, and a first included angle a between the first side surface and the surface of the pixel definition layer 20 close to the substrate 10 is greater than 0 and less than or equal to 45°, for example, 5°, 10°, 20°, 30°, 40°, or 45°. In the embodiment of the present application, the first included angle a cannot be too large because the second electrode 330 needs to extend into the first opening 221, so as to avoid the second electrode 330 from being broken due to difficulty in climbing. In the embodiment of the present application, the second electrode 330 covers the first type of opening 210 and extends towards the first opening 221 and covers at least part of the first opening 221, so as to realize the lapping of the second electrode 330 and the conductive layer 50. Alternatively, whether the second electrode 330 can lap with the conductive layer 50 and the lapping area depend on the position of the edge of the second part 420 (i.e., the blocking part) of the isolation structure 40 towards the isolation opening 401 and the first opening 221, and the evaporation angle of the second electrode material. After the position of the edge of the second part 420 (i.e., the blocking part) of the isolation structure 40 towards the isolation opening 401 and the first opening 221 is determined, a suitable evaporation angle is selected to ensure that the second electrode 330 and the conductive layer 50 have sufficient lapping area. It should be noted that the embodiment of the present application does not limit the position of the edge of the second part 420 of the isolation structure 40 towards the isolation opening 401 and the first opening 221, as long as the lapping of the second electrode 330 and the conductive layer 50 can be realized by cooperating with the evaporation angle. For example, the orthographic projection of the edge of the second part 420 towards the isolation opening 401 on the substrate 10 can be located within the orthographic projection of the first opening 221 on the substrate 10, or the orthographic projection of the edge of the second part 420 towards the isolation opening 401 on the substrate 10 can be located outside the orthographic projection of the first opening 221 on the substrate 10 (i.e., the edge of the second part 420 towards the isolation opening 401 is closer to the first type of opening 210 than the first opening 221).

[0074] In the embodiment of the present application, the light-emitting functional layer 320 covers at least the first type of opening 210. Alternatively, the light-emitting functional layer 320 can also extend towards the first opening 221. For example, the light-emitting functional layer 320 can cover part of the first side surface corresponding to the first opening 221, or the light-emitting functional layer 320 can also cover part of the bottom surface of the first opening 221. In the embodiment of the present application, only the evaporation range of the second electrode 330 needs to be greater than the evaporation range of the light-emitting functional layer 320, so as to ensure that the second electrode 330 can lap with the conductive layer 50.

[0075] In this embodiment, the conductive layer 50 is disposed on the same layer and made of the same material as the first electrode 310. Optionally, the conductive layer 50 includes a first sub-conductive layer and a second sub-conductive layer sequentially stacked along a direction away from the substrate 10. Optionally, the first sub-conductive layer is made of a metal, and the second sub-conductive layer is made of a transparent conductive oxide. For example, the first sub-conductive layer is made of silver, and the second sub-conductive layer is made of ITO.

[0076] Optionally, the conductive layer 50 includes a third sub-conductive layer, a first sub-conductive layer, and a second sub-conductive layer sequentially stacked along a direction away from the substrate 10. Optionally, the first sub-conductive layer is made of metal, and the second and third sub-conductive layers are made of transparent conductive oxide. For example, the first sub-conductive layer is made of silver, and the second and third sub-conductive layers are made of ITO. That is, the conductive layer 50 includes stacked ITO / Ag / ITO.

[0077] Optionally, the display panel 100 further includes a first encapsulation layer 610 located on the side of the light-emitting unit 30 facing away from the substrate 10. The first encapsulation layer 610 includes a plurality of spaced-apart encapsulation units 611. The encapsulation units 611 are located on the side of the second electrode 330 facing away from the substrate 10 and extend through the sidewall of the isolation structure 40 to the side of the isolation structure 40 facing away from the substrate 10. The encapsulation units 611 correspond to the light-emitting units 30, and the orthographic projection of the light-emitting unit 30 on the substrate 10 lies within the orthographic projection of the encapsulation unit 611 on the substrate 10. It should be noted that, since the light-emitting functional material and the second electrode material between the encapsulation unit 611 and the isolation structure 40 are etched away, there is a gap between the encapsulation unit 611 and the isolation structure 40.

[0078] like Figure 6 As shown, the display panel 100 further includes a second encapsulation layer 620 and a third encapsulation layer 630 located on the side of the first encapsulation layer 610 facing away from the substrate. The second encapsulation layer 620 and the third encapsulation layer 630 are sequentially stacked along a direction away from the substrate 10. Optionally, the first encapsulation layer 610 and the third encapsulation layer 630 include inorganic encapsulation layers, and the second encapsulation layer 620 includes organic encapsulation layers. The materials of the first encapsulation layer 610 and the third encapsulation layer 630 include at least one of silicon nitride (SiN), silicon oxide (SiO), and silicon oxynitride (SiON). The material of the second encapsulation layer 620 includes resin materials such as epoxy resin and acrylic resin. The second encapsulation layer 620 and the third encapsulation layer 630 are continuously disposed at least over the entire display area AA, with a portion also disposed in the bezel area NA.

[0079] The display panel 100 can further include at least one film layer such as a touch layer, a polarizer, a color film layer, a cover plate, etc. The film layer can be attached to the display panel 100 via an adhesive layer such as an optical clear adhesive (OCA).

[0080] Figure 7 is a schematic diagram of a cross-sectional structure of a display panel provided by another embodiment of the present application. Figure 7 The display panel 100 shown in Figure 2 The display panel 100 shown in The difference between the display panel 100 shown in Optionally, the second electrode 330 covers the first type of opening 210 and extends towards the third opening 223 and covers at least part of the third opening 223. Optionally, the pixel definition layer 20 includes a second side surface corresponding to the third opening 223, and a second included angle β between the second side surface and a surface of the pixel definition layer 20 close to the substrate 10 is greater than 0 and less than or equal to 45°, for example, 5°, 10°, 20°, 30°, 40°, 45°, etc., to avoid the second electrode 330 from breaking.

[0081] In the embodiments of the present application, the second type of opening 220 only includes the third opening 223, which simplifies the etching process compared to etching the first opening 221 and the second opening 222 at the same time. In addition, since the second electrode 330 and the isolation structure 40 are both overlapped with the conductive layer 50 in the third opening 223 in the present solution, the size of the third opening 223 can be designed to be relatively large, which makes it easier to control the size of the second included angle, so that the second included angle is relatively small, thereby ensuring the climbing ability of the second electrode 330, avoiding the second electrode 330 from breaking, further improving the success rate of the overlap, and thus improving the stability of the display panel 100.

[0082] Figures 8 to 13 are cross-sectional structure diagrams of display panels provided by an embodiment of the present application. Specifically, Figures 8 to 13 is Figure 1 is a schematic diagram of a cross-sectional structure of the display panel along the C-C line. That is, Figure 2 and Figure 7 only shows a cross-sectional structure including one light emitting unit 30, Figures 8 to 13 shows a cross-sectional structure including two light emitting units 30. It should be noted that the structures or structural details not mentioned below can refer to the description in other parts of the present application.

[0083] As Figures 8 to 10As shown, the second type of opening 220 includes a plurality of first openings 221 and a plurality of second openings 222 arranged adjacently, the second openings 222 are located on the side of the first openings 221 away from the first type of opening 210, the first openings 221 expose a first portion of the conductive layer 50, and the second openings 222 expose a second portion of the conductive layer 50, the second electrode 330 contacts the first portion of the conductive layer 50, and the isolation structure 40 contacts the second portion of the conductive layer 50.

[0084] In Figure 8 , the conductive layer 50 includes a plurality of conductive portions 510 arranged at intervals, the orthographic projection of the conductive portions 510 on the substrate 10 at least partially surrounds the orthographic projection of the first electrode 310 on the substrate 10. For example, the orthographic projection of the conductive portions 510 on the substrate 10 surrounds a part of the orthographic projection of the first electrode 310 on the substrate 10, i.e., the conductive portions 510 only contact part of the edge region of the second electrode 330 within the isolation opening 401, as long as the second electrode 330 and the conductive portions 510 have sufficient overlap area. Alternatively, the orthographic projection of the conductive portions 510 on the substrate 10 surrounds the orthographic projection of the first electrode 310 on the substrate 10, i.e., the conductive portions 510 contact the entire edge region of the second electrode 330 within the isolation opening 401. Similarly, the orthographic projection of the conductive portions 510 on the substrate 10 at least partially surrounds the orthographic projection of the first type of opening 210 on the substrate 10.

[0085] In Figure 9 and Figure 10 , the orthographic projection of the conductive layer 50 on the substrate 10 includes a mesh structure, the conductive layer 50 is provided with a plurality of mesh holes, and the orthographic projection of the first electrode 310 on the substrate 10 is located within the orthographic projection of the mesh holes on the substrate 10. Alternatively, the orthographic projection of the mesh holes on the substrate 10 at least partially overlaps the orthographic projection of the isolation opening 401 on the substrate 10. For example, the orthographic projection of the mesh holes on the substrate 10 is located within the orthographic projection of the isolation opening 401 on the substrate 10. Alternatively, the orthographic projection of the first portion 410 on the substrate 10 is located within the orthographic projection of the conductive layer 50 on the substrate 10. If the isolation structure 40 includes a third portion 430, the orthographic projection of the third portion 430 on the substrate 10 is located within the orthographic projection of the conductive layer 50 on the substrate 10. Among them, in Figure 9 , two second openings 222 are arranged between two adjacent first openings 221, and part of the pixel definition layer 20 is arranged between the two second openings 222. In Figure 10 , one second opening 222 is arranged between two adjacent first openings 221, which can reduce the difficulty of preparing the second opening 222 and simplify the preparation process.

[0086] As Figures 11 to 13As shown, the second type of opening 220 includes a plurality of adjacently arranged third openings 223, the third openings 223 exposing at least a portion of the conductive layer 50, and the second electrode 330 and the isolation structure 40 are electrically connected to the conductive layer 50 exposed by the third openings 223, respectively.

[0087] exist Figure 11 In this embodiment, the conductive layer 50 includes a plurality of spaced-apart conductive portions 510, the orthographic projection of which on the substrate 10 at least partially surrounds the orthographic projection of the first electrode 310 on the substrate 10. For example, the orthographic projection of which on the substrate 10 surrounds a portion of the orthographic projection of the first electrode 310 on the substrate 10, that is, the conductive portion 510 only contacts a portion of the edge region of the second electrode 330 within the isolation opening 401. In this case, it is sufficient to ensure that the second electrode 330 and the conductive portion 510 have sufficient overlap area. Optionally, the orthographic projection of which on the substrate 10 surrounds the orthographic projection of the first electrode 310 on the substrate 10. That is, the conductive portion 510 contacts the entire edge region of the second electrode 330 within the isolation opening 401. Similarly, the orthographic projection of which on the substrate 10 at least partially surrounds the orthographic projection of the first type of opening 210 on the substrate 10.

[0088] exist Figure 12 and Figure 13 In this configuration, the orthogonal projection of the conductive layer 50 onto the substrate 10 includes a mesh structure. The conductive layer 50 has multiple mesh holes, and the orthogonal projection of the first electrode 310 onto the substrate 10 lies within the orthogonal projection of the mesh holes onto the substrate 10. Optionally, the orthogonal projection of the mesh holes onto the substrate 10 at least partially overlaps with the orthogonal projection of the isolation opening 401 onto the substrate 10. For example, the orthogonal projection of the mesh holes onto the substrate 10 lies within the orthogonal projection of the isolation opening 401 onto the substrate 10. Optionally, the orthogonal projection of the first portion 410 onto the substrate 10 lies within the orthogonal projection of the conductive layer 50 onto the substrate 10. If the isolation structure 40 includes a third portion 430, the orthogonal projection of the third portion 430 onto the substrate 10 lies within the orthogonal projection of the conductive layer 50 onto the substrate 10. Figure 12 In this structure, a partial pixel definition layer 20 is disposed between the conductive layer 50 and the isolation structure 40. Figure 13 In this embodiment, there is no pixel definition layer 20 between the conductive layer 50 and the isolation structure 40, which simplifies the etching process. Optionally, the orthographic projection of the first portion 410 on the substrate 10 lies within the orthographic projection of the third opening 223 on the substrate 10. If the isolation structure 40 includes a third portion 430, the orthographic projection of the third portion 430 on the substrate 10 lies within the orthographic projection of the third opening 223 on the substrate 10. In this embodiment, the conductive layer 50 can serve as one of the conductive film layers of the isolation structure 40.

[0089] This application embodiment also provides a display panel 100, such as Figures 1 to 13As shown, the display panel 100 includes a substrate 10, a pixel definition layer 20, a plurality of light emitting units 30, an isolation structure 40, and a conductive layer 50. The pixel definition layer 20 is located on one side of the substrate 10. The pixel definition layer 20 is provided with a plurality of first-type openings 210 and a plurality of second-type openings 220. The second-type openings 220 include a plurality of third openings 223. At least part of the light emitting unit 30 is located in the first-type opening 210. The light emitting unit 30 includes a first electrode 310, a light emitting functional layer 320, and a second electrode 330 which are sequentially stacked away from the substrate 10. The isolation structure 40 is located on the side of the pixel definition layer 20 away from the substrate 10. The isolation structure 40 encloses a plurality of isolated openings 401. The orthographic projection of the first-type opening 210 on the substrate 10 is located in the orthographic projection of the isolated opening 401 on the substrate 10. The conductive layer 50 is located between the substrate 10 and the pixel definition layer 20. The third opening 223 exposes at least part of the conductive layer 50. The second electrode 330 and the isolation structure 40 are respectively electrically connected with the conductive layer 50 exposed by the third opening 223. In the embodiment of the present application, the second electrode 330 is in contact with the conductive layer 50, and the conductive layer 50 is in contact with the isolation structure 40, so as to realize the electrical connection between the second electrode 330 and the isolation structure 40, reduce the difficulty of lapping, ensure the lapping effect, and improve the reliability of the display panel 100. In addition, in the present scheme, the second-type opening 220 only includes the third opening 223, which simplifies the etching process compared with etching the first opening 221 and the second opening 222 at the same time. In addition, since the second electrode 330 and the isolation structure 40 are both lapped with the conductive layer 50 in the third opening 223 in the present scheme, the size of the third opening 223 can be designed to be relatively large, the size of the second included angle can be more easily controlled, the second included angle is relatively small, the climbing ability of the second electrode 330 is ensured, the second electrode 330 is prevented from being broken, the lapping success rate is further improved, and the stability of the display panel 100 is improved.

[0090] The embodiments of the present application can be combined with part or all of the features of the above-mentioned embodiments, which will not be described here.

[0091] The embodiments of the present application also provide a display panel 100, as shown in Figures 1 to 13As shown, the display panel 100 includes a substrate 10, a pixel definition layer 20, a plurality of light emitting units 30, a separation structure 40, and a conductive layer 50. The pixel definition layer 20 is located on one side of the substrate 10, and the pixel definition layer 20 is provided with a plurality of first-type openings 210 and a plurality of second-type openings 220. The plurality of light emitting units 30 are at least partially located in the first-type openings 210, and the light emitting unit 30 includes a first electrode 310, a light emitting functional layer 320, and a second electrode 330 which are sequentially stacked away from the substrate 10. The separation structure 40 is located on the side of the pixel definition layer 20 away from the substrate 10, and the separation structure 40 encloses a plurality of separated openings 401. The orthographic projection of the first-type opening 210 on the substrate 10 is located in the orthographic projection of the separated opening 401 on the substrate 10. The conductive layer 50 is located between the substrate 10 and the pixel definition layer 20, and the orthographic projection of the conductive layer 50 on the substrate 10 includes a grid structure. The conductive layer 50 is provided with a plurality of grid holes, and the orthographic projection of the first-type opening 210 on the substrate 10 is located in the orthographic projection of the grid hole on the substrate 10. The second-type opening 220 exposes at least part of the conductive layer 50, and the conductive layer 50 respectively contacts the separation structure 40 and the second electrode 330. In the embodiment of the present application, in the present scheme, the conductive layer 50 contacts the separation structure 40, and the second electrode 330 subsequently contacts the conductive layer 50, thereby realizing the electrical connection between the second electrode 330 and the separation structure 40, reducing the difficulty of lapping, ensuring the lapping effect, and improving the reliability of the display panel 100.

[0092] The embodiments of the present application can combine some or all of the features of the above-mentioned embodiments, which will not be described here again.

[0093] The embodiments of the present application also provide a preparation method of a display panel for preparing the above-mentioned display panel. As shown, Figure 14 The preparation method includes the following steps.

[0094] In step S1401, a first electrode and a conductive layer are prepared on a substrate.

[0095] Optionally, a conductive material layer is prepared on the substrate, and the conductive material layer is patterned to obtain the first electrode and the conductive layer. The first electrode and the conductive layer are arranged apart. For example, the conductive layer includes a plurality of conductive blocks, and the orthographic projection of the conductive block on the substrate at least partially surrounds the orthographic projection of the first electrode on the substrate. For another example, the orthographic projection of the conductive layer on the substrate includes a grid structure, the grid structure includes a plurality of grid holes, and the orthographic projection of the first electrode on the substrate is located in the grid hole. In the embodiment of the present application, the conductive layer and the first electrode are prepared synchronously, and no additional preparation process is added. The first electrode and the conductive layer can be prepared synchronously only by adjusting the mask plate, and the preparation process is simple.

[0096] Step S1402, a pixel definition layer and an isolation structure are prepared on the side of the first electrode and the conductive layer away from the substrate.

[0097] Optionally, the pixel definition layer is provided with a plurality of first-type openings and a plurality of second-type openings, the first-type openings expose at least part of the first electrode, and the second-type openings expose at least part of the conductive layer. The isolation structure encloses a plurality of isolation openings, and the orthographic projection of the first-type openings on the substrate is located within the orthographic projection of the isolation openings on the substrate, that is, the first-type openings and the isolation openings are in communication.

[0098] In the embodiment of the present application, the preparation method comprises: preparing a pixel definition material layer on the side of the first electrode and the conductive layer away from the substrate; performing first patterning processing on the pixel definition material layer to obtain second-type openings; preparing an isolation structure on the side of the pixel definition material layer away from the substrate, the isolation structure covering part of the second-type openings to be in contact with the conductive layer; and performing second patterning processing on the pixel definition material layer to obtain first-type openings.

[0099] Step S1403, a light-emitting functional layer and a second electrode are prepared in the isolation openings.

[0100] In the embodiment of the present application, the second electrode is electrically connected to the isolation structure through the conductive layer. Specifically, when the second electrode is evaporated, the second electrode covers the first-type openings and extends to at least part of the second-type openings to be in lap with the conductive layer.

[0101] Optionally, the preparation method comprises sequentially preparing a light-emitting functional layer, a second electrode and an encapsulation unit in the isolation openings. In the embodiment of the present application, light-emitting units of different colors are prepared in steps. Optionally, a first preparation material layer corresponding to a first color light-emitting unit is prepared, the first preparation material layer of the first-type openings corresponding to the first color light-emitting unit is reserved, a light-emitting functional layer, a second electrode and an encapsulation unit corresponding to the first color light-emitting unit are formed, and the first preparation material layer of the first-type openings corresponding to a second color light-emitting unit and a third color light-emitting unit is etched; then, a second preparation material layer corresponding to the second color light-emitting unit is prepared, the second preparation material layer of the first-type openings corresponding to the second color light-emitting unit is reserved, a light-emitting functional layer, a second electrode and an encapsulation unit corresponding to the second color light-emitting unit are formed, and the second preparation material layer of the first-type openings corresponding to the first color light-emitting unit and the third color light-emitting unit is etched; then, a third preparation material layer corresponding to the third color light-emitting unit is prepared, the third preparation material layer of the first-type openings corresponding to the third color light-emitting unit is reserved, a light-emitting functional layer, a second electrode and an encapsulation unit corresponding to the third color light-emitting unit are formed, and the third preparation material layer of the first-type openings corresponding to the first color light-emitting unit and the second color light-emitting unit is etched. For example, the light-emitting colors of the first color light-emitting unit, the second color light-emitting unit and the third color light-emitting unit are different.

[0102] Optionally, when the red light-emitting unit is prepared, the red light-emitting functional layer, the second electrode and the encapsulation unit are sequentially prepared in the first-type opening corresponding to the red light-emitting unit; when the green light-emitting unit is prepared, the green light-emitting functional layer, the second electrode and the encapsulation unit are sequentially prepared in the first-type opening corresponding to the green light-emitting unit; and when the blue light-emitting unit is prepared, the blue light-emitting functional layer, the second electrode and the encapsulation unit are sequentially prepared in the first-type opening corresponding to the blue light-emitting unit.

[0103] Optionally, the preparation method further comprises: sequentially preparing a second encapsulation layer and a third encapsulation layer on the side of the encapsulation unit away from the substrate.

[0104] An embodiment of the present application provides a display device, which comprises the display panel described in the above embodiments.

[0105] Figure 15 FIG. 1 is a structural schematic diagram of a display device provided by an embodiment of the present application. As shown in FIG. 1, the display device 1000 is a product with image display function. For example, the display device 1000 can be used to display static images, such as pictures or photos. The display device 1000 can also be used to display dynamic images, such as videos. Figure 15

[0106] The display device 1000 can be a notebook computer, a mobile phone, a handheld or portable computer, a camera, a camcorder, a vehicle-mounted intelligent central control screen, a calculator, a smart watch, a GPS navigator, an electronic photo, an electronic billboard or signboard, a projector, etc.

[0107] The display device 1000 comprises the display panel provided by any of the above embodiments. The display panel can be an organic light-emitting diode display panel or a quantum dot electroluminescent display panel.

[0108] In addition, the display device 1000 can also have the functions of photographing, video recording, fingerprint recognition, face recognition, etc. Accordingly, the display device 1000 also comprises at least one functional module for realizing the above functions, such as an under-screen camera, an under-screen fingerprint recognition sensor, etc.

[0109] The above describes the basic principles of the present application in combination with specific embodiments, but it should be pointed out that the advantages, advantages, effects, etc. mentioned in the present application are only examples and cannot be considered as the must-haves of each embodiment of the present application. In addition, the above specific details are only for the purpose of example and understanding, and the above details do not limit the present application to the above specific details.

[0110] ​The block diagrams of the devices, apparatuses, equipment, systems referred to in this application are only illustrative examples and are not intended to require or imply that the connection, arrangement, configuration must be as shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, equipment, systems can be connected, arranged, configured in any manner. Words such as "include", "contain", "have", and the like are open-ended words, mean "including but not limited to", and can be used interchangeably with each other. The words "or" and "and" used herein mean the word "and / or", and can be used interchangeably with each other, unless the context clearly indicates otherwise. The word "such as" used herein means the phrase "such as but not limited to", and can be used interchangeably with each other.

[0111] It is also necessary to point out that in the devices, apparatuses and methods of the present application, each component or each step can be decomposed and / or recombined. These decompositions and / or recombinations should be considered as equivalents of the present application.

[0112] The above description of disclosed aspects is provided to enable any person skilled in the art to make or use the application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein can be applied to other aspects without departing from the scope of the application. Thus, the present application is not intended to be limited to the aspects shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0113] The above description has been given for the purpose of illustration and description. Furthermore, this description does not intend to limit the embodiments of the present application to the forms disclosed herein. Although a number of example aspects and embodiments have been discussed above, those skilled in the art will recognize certain modifications, permutations, additions, and sub-combinations thereof.

[0114] The above detailed description does not constitute a limitation of the scope of protection of the present application. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent replacements, and improvements made within the spirit and principles of the present application should be included in the scope of protection of the present application.

Claims

1. A display panel, characterized by, The application relates to a substrate, a pixel definition layer, a plurality of light-emitting units, an isolation structure, a conductive layer and a first encapsulation layer. The pixel definition layer is provided with a plurality of first-type openings and a plurality of second-type openings. The light-emitting units comprise a first electrode, a light-emitting functional layer and a second electrode which are sequentially stacked away from the substrate. The isolation structure is located on the side of the pixel definition layer away from the substrate, and the isolation structure encloses a plurality of isolated openings. The second-type openings expose at least part of the conductive layer, and the second electrode and the isolation structure are electrically connected through the conductive layer. The second-type openings comprise third openings, the second electrode and the isolation structure are electrically connected with the conductive layer exposed by the third openings, the second electrode covers the first-type openings and extends to the direction close to the third openings and covers at least part of the third openings. The pixel definition layer comprises a second side surface corresponding to the third openings, and the second angle between the second side surface and the surface of the pixel definition layer close to the substrate is greater than 0 and less than or equal to 45 degrees.

2. The display panel of claim 1, wherein, The isolation structure comprises a first part and a second part which are sequentially stacked away from the substrate, the first part is located in the projection of the second part on the substrate, and the first part is in contact with the conductive layer. The isolation structure comprises a third part, a first part and a second part which are sequentially stacked away from the substrate, the first part is located in the projection of the second part on the substrate, and the third part is located in the projection of the second part on the substrate, and the third part is in contact with the conductive layer.

3. The display panel of claim 2, wherein, The projection of at least part of the side surface of the first part on the substrate towards the isolated opening is located in the projection of the conductive layer on the substrate. The projection of at least part of the side surface of the third part on the substrate towards the isolated opening is located in the projection of the conductive layer on the substrate.

4. The display panel of claim 1, wherein, The projection of the conductive layer on the substrate comprises a grid structure, the conductive layer is provided with a plurality of grid holes, and the projection of the first electrode on the substrate is located in the projection of the grid hole on the substrate.

5. The display panel of claim 4, wherein, The projection of the grid hole on the substrate at least partially overlaps the projection of the isolated opening on the substrate.

6. The display panel of any one of claims 1 to 5, wherein, The conductive layer and the first electrode are provided in the same layer and with the same material.

7. The display panel of any one of claims 1 to 5, wherein, The application further relates to a first encapsulation layer located on the side of the light-emitting unit away from the substrate, the first encapsulation layer comprises a plurality of encapsulation units which are spaced apart, the encapsulation units correspond to the light-emitting units, and the projection of the light-emitting unit on the substrate is located in the projection of the encapsulation unit on the substrate. The display panel further comprises a second encapsulation layer and a third encapsulation layer located on a side of the first encapsulation layer away from the substrate, and the second encapsulation layer and the third encapsulation layer are sequentially stacked in a direction away from the substrate.

8. A display panel, characterized by, Comprise: a substrate; a pixel definition layer located on a side of the substrate, the pixel definition layer being provided with a plurality of first-type openings and a plurality of second-type openings; a plurality of light-emitting units, at least part of the light-emitting units being located in the first-type openings, the light-emitting units comprising a first electrode, a light-emitting functional layer and a second electrode which are sequentially stacked in a direction away from the substrate; an isolation structure located on a side of the pixel definition layer away from the substrate, the isolation structure enclosing a plurality of isolated openings, and a normal projection of the first-type openings on the substrate being located within a normal projection of the isolated openings on the substrate; a conductive layer located between the substrate and the pixel definition layer, a normal projection of the conductive layer on the substrate comprising a grid structure, the conductive layer being provided with a plurality of grid holes, a normal projection of the first-type openings on the substrate being located within a normal projection of the grid holes on the substrate, and the second-type openings exposing at least part of the conductive layer, the conductive layer being in contact with the isolation structure and the second electrode respectively; there is no pixel definition layer between the conductive layer and the isolation structure, the second-type openings comprise third openings, the second electrode and the isolation structure being electrically connected with the conductive layer exposed by the third openings respectively, the second electrode covering the first-type openings and extending towards the third openings and covering at least part of the third openings, and the pixel definition layer comprising a second side surface corresponding to the third openings, a second included angle between the second side surface and a surface of the pixel definition layer close to the substrate being greater than 0 and less than or equal to 45°.

9. The display panel of claim 8, wherein, The isolation structure comprises a first part and a second part which are sequentially stacked in a direction away from the substrate, a normal projection of the first part on the substrate being located within a normal projection of the second part on the substrate, and the first part being in contact with the conductive layer; or the isolation structure comprises a third part, a first part and a second part which are sequentially stacked in a direction away from the substrate, a normal projection of the first part on the substrate being located within a normal projection of the second part on the substrate, a normal projection of the third part on the substrate being located within a normal projection of the second part on the substrate, and the third part being in contact with the conductive layer.

10. The display panel of claim 9, wherein, A normal projection of the first part on the substrate is located within a normal projection of the conductive layer on the substrate; and / or, a normal projection of the third part on the substrate is located within a normal projection of the conductive layer on the substrate.

11. The display panel of claim 9, wherein, A normal projection of the first part and / or the third part on the substrate is located within a normal projection of the third openings on the substrate.

12. A display device, characterized by comprising: Comprise: the display panel of any one of claims 1 to 11.

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