Method of manufacturing display device

Abstract

A method of manufacturing a display device includes forming a display panel on a first surface of a mother substrate, the mother substrate including a cell area and a dummy area surrounding the cell area, the display panel overlapping the cell area; attaching a protective film to the first surface of the mother substrate to overlap the display panel; forming a first cutting line on the mother substrate along the edge of the unit area; forming a second dicing line on the mother substrate, the second dicing line overlapping a portion of the dummy region and having a length greater than a length of the first dicing line in a thickness direction of the mother substrate; reducing a thickness of the mother substrate by spraying an etchant toward a second surface of the mother substrate opposite the first surface; and removing the dummy region of the mother substrate by spraying an etchant toward the second surface of the mother substrate.

Description

Technical Field

[0001] Aspects of the present disclosure generally relate to methods of manufacturing display devices. Background Art

[0002] With the development of information technology, the importance of display devices as a medium connecting users and information has become increasingly prominent. For example, the use of display devices such as liquid crystal display (LCD) devices, organic light-emitting display (OLED) devices, plasma display panel (PDP) devices, and quantum dot display devices is increasing.

[0003] In the method of manufacturing a display device, a method of manufacturing a display device by cutting a mother substrate on which a plurality of display units are formed may be used. In other words, the display device may be manufactured by cutting the mother substrate along the plurality of display units.

[0004] The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not constitute prior art. Summary of the Invention

[0005] Aspects of some embodiments are directed to a method of manufacturing a display device with improved process efficiency and improved process reliability.

[0006] According to some embodiments of the present disclosure, a method for manufacturing a display device is provided, the method including: forming a display panel on a first surface of a mother substrate, the mother substrate including a unit area and a dummy area surrounding the unit area, the display panel overlapping the unit area; attaching a protective film to the first surface of the mother substrate to overlap with the display panel; forming a first cutting line along an edge of the unit area on the mother substrate; forming a second cutting line on the mother substrate, the second cutting line overlapping with a portion of the dummy area and having a length greater than that of the first cutting line in a thickness direction of the mother substrate; reducing the thickness of the mother substrate by spraying an etchant toward a second surface of the mother substrate opposite to the first surface; and removing the dummy area of the mother substrate by spraying an etchant toward the second surface of the mother substrate.

[0007] In some embodiments, when removing the dummy region of the mother substrate, the thickness of the mother substrate is reduced by an etchant.

[0008] In some embodiments, the second cut line is exposed to the etchant before the first cut line.

[0009] In some embodiments, removing the dummy region of the mother substrate includes dividing the mother substrate into a plurality of intermediate substrates along second cutting lines by spraying an etchant toward the second surface of the mother substrate.

[0010] In some embodiments, the plurality of substrates are formed by removing a dummy region of a mother substrate, and a portion of a side surface of each of the plurality of substrates includes a curved surface.

[0011] In some embodiments, the mother substrate includes a first side extending in a first direction and a second side contacting the first side and extending in a second direction intersecting the first direction, the length of the first side is greater than the length of the second side, and the second cutting line extends in the second direction.

[0012] In some embodiments, each of the first cutting line and the second cutting line extends from the first surface of the mother substrate toward the second surface of the mother substrate.

[0013] In some embodiments, each of the first cutting line and the second cutting line is formed by irradiating a laser to the mother substrate.

[0014] In some embodiments, the laser is irradiated onto the second surface of the mother substrate.

[0015] In some embodiments, the protective film comprises an acid-resistant film.

[0016] In some embodiments, the method further includes: forming a polarizing layer on the display panel after removing the dummy area of the mother substrate.

[0017] According to some embodiments of the present disclosure, a method for manufacturing a display device is provided, the method comprising: forming a display panel on a first surface of a mother substrate, the mother substrate comprising a unit area and a dummy area surrounding the unit area, the display panel overlapping the unit area; attaching a protective film to the first surface of the mother substrate to overlap with the display panel; forming a first cutting line along an edge of the unit area on the mother substrate; forming a second cutting line on the mother substrate, the second cutting line overlapping with a portion of the dummy area and having a length greater than that of the first cutting line in a thickness direction of the mother substrate; reducing the thickness of the mother substrate by spraying an etchant toward a second surface of the mother substrate opposite to the first surface; dividing the mother substrate into a plurality of intermediate substrates along the second cutting line by spraying an etchant toward the second surface of the mother substrate; and dividing each of the plurality of intermediate substrates into a plurality of substrates along the first cutting line by spraying the etchant.

[0018] In some embodiments, when the mother substrate is divided into the plurality of intermediate substrates along the second cutting lines, the thickness of the mother substrate is reduced by an etchant.

[0019] In some embodiments, when each of the plurality of intermediate substrates is divided into the plurality of substrates along the first cutting line, the thickness of each of the plurality of intermediate substrates is reduced by an etchant.

[0020] In some embodiments, the second cut line is exposed to the etchant before the first cut line.

[0021] In some embodiments, a portion of a side surface of each of the plurality of substrates includes a curved surface.

[0022] In some embodiments, the mother substrate includes a first side extending in a first direction and a second side contacting the first side and extending in a second direction intersecting the first direction, the length of the first side is greater than the length of the second side, and the second cutting line extends in the second direction.

[0023] In some embodiments, each of the first cutting line and the second cutting line extends from the first surface of the mother substrate toward the second surface of the mother substrate.

[0024] In some embodiments, each of the first cutting line and the second cutting line is formed by irradiating a laser to the mother substrate.

[0025] In some embodiments, the protective film comprises an acid-resistant film.

[0026] Each of the plurality of intermediate substrates can be relatively small in size and weight compared to the mother substrate. Therefore, during the process of separating each of the plurality of intermediate substrates into a plurality of substrates, deformation of the intermediate substrates can be prevented or substantially reduced. Consequently, damage to the display panel due to etching agent penetration can be prevented or substantially reduced, and the reliability of the process of separating the mother substrate into the substrates can be improved.

[0027] Other aspects, features, and characteristics not described above will become more clearly understood from the accompanying drawings, claims, and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0029] Figure 1 is a plan view illustrating a display device according to some embodiments of the present disclosure.

[0030] Figure 2 According to some embodiments of the present disclosure Figure 1 1-1' is a cross-sectional view of the display device.

[0031] Figure 3 is a flowchart of a method for manufacturing a display device according to some embodiments of the present disclosure.

[0032] Figures 4 to 22 To illustrate some embodiments of the present disclosure Figure 3 A view of a method of manufacturing a display device. DETAILED DESCRIPTION

[0033] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. The same reference numerals are used for the same components in the drawings, and redundant descriptions of the same components will be omitted.

[0034] Those skilled in the art will recognize that, in view of the overall content of the present disclosure, each suitable feature of the various embodiments of the present disclosure may be combined in part or in whole or in combination with each other, and may be technically linked and operated in various suitable ways, and each embodiment may be implemented independently of each other or in combination with each other in any suitable manner, unless otherwise stated or implied.

[0035] In the present disclosure, processes, elements, and techniques that are deemed unnecessary for a complete understanding of the aspects and features of the present disclosure by a person of ordinary skill in the art may not be described or may be described briefly. In the accompanying drawings, the relative sizes of elements, layers, and regions may be exaggerated for clarity.

[0036] It will be understood that although the terms "first," "second," "third," etc. may be used herein to describe various elements, components, regions, layers, and / or sections, these elements, components, regions, and / or sections should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, or section from another element, component, region, layer, or section. Thus, a first element, component, region, layer, or section discussed below could be referred to as a second element, component, region, layer, or section without departing from the spirit and scope of the present inventive concept.

[0037] For ease of description, spatially relative terms, such as "below," "beneath," "below," "above," and "on," may be used herein to describe the relationship of one element or feature to another element or feature illustrated in the figures. It will be understood that, in addition to the orientation depicted in the figures, spatially relative terms are intended to cover different orientations of the device in use or operation. For example, if the device in the figure is turned over, an element or feature described as being "below," "beneath," or "below" other elements or features would be oriented "above" the other elements or features. Thus, the example terms "below" and "below" may cover both above and below orientations. The device can be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein should be interpreted accordingly. In addition, it will be understood that when a layer is referred to as being "between" two layers, it may be the only layer between the two layers, or one or more intervening layers may also be present.

[0038] The terms used herein are for the purpose of describing specific embodiments and are not intended to limit the present inventive concept. As used herein, the singular forms "a" and "an" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprising" and "having" when used in this specification indicate the presence of recited features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0039] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. For example, the expression "A and / or B" means A, B, or A and B. Expressions such as "one or more of..." and "at least one of..." when preceding / following a list of elements modify the entire list of elements and do not modify the individual elements in the list. For example, the expressions "one or more of A, B, and C," "at least one of A, B, and C," and "at least one selected from the group consisting of A, B, and C" mean only A, only B, only C, both A and B, both A and C, both B and C, or all of A, B, and C.

[0040] Further, when describing embodiments of the present inventive concepts, the use of “may” refers to “one or more embodiments of the present inventive concepts.” Also, the term “exemplary” is intended to indicate an example or illustration.

[0041] It will be understood that when an element or layer is referred to as being “on,” “connected to,” “coupled to,” or “adjacent to” another element or layer, it can be directly on, connected to, coupled to, or adjacent to the other element or layer, or one or more intervening elements or layers may be present. When an element or layer is referred to as being “directly on,” “directly connected to,” “directly coupled to,” “contacting,” “directly in contact with,” or “immediately adjacent to” another element or layer, there are no intervening elements or layers.

[0042] As used herein, the terms "substantially," "about," and similar terms are used as terms of approximation, not terms of degree, and are intended to account for the inherent variation in measured or calculated values that one of ordinary skill in the art would recognize. Further, if the term "substantially" is used in conjunction with a feature that can be expressed with a numerical value, the term "substantially" means a range of + / - 5% of that value centered around that value. Moreover, the particular amounts or ranges recited in the written description or claims may also encompass the inherent variation in measured or calculated values that one of ordinary skill in the art would recognize.

[0043] As used herein, the terms "use" and "used" may be considered synonymous with the terms "utilize" and "utilized," respectively.

[0044] When one or more embodiments can be implemented differently, the specific process order can be performed differently from the order described. For example, (i) the disclosed process operations are merely examples and may involve various additional operations not explicitly covered, and (ii) the temporal order of the operations can be changed.

[0045] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present invention pertains. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the relevant art and / or the context of this specification, and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.

[0046] Figure 1 is a plan view illustrating a display device according to some embodiments of the present disclosure.

[0047] In the present disclosure, a plane may be defined by a first direction DR1 and a second direction DR2 intersecting the first direction DR1. For example, the first direction DR1 and the second direction DR2 may be perpendicular to each other. A direction perpendicular to the plane, that is, a thickness direction of the display device DD, may be a third direction DR3. In other words, the third direction DR3 may be perpendicular to each of the first direction DR1 and the second direction DR2.

[0048] refer to Figure 1 , the display device DD according to some embodiments of the present disclosure may include a substrate SUB and a pad portion PDP.

[0049] The substrate SUB may include a display area DA and a non-display area NDA. The display area DA may be defined as an area that displays an image by generating light or adjusting the transmittance of light provided from an external light source. A plurality of pixels PX may be disposed in the display area DA. Each of the pixels PX may generate light in response to a driving signal. For example, the pixels PX may be arranged in a matrix along a first direction DR1 and a second direction DR2.

[0050] In some embodiments, the display area DA may have a rectangular planar shape. For example, the length of the display area DA in the first direction DR1 may be greater than the length of the display area DA in the second direction DR2. However, the planar shape of the display area DA is not limited thereto. For example, the display area DA may have any one of a square planar shape, a circular planar shape, and an elliptical planar shape.

[0051] The non-display area NDA can be defined as an area that does not display an image. In a plan view, the non-display area NDA may surround at least a portion of the display area DA. For example, in a plan view, the non-display area NDA may completely surround the display area DA. A driver chip and a plurality of pads that provide drive signals to the pixels PX may be disposed in the non-display area NDA.

[0052] The pad portion PDP may be disposed in the non-display area NDA on the substrate SUB. For example, the pad portion PDP may be spaced apart from the display area DA in the second direction DR2. The pad portion PDP may include a pad that provides a driving signal to the pixel PX.

[0053] Figure 2 According to some embodiments of the present disclosure Figure 1 1-1' is a cross-sectional view of the display device taken along line II'.

[0054] refer to Figure 2 According to some embodiments of the present disclosure, a display device DD may include a substrate SUB, a display panel DP, and a polarization layer POL in a display area DA. The display panel DP may include a gate insulating layer GI, a first interlayer insulating layer ILD1, a second interlayer insulating layer ILD2, a thin film transistor TFT, a capacitor electrode CAPE, a first through-hole insulating layer VIA1, a connection electrode LCE, a second through-hole insulating layer VIA2, a pixel defining layer PDL, a light emitting element LD, and an encapsulation layer TFE.

[0055] The thin film transistor TFT may include an active pattern ACT, a gate electrode GE, a source electrode SE, and a drain electrode DE. The light emitting element LD may include a pixel electrode PE, a light emitting layer EML, and a common electrode CE. The encapsulation layer TFE may include a first inorganic encapsulation layer TFE1, an organic encapsulation layer TFE2, and a second inorganic encapsulation layer TFE3.

[0056] The substrate SUB may include a transparent material or an opaque material. For example, the substrate SUB may be formed from a transparent resin substrate. A polyimide substrate may be an example of a transparent resin substrate. In these examples, the polyimide substrate may include a first organic layer, a first isolation layer, and / or a second organic layer. In some examples, the substrate SUB may include a quartz substrate, a synthetic quartz substrate, a calcium fluoride substrate, a fluorine-doped quartz substrate, a lime glass substrate, or a non-alkali glass substrate. These may be used alone or in combination.

[0057] A buffer layer may be provided on the substrate SUB. The buffer layer may prevent metal atoms or impurities from diffusing from the substrate SUB to the upper structure (e.g., thin film transistor TFT, light emitting element LD, etc.). In addition, the buffer layer may be used to obtain a substantially uniform active pattern ACT by controlling the heat transfer rate during the crystallization process for forming the active pattern ACT. In addition, when the surface of the substrate SUB is uneven, the buffer layer may be used to improve the flatness of the surface of the substrate SUB. For example, the buffer layer may include an inorganic insulating material. In some examples, the buffer layer may be omitted.

[0058] The active pattern ACT may be disposed on the substrate SUB. The active pattern ACT may include an oxide semiconductor, a silicon semiconductor, and / or an organic semiconductor. For example, the oxide semiconductor may include at least one oxide selected from indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). The silicon semiconductor may include amorphous silicon and / or polycrystalline silicon. The active pattern ACT may include a source region, a drain region, and a channel region located between the source and drain regions.

[0059] The gate insulating layer GI may be provided on the substrate SUB. The gate insulating layer GI may cover the active pattern ACT on the substrate SUB and may be provided with a substantially uniform thickness along the contour of the active pattern ACT. In some examples, the gate insulating layer GI may have a substantially flat upper surface without generating a step difference around the active pattern ACT. The gate insulating layer GI may include an inorganic insulating material. Examples of inorganic insulating materials that may be used as the gate insulating layer GI may include silicon oxide (SiO x ), silicon nitride (SiN x ) and / or silicon oxynitride (SiO x N y ) etc. These may be used alone or in combination with each other. The gate insulating layer GI may electrically insulate the active pattern ACT from the gate electrode GE.

[0060] The gate electrode GE may be disposed on the gate insulating layer GI. The gate electrode GE may overlap with the channel region of the active pattern ACT in a plan view. The gate electrode GE may include a metal, an alloy, a metal nitride, a conductive metal oxide, and / or a transparent conductive material. Examples of materials that can be used as the gate electrode GE may include silver (Ag), an alloy including silver, molybdenum (Mo), an alloy including molybdenum, aluminum (Al), an alloy including aluminum, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), nickel (Ni), chromium (Cr), chromium nitride (CrN), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), indium tin oxide (ITO), and / or indium zinc oxide (IZO). These may be used alone or in combination.

[0061] The first interlayer insulating layer ILD1 may be disposed on the gate insulating layer GI. The first interlayer insulating layer ILD1 may cover the gate electrode GE on the gate insulating layer GI and may be disposed with a substantially uniform thickness along the contour of the gate electrode GE. In some examples, the first interlayer insulating layer ILD1 may have a substantially flat upper surface without generating a step difference around the gate electrode GE. The first interlayer insulating layer ILD1 may include an inorganic insulating material. Examples of the inorganic insulating material that may be used as the first interlayer insulating layer ILD1 may include silicon oxide (SiO x ), silicon nitride (SiN x) and / or silicon oxynitride (SiO x N y ) etc. These may be used alone or in combination. The first interlayer insulating layer ILD1 may electrically insulate the gate electrode GE from the source electrode SE. In addition, the first interlayer insulating layer ILD1 may electrically insulate the gate electrode GE from the drain electrode DE. In addition, the first interlayer insulating layer ILD1 may electrically insulate the gate electrode GE from the capacitor electrode CAPE.

[0062] The capacitor electrode CAPE may be disposed on the first interlayer insulating layer ILD1. The capacitor electrode CAPE may overlap the gate electrode GE in a plan view. The capacitor electrode CAPE may form a capacitor (e.g., a storage capacitor) with the gate electrode GE. For example, the capacitor electrode CAPE may include a metal, an alloy, a metal nitride, a conductive metal oxide, or a transparent conductive material. These may be used alone or in combination.

[0063] The second interlayer insulating layer ILD2 may be disposed on the first interlayer insulating layer ILD1. The second interlayer insulating layer ILD2 may cover the capacitor electrode CAPE on the first interlayer insulating layer ILD1 and may be disposed with a substantially uniform thickness along the contour of the capacitor electrode CAPE. In some examples, the second interlayer insulating layer ILD2 may have a substantially flat upper surface without generating a step difference around the capacitor electrode CAPE. The second interlayer insulating layer ILD2 may include an inorganic insulating material. Examples of inorganic insulating materials that may be used as the second interlayer insulating layer ILD2 may include silicon oxide (SiO x ), silicon nitride (SiN x ) and / or silicon oxynitride (SiO x N y ) etc. These may be used alone or in combination with each other. The second interlayer insulating layer ILD2 may electrically insulate the capacitor electrode CAPE from the source electrode SE. In addition, the second interlayer insulating layer ILD2 may electrically insulate the capacitor electrode CAPE from the drain electrode DE.

[0064] The source electrode SE and the drain electrode DE may be disposed on the second interlayer insulating layer ILD2. The source electrode SE may be connected to the source region of the active pattern ACT via a contact hole formed through the gate insulating layer GI, the first interlayer insulating layer ILD1, and the second interlayer insulating layer ILD2. The drain electrode DE may be connected to the drain region of the active pattern ACT via a contact hole formed through the gate insulating layer GI, the first interlayer insulating layer ILD1, and the second interlayer insulating layer ILD2. For example, each of the source electrode SE and the drain electrode DE may include a metal, an alloy, a metal nitride, a conductive metal oxide, and / or a transparent conductive material. These may be used alone or in combination.

[0065] The first through-hole insulating layer VIA1 may be disposed on the second interlayer insulating layer ILD2. For example, the first through-hole insulating layer VIA1 may be disposed on the second interlayer insulating layer ILD2 with a relatively thick thickness and may cover the source electrode SE and the drain electrode DE. In this example, the first through-hole insulating layer VIA1 may have a substantially flat upper surface. The first through-hole insulating layer VIA1 may include an organic insulating material. Examples of organic insulating materials that can be used for the first through-hole insulating layer VIA1 include photoresist, polyacrylic resin, polyimide resin, polyamide resin, siloxane resin, acrylic resin, or epoxy resin. These may be used alone or in combination.

[0066] The connection electrode LCE may be disposed on the first through-hole insulating layer VIA1. The connection electrode LCE may be connected to the drain electrode DE via a contact hole formed through the first through-hole insulating layer VIA1. For example, the connection electrode LCE may include a metal, an alloy, a metal nitride, a conductive metal oxide, or a transparent conductive material. These materials may be used alone or in combination.

[0067] The second through-hole insulating layer VIA2 may be disposed on the first through-hole insulating layer VIA1. For example, the second through-hole insulating layer VIA2 may be disposed on the first through-hole insulating layer VIA1 with a relatively thick thickness and may cover the connection electrode LCE. In this example, the second through-hole insulating layer VIA2 may have a substantially flat upper surface. The second through-hole insulating layer VIA2 may include an organic insulating material. Examples of organic insulating materials that can be used as the second through-hole insulating layer VIA2 include photoresist, polyacrylic resin, polyimide resin, polyamide resin, siloxane resin, acrylic resin, or epoxy resin. These may be used alone or in combination.

[0068] The pixel electrode PE may be disposed on the second through-hole insulating layer VIA2. The pixel electrode PE may be connected to the connection electrode LCE via a contact hole formed through the second through-hole insulating layer VIA2. As a result, the pixel electrode PE may be electrically connected to the thin film transistor TFT via the connection electrode LCE. For example, the pixel electrode PE may include a metal, an alloy, a metal nitride, a conductive metal oxide, or a transparent conductive material. These materials may be used alone or in combination. For example, the pixel electrode PE may function as an anode electrode.

[0069] The pixel defining layer PDL may be disposed on the second through-hole insulating layer VIA2. The pixel defining layer PDL may cover the edge of the pixel electrode PE and may have an opening that exposes the upper surface of the pixel electrode PE. For example, the pixel defining layer PDL may include an organic insulating material or an inorganic insulating material. In some embodiments, the pixel defining layer PDL may include an organic insulating material. Examples of organic insulating materials that can be used as the pixel defining layer PDL may include photoresist, polyacrylic resin, polyimide resin, polyamide resin, siloxane resin, acrylic resin, or epoxy resin. These may be used alone or in combination with each other.

[0070] The light-emitting layer EML may be disposed on the pixel electrode PE. The light-emitting layer EML may be disposed on the upper surface of the pixel electrode PE exposed by the pixel defining layer PDL. The light-emitting layer EML may emit light having a specific color (e.g., red, green, and / or blue). For example, the light-emitting layer EML may include one or both of an organic light-emitting material and quantum dots. In some embodiments, the light-emitting layer EML may have a single-layer structure including one light-emitting layer. However, the present disclosure is not limited thereto, and the light-emitting layer EML may have a tandem structure including multiple light-emitting layers.

[0071] The common electrode CE may be disposed on the pixel defining layer (PDL) and the light emitting layer (EML). The common electrode CE may be disposed with a substantially uniform thickness along the contours of the pixel defining layer (PDL) and the light emitting layer (EML). For example, the common electrode CE may include a metal, an alloy, a metal nitride, a conductive metal oxide, or a transparent conductive material. These materials may be used alone or in combination. For example, the common electrode CE may function as a cathode electrode.

[0072] The encapsulation layer TFE may be disposed on the common electrode CE. The encapsulation layer TFE may prevent impurities, moisture, and the like from penetrating into the light-emitting element LD from the outside. The encapsulation layer TFE may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In some embodiments, the encapsulation layer TFE may include a first inorganic encapsulation layer TFE1, an organic encapsulation layer TFE2, and a second inorganic encapsulation layer TFE3.

[0073] The first inorganic encapsulation layer TFE1 may be provided on the common electrode CE. The first inorganic encapsulation layer TFE1 may cover the common electrode CE and may be provided with a uniform thickness along the contour of the common electrode CE. The first inorganic encapsulation layer TFE1 may prevent or substantially reduce the possibility of degradation of the light-emitting element LD due to penetration of impurities, moisture, etc. In addition, the first inorganic encapsulation layer TFE1 may protect the light-emitting element LD from external impacts. For example, the first inorganic encapsulation layer TFE1 may include a flexible inorganic insulating material.

[0074] The organic encapsulation layer TFE2 may be disposed on the first inorganic encapsulation layer TFE1. The organic encapsulation layer TFE2 may compensate for the step difference of the first inorganic encapsulation layer TFE1. Thus, the organic encapsulation layer TFE2 may have a substantially flat upper surface. The organic encapsulation layer TFE2, together with the first inorganic encapsulation layer TFE1, may protect the light-emitting element LD from external impact. For example, the organic encapsulation layer TFE2 may include a flexible organic material.

[0075] The second inorganic encapsulation layer TFE3 may be provided on the organic encapsulation layer TFE2. The second inorganic encapsulation layer TFE3, together with the first inorganic encapsulation layer TFE1, may prevent the light-emitting element LD from deteriorating due to the penetration of impurities, moisture, etc., or substantially reduce the possibility of such damage. In addition, the second inorganic encapsulation layer TFE3, together with the first inorganic encapsulation layer TFE1 and the organic encapsulation layer TFE2, may protect the light-emitting element LD from external impacts. For example, the second inorganic encapsulation layer TFE3 may include a flexible inorganic insulating material.

[0076] In some examples, the encapsulation layer TFE may have a five-layer structure in which three inorganic encapsulation layers and two organic encapsulation layers are alternately stacked on each other, or may have a seven-layer structure in which four inorganic encapsulation layers and three organic encapsulation layers are alternately stacked on each other.

[0077] A polarizing layer POL may be disposed on the encapsulation layer TFE. The polarizing layer POL may polarize external light. In other words, the polarizing layer POL may reduce external light reflection from the display device DD. With reduced external light reflection, the visibility of the display device DD may be improved (e.g., increased). In some examples, the polarizing layer POL may be omitted.

[0078] Although the display device DD of the present disclosure is described by limiting the organic light emitting display (OLED) device, the configuration of the present disclosure is not limited thereto. In some other embodiments, the display device DD may include a liquid crystal display (LCD) device, a field emission display (FED) device, a plasma display panel (PDP) device, an electrophoretic image display (EPD) device, an inorganic light emitting display (ILED) device, or a quantum dot display device.

[0079] Figure 3 is a flowchart of a method for manufacturing a display device according to some embodiments of the present disclosure. Figures 4 to 22 To illustrate some embodiments of the present disclosure Figure 3 A view of a method of manufacturing a display device.

[0080] refer to Figure 3According to some embodiments of the present disclosure, the method MM for manufacturing a display device may include: forming a display panel overlapping with a unit area on a first surface of a mother substrate (S100); attaching a first protective film overlapping with the display panel to the first surface of the mother substrate (S200); forming a first cutting line along an edge of the unit area on the mother substrate (S300); forming a second cutting line overlapping with a dummy area on the mother substrate (S400); attaching a second protective film overlapping with the unit area and the dummy area to the first surface of the mother substrate (S500); reducing the thickness of the mother substrate by spraying an etchant toward a second surface of the mother substrate opposite to the first surface and removing the dummy area of the mother substrate (S600); and removing the first protective film and the second protective film (S700).

[0081] refer to Figure 4 , the display panel DP overlapping the cell area CA may be formed on the first surface of the mother substrate MSUB.

[0082] The mother substrate MSUB may include a transparent material or an opaque material. For example, the mother substrate MSUB may be formed of a transparent resin substrate. A polyimide substrate may be an example of a transparent resin substrate. In some examples, the mother substrate MSUB may include a quartz substrate, a synthetic quartz substrate, a calcium fluoride substrate, a fluorine-doped quartz substrate, a lime glass substrate, or a non-alkali glass substrate. These may be used alone or in combination with one another. The mother substrate MSUB may include a plurality of substrates (e.g., Figure 19 A plurality of substrates may be formed by separating the mother substrate MSUB in a subsequent process.

[0083] The mother substrate MSUB may include a unit area CA and a dummy area DUM. The unit area CA may include a display area (DA; for example, see Figure 1 ) and non-display area (NDA; see for example Figure 1 ). The dummy area DUM may be located around the perimeter of the cell area CA. In some embodiments, the dummy area DUM may surround the cell area CA. For example, the dummy area DUM may completely surround the cell area CA. The dummy area DUM may be defined as an area that is removed in subsequent processes.

[0084] The display panel DP and the pad portion PDP may be formed on the first surface of the mother substrate MSUB to overlap the unit area CA. For example, (eg, in a plan view), the display panel DP may overlap the display area, and the pad portion PDP may overlap the non-display area.

[0085] The display panel DP may include Figure 2, a gate insulating layer GI, a first interlayer insulating layer ILD1, a second interlayer insulating layer ILD2, a thin film transistor TFT, a capacitor electrode CAPE, a first through-hole insulating layer VIA1, a connection electrode LCE, a second through-hole insulating layer VIA2, a pixel defining layer PDL, a light emitting element LD, and an encapsulation layer TFE are illustrated. The pad portion PDP may be spaced apart from the display panel DP in the second direction DR2.

[0086] Thus, a display unit DCE including a display panel DP and a pad portion PDP may be formed. The display unit DCE may completely overlap with the unit area CA. When the dummy area DUM of the mother substrate MSUB is removed in a subsequent process, the display unit DCE may be used to manufacture a display device (e.g., Figure 2 display device DD).

[0087] like Figure 4 As shown in the example, the display cells DCE may be repeatedly arranged along the first direction DR1 and the second direction DR2. For example, six display cells DCE may be repeatedly arranged along the row direction (or the first direction DR1). In other words, in each of the first to fifth rows, six display cells DCE may be arranged in a row along the first direction DR1. In addition, five display cells DCE may be repeatedly arranged along the column direction (or the second direction DR2). In other words, in each of the first to sixth columns, five display cells DCE may be arranged in a row along the second direction DR2. However, the arrangement of the display cells DCE is not limited to this.

[0088] like Figure 4 In the example shown in FIG, thirty display units DCE can be formed on the first surface of the mother substrate MSUB. However, the number of display units DCE is not limited thereto. For example, less than thirty display units DCE or more than thirty display units DCE can be formed on the first surface of the mother substrate MSUB.

[0089] like Figure 4 As illustrated in FIG, the mother substrate MSUB may have a rectangular planar shape. In some embodiments, the mother substrate MSUB may include a first side extending in a first direction DR1 and a second side extending in a second direction DR2 and contacting the first side. Here, the length of the first side may be greater than the length of the second side. In other words, the mother substrate MSUB may have a rectangular planar shape, in which the first side is a long side and the second side is a short side. However, the planar shape of the mother substrate MSUB is not limited thereto.

[0090] refer to Figure 5 、 Figure 6 、 Figure 7 、 Figure 8 、 Figure 9 and Figure 10, a first protection film PF1 overlapping with the display panel DP may be attached to the first surface MSUB-S1 of the mother substrate MSUB (S200). Attaching the first protection film PF1 to the first surface MSUB-S1 of the mother substrate MSUB (S200) may include providing the first protection film PF1 (S210), attaching the first protection film PF1 to overlap with the display panel DP (S220), and removing the carrier film CAF (S230).

[0091] like Figure 5 and Figure 6 As shown in FIG. 1 , a first protective film PF1 including a carrier film CAF and a cell protection film CPF may be provided ( S210 ). The cell protection film CPF may be disposed on one surface of the carrier film CAF. The cell protection films CPF may be spaced apart from each other. For example, each of the cell protection films CPF may have a shape corresponding to that of the display cell DCE.

[0092] The shape of the cell protection films CPF arranged on the carrier film CAF can correspond to the shape of the display cells DCE arranged on the mother substrate MSUB. That is, the distance between the cell protection films CPF on the carrier film CAF can be the same as the distance between the display cells DCE on the mother substrate MSUB. For example, if thirty display cells DCE are formed on the mother substrate MSUB, thirty cell protection films CPF can be arranged on the carrier film CAF.

[0093] like Figure 7 and Figure 8 As illustrated in FIG, the first protection film PF1 may be attached to the first surface MSUB-S1 of the mother substrate MSUB to overlap with the display panel DP (S220). For example, the first protection film PF1 may be attached to the first surface MSUB-S1 of the mother substrate MSUB such that each of the unit protection films CPF overlaps with the display panel DP.

[0094] For example, each of the unit protection films CPF may completely overlap with the display unit DCE. In other words, each of the unit protection films CPF may completely overlap with the display panel DP and the pad portion PDP. In this example, each of the unit protection films CPF may cover the display panel DP and the pad portion PDP. However, the present disclosure is not limited thereto. In another example, each of the unit protection films CPF may completely overlap with the display panel DP without overlapping with the pad portion PDP. In this example, each of the unit protection films CPF may cover the display panel DP and expose the pad portion PDP.

[0095] like Figure 9 and Figure 10 As shown in FIG, the carrier film CAF may be removed ( S230 ).

[0096] After the carrier film CAF is aligned with the mother substrate MSUB and each of the cell protection films CPF is attached to the display unit DCE, the carrier film CAF may be removed. In other words, the cell protection film CPF may remain on the display unit DCE, and only the carrier film CAF may be removed.

[0097] refer to Figure 11 and Figure 12 , a first cutting line CL may be formed on the mother substrate MSUB ( S300 ).

[0098] like Figure 11 As shown in FIG, the first cutting line CL may be formed on the mother substrate MSUB along the edge of the unit area CA. In other words, the first cutting line CL may be formed on the mother substrate MSUB along a first side of the display unit DCE extending in the first direction DR1 and a second side of the display unit DCE extending in the second direction DR2. The first cutting line CL may extend in both the first direction DR1 and the second direction DR2.

[0099] like Figure 12 As illustrated in FIG, the first cutting line CL may extend from the first surface MSUB-S1 of the mother substrate MSUB toward the second surface MSUB-S2 of the mother substrate MSUB. Here, the second surface MSUB-S2 of the mother substrate MSUB may be defined as a surface opposite to the first surface MSUB-S1 of the mother substrate MSUB, on which the display unit DCE is disposed. In other words, the first cutting line CL may extend from the first surface MSUB-S1 of the mother substrate MSUB toward a direction opposite to the thickness direction of the mother substrate MSUB.

[0100] The first cutting line CL may be formed by irradiating the mother substrate MSUB with a laser. In some embodiments, the first cutting line CL may be formed by irradiating the first laser LAS1 onto the second surface MSUB-S2 of the mother substrate MSUB. However, the present disclosure is not limited thereto, and the first cutting line CL may be formed by irradiating the first laser LAS1 onto the first surface MSUB-S1 of the mother substrate MSUB.

[0101] The depth of the first cutting line CL (e.g., the length in the third direction DR3) may be less than the thickness DM of the mother substrate MSUB. For example, the thickness DM of the mother substrate MSUB may be approximately 500 micrometers, and the first depth D1 of the first cutting line CL may be approximately 240 micrometers. However, the thickness DM of the mother substrate MSUB and the first depth D1 of the first cutting line CL are not limited thereto.

[0102] refer to Figure 13 and Figure 14 , a second cutting line DCL may be formed on the mother substrate MSUB ( S400 ).

[0103] like Figure 13 As illustrated in FIG, the second cutting line DCL may be formed in the dummy area DUM of the mother substrate MSUB. In some embodiments, when the mother substrate MSUB has a rectangular planar shape, wherein a first side extending in the first direction DR1 is a long side and a second side extending in the second direction DR2 is a short side, the second cutting line DCL may extend in the second direction DR2. That is, the second cutting line DCL may extend perpendicular to the long side of the mother substrate MSUB. However, the present disclosure is not limited thereto, and the second cutting line DCL may extend parallel to the long side of the mother substrate MSUB.

[0104] For example, when five display cells DCE in each of the first to sixth columns are arranged in a row along the second direction DR2, the second cutting line DCL may be formed in the dummy area DUM between the second and third columns and between the fourth and fifth columns. However, the position where the second cutting line DCL is formed is not limited thereto. The position where the second cutting line DCL is formed may vary depending on the size of the mother substrate MSUB and the shape of the display cells DCE arranged on the mother substrate MSUB.

[0105] For example, two second cutting lines DCL may be formed in the dummy area DUM of the mother substrate MSUB. However, the number of second cutting lines DCL is not limited thereto. The number of second cutting lines DCL may vary depending on the size of the mother substrate MSUB and the shape of the display unit DCE arranged on the mother substrate MSUB.

[0106] like Figure 14 As shown in FIG, the second cutting line DCL may extend from the first surface MSUB-S1 of the mother substrate MSUB toward the second surface MSUB-S2 of the mother substrate MSUB. In other words, the second cutting line DCL may extend from the first surface MSUB-S1 of the mother substrate MSUB toward a direction opposite to the thickness direction of the mother substrate MSUB.

[0107] The second cutting line DCL may be formed by irradiating the mother substrate MSUB with a laser. In some embodiments, the second cutting line DCL may be formed by irradiating the second laser LAS2 onto the second surface MSUB-S2 of the mother substrate MSUB. However, the present disclosure is not limited thereto, and the second cutting line DCL may be formed by irradiating the second laser LAS2 onto the first surface MSUB-S1 of the mother substrate MSUB.

[0108] For example, the second laser LAS2 for forming the second cutting line DCL may be the same as the first laser LAS1 for forming the first cutting line CL. However, the present disclosure is not limited thereto, and the second laser LAS2 may be different from the first laser LAS1.

[0109] The depth of the second cutting line DCL (e.g., the length in the third direction DR3) may be less than the thickness DM of the mother substrate MSUB. For example, the thickness DM of the mother substrate MSUB may be approximately 500 micrometers, and the second depth D2 of the second cutting line DCL may be approximately 300 micrometers. However, the thickness DM of the mother substrate MSUB and the second depth D2 of the second cutting line DCL are not limited thereto.

[0110] In an exemplary embodiment, the second cut line DCL may have a length greater than that of the first cut line CL in the thickness direction of the mother substrate MSUB. In other words, the second depth D2 of the second cut line DCL may be greater than the first depth D1 of the first cut line CL. For example, the first depth D1 of the first cut line CL may be approximately 240 microns, and the second depth D2 of the second cut line DCL may be approximately 300 microns. However, the first depth D1 of the first cut line CL and the second depth D2 of the second cut line DCL are not limited thereto. The difference between the first depth D1 and the second depth D2 may vary depending on the process margin of forming the cut line using a laser.

[0111] refer to Figure 15 and Figure 16 , the second protection film PF2 may be attached to the first surface MSUB-S1 of the mother substrate MSUB (S500). The second protection film PF2 may overlap the cell area CA and the dummy area DUM.

[0112] The second protective film PF2 may overlap the display panel DP. For example, the second protective film PF2 may be disposed on the cell protection film CPF in the cell area CA and on the first surface MSUB-S1 of the mother substrate MSUB in the dummy area DUM. The second protective film PF2 may cover the side surfaces of the display cell DCE. In some embodiments, the second protective film PF2 may include an acid-resistant film. In such an example, the second protective film PF2 may protect the display cell DCE from etching agents.

[0113] refer to Figure 17 、 Figure 18 and Figure 19 By spraying an etchant ETC toward the second surface MSUB-S2 of the mother substrate MSUB, the thickness DM of the mother substrate MSUB can be reduced, and the dummy area DUM of the mother substrate MSUB can be removed (S600). For example, spraying the etchant ETC toward the second surface MSUB-S2 of the mother substrate MSUB may include reducing the thickness DM of the mother substrate MSUB (S610), dividing the mother substrate MSUB into a plurality of intermediate substrates ISUB along second cutting lines DCL (S620), and dividing each of the intermediate substrates ISUB into a plurality of substrates SUB along first cutting lines CL (S630).

[0114] like Figure 17As illustrated in FIG, by spraying an etchant ETC toward the second surface MSUB-S2 of the mother substrate MSUB, the thickness DM of the mother substrate MSUB can be reduced (S610). In this example, since the mother substrate MSUB is etched without an etching mask, the second surface MSUB-S2 of the mother substrate MSUB can be uniformly etched as a whole, and the thickness DM of the mother substrate MSUB can be reduced.

[0115] like Figure 17 and Figure 18 As illustrated in FIG, by spraying the etchant ETC toward the second surface MSUB-S2 of the mother substrate MSUB, the mother substrate MSUB may be separated into the intermediate substrate ISUB (S620).

[0116] As the thickness DM of the mother substrate MSUB is continuously reduced by the etchant ETC, the etchant ETC may contact the second cutting line DCL. That is, because the second depth D2 of the second cutting line DCL is greater than the first depth D1 of the first cutting line CL, the second cutting line DCL may contact the etchant ETC before the first cutting line CL.

[0117] When the etchant ETC contacts the second cutting line DCL, as the etchant ETC penetrates into the inside of the mother substrate MSUB along the second cutting line DCL, a portion of the mother substrate MSUB adjacent to the second cutting line DCL may be etched relatively quickly.

[0118] Because the portion of the mother substrate MSUB adjacent to the second cutting line DCL is etched relatively quickly, the mother substrate MSUB can be separated into intermediate substrates ISUB along the second cutting line DCL. The intermediate substrates ISUB can be spaced apart from each other in the first direction DR1 and separated by the location where the second cutting line DCL is formed. In some embodiments, a portion of the side surface of the intermediate substrate ISUB may include a curved surface. In other words, the lower surface of the intermediate substrate ISUB may include a pit (or depression) caused by the etchant ETC.

[0119] During the process of separating the mother substrate MSUB into the intermediate substrates ISUB, the thickness DM of the mother substrate MSUB can be continuously reduced. In other words, when the mother substrate MSUB is separated into the intermediate substrates ISUB along the second cutting lines DCL, the thickness DM of the mother substrate MSUB can be reduced by the etchant ETC. That is, because the thinning process of the mother substrate MSUB and the separation process of the mother substrate MSUB can be performed simultaneously (e.g., synchronously), process efficiency can be improved (e.g., increased).

[0120] For example, two second cutting lines DCL may be formed in the dummy area DUM of the mother substrate MSUB, and the mother substrate MSUB may be separated along the two second cutting lines DCL. Thus, the mother substrate MSUB may be divided into three intermediate substrates ISUB. However, the number of intermediate substrates ISUB formed is not limited thereto.

[0121] like Figure 18 and Figure 19 As illustrated in FIG, each of the intermediate substrates ISUB may be divided into a plurality of substrates SUB ( S630 ).

[0122] As the thickness DI of the intermediate substrate ISUB continues to be reduced by the etchant ETC, the etchant ETC may contact the first cutting line CL. When the etchant ETC contacts the first cutting line CL, as the etchant ETC penetrates into the interior of the intermediate substrate ISUB along the first cutting line CL, a portion of the intermediate substrate ISUB adjacent to the first cutting line CL may be etched relatively quickly.

[0123] Because the portion of the intermediate substrate ISUB adjacent to the first cutting line CL is etched relatively quickly, the intermediate substrate ISUB can be separated into substrates SUB along the first cutting line CL. Consequently, a substrate SUB can be formed that overlaps the cell area CA, and a portion of the mother substrate MSUB that overlaps the dummy area DUM can be removed. For example, a substrate SUB can be formed that overlaps the cell area CA, and a portion of the intermediate substrate ISUB that overlaps the dummy area DUM can be removed.

[0124] The substrates SUB may be spaced apart from each other in the first direction DR1 and bounded by the location where the first cutting line CL is formed. In some embodiments, a portion of the side surface of the substrate SUB may include a curved surface. In other words, the lower surface of the substrate SUB may include a pit (or depression) caused by the etchant ETC.

[0125] During the process of separating the intermediate substrate ISUB into the substrates SUB, the thickness DI of the intermediate substrate ISUB can be continuously reduced. In other words, when the intermediate substrate ISUB is separated into the substrates SUB along the first cutting lines CL, the thickness DI of the intermediate substrate ISUB can be reduced by the etchant ETC. That is, because the thinning process of the intermediate substrate ISUB and the separation process of the intermediate substrate ISUB can be performed simultaneously (e.g., synchronously), process efficiency can be improved.

[0126] As the size and weight of the mother substrate MSUB become relatively large, deformation of the mother substrate MSUB may occur during conventional processes for separating the mother substrate MSUB into substrates SUB. For example, a portion of the mother substrate MSUB may bend where a cut line is formed. Furthermore, the etchant ETC may penetrate into the deformed portion of the mother substrate MSUB, causing damage to the display unit DCE or display panel DP.

[0127] The method MM of manufacturing a display device according to some embodiments of the present disclosure may include dividing the mother substrate MSUB into intermediate substrates ISUB along second cutting lines DCL formed in the dummy area DUM before dividing the mother substrate MSUB into substrates SUB along first cutting lines CL formed along edges of the unit area CA. By dividing the mother substrate MSUB into the intermediate substrates ISUB, the size of each of the intermediate substrates ISUB may be smaller than that of the mother substrate MSUB, and the weight of each of the intermediate substrates ISUB may be smaller than (e.g., relatively smaller than) the weight of the mother substrate MSUB.

[0128] That is, during the process of separating a relatively lightweight intermediate substrate ISUB into substrates SUB, deformation of the intermediate substrate ISUB can be prevented or the likelihood of such deformation can be substantially reduced. For example, bending of the intermediate substrate ISUB at the location where the first cutting line CL is formed can be prevented or the likelihood of such deformation can be substantially reduced. Consequently, damage to the display unit DCE or the display panel DP due to penetration of the etchant ETC can be prevented or the likelihood of such damage can be substantially reduced, and the reliability of the process of separating the mother substrate MSUB into the substrates SUB can be improved (e.g., increased).

[0129] refer to Figure 20 、 Figure 21 and Figure 22 , the first protection film PF1 and the second protection film PF2 may be removed (S700). For example, after removing the second protection film PF2, the cell protection film CPF may be removed.

[0130] like Figure 20 and Figure 21 As illustrated in FIG, the second protection film PF2 covering the side surface of the display cell DCE and the cell protection film CPF may be removed. For example, the second protection film PF2 may be removed after the process of spraying the etchant ETC.

[0131] like Figure 22 As shown in the example, the cell protection films CPF respectively overlapping with the display cells DCE may be removed.

[0132] Each of the display units DCE can be used to manufacture a display device. In some embodiments, after removing the unit protection film CPF, a polarization layer (POL; for example, see FIG. 4 ) can be formed on the display panel DP. Figure 2 ). For example, after removing the cell protection film CPF, a polarization layer may be formed on the encapsulation layer. Figure 2 The display device DD illustrated in FIG. 1 includes a substrate SUB, a display panel DP, a pad portion PDP, and a polarizing layer.

[0133] The present disclosure is applicable to various display devices. For example, the present disclosure is applicable to various display devices, such as display devices for vehicles, ships, and aircraft, portable communication devices, display devices for exhibitions or information transmission, and medical display devices.

[0134] The foregoing is an illustration of the embodiments of the present disclosure and should not be construed as limiting thereof. Although some embodiments have been described with reference to the accompanying drawings, it will be readily apparent to those skilled in the art that many changes and modifications may be made therein without departing from the spirit and scope of the present disclosure as defined by the claims and their equivalents.

Claims

1. A method for manufacturing a display device, the method comprising: forming a display panel on a first surface of a mother substrate, wherein the mother substrate includes a unit area and a dummy area surrounding the unit area, and the display panel overlaps the unit area; attaching a protective film to the first surface of the mother substrate to overlap with the display panel; forming a first cutting line on the mother substrate along an edge of the unit area; forming a second cutting line on the mother substrate, the second cutting line overlapping a portion of the dummy area and having a length greater than that of the first cutting line in a thickness direction of the mother substrate; reducing the thickness of the mother substrate by spraying an etchant toward a second surface of the mother substrate opposite to the first surface; as well as The dummy region of the mother substrate is removed by spraying the etchant toward the second surface of the mother substrate. 2 . The method according to claim 1 , wherein when the removing the dummy region of the mother substrate, the thickness of the mother substrate is reduced by the etchant. The method of claim 1 , wherein the second cutting line contacts the etchant before the first cutting line. 4 . The method according to claim 1 , wherein the removing the dummy region of the mother substrate comprises dividing the mother substrate into a plurality of intermediate substrates along the second cutting lines by spraying the etchant toward the second surface of the mother substrate.

5. The method according to claim 1, wherein a plurality of substrates are formed by removing the dummy area of the mother substrate, and wherein a portion of a side surface of each of the plurality of substrates includes a curved surface.

6. The method according to claim 1, wherein the mother substrate includes a first side extending in a first direction and a second side contacting the first side and extending in a second direction intersecting the first direction, wherein the length of the first side is greater than the length of the second side, and The second cutting line extends in the second direction. 7 . The method of claim 1 , wherein each of the first cutting line and the second cutting line extends from the first surface of the mother substrate toward the second surface of the mother substrate. 8 . The method of claim 7 , wherein each of the first cutting line and the second cutting line is formed by irradiating laser to the mother substrate. 9 . The method according to claim 8 , wherein the laser is irradiated to the second surface of the mother substrate.

10. The method of claim 1, wherein the protective film comprises an acid-resistant film.

11. The method according to claim 1 , further comprising: After removing the dummy area of the mother substrate, a polarizing layer is formed on the display panel.

12. A method for manufacturing a display device, the method comprising: forming a display panel on a first surface of a mother substrate, wherein the mother substrate includes a unit area and a dummy area surrounding the unit area, and the display panel overlaps the unit area; attaching a protective film to the first surface of the mother substrate to overlap with the display panel; forming a first cutting line on the mother substrate along an edge of the unit area; forming a second cutting line on the mother substrate, the second cutting line overlapping a portion of the dummy area and having a length greater than that of the first cutting line in a thickness direction of the mother substrate; reducing the thickness of the mother substrate by spraying an etchant toward a second surface of the mother substrate opposite to the first surface; dividing the mother substrate into a plurality of intermediate substrates along the second cutting lines by spraying the etchant toward the second surface of the mother substrate; as well as Each of the plurality of intermediate substrates is separated into a plurality of substrates along the first cutting lines by spraying the etchant. 13 . The method according to claim 12 , wherein in said dividing the mother substrate into the plurality of intermediate substrates along the second cutting lines, the thickness of the mother substrate is reduced by the etchant. 14 . The method according to claim 13 , wherein in said dividing each of the plurality of intermediate substrates into the plurality of substrates along the first cutting line, a thickness of each of the plurality of intermediate substrates is reduced by the etchant. The method of claim 12 , wherein the second cutting line contacts the etchant before the first cutting line. The method of claim 12 , wherein a portion of a side surface of each of the plurality of substrates comprises a curved surface.

17. The method according to claim 12, wherein the mother substrate includes a first side extending in a first direction and a second side contacting the first side and extending in a second direction intersecting the first direction, wherein the length of the first side is greater than the length of the second side, and The second cutting line extends in the second direction. 18 . The method of claim 12 , wherein each of the first cutting line and the second cutting line extends from the first surface of the mother substrate toward the second surface of the mother substrate. 19 . The method of claim 18 , wherein each of the first cutting line and the second cutting line is formed by irradiating laser to the mother substrate.

20. The method of claim 12, wherein the protective film comprises an acid-resistant film.

Images