A solid state disk data reading method, device, equipment and storage medium

Abstract

The application provides a solid state disk data reading method and device, equipment and storage medium; it relates to storage technical field, the method includes: obtaining the historical read operation data set of solid state disk;According to the set time window, the historical read operation data set is divided, a plurality of samples are obtained, and the sample is embedded and handled to obtain the corresponding embedded time sequence;The embedded time sequence is stacked by N stacked layers, and the stacked reinforced time sequence is obtained;Linear prediction is carried out based on the stacked reinforced time sequence corresponding to all samples, and the pre-read operation sequence is obtained;According to the pre-read operation information, the corresponding data in the flash memory of the solid state disk is read and stored to the memory buffer area of the controller of the solid state disk;Receive data read command, determine that the data read command hits the data in the memory buffer area, and read the hit data from the memory buffer area through the PCIe bus. To realize low power consumption model prediction and reduce resource consumption and access delay.

Description

Technical Field

[0001] This disclosure relates to the field of storage technology, and in particular to a method, apparatus, device and storage medium for reading data from a solid-state drive. Background Technology

[0002] In the evolution of storage technology, data prefetching technology for Solid State Drives (SSDs) has become a core technology for optimizing storage system performance by predicting future data accesses and loading potentially requested data into the cache system in advance. Current mainstream technical solutions mainly fall into two categories: deterministic prefetching mechanisms based on statistical rules and dynamic prediction models based on machine learning.

[0003] Deterministic prefetching mechanisms based on statistical rules are limited by reading fixed rules (such as sequential prefetching step size), and can only identify simple continuous access and short-cycle repetitive patterns. They cannot effectively cope with complex mixed loads over long periods of time, and key parameters (such as prefetching window size and trigger threshold) need to be preset manually, making it difficult to dynamically adjust according to the load, resulting in low prediction accuracy.

[0004] In machine learning-based dynamic prediction models, recurrent neural networks, such as Long Short-Term Memory (LSTM), have a serial structure. When processing long-period time series, they are difficult to converge to the optimal parameter set, and the parameters and computational cost increase significantly with the sequence length, resulting in low model training efficiency and poor real-time performance.

[0005] In existing prefetching strategies, the data to be prefetched is stored in advance in the host's Dynamic Random Access Memory (DRAM) or the DRAM inside the SSD. For example... Figure 1 As shown, if the prefetch data is stored in the host's DRAM in advance, and the host does not hit the prefetch data, it will result in a double waste of Peripheral Component Interconnect Express (PCIe) bus resources and host DRAM space. If the prefetch data is stored in the SSD's internal DRAM in advance, the hit data must first be transmitted through the controller's internal data path to the Non-Volatile Memory Express (NVMe) host interface, and then packaged and sent to the host's DRAM by the NVMe host interface. This multi-level data flow path has room for optimization, and missing the prefetch data will also lead to a waste of SSD DRAM space.

[0006] The key technical problem to be solved is how to overcome the limitations of traditional statistical rules and existing machine learning models, achieve efficient prediction of data access patterns under complex loads with lower computing power, and optimize the storage and flow path of pre-read data to reduce resource consumption and access latency. Summary of the Invention

[0007] This disclosure provides a method, apparatus, device, and storage medium for reading data from a solid-state drive (SSD), in order to at least solve the above-mentioned technical problems existing in the prior art.

[0008] According to a first aspect of this application, a method for reading data from a solid-state drive (SSD) is provided, comprising: acquiring a historical read operation dataset of the SSD, the historical read operation dataset including multiple historical read operation records, the historical read operation records being sorted according to the growth direction of the operation time points, and the historical read operation records including logical block addresses and data sizes; dividing the historical read operation dataset according to a set time window to obtain multiple samples, and embedding the samples to obtain corresponding embedded time series, the time window having a length of L, and the samples including historical read operation records at L time points; stacking the embedded time series through N stacking layers to obtain a stack-enhanced time series; performing linear prediction based on the stack-enhanced time series corresponding to all samples to obtain a pre-read operation sequence, the pre-read operation sequence including pre-read operation information of a set number of times, the pre-read operation information including: logical block addresses and data sizes of the data to be read; reading the corresponding data from the flash memory of the SSD and storing it in the memory buffer of the SSD controller according to the pre-read operation information; receiving a data read command, determining that the data read command hits the data in the memory buffer, and reading the hit data from the memory buffer via a PCIe bus.

[0009] In one possible implementation, after acquiring the historical read operation dataset of the solid-state drive and before dividing the historical read operation dataset according to a set time window, the method further includes: for each historical read operation in the historical read operation dataset, determining the difference value of the logical block address of the current historical read operation relative to the previous historical read operation, using the difference value as the first feature of the current historical read operation, and normalizing the first feature of all historical read operations in the historical read operation dataset; for each historical read operation in the historical read operation dataset, rounding the data size of the current historical read operation up to the smallest integer multiple of the page storage capacity, using the smallest integer multiple as the second feature of the current historical read operation, and normalizing the second feature of all historical read operations in the historical read operation dataset.

[0010] In one embodiment, the embedding process of the sample to obtain the corresponding embedded time series includes: performing convolution processing on the sample using D convolution kernels, mapping the first feature and the second feature of the historical read operation record at each time point in the sample to obtain D features of the historical read operation record.

[0011] In one possible implementation, the step of stacking the embedded time series through N stacking layers to obtain a stacked enhanced time series includes: each stacking layer sequentially processing the output time series of the previous layer, wherein the input of the first stacking layer is the embedded time series, the output of the i-th stacking layer is the i-th output time series, and the stacked enhanced time series is the output time series of the N-th stacking layer.

[0012] In one embodiment, the i-th stacked layer processes the output time series of the previous layer, including: applying linear transformation and nonlinear activation to the output time series of the previous layer using a first multilayer perceptron to obtain a first time series; performing random pooling on the first time series to obtain a second time series; concatenating the second time series with the output time series of the previous layer to obtain a third time series; and performing linear transformation and nonlinear activation on the third time series using a second multilayer perceptron, and then performing residual concatenation with the output time series of the previous layer to obtain the output time series of the i-th stacked layer.

[0013] In one possible implementation, the step of reading the corresponding data from the flash memory of the solid-state drive (SSD) and storing it in the memory buffer of the SSD controller according to the pre-read operation information includes: detecting the PCIe bus status and the host submission queue status; if the PCIe bus is idle and there are no pending operation commands in the host submission queue, then reading the corresponding data from the flash memory of the SSD and storing it in the memory buffer of the SSD controller according to the logical block address and data size in the pre-read operation information.

[0014] In one possible implementation, determining that the data read command hits data in the memory buffer includes: determining the logical block address and data size of the data to be read based on the data read command; if the logical block address and data size of the data to be read match the logical block address and data size of any prefetch operation information stored in the memory buffer, then determining that the data read command hits data in the memory buffer; if the logical block address and data size of the data to be read do not match the logical block address and data size of any prefetch operation information stored in the memory buffer, then determining that the data read command did not hit data in the memory buffer.

[0015] In one possible implementation, the method further includes: if the received multiple consecutive data read commands all hit the data in the memory buffer, and the number of consecutive hits reaches a preset integer multiple of the number of times the pre-read operation information is set in the pre-read operation sequence, then the reading cycle is determined to be completed.

[0016] In one possible implementation, if the data read command fails to hit the data in the memory buffer, or if the read cycle is completed, the method further includes: clearing the data in the memory buffer and re-predicting the pre-read operation sequence.

[0017] According to a second aspect of this application, a solid-state drive (SSD) data reading device is provided, comprising: an acquisition module for acquiring a historical read operation dataset of the SSD, the historical read operation dataset including multiple historical read operation records, the historical read operation records being sorted according to the growth direction of operation time points, and the historical read operation records including logical block addresses and data sizes; a first processing module for dividing the historical read operation dataset according to a set time window to obtain multiple samples, and performing embedding processing on the samples to obtain corresponding embedded time series, the time window having a length of L, and the samples including historical read operation records at L time points; and a second processing module for processing data through N stacked layers. The embedded time series is stacked to obtain a stacked enhanced time series; a prediction module is used to perform linear prediction based on the stacked enhanced time series corresponding to all samples to obtain a pre-read operation sequence, the pre-read operation sequence including pre-read operation information of a set number of times, the pre-read operation information including: logical block address and data size of the pre-read data; a transmission module is used to read the corresponding data from the flash memory of the solid-state drive according to the pre-read operation information and store it in the memory buffer of the solid-state drive controller; a command reading module is used to receive a data reading command, determine that the data reading command hits the data in the memory buffer, and read the hit data from the memory buffer through the PCIe bus.

[0018] In one embodiment, the apparatus further includes: a preprocessing module, configured to, for each historical read operation in the historical read operation dataset, determine the difference value of the logical block address of the current historical read operation relative to the previous historical read operation, use the difference value as a first feature of the current historical read operation, and normalize the first features of all historical read operations in the historical read operation dataset; and further configured to, for each historical read operation in the historical read operation dataset, round up the data size of the current historical read operation to the smallest integer multiple of the page storage capacity, use the smallest integer multiple as a second feature of the current historical read operation, and normalize the second features of all historical read operations in the historical read operation dataset.

[0019] In one possible implementation, when embedding the sample, the first processing module is further configured to perform convolution processing on the sample using D convolution kernels, mapping the first feature and the second feature of the historical read operation record at each time point in the sample to obtain the D features of the historical read operation record.

[0020] In one embodiment, the second processing module includes N stacked layers, which are used to process the output time series of the previous layer. The input of the first stacked layer is the embedded time series, the output of the i-th stacked layer is the i-th output time series, and the stack-enhanced time series is the output time series of the N-th stacked layer.

[0021] In one embodiment, the stacked layer includes: a first multilayer perceptron for performing linear transformation and nonlinear activation on the output time series of the previous stacked layer to obtain a first time series; a pooling unit for performing random pooling on the first time series to obtain a second time series; a splicing unit for splicing the second time series and the output time series of the previous layer to obtain a third time series; and a second multilayer perceptron for performing linear transformation and nonlinear activation on the third time series and then performing residual connection with the output time series of the previous layer to obtain the output time series of the stacked layer.

[0022] In one possible implementation, when reading the corresponding data from the flash memory of the solid-state drive (SSD) into the memory buffer of the SSD controller according to the pre-read operation information, the data reading module is further configured to detect the PCIe bus status and the host submission queue status. If the PCIe bus is idle and there are no pending operation commands in the host submission queue, then the corresponding data is read from the flash memory of the SSD into the memory buffer of the SSD controller according to the logical block address and data size in the pre-read operation information.

[0023] In one possible implementation, the data reading module is further configured to determine the logical block address and data size of the data to be read according to the data reading command; if the logical block address and data size of the data to be read match the logical block address and data size of any pre-read operation information stored in the memory buffer, then it is determined that the data reading command has hit the data in the memory buffer; if the logical block address and data size of the data to be read do not match the logical block address and data size of any pre-read operation information stored in the memory buffer, then it is determined that the data reading command has not hit the data in the memory buffer.

[0024] In one possible implementation, the data reading module is further configured to determine that the reading cycle is complete when multiple consecutive data reading commands received hit the data in the memory buffer and the number of consecutive hits reaches a preset integer multiple of the number of times the pre-read operation information is set in the pre-read operation sequence.

[0025] In one possible implementation, the data reading module is further configured to clear the data in the memory buffer when the data reading command fails to hit the data in the memory buffer, or when the reading cycle is completed, and trigger the solid-state drive data reading device to re-predict the pre-read operation sequence.

[0026] According to a third aspect of this application, an electronic device is provided, comprising:

[0027] At least one processor and a memory communicatively connected to said at least one processor; wherein,

[0028] The memory stores instructions that can be executed by the at least one processor, which, when executed by the at least one processor, enables the at least one processor to perform the above-described method for reading data from the solid-state drive.

[0029] According to a fourth aspect of this application, a non-transitory computer-readable storage medium is provided storing computer instructions for causing the computer to perform the methods described in this application.

[0030] This application discloses a method, apparatus, device, and storage medium for reading solid-state drive (SSD) data. By using a stacking layer to stack time series data, the computational complexity increases linearly with the dimension of the input time series, rather than exponentially or polynomially, during the stacking process. This enables efficient prediction of data access patterns under complex loads using lower computing power. By reading the corresponding data from the flash memory of the SSD and storing it in the memory buffer of the SSD controller, the storage and transfer path of the pre-read data is optimized, reducing resource consumption and access latency.

[0031] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this application, nor is it intended to limit the scope of this application. Other features of this application will become readily apparent from the following description. Attached Figure Description

[0032] The above and other objects, features, and advantages of exemplary embodiments of this application will become readily apparent from the following detailed description taken in conjunction with the accompanying drawings. Several embodiments of this application are illustrated in the drawings by way of example and not limitation, in which:

[0033] In the accompanying drawings, the same or corresponding reference numerals indicate the same or corresponding parts.

[0034] Figure 1 This paper illustrates a schematic diagram of the host-solid-state drive interaction architecture according to an embodiment of this application.

[0035] Figure 2 A schematic diagram illustrating the implementation flow of the solid-state drive data reading method according to an embodiment of this application is shown;

[0036] Figure 3 A schematic diagram illustrating the implementation flow of a solid-state drive data reading method according to another embodiment of this application is shown;

[0037] Figure 4 This paper illustrates a schematic diagram of the implementation process of time series processing by the stacked layer in an embodiment of this application.

[0038] Figure 5 A schematic diagram illustrating the processing procedure of the centralized learning model in an embodiment of this application is shown.

[0039] Figure 6 A schematic diagram of the structure of a solid-state drive data reading device according to an embodiment of this application is shown. Detailed Implementation

[0040] To make the objectives, features, and advantages of this application more apparent and understandable, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0041] Figure 2 This application illustrates a flowchart of a method for reading data from a solid-state drive, which includes:

[0042] Operation S101: Obtain the historical read operation dataset of the solid-state drive. The historical read operation dataset includes multiple historical read operation records, which are sorted according to the growth direction of the operation time points. The historical read operation records include logical block addresses and data sizes.

[0043] In this embodiment, operation records related to read operations within a set historical time interval are filtered from the logs of the solid-state drive, i.e., historical read operation records, thereby constructing a historical read operation dataset. The system then sorts the historical read operation records in ascending order of time based on the timestamps corresponding to those records. Each historical read operation record corresponds to one historical read operation.

[0044] For example, the sorted historical read operation records in the historical read operation dataset can be shown in Table 1. This historical read operation dataset includes data at four time points (i.e., four historical read operation records). Each time point data point includes at least a timestamp, logical block address, and data size. The timestamps (i.e., operation timestamps) of these four time point data points are as follows: , , , For ease of description, this example uses timestamps to identify historical read operation records. In Table 1, the data at the four time points have been sorted according to the direction of timestamp increment.

[0045] Table 1

[0046]

[0047] In operation S102, the historical read operation dataset is divided according to the set time window to obtain multiple samples, and the samples are embedded to obtain corresponding embedded time series. The length of the time window is L, and the samples include historical read operation records at L time points.

[0048] In this embodiment, a time window of length L is used to analyze the historical read operation dataset ( The data is divided into segments with a step size of K, where K is less than L. This results in multiple samples, each containing L consecutive historical read operation records. K represents the sliding interval of each sliding time window. For example, when K=1, the starting position of the current time window sequence is... Then the starting position of the sequence in the next time window is This allows for the continuous partitioning of historical read operation records. Assuming L=2 and K=1, partitioning the historical read operation dataset shown in Table 1 yields:

[0049] Sample 0 That is, [[10000, 8192], [10016, 24576]].

[0050] Sample 1 That is, [[10016, 24576], [10048, 12288]].

[0051] Sample 2 That is, [[10048, 12288], [10064, 16384]].

[0052] right The time window is divided into segments with a duration of L and a step size of K. As the time window slides... If the number of remaining undivided historical read operation records is less than L, the remaining undivided historical read operation records will be discarded, or the sequence will be padded with zeros to a fixed length L to maintain consistent input dimensions, preserve effective features, and ensure the stability of model training and prediction accuracy.

[0053] Embedding processing is performed on the samples to increase their dimensionality, thereby obtaining embedded time series containing rich temporal features (a sample becomes a corresponding embedded time series after embedding processing). The embedding process will be explained through subsequent examples and will not be elaborated here.

[0054] Operation S103 involves stacking the embedded time series through N stacking layers to obtain a stacked enhanced time series.

[0055] In this embodiment, an embedded time series is stacked using N stacking layers to obtain a stacked enhanced time series corresponding to the embedded time series. The stacking processing of multiple embedded time series is performed in parallel.

[0056] Stacking time series data allows for efficient prediction of data access patterns under complex loads using lower computing power, as the computational complexity increases linearly with the dimension of the input time series rather than exponentially or polynomially during the stacking process.

[0057] Operation S104 involves performing linear prediction based on the stacked enhanced time series corresponding to all samples to obtain a pre-read operation sequence. The pre-read operation sequence includes pre-read operation information for a set number of times. The pre-read operation information includes the logical block address and data size of the pre-read data.

[0058] In this embodiment, the formula for linear prediction of the stacked reinforcement time series is:

[0059]

[0060] in, This represents the stacked enhanced time series of all samples. This represents the predicted pre-read operation sequence. The linear transformation can be performed on the stacked enhanced time series obtained after N stacked layers using a multilayer perceptron, to obtain... This refers to the pre-read operation sequence. The pre-read operation sequence includes a set number of pre-read operation information (one pre-read operation information corresponds to one pre-read operation).

[0061] The dimension is ,in, The dimension representing the prediction, in this embodiment =2, which represents the logical block address and data size of one prefetch operation. The predicted time step length (i.e., the number of times the prefetch operation information is included in the prefetch operation sequence, i.e., the number set above). The set value can be determined by a variety of factors, such as the application scenario requirements, the number of stacked layers, and training adjustment parameters. For example, if the application scenario requires low latency, a smaller value should be selected; increasing the number of stacked layers can improve the model's ability to extract features from long-period sequences, and theoretically can support a larger time step length.

[0062] By performing linear prediction on the stacked enhanced time series of all samples, a prefetch sequence containing information from multiple prefetch operations can be obtained.

[0063] In operation S105, according to the pre-read operation information, the corresponding data is read from the flash memory of the solid-state drive and stored in the memory buffer of the solid-state drive controller.

[0064] In this embodiment, as Figure 1 As shown, the solid-state drive (SSD) controller's memory buffer (CMB) serves as a shared buffer between the SSD and the host. The data storage location is closer to the host's access path. Data in the NAND is transferred to the CMB through the NAND interface and the controller's internal data path. When the host's subsequent read command hits the data in the CMB, the host can directly read the data from the CMB through the PCIe bus.

[0065] Existing technologies pre-store data in the host's DRAM. If the host's data read command misses the data in the host's DRAM, it wastes the host's DRAM space resources. Furthermore, storing data in the host's DRAM requires PCIe bus space, and a miss also wastes PCIe bus resources. This embodiment pre-stores data in the CMB, which does not occupy the host's DRAM space resources or PCIe bus resources, optimizing the utilization of host memory resources and PCIe bus resources and reducing unnecessary consumption.

[0066] Existing technologies pre-store data in the SSD's DRAM. When a host's data read command hits data in the SSD's DRAM, the data must be transferred through the controller's internal data path to the NVMe host interface, then packaged into the host's DRAM, and finally read from the host's DRAM. This results in multiple data transfers after a hit, a long data read path, low read efficiency, and high latency, leading to slow response times for data read commands. Furthermore, missing data read commands wastes SSD DRAM space. This embodiment pre-stores data in the CMB (Central Memory Block), allowing the host to directly read data from the CMB via the PCIe bus. This eliminates the need to transfer data through the controller's internal data path to the host's DRAM, optimizing data transfer within the SSD, shortening the data transfer path, reducing transmission overhead, lowering host access latency, improving response speed, and saving SSD DRAM space.

[0067] Operation S106: Receive a data read command, determine that the data read command hits the data in the memory buffer, and read the hit data from the memory buffer through the PCIe bus.

[0068] In this embodiment, the SSD controller first parses the logical block address and data size in the data read command through the NVMe host interface, queries the CMB address mapping table, and confirms whether the data block requested by the command has been pre-stored in the CMB. If so, the data is read directly from the CMB through the PCIe bus. This process does not require data to be transferred through the controller's internal data path.

[0069] This embodiment uses a stacking layer to stack time series data. During the stacking process, the computational complexity increases linearly with the dimension of the input time series, rather than exponentially or polynomially. This allows for efficient prediction of data access patterns under complex loads with lower computing power. By reading the corresponding data from the flash memory of the solid-state drive and storing it in the memory buffer of the solid-state drive controller, the storage and transfer path of the pre-read data is optimized, reducing resource consumption and access latency.

[0070] In an optional embodiment, such as Figure 3 As shown, after obtaining the historical read operation dataset of the solid-state drive in the above-mentioned operation S101, and before dividing the historical read operation dataset according to the set time window in the above-mentioned operation S102, the process includes:

[0071] Operation S201: For each historical read operation in the historical read operation dataset, determine the difference value of the logical block address of the current historical read operation relative to the previous historical read operation, use the difference value as the first feature of the current historical read operation, and normalize the first features of all historical read operations in the historical read operation dataset.

[0072] In operation S202, for each historical read operation in the historical read operation dataset, the data size of the current historical read operation is rounded up to the smallest integer multiple of the page storage capacity, and this smallest integer multiple is used as the second feature of the current historical read operation. The second features of all historical read operations in the historical read operation dataset are then normalized.

[0073] It should be noted that operations S201 and S202 have no specific order; they can be performed simultaneously or either one can be executed first.

[0074] To highlight the temporal patterns of data access and reduce model training complexity, it is necessary to preprocess the historical read operation records in the historical read operation dataset. Preprocessing includes logical block address preprocessing and data size preprocessing.

[0075] The preprocessing of logical block addresses may include: for the currently traversed historical read operation record, subtracting the logical block address of the previous historical read operation record from its logical block address to obtain a difference value. This difference value replaces the logical block address in the current historical read operation record; that is, this difference value serves as the first feature in the historical read operation record. Specifically, the difference value (first feature) of the logical block address of the first historical read operation record in the historical read operation dataset is set to 0; then, normalization processing is performed. Taking Table 1 as an example, after difference calculation, the resulting first feature sequence is [0, 16, 32, 16]. After normalization processing of the first feature, the resulting first feature sequence is [-1.414, 0, 1.414, 0].

[0076] Preprocessing of data size may include: rounding up the data size in each historical read operation record to the smallest integer multiple of the page storage capacity, and replacing the data size in the historical read operation record with this smallest integer multiple as the second feature; then performing normalization processing. Taking Table 1 as an example, if the page storage capacity is 16KB, the obtained second feature sequence is [1,2,1,1], and the second feature sequence obtained after normalization is [-0.577, 1.732, -0.577, -0.577].

[0077] After the above preprocessing, the historical read operation dataset is shown in Table 2:

[0078] Table 2

[0079]

[0080] Accordingly, samples 0 to 1 are updated as follows:

[0081] Sample 0 That is, [[-1.414, -0.577], [0, 1.732]].

[0082] Sample 1 That is, [[0, 1.732], [1.414, -0.577]].

[0083] Sample 2 That is, [[1.414, -0.577], [0, -0.577]].

[0084] Since the historical read operation data has been preprocessed, the pre-read operation sequence in the above operation S104 needs to be reverse-preprocessed in order to obtain the logical block address and data size of the pre-read data.

[0085] In an optional embodiment, in the above operation S102, the embedding process of the sample to obtain the corresponding embedded time series includes: performing convolution processing on the sample using D convolution kernels, mapping the first feature and the second feature of the historical read operation record at each time point in the sample to obtain D features of the historical read operation record.

[0086] Convolutional kernels can be used to embed each sample, thereby mapping the data at each time point in the sample (each historical read operation record) from low dimension to high dimension, and obtaining the embedded time series corresponding to each sample.

[0087] For example, if we need to map the data at each time point from 2D features to 4D features (D=4), we can use four 1×1 one-dimensional convolutional kernels (Conv1D) for one-dimensional convolution processing. Assume that after embedding, each sample is as follows:

[0088] Sample 0 :

[0089] [[-0.1568, -0.3528, -0.5488, -0.7448],[0.4464, 0.6464, 0.8464, 1.0464]](embedded time series of sample 0)

[0090] Sample 1 :

[0091] [[0.4464, 0.6464, 0.8464, 1.0464], [0.126, 0.326, 0.526, 0.726]] (embedded time series of sample 1);

[0092] Sample 2 :

[0093] [[0.126, 0.326, 0.526, 0.726],[-0.0154, 0.0846, 0.1846, 0.2846]] (embedded time series of sample 2).

[0094] In an optional embodiment, the above operation S103 involves stacking the embedded time series through N stacking layers to obtain a stacked enhanced time series, including: each stacking layer sequentially processing the output time series of the previous layer, wherein the input of the first stacking layer is the embedded time series, the output of the i-th stacking layer is the i-th output time series, and the stacked enhanced time series is the output time series of the N-th stacking layer.

[0095] The embedded time series of all samples are input into a stacking layer for stacking processing, and these embedded time series of samples constitute a three-dimensional tensor. The three-dimensional tensor contains B samples, each of which is an embedded time series. Each embedded time series contains L time-point data points, and each time-point data point contains D features (i.e., D channels). Although the input to the stacking layer is a three-dimensional tensor (with a shape of B×L×D), the stacking layer actually processes each embedded time series (i.e., each sample) in parallel. The processing of each embedded time series is the same, and after stacking, each embedded time series, i.e., each sample, is obtained as a stacked enhanced time series.

[0096] Each stacked layer processes the output time series of the previous layer in a progressive manner according to an ordered hierarchical structure. Specifically, the first stacked layer serves as the starting point of the entire processing flow, and its input data is the aforementioned three-dimensional tensor. Starting from the second stacked layer, the input data for each subsequent stacked layer is a three-dimensional tensor composed of the output time series of the previous stacked layer. For example, the input of the second stacked layer is a three-dimensional tensor composed of the output time series of the first stacked layer. Each stacked layer processes each time series in the input three-dimensional tensor separately and in parallel. After stacking and processing through N stacked layers, features of different granularities extracted from the first to the Nth stacked layers can be integrated, such as continuous access trends and periodic patterns in data block size. Furthermore, the extracted features are enhanced layer by layer. Each layer performs feature abstraction and information filtering based on the previous layer, so that the final stacked enhanced time series (i.e., the output time series of the Nth stacked layer) can more accurately reflect the core temporal characteristics of the original data and suppress the interference of irrelevant noise.

[0097] The following is combined with Figure 4 and Figure 5 The process by which the i-th stacked layer processes the output time series of the previous layer is illustrated, including:

[0098] Operation S1031 involves linearly transforming and nonlinearly activating the output time series of the previous layer through the first multilayer perceptron to obtain the first time series.

[0099] By processing the output time series of the previous layer using the first multilayer perceptron of this layer, the dependencies between channels can be captured, and the features of the global field of view can be obtained, which is achieved through the following formula:

[0100]

[0101] Where i represents the stacking layer index, and N is the number of stacking layers. Let represent the three-dimensional tensor formed by the time series of each sample output after processing by the first multilayer perceptron of the i-th stacked layer. This represents the input time series (3D tensor) of the i-th stacked layer, i.e., the output time series of the (i-1)-th layer. For example, when i equals 1, the output time series of the previous layer is the aforementioned embedded time series 3D tensor. When i is not 1, the input of the i-th stacked layer is a three-dimensional tensor composed of the output time series of the (i-1)-th stacked layers. .

[0102] Each stacked layer contains two multilayer perceptrons, here This is the first multilayer perceptron. In the three-dimensional tensor, each time series contains D-dimensional features (D channels) for each time point. Each sample's time series is processed separately and in parallel. The processing procedure for any time series is as follows: the D-dimensional features of the data at each time point are processed independently, through... Linear transformations and nonlinear activations allow features from different channels of the data at that point in time to be fused together. The final output... The D-dimensional features of the data at this point in time are new features that encode the inter-channel dependencies (still D-dimensional), allowing the model to capture "how the feature changes of a certain channel affect other channels", thereby obtaining features with a global perspective.

[0103] The result obtained after processing by the first multilayer perceptron of each stacked layer Its shape is also B×L×D. For ease of description, ... This is denoted as the first time series.

[0104] Assuming i=1, the input 3D tensor consists of embedded time series of the following 3 samples:

[0105] Sample 0: [t0, t1]——[[0.5, 0.3, 0.8, 0.1], [0.2, 0.9, 0.4, 0.6]];

[0106] Sample 1: [t1, t2]——[[0.9, 0.4, 0.6, 0.2], [0.3, 0.7, 0.5, 0.8]];

[0107] Sample 2: [t2, t3]——[[0.7, 0.5, 0.3, 0.9], [0.1, 0.6, 0.8, 0.4]];

[0108] After processing by the first multilayer perceptron of the first stacked layer, the result is for:

[0109] = [

[0110] [[0.6, 0.2, 0.9, 0.1], [0.3, 0.8, 0.5, 0.7]],

[0111] [[0.8, 0.5, 0.7, 0.3], [0.4, 0.6, 0.6, 0.9]],

[0112] [[0.7, 0.6, 0.4, 0.8], [0.2, 0.5, 0.7, 0.5]] ]

[0114] Operation S1032 performs random pooling on the first time series to obtain the second time series.

[0115] The first time series after processing by the first multilayer perceptron Perform random pooling operation to enhance the main features of the global view, which is achieved through the following formula:

[0116]

[0117] Among them, represents the random pooling operation, including two aspects: one is weighted sampling according to feature importance: for the data at each time point, calculate the probability distribution of the D-dimensional features (based on the feature value size, the larger the value, the higher the probability of being selected), and randomly select k-dimensional features according to the probability, so as to enhance the main features (the channel information with large values and key); on the other hand, compress the dimension to reduce the complexity: compress the original D-dimensional features into k dimensions (k < D), reduce the number of parameters and the amount of calculation of the subsequent network, and at the same time retain the core channel dependence relationship. Obtain the second time series , with the shape of B × L × k. For example, randomly sample the D = 4-dimensional features of the data at each time point to k = 2 dimensions (the larger the feature value, the higher the probability of being sampled).

[0118] For example, process the first time series in the above example as follows:

[0119] =

[0120] [[0.6, 0.9], [0.8, 0.7]],

[0121] [[0.8, 0.7], [0.6, 0.9]],

[0122] [[0.7, 0.8], [0.7, 0.5]]

[0124] Operation S1033, splice the second time series and the output time series of the previous layer to obtain the third time series.

[0125] Splice the second time series after random pooling processing with the output time series of the previous layer, that is, splice it with the output time series of the previous layer that has not been processed by the current stacking layer. It is achieved through the following formula:

[0126]

[0127] Among them, represents the splicing process: after restoring the feature dimension of the data at each time point in the second time series from k dimensions to D dimensions, splice it with the output time series of the i-1th stacking layer to obtain the third time series , with the shape of B × L × 2D. The spliced​ It preserves both local detail features and global dependency features.

[0128] In operation S1034, the third time series is linearly transformed and nonlinearly activated by the second multilayer perceptron, and then residually connected with the output time series of the previous layer to obtain the output time series of the i-th stacked layer.

[0129] Through the second multilayer perceptron of the current stacked layer ( ) for the third time series After processing, it is compared with the output time series of the previous stacked layer. Perform residual connections to obtain the output time series of the current stacked layer. This can be achieved using the following formula:

[0130]

[0131] Among them, the above While this processing can encode channel dependencies, it may overemphasize primary features while neglecting secondary but potentially valuable features. The aforementioned random pooling... While the operation can weight the sampling of key features, probability-based sampling methods inevitably lose some original features, especially those with small but important feature values. Therefore, this method... Linear transformation and nonlinear activation for the third time series Processing (including compressing the 2D dimension to a D dimension) is performed to compensate for the aforementioned ignored features. Then, it is combined with... Residual connections can fuse the compensated features with the original features retained by the previous stacked layer, which not only restores the blurred / lost secondary but key information, but also allows the model to learn stably in multiple stacked layers by means of the residual gradient transfer mechanism, avoiding getting stuck in local optima due to over-focusing on the main features.

[0132] Output time series of the i-th stacked layer This will be used as the input to the (i+1)th stacked layer. The output time series of the last stacked layer will be used as the input to the subsequent linear prediction layer.

[0133] In an optional embodiment, in operation S106 above, determining that the data read command hits the data in the memory buffer includes: determining the logical block address and data size of the data to be read according to the data read command; if the logical block address and data size of the data to be read match the logical block address and data size of any pre-read operation information stored in the memory buffer, then determining that the data read command hits the data in the memory buffer; if the logical block address and data size of the data to be read do not match the logical block address and data size of any pre-read operation information stored in the memory buffer, then determining that the data read command does not hit the data in the memory buffer.

[0134] The data read command is parsed to determine the address and size of the logical block to be read. The CMB stores the logical block addresses and data sizes corresponding to multiple prefetch operations. If the address and size of the logical block to be read match the logical block address and data size of any prefetch operation stored in the CMB, then the data read command hits the data in the CMB.

[0135] In an optional embodiment, the method further includes: if the received multiple consecutive data read commands all hit the data in the memory buffer, and the number of consecutive hits reaches a preset integer multiple of the number of times the pre-read operation information is set in the pre-read operation sequence, then the reading cycle is determined to be completed.

[0136] Data in the CMB is read based on a set read cycle, which can be set to the number of pre-read operation information in the pre-read operation sequence. If the number of consecutive hits in CMB reaches a preset integer multiple, If the value is a multiple of the preset integer, it indicates that the reading cycle is complete.

[0137] For example, When the block size is 3, the prefetch operation information stored in the CMB can be shown in Table 3. This prefetch operation information includes 3 pairs of logical block addresses and data sizes, and these logical block addresses and data sizes can be hit repeatedly. Assume a read cycle is 3. If the time step size is 9 (i.e., 3 times the predicted time step length), then the read cycle is considered complete after the host's data read commands hit the above logical block address and data size 9 times consecutively. If the host's data read commands hit the above logical block address and data size less than 9 times consecutively, then the read cycle is not completed. For example, if the host's data read commands hit 4 times consecutively, but the 5th data read command misses, the read cycle is not completed.

[0138] Table 3

[0139]

[0140] In an optional embodiment, if the data read command fails to hit the data in the memory buffer, or if the read cycle is completed, the method further includes: clearing the data in the memory buffer and re-predicting the pre-read operation sequence.

[0141] If the host's data read command misses data in the CMB, or if the above read cycle is completed, the data in the CMB is cleared, the CMB space is released, the historical read operation dataset is reacquired based on the current time point, and the above operations S101-S106 are executed to re-predict the read operation sequence.

[0142] It should be noted that operations S102-S104 described above can be implemented using a centralized learning model. Therefore, when data in the CMB is not hit, the missed scenario needs to be added to the training dataset, i.e., the historical read operation dataset of the current input ( The training dataset added to the centralized learning model is used as negative samples, which is the historical read operation dataset for this operation. Each historical read operation record in the database is assigned a label to identify it as a negative sample. Using a certain proportion of negative samples to train the centralized learning model for predicting read operation sequences (with the negative sample ratio controlled within a preset range, e.g., a positive-to-negative sample ratio of 10:1) can avoid data skew leading to insufficient model generalization ability. Simultaneously, it allows the model to learn feature patterns of read failures to enhance robustness. Furthermore, it enables the optimization of the read strategy iteration by recording missed scenarios, allowing the model to adapt to changes in host access patterns through continuous fine-tuning, reducing ineffective reads and resource waste.

[0143] In an optional embodiment, the step of reading the corresponding data from the flash memory of the solid-state drive (SSD) and storing it in the memory buffer of the SSD controller according to the pre-read operation information includes: detecting the PCIe bus status and the host submission queue status; if the PCIe bus is idle and there are no pending operation commands in the host submission queue, then reading the corresponding data from the flash memory of the SSD and storing it in the memory buffer of the SSD controller according to the logical block address and data size in the pre-read operation information.

[0144] The host commit queue stores read, write, and erase block commands sent by the host to the SSD controller. The SSD controller retrieves commands from the queue sequentially for execution. When there are unprocessed commands in the host commit queue, it indicates that the host has pending operation requests. In this case, prefetching operations may consume PCIe bus resources or cause command conflicts. Prefetch data is only stored in the CMB space when the host commit queue is idle and the PCIe bus is unloaded. This avoids prefetching operations competing for resources with core host operations, ensuring priority processing of host commands and guaranteeing overall system efficiency.

[0145] like Figure 6 The diagram shown is a structural schematic of a solid-state drive (SSD) data reading device according to an embodiment of this application. A solid-state drive (SSD) data reading device 600 includes:

[0146] The acquisition module 601 is used to acquire the historical read operation dataset of the solid-state drive. The historical read operation dataset includes multiple historical read operation records, which are sorted according to the growth direction of the operation time points. The historical read operation records include logical block addresses and data sizes.

[0147] The first processing module 602 is used to divide the historical read operation dataset according to a set time window to obtain multiple samples, and to perform embedding processing on the samples to obtain corresponding embedded time series. The length of the time window is L, and the samples include historical read operation records at L time points.

[0148] The second processing module 603 is used to perform stacking processing on the embedded time series through N stacking layers to obtain a stacked enhanced time series.

[0149] Prediction module 604 is used to perform linear prediction based on the stacked enhanced time series corresponding to all samples to obtain a pre-read operation sequence. The pre-read operation sequence includes pre-read operation information of a set number of times. The pre-read operation information includes: the logical block address and data size of the pre-read data.

[0150] The data reading module 605 is used to read the corresponding data from the flash memory of the solid-state drive and store it in the memory buffer of the solid-state drive controller according to the pre-read operation information; it is also used to receive a data reading command, determine that the data reading command hits the data in the memory buffer, and read the hit data from the memory buffer through the PCIe bus.

[0151] In an optional embodiment, the apparatus 600 further includes: a preprocessing module, configured to, for each historical read operation in the historical read operation dataset, determine the difference value of the logical block address of the current historical read operation relative to the previous historical read operation, use the difference value as a first feature of the current historical read operation, and normalize the first features of all historical read operations in the historical read operation dataset; and further configured to, for each historical read operation in the historical read operation dataset, round up the data size of the current historical read operation to the smallest integer multiple of the page storage capacity, use the smallest integer multiple as a second feature of the current historical read operation, and normalize the second features of all historical read operations in the historical read operation dataset.

[0152] In an optional embodiment, when embedding the sample, the first processing module 602 is further configured to perform convolution processing on the sample using D convolution kernels, and map the first feature and the second feature of the historical read operation record at each time point in the sample to obtain the D features of the historical read operation record.

[0153] In an optional embodiment, the second processing module 603 includes N stacked layers, which are used to process the output time series of the previous layer, wherein the input of the first stacked layer is the embedded time series, the output of the i-th stacked layer is the i-th output time series, and the stack-enhanced time series is the output time series of the N-th stacked layer.

[0154] In an optional embodiment, the stacked layer includes: a first multilayer perceptron for performing linear transformation and nonlinear activation on the output time series of the previous stacked layer to obtain a first time series; a pooling unit for performing random pooling on the first time series to obtain a second time series; a splicing unit for splicing the second time series and the output time series of the previous layer to obtain a third time series; and a second multilayer perceptron for performing linear transformation and nonlinear activation on the third time series and then performing residual connection with the output time series of the previous layer to obtain the output time series of the stacked layer.

[0155] In an optional embodiment, when reading the corresponding data from the flash memory of the solid-state drive (SSD) into the memory buffer of the SSD controller according to the pre-read operation information, the data reading module 605 is further configured to detect the PCIe bus status and the host submission queue status. If the PCIe bus is idle and there are no pending operation commands in the host submission queue, then the corresponding data is read from the flash memory of the SSD into the memory buffer of the SSD controller according to the logical block address and data size in the pre-read operation information.

[0156] In an optional embodiment, the data reading module 605 is further configured to determine the logical block address and data size of the data to be read according to the data reading command; if the logical block address and data size of the data to be read match the logical block address and data size of any pre-read operation information stored in the memory buffer, then it is determined that the data reading command hits the data in the memory buffer; if the logical block address and data size of the data to be read do not match the logical block address and data size of any pre-read operation information stored in the memory buffer, then it is determined that the data reading command does not hit the data in the memory buffer.

[0157] In an optional embodiment, the data reading module 605 is further configured to determine that the reading cycle is complete when multiple consecutive data reading commands hit the data in the memory buffer and the number of consecutive hits reaches a preset integer multiple of the number of times the pre-read operation information is set in the pre-read operation sequence.

[0158] In an optional embodiment, the data reading module 605 is further configured to clear the data in the memory buffer when the data reading command fails to hit the data in the memory buffer, or when the reading cycle is completed, and trigger the solid-state drive data reading device to re-predict the pre-read operation sequence.

[0159] The above-described device can execute the solid-state drive data reading method provided in an embodiment of this application, and has the corresponding functional modules and beneficial effects for executing the solid-state drive data reading method. Technical details not described in detail in this embodiment can be found in the solid-state drive data reading method provided in the embodiment of this application.

[0160] This application also provides an electronic device, including: a processor; a memory for storing executable instructions of the processor; the processor being configured to read the executable instructions from the memory and execute the instructions to implement the solid-state drive data reading method described in this application.

[0161] Embodiments of this application may also be computer-readable storage media storing computer program instructions thereon, which, when executed by a processor, cause the processor to perform the steps in the methods according to various embodiments of this application described in the "Exemplary Methods" section above.

[0162] The computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may, for example, include, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0163] The basic principles of this application have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this application are merely examples and not limitations, and should not be considered as essential features of each embodiment of this application. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the application to the necessity of employing the aforementioned specific details for implementation.

[0164] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this application can be achieved, and this is not limited herein.

[0165] It should also be noted that in the apparatus, equipment, and methods of this application, the components or steps can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered as equivalent solutions of this application.

[0166] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of this application. Therefore, this application is not intended to be limited to the aspects shown herein, but rather to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0167] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this application to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

[0168] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of those different embodiments or examples.

[0169] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0170] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for reading data from a solid-state drive, characterized in that, The method includes: Obtain a historical read operation dataset of a solid-state drive. The historical read operation dataset includes multiple historical read operation records, which are sorted according to the growth direction of the operation time points. Each historical read operation record includes a logical block address and a data size. The historical read operation dataset is divided according to a set time window to obtain multiple samples, and the samples are embedded to obtain corresponding embedded time series. The length of the time window is L, and the sample includes historical read operation records at L time points. The embedded time series is stacked by N stacking layers to obtain a stacked enhanced time series. Linear prediction is performed based on the stacked enhanced time series corresponding to all samples to obtain a pre-read operation sequence. The pre-read operation sequence includes pre-read operation information of a set number of times. The pre-read operation information includes: the logical block address and data size of the pre-read data. Based on the pre-read operation information, the corresponding data is read from the flash memory of the solid-state drive and stored in the memory buffer of the solid-state drive controller; Receive a data read command, determine that the data read command hits the data in the memory buffer, and read the hit data from the memory buffer through the high-speed PCIe bus interconnecting peripheral components; The step of stacking the embedded time series through N stacking layers to obtain a stacked enhanced time series includes: each stacking layer sequentially processes the output time series of the previous layer, wherein the input of the first stacking layer is the embedded time series, the output of the i-th stacking layer is the i-th output time series, and the stacked enhanced time series is the output time series of the N-th stacking layer. The i-th stacked layer processes the output time series of the previous layer, including: applying linear transformation and nonlinear activation to the output time series of the previous layer through a first multilayer perceptron to obtain a first time series; performing random pooling on the first time series to obtain a second time series; concatenating the second time series with the output time series of the previous layer to obtain a third time series; and performing linear transformation and nonlinear activation on the third time series through a second multilayer perceptron, and then performing residual connection with the output time series of the previous layer to obtain the output time series of the i-th stacked layer.

2. The method according to claim 1, characterized in that, After acquiring the historical read operation dataset of the solid-state drive, and before dividing the historical read operation dataset according to a set time window, the method further includes: For each historical read operation in the historical read operation dataset, determine the difference value of the logical block address of the current historical read operation relative to the previous historical read operation, use this difference value as the first feature of the current historical read operation, and normalize the first features of all historical read operations in the historical read operation dataset. For each historical read operation in the historical read operation dataset, the data size of the current historical read operation is rounded up to the smallest integer multiple of the page storage capacity. This smallest integer multiple is used as the second feature of the current historical read operation, and the second features of all historical read operations in the historical read operation dataset are normalized.

3. The method according to claim 2, characterized in that, The embedding process of the sample to obtain the corresponding embedded time series includes: The sample is processed by convolution with D convolution kernels, and the first and second features of the historical read operation record at each time point in the sample are mapped to obtain D features of the historical read operation record.

4. The method according to claim 1, characterized in that, The step of reading corresponding data from the flash memory of the solid-state drive (SSD) and storing it in the memory buffer of the SSD controller according to the pre-read operation information includes: The system detects the PCIe bus status and the host submission queue status. If the PCIe bus is idle and there are no pending operation commands in the host submission queue, it reads the corresponding data from the flash memory of the solid-state drive and stores it in the memory buffer of the solid-state drive controller according to the logical block address and data size in the pre-read operation information.

5. The method according to claim 1, characterized in that, Determining that the data read command hits data in the memory buffer includes: The logical block address and data size of the data to be read are determined according to the data read command; If the logical block address and data size of the data to be read match the logical block address and data size of any prefetch operation information stored in the memory buffer, then the data read command is determined to have hit the data in the memory buffer; if the logical block address and data size of the data to be read do not match the logical block address and data size of any prefetch operation information stored in the memory buffer, then the data read command is determined to have not hit the data in the memory buffer.

6. The method according to claim 5, characterized in that, The method also includes: If multiple consecutive data read commands hit the data in the memory buffer, and the number of consecutive hits reaches a preset integer multiple of the number of times the pre-read operation information is set in the pre-read operation sequence, then the read cycle is determined to be complete.

7. The method according to claim 6, characterized in that, If the data read command fails to find data in the memory buffer, or if the read cycle is completed, the method further includes: Clear the data in the memory buffer and re-predict the pre-read operation sequence.

8. A device for reading data from a solid-state drive, characterized in that, The device includes: The acquisition module is used to acquire the historical read operation dataset of the solid-state drive. The historical read operation dataset includes multiple historical read operation records, which are sorted according to the growth direction of the operation time points. The historical read operation records include logical block addresses and data sizes. The first processing module is used to divide the historical read operation dataset according to a set time window to obtain multiple samples, and to perform embedding processing on the samples to obtain corresponding embedded time series. The length of the time window is L, and the samples include historical read operation records at L time points. The second processing module is used to stack the embedded time series through N stacking layers to obtain a stacked enhanced time series; The prediction module is used to perform linear prediction based on the stacked enhanced time series corresponding to all samples to obtain a pre-read operation sequence. The pre-read operation sequence includes pre-read operation information of a set number of times. The pre-read operation information includes: the logical block address and data size of the pre-read data. The data reading module is used to read the corresponding data from the flash memory of the solid-state drive and store it in the memory buffer of the solid-state drive controller according to the pre-read operation information; it is also used to receive a data reading command, determine that the data reading command hits the data in the memory buffer, and read the hit data from the memory buffer through the PCIe bus; The second processing module includes N stacked layers, which are used to process the output time series of the previous layer. The input of the first stacked layer is the embedded time series, the output of the i-th stacked layer is the i-th output time series, and the stack-enhanced time series is the output time series of the N-th stacked layer. The stacked layer includes: a first multilayer perceptron for performing linear transformation and nonlinear activation on the output time series of the previous stacked layer to obtain a first time series; a pooling unit for performing random pooling on the first time series to obtain a second time series; a splicing unit for splicing the second time series and the output time series of the previous layer to obtain a third time series; and a second multilayer perceptron for performing linear transformation and nonlinear activation on the third time series and then performing residual connection with the output time series of the previous layer to obtain the output time series of the stacked layer.

9. The apparatus according to claim 8, characterized in that, The device further includes: The preprocessing module is configured to, for each historical read operation in the historical read operation dataset, determine the difference value of the logical block address of the current historical read operation relative to the previous historical read operation, use the difference value as the first feature of the current historical read operation, and normalize the first feature of all historical read operations in the historical read operation dataset; it is also configured to, for each historical read operation in the historical read operation dataset, round up the data size of the current historical read operation to the smallest integer multiple of the page storage capacity, use the smallest integer multiple as the second feature of the current historical read operation, and normalize the second feature of all historical read operations in the historical read operation dataset.

10. The apparatus according to claim 9, characterized in that, When embedding the sample, the first processing module is further configured to perform convolution processing on the sample using D convolution kernels, and map the first feature and the second feature of the historical read operation record at each time point in the sample to obtain the D features of the historical read operation record.

11. The apparatus according to claim 8, characterized in that, According to the pre-read operation information, when reading the corresponding data from the flash memory of the solid-state drive and storing it in the memory buffer of the solid-state drive controller, the data reading module is also used to detect the PCIe bus status and the host submission queue status. If the PCIe bus is idle and there are no pending operation commands in the host submission queue, then according to the logical block address and data size in the pre-read operation information, the corresponding data is read from the flash memory of the solid-state drive and stored in the memory buffer of the solid-state drive controller.

12. The apparatus according to claim 8, characterized in that, The data reading module is further configured to determine the logical block address and data size of the data to be read according to the data reading command; if the logical block address and data size of the data to be read match the logical block address and data size of any pre-read operation information stored in the memory buffer, then it is determined that the data reading command has hit the data in the memory buffer; if the logical block address and data size of the data to be read do not match the logical block address and data size of any pre-read operation information stored in the memory buffer, then it is determined that the data reading command has not hit the data in the memory buffer.

13. The apparatus according to claim 12, characterized in that, The data reading module is also used to determine that the reading cycle is completed when multiple consecutive data reading commands hit the data in the memory buffer and the number of consecutive hits reaches a preset integer multiple of the number of times the pre-read operation information is set in the pre-read operation sequence.

14. The apparatus according to claim 13, characterized in that, The data reading module is further configured to clear the data in the memory buffer when the data reading command fails to hit the data in the memory buffer, or when the reading cycle is completed, and trigger the solid-state drive data reading device to re-predict the pre-read operation sequence.

15. An electronic device, characterized in that, include: At least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-7.

16. A non-transitory computer-readable storage medium storing computer instructions, characterized in that, The computer instructions are used to cause the computer to perform the method according to any one of claims 1-7.

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