I2C test method and I2C test device
Through the I2C testing method and device, the slave device address is obtained and verified by the host computer tool, and read and write operations are performed, which solves the data transmission error problem of I2C communication in the prior art, and improves the reliability and data access efficiency of the memory chip.
Patent Information
- Application Number
- CN202510576708.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-06
- Publication Date
- 2025-08-12
AI Technical Summary
The existing I2C testing methods are difficult to simulate complex communication scenarios and deal with potential problems, resulting in data transmission errors or loss, affecting the reliability and stability of the memory chip.
It provides an I2C testing method, which obtains the slave device address through the host computer tool, judges its validity, performs data processing operations, and reads and writes data through the I2C bus according to the operation type (read or write), including data checksum updates, to ensure that the operation complies with the IIC protocol specifications.
It realizes accurate data processing capabilities and error processing mechanism detection, improves data access efficiency, and ensures the reliability and stability of the memory chip.
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Figure CN120469870A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of memory control, and in particular to an I2C testing method and an I2C testing device. Background Art
[0002] In the communication architecture of modern electronic devices, the IIC (Inter-Integrated Circuit) protocol, a simple and efficient serial communication standard, is widely used for data exchange between various integrated circuits. In the field of memory chips, in particular, the functional correctness and stability of the master control chip as the IIC slave device are crucial to ensuring the reliability and performance of the entire system. However, in practical applications, factors such as environmental noise and signal attenuation can lead to data transmission errors or loss, posing a serious challenge to the reliability of memory chips.
[0003] Traditional testing methods typically rely on manual configuration and simple functional verification, which makes it difficult to simulate complex communication scenarios and potential problems in the processing process. Summary of the Invention
[0004] In response to the above technical problems, the present application provides an I2C testing method and an I2C testing device, which can accurately initiate read and write operations in accordance with the IIC protocol specifications, thereby carefully detecting the data processing capability, response speed and error handling mechanism of the main control chip.
[0005] To solve the above technical problems, the present application provides an I2C testing method, including:
[0006] In response to a user input operation on an input box of a host computer tool, obtaining a slave device address corresponding to the input operation;
[0007] Determine whether the slave device address is valid;
[0008] If the slave device address is valid, detecting a data processing operation triggered by the user;
[0009] If the data processing operation is a read operation, the data is read from the slave device using the I2C bus, and the read data is updated to the input box;
[0010] If the data processing operation is a write operation, data verification is performed on the data value in the input box. When the data value passes the data verification, the data value is written into the slave device, and the write information is updated to the input box.
[0011] Optionally, in some embodiments of the present application, if the data processing operation is a read operation, reading data from a slave device using an I2C bus and updating the read data to an input box includes:
[0012] Setting a data buffer in a memory, wherein the data buffer is used to store data read from the slave device;
[0013] Initiating a data read request to the slave device based on a preset read function;
[0014] The read-in data is separated and the separated read-in data is returned to the data buffer.
[0015] Optionally, in some embodiments of the present application, separating the read-in data and returning the separated read-in data to the data buffer includes:
[0016] Separating the read data to obtain a slave address and a RAM address corresponding to the slave device and write data information associated with the read operation;
[0017] The slave address, RAM address and write data information associated with the read operation are stored in a preset data structure, and the data in the data structure are returned to the data buffer through a preset function.
[0018] Optionally, in some embodiments of the present application, if the data processing operation is a write operation, performing data verification on the data value in the input box, and when the data value passes the data verification, writing the data value to the slave device and updating the write information to the input box, including:
[0019] If the data processing operation is a write operation, the data value in the input box is verified using a preset verification method;
[0020] When the data value passes the data verification, data separation is performed on the write information of the slave device to obtain a slave address and a RAM address corresponding to the slave device and write data information corresponding to the write operation;
[0021] The slave address, RAM address and write data information corresponding to the write operation of the slave device are written into the slave device, and the slave address, RAM address and write data information corresponding to the write operation of the slave device are updated into the input box.
[0022] Optionally, in some embodiments of the present application, the method further includes:
[0023] When the data value fails the data verification, the data processing flow ends.
[0024] Optionally, in some embodiments of the present application, the method further includes:
[0025] Initialize interface controls and load register configuration files;
[0026] Check the register configuration file to see if it is loaded successfully;
[0027] If successful, each register address and its configuration information recorded in the configuration file are accessed in sequence to perform read and write operations one by one
[0028] If it fails, the process ends.
[0029] Optionally, in some embodiments of the present application, the loading register configuration file includes:
[0030] Initialize the variables corresponding to the register configuration file;
[0031] After initialization, the file contents of the register configuration file are read line by line;
[0032] Split each line of text according to a specific delimiter and extract the text data of each field;
[0033] Parse the text data of each field that has been segmented;
[0034] Determine whether the current row base address has changed from the previous record base address;
[0035] If it changes, update it to the new base address and clear the current register configuration list;
[0036] According to the data of each field, a register configuration object (structure or class instance) is constructed and stored in a preset data structure.
[0037] Optionally, in some embodiments of the present application, the method further includes:
[0038] Initialize the display interface and load the RAM configuration file;
[0039] Determine whether the RAM configuration file is loaded successfully;
[0040] If successful, the random number seed is set, and the RAM areas recorded in the configuration file are accessed in sequence according to the set random number seed to perform read and write verification on different areas respectively.
[0041] Accordingly, the present application also provides an I2C test device, including a master device and a slave device, wherein the master device performs the following steps:
[0042] In response to a user input operation on an input box of a host computer tool, obtaining a slave device address corresponding to the input operation;
[0043] Determine whether the slave device address is valid;
[0044] If the slave device address is valid, detecting a data processing operation triggered by the user;
[0045] If the data processing operation is a read operation, the data is read from the slave device using the I2C bus, and the read data is updated to the input box;
[0046] If the data processing operation is a write operation, data verification is performed on the data value in the input box. When the data value passes the data verification, the data value is written into the slave device, and the write information is updated to the input box.
[0047] As described above, the present application provides an I2C test method and an I2C test device. In response to a user's input operation on an input box of a host computer tool, the slave device address corresponding to the input operation is obtained, and the slave device address is determined to be valid. If the slave device address is valid, the user's triggered data processing operation is detected. If the data processing operation is a read operation, the data is read in by the slave device using the I2C bus, and the read data is updated to the input box. If the data processing operation is a write operation, the data value in the input box is subjected to data verification. When the data value passes the data verification, the data value is written to the slave device, and the write information is updated to the input box. In the I2C test scheme provided by the present application, read and write operations are initiated by the host computer tool. The host computer tool can accurately initiate read and write operations in accordance with the IIC protocol specification, thereby carefully detecting the data processing capability, response speed, and error handling mechanism of the master chip. BRIEF DESCRIPTION OF THE DRAWINGS
[0048] The accompanying drawings herein are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present application, and together with the specification, are used to explain the principles of the present application. In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for describing the embodiments. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without inventive work.
[0049] Figure 1 This is a schematic diagram of the structure of the I2C system provided in an embodiment of the present application;
[0050] Figure 2 This is a flow chart of the I2C test method provided in an embodiment of the present application;
[0051] Figure 3 This is another process intention of the I2C testing method provided in the embodiment of the present application;
[0052] Figure 4 This is another flowchart of the I2C testing method provided in an embodiment of the present application.
[0053] The purpose of this application, as well as its functional features and advantages, will be further described in conjunction with the embodiments and with reference to the accompanying drawings. The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and the accompanying text are not intended to limit the scope of the present application in any way, but rather to illustrate the concepts of this application to those skilled in the art by reference to specific embodiments. DETAILED DESCRIPTION
[0054] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
[0055] It should be noted that, in this document, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, components, features, and elements with the same name in different embodiments of the present application may have the same meaning or different meanings, and their specific meanings need to be determined by their explanation in the specific embodiment or further combined with the context of the specific embodiment.
[0056] It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application.
[0057] In the subsequent description, the use of suffixes such as "module", "component" or "unit" to represent elements is only for the purpose of facilitating the description of the present application and has no specific meaning. Therefore, "module", "component" or "unit" can be used interchangeably.
[0058] The following is a detailed description of the embodiments involved in this application. It should be noted that the order of description of the embodiments in this application does not limit the priority order of the embodiments.
[0059] like Figure 1The I2C network system shown in the figure includes a master device and a slave device. I2C transmits information between devices connected to the bus through the serial data (SDA) line and the serial clock (SCL) line.
[0060] In the I2C network system, there is a host device and multiple slave devices. Figure 1 In the illustrated embodiment, one master device and one slave device are used as an example.
[0061] Please continue reading Figure 1 , and refer to Figure 2 , Figure 2 This is a flow chart of the I2C test method provided in an embodiment of the present application. The specific flow of the I2C test method can be as follows:
[0062] 101. In response to a user input operation on an input box of a host computer tool, obtain a slave device address corresponding to the input operation.
[0063] Subsequent operations are triggered when the user enters an input into a specific input box (such as a text input box) of a host computer tool (a software tool used for control, monitoring, etc.). This input operation can include entering an address value on the keyboard or pasting an address string.
[0064] The host computer tool captures user input through corresponding software logic and interfaces and identifies it as a slave device address. In I2C communication, the slave device address is the key identifier for establishing a communication connection between the master and slave devices. The master device needs this address to accurately locate the corresponding slave device and perform operations such as reading and writing data. For example, in a C++ implementation, it might be possible to listen for text change events in an input box, obtain the string content in the input box when the event is triggered, and further convert and verify it into a valid slave device address.
[0065] 102. Determine whether the slave device address is valid.
[0066] I2C slave addresses are typically 7 or 10 bits. For 7-bit addresses, the value range is 0x00-0x7F; 10-bit addresses have specific encoding rules. Check that the input address is within the range of the corresponding format. For example, use a program to determine whether the input address value exceeds the upper limit of 0x7F for 7-bit addresses. If so, the address is invalid. According to the I2C protocol, certain addresses have special uses, such as the broadcast address (usually 0x00 in a 7-bit address). Ensure that the input address is not reserved for special purposes by the protocol and is not suitable for use as a normal slave address.
[0067] After preliminary verification of the address format and other aspects at the software level, the master device can attempt to send a simple probe signal (such as a start signal + address + read / write flag) to the address. If an ACK signal (ACK) is received from the slave device within the specified time, it indicates that the slave device corresponding to the address exists and the address is valid. If no ACK is received, the address may be invalid, such as an address error or the corresponding slave device is not working properly.
[0068] 103. If the slave device address is valid, detect the data processing operation triggered by the user.
[0069] User-triggered data processing operations primarily include read and write operations. Programs must identify the type of operation by monitoring user actions on the interface (such as clicking a "Read Data" or "Write Data" button) or receiving user input (such as entering specific read and write commands on the command line). For example, in a graphical user interface, using an event monitoring mechanism, when a user clicks the "Read Data" button, the corresponding event handler function is triggered, marking the current operation as a read operation.
[0070] After identifying the operation type, prepare for subsequent data processing. If it's a read operation, prepare a buffer to receive the data from the slave device and configure the relevant parameters of the I2C read function (such as the read address and data length). If it's a write operation, verify and format the input data to ensure it complies with the I2C protocol and the storage specifications of the slave device.
[0071] 104. If the data processing operation is a read operation, the data is read from the slave device using the I2C bus, and the read data is updated to the input box.
[0072] After determining that the user has triggered a read operation, the master device establishes a communication connection with the slave device whose address has been determined to be valid, using the I2C bus according to the I2C communication protocol. The master device sends a command containing the slave address and the storage address of the data to be read (such as a register address or RAM address). After receiving the command, the slave device sends the data at the corresponding address back to the master device. During this process, the master device must strictly follow the timing and signal specifications specified in the I2C protocol, such as the start signal, address transmission, response signal, and data transmission, to ensure accurate data reading.
[0073] After the master device successfully reads data from the slave device, it transfers this data to the host computer tool's input box for display update. This allows the user to intuitively see the data read from the slave device, facilitating subsequent analysis, processing, and comparison with expected data. When updating data to the input box, data format conversion and adaptation are required to ensure that the data is displayed correctly in the input box. For example, binary data must be converted to hexadecimal or another suitable format for display.
[0074] Optionally, in some embodiments of the present application, if the data processing operation is a read operation, data is read from the slave device using the I2C bus, and the read data is updated to the input box, which may specifically include:
[0075] Set up data buffer in memory;
[0076] Initiating a data read request to the slave device based on a preset read function;
[0077] Separate the read data and return the separated read data to the data buffer.
[0078] Allocate a specific storage area in the computer's memory for temporary storage of data read from the slave device. The data buffer can be an array (such as a byte array) or other suitable data structure. For example, in C language, you can use char dataBuffer
[100] ; to define a data buffer of size 100 bytes, specifically for storing data read from the slave device. The purpose of setting up a data buffer is to have a place to temporarily store data during the data processing process, facilitating subsequent operations such as data analysis, processing, and transmission.
[0079] A pre-written read function interacts with the slave device to request data according to the I2C protocol or other relevant communication protocols. This function includes operations such as establishing a communication connection and sending read instructions. For example, in I2C communication, the read function first sends the address of the slave device, then the storage address of the data to be read (such as a register address), then sets the appropriate read mode (such as single read or continuous read), and finally waits for the slave device to respond and send the data. The specific implementation of the function will vary depending on the programming language and hardware platform used, but it must comply with the corresponding communication protocol specifications to ensure that the required data can be correctly read from the slave device.
[0080] After successfully reading data from a slave device, it may contain information of multiple types or formats, necessitating data separation. For example, the read data may contain different components, such as the device identifier, data length, and actual data. These components are separated through parsing and processing. The data separation method can be determined based on the specific format and structure of the data, such as extracting the corresponding information by reading data at specific byte positions. The separated data is then stored in a previously configured data buffer, allowing further processing and manipulation in memory, such as verification, storage in a file, or transmission to other devices.
[0081] Optionally, in some embodiments of the present application,
[0082] 105. If the data processing operation is a write operation, the data value in the input box is verified. When the data value passes the data verification, the data value is written to the slave device, and the write information is updated to the input box.
[0083] After determining that the data processing operation is a write operation, the data value in the input box is first verified. Data verification is a crucial step, ensuring that the input data value complies with certain rules and requirements to ensure that the data written to the slave device is accurate and valid. Verification can be performed in a variety of ways, such as parity check, cyclic redundancy check (CRC), and data format check. For example, for hexadecimal data input that requires a specific format, the verification process will check whether the input data conforms to the hexadecimal format and contains no illegal characters. If the data verification fails, it indicates that the data may be incorrect, and the subsequent write operation will typically not proceed. Instead, the user may be prompted to verify the input data.
[0084] When the data value passes data verification, it is written to the slave device. This step involves sending the data to a designated storage location (such as a register or memory address) on the slave device according to a specific communication protocol (such as I2C). Based on information such as the slave device's address, the storage address to be written, and the data value, the master device constructs a suitable write instruction and sends it to the slave device via the communication interface. After receiving the instruction, the slave device stores the data in the corresponding location. During the write process, communication stability and data transmission accuracy must be ensured, and error handling mechanisms such as timeout retransmission may also be involved.
[0085] After writing data, update the written information to the input box. This step allows users to promptly understand the results and related information of the write operation. The updated content may include the written data value, the success status of the write operation (such as a success or failure indicator), the write time, etc. By updating this information to the input box, users can intuitively see the status of the write operation, facilitating subsequent operations or further analysis.
[0086] Optionally, in some embodiments of the present application, the step of “if the data processing operation is a write operation, performing data verification on the data value in the input box, and when the data value passes the data verification, writing the data value to the slave device and updating the write information to the input box” may specifically include:
[0087] If the data processing operation is a write operation, the data value in the input box is verified using a preset verification method;
[0088] When the data value passes the data verification, data separation is performed on the write information of the slave device to obtain a slave address and a RAM address corresponding to the slave device and write data information corresponding to the write operation;
[0089] The slave address, RAM address and write data information corresponding to the write operation of the slave device are written into the slave device, and the slave address, RAM address and write data information corresponding to the write operation of the slave device are updated into the input box.
[0090] The default verification method can be a parity check, which determines whether the data may have transmission errors by checking the parity of the number of 1s in the data; or a CRC (cyclic redundancy check), which calculates the data's check code based on a specific generator polynomial and then compares it with the received check code. It can also be a simple data format check, such as stipulating that the data must be a hexadecimal number of a specific length. During the verification, the input data is checked to see if it meets the format requirements. If the check fails, the data cannot be written to the subsequent operation, and the user may be prompted to re-enter the correct data.
[0091] Once the data verification passes, the next step is to process the information to be written to the slave device. Since the written information may be a whole string or a block of data, it is necessary to separate the key components. The slave address determines which slave device to communicate with and is a key identifier for device identification in I2C communication. The RAM address specifies the specific location in the slave device's memory where the data is to be written. Different slave devices may have different memory address space divisions. The write data information is the actual data content to be written to the slave device after verification. Through parsing and separation operations, this key information is extracted to prepare for the subsequent write operation.
[0092] After obtaining the slave address, RAM address, and write data, the master device transmits this information to the slave device according to the I2C communication protocol, completing the data write operation. Upon successful write, the newly written slave address, RAM address, and write data are updated and displayed in the input box. This allows the user to intuitively see detailed information about the write operation, including which device, which address, and the written data, making it easier for users to check and perform subsequent operations, while also increasing transparency and traceability.
[0093] Optionally, in some embodiments of the present application, please refer to Figure 3 , also includes:
[0094] Initialize interface controls and load register configuration files;
[0095] Check the register configuration file to see if it is loaded successfully;
[0096] If successful, each register address and its configuration information recorded in the configuration file are accessed in sequence to perform read and write operations one by one
[0097] If it fails, the process ends.
[0098] For example, when a program starts running, it initializes the various controls used for user interaction in the interface. These controls might include text boxes, buttons, list boxes, and so on. Initialization typically involves setting the initial state of controls, such as the default text content of a text box and the initial visibility and usability of a button. For example, a text box used to display register information might be initialized to a blank state, while a button used to trigger a read or write operation might be disabled until a certain condition is met. The goal is to provide users with a clean, organized, and predictable interface for subsequent operations.
[0099] Attempts to read a register configuration file from a specified storage location (such as a disk file). This file contains various register-related information, such as register addresses, configuration parameters, and read / write permissions. During the loading process, the program uses appropriate file reading functions and data parsing methods to read the file contents into program memory and perform appropriate parsing and storage. For example, it uses file stream operation functions to open the file, then read the file contents line by line, parsing each line of data into a corresponding register information object based on the file format (such as CSV or JSON).
[0100] After loading the register configuration file, the program checks whether the load operation was successful. This is typically accomplished by checking for errors during the file read process (such as file non-existence or incorrect file format) or by checking whether the parsed data is complete and valid. If any errors occur during the load process or the parsed data does not meet the expected requirements, the load is considered a failure; otherwise, the load is considered successful.
[0101] When the register configuration file is successfully loaded, the program will traverse each register address and its related configuration information recorded in the configuration file. For each register, the program will decide whether to perform read and write operations based on its configuration information (such as read and write permissions). When performing read and write operations, the program will communicate with the target device according to the corresponding communication protocol (such as I2C, SPI, etc.), send read and write instructions, and obtain the corresponding data. For example, for a register with read permission, the program will send a read instruction, then wait for the device to return the register value and display it on the interface; for a register with write permission, the program will send a write instruction based on the user's input or preset value to write the data to the register.
[0102] If the register configuration file fails to load during the check process, the program will directly terminate the current operation process. This may mean that the user needs to check the correctness of the file, whether the file path is correct, etc., and try to load the configuration file again.
[0103] Optionally, in some embodiments of the present application, loading a register configuration file may specifically include:
[0104] Initialize the variables corresponding to the register configuration file;
[0105] After initialization, the file contents of the register configuration file are read line by line;
[0106] Split each line of text according to a specific delimiter and extract the text data of each field;
[0107] Parse the text data of each field that has been segmented;
[0108] Determine whether the current row base address has changed from the previous record base address;
[0109] If it changes, update it to the new base address and clear the current register configuration list;
[0110] According to the data of each field, a register configuration object (structure or class instance) is constructed and stored in a preset data structure.
[0111] Before processing a register configuration file, define and initialize some variables. These variables will be used to store and process configuration file-related information. For example, you might define a variable to store the contents of the currently read file line, a variable to record the base address of the currently processed register, and several variables to store the parsed data for each field. Initializing these variables ensures that they have the correct initial values during subsequent operations, preventing undefined behavior.
[0112] Use file reading functions or methods to read the contents of the register configuration file line by line. This is usually implemented through a loop, which reads a line of file content each time and stores it in a predefined variable. For example, in C++, you can use the std::getline() function to read the file content line by line, storing each line in a std::string variable.
[0113] After reading a line of text, it is split into multiple fields using a specific delimiter (such as commas, spaces, or tabs) based on the data format in the configuration file. Each field corresponds to a specific piece of information in the configuration file, such as a base address, register offset, or read / write mask. Splitting allows you to isolate individual items of information within a line of text, facilitating subsequent parsing and processing. For example, in Python, you can use the split() method to split a string based on a specified delimiter.
[0114] Parse the resulting text data in each field and convert it into a suitable data type that the program can handle. For example, if a field represents a numeric value (such as a base address or register offset), it needs to be converted from a string type to an integer type; if a field represents a flag (such as a read / write mask), it may need to be converted to a Boolean type or a specific enumeration type. Parsing ensures data accuracy and consistency, allowing for correct subsequent processing.
[0115] When processing each row of data, the base address information in the current row is extracted and compared with the previously recorded base address to determine whether the base address has changed. The base address is the portion of the register address that determines the register's starting position in memory. Identifying base address changes is crucial for correctly processing register configuration information at different base addresses.
[0116] If the base address of the current row is different from the previously recorded base address, it means that a new base address range has been entered. At this time, the currently recorded base address needs to be updated to the new base address. At the same time, the table currently used to store register configuration information is cleared because the previously stored configuration information belongs to the old base address range and is no longer applicable to the new base address range. This ensures that when processing the register configuration information under the new base address, it will not be interfered with by the old information.
[0117] After parsing and processing each field of a line of data, a register configuration object (which can be an instance of a structure or class) is constructed based on the data in these fields. This object contains all the configuration information related to the register, such as the base address, register offset, read and write mask, etc. Then, the constructed register configuration object is stored in a predefined data structure (such as an array, linked list, vector, etc.) to facilitate the subsequent unified management and operation of all register configuration information.
[0118] Optionally, in some embodiments of the present application, the method further includes:
[0119] Initialize the display interface and load the RAM configuration file;
[0120] Determine whether the RAM configuration file is loaded successfully;
[0121] If successful, the random number seed is set, and the RAM areas recorded in the configuration file are accessed in sequence according to the set random number seed to perform read and write verification on different areas respectively.
[0122] See also Figure 4 When the program starts running, the display interface used to display operation results, status information, etc. is initialized. This includes setting the initial states of various elements on the interface (such as text boxes, buttons, indicator lights, etc.), such as setting text boxes to empty, buttons to unavailable, and indicator lights to default colors. The purpose of initializing the display interface is to provide users with a neat, orderly, and expected operation interface so that the operation process and results can be correctly displayed later, enhancing user experience and interactivity.
[0123] Attempts to read a RAM configuration file from a specified storage location (such as a disk file). This file contains configuration information related to the random access memory (RAM), such as the address range, size, and read / write permissions of different RAM regions. During the loading process, the program uses the corresponding file reading functions and data parsing methods to read the contents of the file into the program's memory and perform appropriate parsing and storage. For example, it uses file stream operation functions to open the file, then read the file contents line by line, parsing each line of data into a corresponding RAM region information object based on the file format (such as CSV, JSON, etc.).
[0124] After loading the RAM configuration file, the program checks whether the load operation was successful. This is typically accomplished by checking for errors during the file reading process (such as file non-existence, incorrect file format, etc.) or by checking whether the parsed data is complete and valid. If any errors occur during the loading process or the parsed data does not meet the expected requirements, the load is considered a failure; otherwise, the load is considered successful.
[0125] After the RAM configuration file is successfully loaded, the program sets a random number seed. The random number seed is the initial value used to generate a random number sequence. Different seed values will generate different random number sequences. Many programming languages provide functions or methods for setting random number seeds. For example, in C++, you can use the std::srand() function to set the random number seed. The current system time is typically used as the seed value to ensure that the generated random number sequence is different each time the program is run. The purpose of setting the random number seed is to provide a basis for subsequent operations such as generating random offsets, making read and write verification of the RAM area more random and comprehensive.
[0126] After setting the random number seed, the program will traverse each RAM area recorded in the RAM configuration file. For each area, a series of random offsets (i.e., random addresses within the area) are generated based on the set random number seed. Then, read and write operations are performed on these random offsets, first reading the original data at the offset, then writing the new data, and finally reading again to verify whether the write operation was successful, and comparing the read data with the expected data. By performing such read and write verification on each RAM area, it is possible to check whether the read and write functions of the RAM area are normal, and whether the data is stored and read accurately. Such operations can detect potential hardware failures or software problems and ensure the reliability and stability of the RAM.
[0127] The above completes the I2C test process of this application.
[0128] As can be seen from the above, the present application provides an I2C test method, which responds to the user's input operation on the input box of the host computer tool, obtains the slave device address corresponding to the input operation, determines whether the slave device address is valid, and if the slave device address is valid, detects the data processing operation triggered by the user. If the data processing operation is a read operation, the I2C bus is used to read data from the slave device, and the read data is updated to the input box. If the data processing operation is a write operation, the data value in the input box is subjected to data verification. When the data value passes the data verification, the data value is written to the slave device, and the write information is updated to the input box. In the I2C test solution provided by the present application, read and write operations are initiated by the host computer tool, and the host computer tool can accurately initiate read and write operations in accordance with the IIC protocol specification, thereby carefully detecting the data processing capability, response speed, and error handling mechanism of the master chip.
[0129] The above describes in detail the I2C test method and device provided in the embodiments of the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is intended only to facilitate understanding of the method and core concept of the present invention. Furthermore, those skilled in the art will appreciate that variations in the specific implementation methods and scope of application may occur based on the concepts of the present invention. In summary, the contents of this specification should not be construed as limiting the present invention.
Claims
1. An I2C testing method, characterized in that: include: In response to a user input operation on an input box of a host computer tool, obtaining a slave device address corresponding to the input operation; Determine whether the slave device address is valid; If the slave device address is valid, detecting a data processing operation triggered by the user; If the data processing operation is a read operation, the data is read from the slave device using the I2C bus, and the read data is updated to the input box; If the data processing operation is a write operation, data verification is performed on the data value in the input box. When the data value passes the data verification, the data value is written into the slave device, and the write information is updated to the input box.
2. The I2C testing method according to claim 1, wherein: If the data processing operation is a read operation, the data is read from the slave device using the I2C bus, and the read data is updated to the input box, including: Setting a data buffer in a memory, wherein the data buffer is used to store data read from the slave device; Initiating a data read request to the slave device based on a preset read function; The read-in data is separated and the separated read-in data is returned to the data buffer.
3. The I2C testing method according to claim 2, wherein: The step of separating the read data and returning the separated read data to the data buffer includes: Separating the read data to obtain a slave address and a RAM address corresponding to the slave device and write data information associated with the read operation; The slave address, RAM address and write data information associated with the read operation are stored in a preset data structure, and the data in the data structure are returned to the data buffer through a preset function.
4. The I2C testing method according to claim 1, wherein: If the data processing operation is a write operation, performing data verification on the data value in the input box, and when the data value passes the data verification, writing the data value to the slave device and updating the write information to the input box, including: If the data processing operation is a write operation, the data value in the input box is verified using a preset verification method; When the data value passes the data verification, data separation is performed on the write information of the slave device to obtain a slave address and a RAM address corresponding to the slave device and write data information corresponding to the write operation; The slave address, RAM address and write data information corresponding to the write operation of the slave device are written into the slave device, and the slave address, RAM address and write data information corresponding to the write operation of the slave device are updated into the input box.
5. The I2C testing method according to claim 4, wherein: Also includes: When the data value fails the data verification, the data processing flow ends.
6. The I2C testing method according to claim 1, wherein: Also includes: Initialize interface controls and load register configuration files; Check the register configuration file to see if it is loaded successfully; If successful, each register address and its configuration information recorded in the configuration file are accessed in sequence to perform read and write operations one by one If it fails, the process ends.
7. The I2C testing method according to claim 6, wherein: The loading register configuration file includes: Initialize the variables corresponding to the register configuration file; After initialization, the file contents of the register configuration file are read line by line; Split each line of text according to a specific delimiter and extract the text data of each field; Parse the text data of each field that has been segmented; Determine whether the current row base address has changed from the previous record base address; If it changes, update it to the new base address and clear the current register configuration list; According to the data of each field, a register configuration object (structure or class instance) is constructed and stored in a preset data structure.
8. The I2C testing method according to claim 1, wherein: Also includes: Initialize the display interface and load the RAM configuration file; Determine whether the RAM configuration file is loaded successfully; If successful, the random number seed is set, and the RAM areas recorded in the configuration file are accessed in sequence according to the set random number seed to perform read and write verification on different areas respectively.
9. An I2C test device, characterized in that: The system comprises a master device and a slave device, wherein the master device performs the following steps: In response to a user input operation on an input box of a host computer tool, obtaining a slave device address corresponding to the input operation; Determine whether the slave device address is valid; If the slave device address is valid, detecting a data processing operation triggered by the user; If the data processing operation is a read operation, the data is read from the slave device using the I2C bus, and the read data is updated to the input box; If the data processing operation is a write operation, data verification is performed on the data value in the input box. When the data value passes the data verification, the data value is written into the slave device, and the write information is updated to the input box.
10. The I2C test device according to claim 9, wherein: If the data processing operation is a read operation, the data is read from the slave device using the I2C bus, and the read data is updated to the input box, including: Setting a data buffer in a memory, wherein the data buffer is used to store data read from the slave device; Initiating a data read request to the slave device based on a preset read function; The read-in data is separated and the separated read-in data is returned to the data buffer.
11. The I2C test device according to claim 10, wherein: The step of separating the read data and returning the separated read data to the data buffer includes: Separating the read data to obtain a slave address and a RAM address corresponding to the slave device and write data information associated with the read operation; The slave address, RAM address and write data information associated with the read operation are stored in a preset data structure, and the data in the data structure are returned to the data buffer through a preset function.
12. The I2C test device according to claim 9, wherein: If the data processing operation is a write operation, performing data verification on the data value in the input box, and when the data value passes the data verification, writing the data value to the slave device and updating the write information to the input box, including: If the data processing operation is a write operation, the data value in the input box is verified using a preset verification method; When the data value passes the data verification, data separation is performed on the write information of the slave device to obtain a slave address and a RAM address corresponding to the slave device and write data information corresponding to the write operation; The slave address, RAM address and write data information corresponding to the write operation of the slave device are written into the slave device, and the slave address, RAM address and write data information corresponding to the write operation of the slave device are updated into the input box.
13. The I2C testing device according to claim 12, wherein: Also includes: When the data value fails the data verification, the data processing flow ends.
14. The I2C testing device according to claim 9, wherein: Also includes: Initialize interface controls and load register configuration files; Check the register configuration file to see if it is loaded successfully; If successful, each register address and its configuration information recorded in the configuration file are accessed in sequence to perform read and write operations one by one If it fails, the process ends.
15. The I2C testing device according to claim 14, wherein: The loading register configuration file includes: Initialize the variables corresponding to the register configuration file; After initialization, the file contents of the register configuration file are read line by line; Split each line of text according to a specific delimiter and extract the text data of each field; Parse the text data of each field that has been segmented; Determine whether the current row base address has changed from the previous record base address; If it changes, update it to the new base address and clear the current register configuration list; According to the data of each field, a register configuration object (structure or class instance) is constructed and stored in a preset data structure.
16. The I2C testing device according to claim 9, wherein: Also includes: Initialize the display interface and load the RAM configuration file; Determine whether the RAM configuration file is loaded successfully; If successful, the random number seed is set, and the RAM areas recorded in the configuration file are accessed in sequence according to the set random number seed to perform read and write verification on different areas respectively.