Driving circuit control method, electronic equipment and computer readable storage medium

Abstract

The invention relates to the technical field of display, and provides a driving circuit control method, electronic equipment and a computer readable storage medium. The driving circuit comprises a driving transistor. The method comprises the following steps: sequentially outputting a first frame number of control signals to the driving circuit according to a first frame rate; then, a second frame number of control signals are sequentially output to the driving circuit according to a second frame rate, and the second frame rate is smaller than the first frame rate; then, control signals of a first other frame number are sequentially output to the driving circuit according to a first other frame rate, and the first other frame rate is smaller than the second frame rate; the sum of the reciprocal of the first frame rate and a first product of the first frame number, the reciprocal of the second frame rate and a second product of the second frame number, and the reciprocal of the first other frame rate and other products of the first other frame number is a first sum value; the difference value obtained by subtracting the first sum value from the characteristic recovery duration of the driving transistor is smaller than or equal to a preset duration threshold value, and the preset duration threshold value is a positive number. The method can eliminate the ghosting of the white picture.

Description

Technical Field

[0001] The present application relates to the technical field of display screens, and in particular to a drive circuit control method, an electronic device, and a computer-readable storage medium. Background Art

[0002] As people's requirements for screen display effects become higher and higher, the functions of the pixel driving circuits in the screen are becoming more and more abundant, which can meet people's requirements for display effects.

[0003] LTPO screens are widely used in terminal devices. In LTPO screens, the pixel driver circuit can adopt an 8T1C format. This 8T1C driver circuit can compensate and reset pixels, thereby improving display quality.

[0004] However, in a low refresh rate scenario, if the screen switches from an interface with black and white images to another dark interface, a residual image of the white image in the previous interface will be displayed in the switched dark interface, affecting the user's viewing experience. Summary of the Invention

[0005] The present application provides a driving circuit control method, device, chip, electronic device, computer-readable storage medium and computer program product, which can eliminate the afterimage of the white screen in the previous interface.

[0006] In a first aspect, a method for controlling a driving circuit is provided, wherein the driving circuit includes a driving transistor, the method comprising: sequentially outputting a control signal of a first frame number to the driving circuit at a first frame rate; after sequentially outputting the control signal of the first frame number to the driving circuit at the first frame rate, sequentially outputting a control signal of a second frame number to the driving circuit at a second frame rate, wherein the second frame rate is less than the first frame rate; after sequentially outputting the control signal of the second frame number to the driving circuit at the second frame rate, sequentially outputting a control signal of a first other frame number to the driving circuit at a first other frame rate, wherein the first other frame rate is less than the second frame rate; the product of the reciprocal of the first frame rate and the first frame number is a first product, the product of the reciprocal of the second frame rate and the second frame number is a second product, the product of the reciprocal of the first other frame rate and the first other frame number is a first other product, and the sum of the first product, the second product, and the first other product is a first sum value; and the difference between the characteristic recovery time of the driving transistor and the first sum value is less than or equal to a preset time threshold, wherein the preset time threshold is a positive number.

[0007] The control signal output by the DDIC to the driving circuit may be a control voltage. The control voltage output by the DDIC to the driving circuit at a certain frame rate is used to control the display state of the pixel driven by the driving circuit.

[0008] The first other frame rate may include one subframe rate or multiple subframe rates. The first other frame number may include one subframe number or multiple subframe numbers. The first other product may include one subproduct or multiple subproducts. When the first other frame rate is a subframe rate, the first other frame number is one subframe number, and the first other product includes one subproduct.

[0009] When the first other frame rate includes multiple sub-frame rates, the first other frame number includes multiple sub-frame numbers, and the first other product includes multiple sub-products. The first other frame rate is lower than the second frame rate. The first sum value can be the sum of the first product, the second product, and the multiple sub-products.

[0010] Regardless of whether the first other frame rate includes a single frame rate or multiple sub-frame rates, the difference between the characteristic recovery time of the driving transistor and the first sum value is less than or equal to the preset time threshold. It will be understood that the total playback time from the time the DDIC begins outputting the control signal for the first frame number until the time it outputs the control signal for the first other frame number is the first sum value. Optionally, the number of the multiple sub-frame rates can be one, two, three, or four, and they can be different from each other.

[0011] When the DDIC detects a low refresh rate and enters a self-reduction state (or self-reduction scenario), it refreshes the voltage of the driving circuit according to the transition frame. The transition frame includes multiple gradually decreasing frame rates (also called refresh rates), each frame rate can be regarded as a gear, and each frame rate corresponds to a frame number. When the DDIC outputs a control signal to the driving circuit according to a frame rate, the output frame number is the frame number corresponding to the frame rate. The DDIC performs frame reduction (or frequency reduction) in sequence according to the multiple gradually decreasing frame rates in the transition frame, and then enters a low refresh rate maintenance frame scenario.

[0012] It takes a certain amount of time for the characteristics of the driving transistor to recover when the voltage difference changes. This time is related to the physical characteristics of the driving transistor and may also be referred to as a characteristic recovery time.

[0013] Because the preset duration threshold is a positive number, if the difference between the driver transistor's characteristic recovery duration and the first sum is less than or equal to 0, it must be less than the preset duration threshold. In this case, the characteristic recovery duration is less than or equal to the playback duration. After the DDIC plays the transition frame, the driver transistor's characteristics have recovered, and the user will not observe white afterimages in dark images.

[0014] If the difference between the characteristic recovery time and the first sum is greater than 0, the characteristics of the driving transistor have not fully recovered, but because the difference between the characteristic recovery time and the first sum is less than the preset time threshold, it indicates that the characteristics of the driving transistor have recovered to a certain extent. Due to the limited brightness resolution of the human eye, although there is still a brightness difference between the original white area and the original black area in the dark image, the user cannot observe the brightness difference with the naked eye, and the afterimage of the white screen will not be seen, and the user's viewing experience will not be affected.

[0015] In some possible implementations, the first sum is greater than or equal to the characteristic recovery duration.

[0016] Because the preset duration threshold is a positive number, if the difference between the driver transistor's characteristic recovery duration and the first sum is less than or equal to 0, it must be less than the preset duration threshold. In this case, the characteristic recovery duration is less than or equal to the playback duration. After the DDIC plays the transition frame, the driver transistor's characteristics have recovered, and the user will not see white afterimages appearing in dark images, thus improving the user's viewing experience.

[0017] In some possible implementations, the first sum is less than the characteristic recovery time, and the difference between the characteristic recovery time and the first sum is less than or equal to a preset time threshold.

[0018] The first sum is less than the characteristic recovery time, that is, the difference between the characteristic recovery time and the first sum is greater than 0. The difference between the characteristic recovery time and the first sum is greater than 0, indicating that after the transition frame is played, the characteristics of the driving transistor have not been fully restored. However, since the difference between the characteristic recovery time and the first sum is less than the preset time threshold, it means that the characteristics of the driving transistor have been restored to a certain extent. Since the human eye has limited ability to resolve brightness, although there is still a brightness difference between the original white area and the original black area in the dark image, the user can no longer observe the brightness difference with the naked eye, and the afterimage of the white screen cannot be seen, and it will not affect the user's viewing experience.

[0019] In some possible implementations, the first other frame rate includes at least one sub-frame rate, the first other frame number includes at least one sub-frame number, the first other product includes at least one sub-product, at least one sub-product, at least one sub-frame rate and at least one sub-frame number have a one-to-one correspondence, each of the at least one sub-frame rate is less than the second frame rate, and the control signal of the first other frame number is output to the driving circuit in sequence according to the first other frame rate, including: outputting the control signal of the first sub-frame number to the driving circuit in sequence according to the first sub-frame rate, the first sub-frame rate is any one of the at least one sub-frame rates, the first sub-frame number is the sub-frame number of the at least one sub-frame number corresponding to the first sub-frame rate, the product of the reciprocal of the first sub-frame rate and the first frame number is the first sub-product, and the first sub-product is the sub-product of the at least one sub-product corresponding to the first sub-frame number and the first sub-frame rate.

[0020] In some possible implementations, the number of at least one subframe rate is at least two, and at least one subframe rate also includes a second subframe rate, which is smaller than the first subframe rate. After outputting control signals of the first subframe number to the driving circuit in sequence according to the first subframe rate, the method further includes: outputting control signals of the second subframe number to the driving circuit in sequence according to the second subframe rate, and the second subframe number is the subframe number corresponding to the second subframe rate in the at least one subframe number.

[0021] The first other frame rate may include one subframe rate or multiple subframe rates. The first other frame number may include one subframe number or multiple subframe numbers. The first other product may include one subproduct or multiple subproducts. When the first other frame rate is a subframe rate, the first other frame number is one subframe number, and the first other product includes one subproduct.

[0022] When the first other frame rate includes multiple sub-frame rates, the first other frame number includes multiple sub-frame numbers, and the first other product includes multiple sub-products. The first other frame rate is lower than the second frame rate. The first sum value can be the sum of the first product, the second product, and the multiple sub-products.

[0023] Regardless of whether the first other frame rate includes a single frame rate or multiple sub-frame rates, the difference between the characteristic recovery time of the driving transistor and the first sum value is less than or equal to the preset time threshold. It is understood that the total playback time from the time the DDIC starts outputting the control signal for the first frame number until the time it outputs the control signal for the first other frame number is the first sum value. Optionally, the number of the multiple sub-frame rates can be one, two, three, or four, and the multiple sub-frame rates can be different from each other. The number of frames corresponding to each sub-frame rate can be the same or different.

[0024] When the first other frame rate includes multiple sub-frame rates, the DDIC outputs control signals corresponding to the number of frames in order from largest to smallest according to the frame rates of the multiple sub-frame rates.

[0025] The specific size and type of the frame rate at which the DDIC operates can be flexibly determined based on specific needs and is not limited.

[0026] In some possible implementations, before outputting a control signal of a first number of frames to the driving circuit in sequence at a first frame rate, the method includes: controlling the screen to display a first image, the first image including a light pixel area and a dark pixel area; after outputting a control signal of a first other number of frames to the driving circuit in sequence at a first other frame rate, controlling the screen to display a second image, the second image being a dark image; in the second image, the difference between a first brightness corresponding to the light pixel area and a second brightness corresponding to the dark pixel area meets a preset brightness difference requirement.

[0027] Optionally, the light pixel area can be an area of a white screen, and the dark pixel area can be an area of a black screen. The dark image can be a black image, or the darkest color image can be used in most cases.

[0028] When the DDIC outputs control signals in this manner, when displaying a dark image, the brightness of the previously light-colored pixel area is set to the first brightness, while the brightness of the previously dark image is set to the second brightness. When the difference between the first brightness and the second brightness meets the preset brightness difference requirement, the user cannot detect the brightness difference, and thus no white image afterimage is observed.

[0029] In some possible implementations, a ratio of a difference between the first brightness and the second brightness to the second brightness is smaller than a brightness difference threshold.

[0030] The preset brightness difference requirement can be the difference between the first brightness and the second brightness, with the ratio of the difference to the second brightness being less than a brightness difference threshold. Alternatively, the brightness difference threshold can be 2%, 3%, or another smaller value. The smaller the brightness difference threshold, the less likely the user will notice white screen afterimages. The larger the brightness difference threshold, the shorter the duration that the DDIC enters the hold frame, which can save power.

[0031] In some possible implementations, the grayscale of the light-colored pixel region of the first image is L1, the grayscale of the dark-colored pixel region of the first image is L5, and the grayscale of the second image is L17.

[0032] When using this grayscale, users will not notice any afterimages on the white screen. Then, users will not notice any afterimages on the white screen at other daily grayscales.

[0033] In some possible implementations, the reference voltage of the driving circuit is a first voltage, and the method further includes: when a self-frequency reduction scenario is detected, controlling the reference voltage of the driving circuit to be a second voltage, and sequentially outputting a control signal of a third frame number to the driving circuit according to the first frame rate, the second voltage is greater than the first voltage; after sequentially outputting the control signal of the third frame number to the driving circuit according to the first frame rate, sequentially outputting a control signal of a fourth frame number to the driving circuit according to the second frame rate; after sequentially outputting the control signal of the fourth frame number to the driving circuit according to the second frame rate, sequentially outputting the control signal of the fourth frame number to the driving circuit according to the second other frame rates. The control signal of the second other frame number is outputted for the second time, and the second other frame rate is less than the second frame rate; the product of the reciprocal of the first frame rate and the third frame number is the third product, the product of the reciprocal of the second frame rate and the fourth frame number is the fourth product, the product of the reciprocal of the second other frame rate and the second other frame number is the second other product, and the sum of the third product, the fourth product and the second other product is the second sum value; the third frame number is less than the first frame number, and / or the fourth frame number is less than the second frame number, and / or the second other frame number is less than the first other frame number, and the difference between the characteristic recovery time and the second sum value is less than or equal to the preset time threshold.

[0034] By increasing the reference voltage of the control drive circuit, the DDIC will cause forward bias stress on the drive transistor for both white and black pixels. The DTFT in the drive circuit will recover its characteristics in the forward bias direction, which is more conducive to eliminating the brightness difference caused by black / white images. As a result, the speed of the drive transistor's characteristic recovery is accelerated, which can shorten the characteristic recovery time. Correspondingly, even if the playback time of the transition frame is shortened, the afterimage of the white screen can be avoided.

[0035] DDIC can reduce the number of frames of one frame rate, or can reduce the number of frames of multiple frame rates, thereby shortening the playback time of transition frames. This embodiment of the present application does not limit this.

[0036] DDIC can reduce power consumption while ensuring that white screen afterimages do not occur by increasing the reference voltage of the control drive circuit and reducing the number of transition frames.

[0037] In a second aspect, a drive circuit control device is provided, comprising a unit composed of software and / or hardware, which is used to execute any one of the methods in the technical solution described in the first aspect.

[0038] In a third aspect, an embodiment of the present application provides a chip comprising a processor; the processor is used to read and execute a computer program stored in a memory to execute any one of the methods in the technical solution described in the first aspect.

[0039] Optionally, the chip further includes a memory, and the memory is connected to the processor via a circuit or wire.

[0040] Further optionally, the chip also includes a communication interface.

[0041] In some embodiments, the chip is a display driver IC (DDIC).

[0042] In a fourth aspect, an electronic device is provided, which includes a screen, the screen includes multiple driving circuits, the driving circuit includes a driving transistor DTDT, and the electronic device also includes: a processor, a memory and an interface; the processor, the memory and the interface cooperate with each other so that the electronic device executes any one of the methods in the technical solution described in the first aspect.

[0043] In a fifth aspect, an electronic device is provided, which includes any chip in the technical solution described in the third aspect.

[0044] In a sixth aspect, a computer-readable storage medium is provided, in which a computer program is stored. When the computer program is executed by a processor, the processor executes any one of the methods in the technical solution described in the first aspect.

[0045] In a seventh aspect, a computer program product is provided, comprising: a computer program code, which, when executed on an electronic device, enables the electronic device to execute any one of the methods in the technical solution described in the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 1 is a schematic structural diagram of a terminal device 100 provided in an embodiment of the present application;

[0047] Figure 2 is a software structure block diagram of the terminal device 100 provided in an embodiment of the present application;

[0048] Figure 3 1 is a schematic diagram of a circuit structure of a driving circuit provided in an embodiment of the present application;

[0049] Figure 4 This is a schematic diagram of an interface in which a white screen afterimage appears when switching interfaces, provided by an embodiment of the present application;

[0050] Figure 5 This is a brightness curve diagram of a white screen afterimage that occurs when switching interfaces, provided by an embodiment of the present application;

[0051] Figure 6 This is a brightness curve diagram of an example of a driving circuit control method provided in an embodiment of the present application;

[0052] Figure 7This is another example of a brightness curve diagram after adopting a driving circuit control method provided in an embodiment of the present application;

[0053] Figure 8 This is a schematic diagram of current peak value after adopting a driving circuit control method provided in an embodiment of the present application;

[0054] Figure 9 This is a brightness curve diagram after reducing the Vrefp voltage provided in an embodiment of the present application;

[0055] Figure 10 This is a flow chart of a driving circuit control method provided in an embodiment of the present application;

[0056] Figure 11 This is a schematic diagram of the structure of a drive circuit control device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0057] The technical solutions in the embodiments of the present application will be described below in conjunction with the accompanying drawings in the embodiments of the present application. In the description of the embodiments of the present application, unless otherwise specified, " / " means or, for example, A / B can mean A or B; "and / or" in this article is merely a description of the association relationship of associated objects, indicating that three relationships can exist, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, in the description of the embodiments of the present application, "multiple" means two or more than two.

[0058] In the following, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the technical features indicated. Therefore, a feature specified as "first," "second," or "third" may explicitly or implicitly include one or more of the features.

[0059] The drive circuit control method provided in the embodiments of the present application can be applied to terminal devices such as mobile phones, tablet computers, wearable devices, vehicle-mounted devices, augmented reality (AR) / virtual reality (VR) devices, laptop computers, ultra-mobile personal computers (UMPCs), netbooks, and personal digital assistants (PDAs). The embodiments of the present application do not impose any restrictions on the specific types of terminal devices.

[0060] For example, Figure 11 is a schematic diagram of the structure of an example terminal device 100 provided in an embodiment of the present application. The terminal device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display 194, and a subscriber identification module (SIM) card interface 195. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity light sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

[0061] It should be understood that the structures illustrated in the embodiments of the present application do not constitute a specific limitation on the terminal device 100. In other embodiments of the present application, the terminal device 100 may include more or fewer components than shown, or may combine or separate certain components, or arrange the components differently. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0062] The processor 110 may include one or more processing units. For example, the processor 110 may include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU). The different processing units may be independent devices or integrated into one or more processors.

[0063] The controller may be the nerve center and command center of the terminal device 100. The controller may generate an operation control signal according to the instruction operation code and the timing signal to complete the control of fetching and executing instructions.

[0064] Processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in processor 110 is a cache memory. This memory can store instructions or data that have just been used or are being recycled by processor 110. If processor 110 needs to use the same instruction or data again, it can directly access the memory. This avoids duplicate accesses, reduces processor 110 latency, and thus improves system efficiency.

[0065] In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface.

[0066] The MIPI interface can be used to connect the processor 110 to peripheral devices such as the display 194 and the camera 193. MIPI interfaces include the camera serial interface (CSI) and the display serial interface (DSI). In some embodiments, the processor 110 and the camera 193 communicate via the CSI interface to implement the camera function of the terminal device 100. The processor 110 and the display 194 communicate via the DSI interface to implement the display function of the terminal device 100.

[0067] The GPIO interface can be configured via software. The GPIO interface can be configured as either a control signal or a data signal. In some embodiments, the GPIO interface can be used to connect the processor 110 to the camera 193, display 194, wireless communication module 160, audio module 170, sensor module 180, etc. The GPIO interface can also be configured as an I2C interface, an I2S interface, a UART interface, a MIPI interface, etc.

[0068] It is understood that the interface connection relationship between the modules illustrated in the embodiments of the present application is merely an illustrative illustration and does not constitute a structural limitation on the terminal device 100. In other embodiments of the present application, the terminal device 100 may also adopt a different interface connection method from the above embodiments, or a combination of multiple interface connection methods.

[0069] The terminal device 100 implements display functions through a GPU, display screen 194, and an application processor. The GPU is a microprocessor for image processing that connects the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs that execute program instructions to generate or modify display information.

[0070] Display screen 194 is used to display images, videos, etc. Display screen 194 includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a MiniLED, a MicroLED, a Micro-OLED, a quantum dot light-emitting diode (QLED), etc. In some embodiments, terminal device 100 may include one or N display screens 194, where N is a positive integer greater than 1.

[0071] The internal memory 121 can be used to store computer executable program codes, which include instructions. The processor 110 executes various functional applications and data processing of the terminal device 100 by running the instructions stored in the internal memory 121. The internal memory 121 may include a program storage area and a data storage area. Among them, the program storage area can store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc. The data storage area can store data created during the use of the terminal device 100 (such as audio data, a phone book, etc.), etc. In addition, the internal memory 121 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc.

[0072] The terminal device 100 can implement audio functions such as music playback and recording through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the headphone jack 170D, and the application processor.

[0073] The software system of the terminal device 100 can adopt a layered architecture, an event-driven architecture, a micro-kernel architecture, a micro-service architecture, or a cloud architecture. In the embodiment of the present application, the Android system with a layered architecture is used as an example to illustrate the software structure of the terminal device 100.

[0074] Figure 2 This is a software structure diagram of the terminal device 100 in an embodiment of the present application. The layered architecture divides the software into several layers, each with clear roles and division of labor. The layers communicate with each other through software interfaces. In some embodiments, the Android system is divided into four layers: the application layer, the application framework layer, the Android runtime and system libraries, and the kernel layer. The application layer can include a series of application packages.

[0075] like Figure 2 As shown, the application package may include applications such as camera, gallery, calendar, call, map, navigation, WLAN, Bluetooth, music, video, short message, etc.

[0076] The application framework layer provides an application programming interface (API) and programming framework for the applications in the application layer. The application framework layer includes some predefined functions.

[0077] like Figure 2 As shown, the application framework layer may include a window manager, a content provider, a view system, a phone manager, a resource manager, a notification manager, and the like.

[0078] The window manager is used to manage window programs. The window manager can obtain the display size, determine whether there is a status bar, lock the screen, take screenshots, etc.

[0079] Content providers are used to store and retrieve data and make it accessible to applications. The data may include videos, images, audio, calls made and received, browsing history and bookmarks, phone books, etc.

[0080] The view system includes visual controls, such as those for displaying text and images. The view system is used to build applications. A display interface can consist of one or more views. For example, a display interface containing a text notification icon might include a view for displaying text and a view for displaying images.

[0081] The phone manager is used to provide communication functions of the terminal device 100, such as management of call status (including answering, hanging up, etc.).

[0082] The resource manager provides various resources for applications, such as localized strings, icons, images, layout files, video files, and so on.

[0083] The notification manager enables applications to display notification information in the status bar, which can be used to convey informational messages and disappear automatically after a short stay without user interaction.

[0084] The Android runtime includes the core library and the virtual machine. The Android runtime is responsible for scheduling and management of the Android system.

[0085] The core library consists of two parts: one is the function that needs to be called by the Java language, and the other is the Android core library.

[0086] The application layer and application framework layer run in a virtual machine. The virtual machine executes Java files in the application layer and application framework layer as binary files. The virtual machine manages object lifecycles, stack management, thread management, security and exception management, and garbage collection.

[0087] The system library can include multiple functional modules, such as a surface manager, media libraries, a 3D graphics processing library (such as OpenGL ES), and a 2D graphics engine (such as SGL).

[0088] The surface manager is used to manage the display subsystem and provide fusion of 2D and 3D layers for multiple applications.

[0089] The media library supports playback and recording of a variety of common audio and video formats, as well as static image files. The media library can support a variety of audio and video encoding formats, such as: MPEG4, H.264, MP3, AAC, AMR, JPG, PNG, etc.

[0090] The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing.

[0091] A 2D graphics engine is a drawing engine for 2D drawings.

[0092] The kernel layer is the layer between hardware and software. The kernel layer includes at least display driver, camera driver, audio driver, and sensor driver.

[0093] For ease of understanding, the following examples of this application will be described with Figure 1 and Figure 2 Taking the terminal device with the structure shown as an example, the pixel driving circuit control method provided in the embodiment of the present application is specifically explained in combination with the accompanying drawings and application scenarios.

[0094] As people's requirements for screen display effects become increasingly higher, the functions of the pixel driving circuits in the screen are becoming more and more abundant to meet people's requirements for display effects. In terminal devices, screens with LTPO (Low-Temperature Polycrystalline Oxide) technology are widely used. Figure 3 The circuit structure of an 8T1C driving circuit using LTPO technology is shown.

[0095] Figure 3 The 8T1C driver circuit shown can compensate and reset pixels, thereby improving the display quality. However, in low refresh rate scenarios, if the screen interface switches from a black and white screen to another dark screen, a residual image of the white screen from the previous screen will appear in the dark screen after switching, affecting the user's viewing experience.

[0096] Figure 4 In Figure a, the screen of the terminal device displays a clock interface with a white dial and a black background. Figure 4 In the interface shown in Figure a, if a notification message of a chat application pops up on the interface, the user clicks the notification message to enter the chat interface, which is in dark mode, for example Figure 4 As shown in Figure b. Or the user is Figure 4 In the interface shown in Figure a, bring up the sidebar and select the chat application from the sidebar. At this time, the screen switches to the dark chat interface. In the dark mode chat interface, the afterimage of the white dial will gradually appear. If the screen is always in a low refresh rate frame such as displaying the chat interface, the white dial area will become brighter and brighter, and the black background area will become darker and darker, making the afterimage of the white dial more and more obvious. For example Figure 4 As shown in Figure c.

[0097] The reason for its appearance Figure 4 The phenomenon in Figure c is caused by the fact that in a low refresh rate scenario, when the screen is in a clock interface with a white dial and a black background:

[0098] In the pixel writing stage, Vth = Vg-Vs, for example, when Vg is 1V and Vs is 3V, Vth is -2V. For the pixels in the white dial area, the drive thin film transistor (DTFT) in the drive circuit (i.e. Figure 3 In T1) during the light-emitting phase, Vs is 4.6 V, so Vg-Vs=1-4.6=-3.6 V. At this time, Vth is smaller than the original Vth, resulting in a negative Vth bias.

[0099] For the pixel in the black background area, when the DTFT in the driving circuit is in the light-emitting stage, Vg is 7V and Vs is 4.6V, so Vg-Vs=7-4.6=2.4V. At this time, Vth is greater than the original Vth, resulting in a positive Vth state.

[0100] When the screen switches from a clock interface with a white dial and a black background to a dark chat interface, the refresh rate of the DDIC returns from the hold frame to the refresh frame due to the change in the screen interface. Afterwards, the DDIC gradually switches from the refresh frame to the hold frame again. The period of this switching process is called the dimming interval. In the dimming interval, the refresh rate is a self-frequency reduction process. Taking a refresh rate of 120Hz and a hold frame of 1Hz as an example, when entering the dimming interval, the DDIC controls the refresh to first reduce to 30Hz, and then gradually reduce the refresh rate to 15Hz, 10Hz, and finally to a hold frame of 1Hz. It should be noted that the refresh rate of the screen is controlled by the DDIC, which sends images to the screen according to the refresh rate, that is, writes the corresponding voltage to the pixel driver circuit according to the refresh rate.

[0101] In the dimming range, the DTFT is in a continuous high-frequency reset compensation stage. That is, the data voltage (Vg) of the driving circuit will change with the changes in the DTFT characteristics, so that the DTFT characteristics in the driving circuits of all pixels will tend to be restored to the same value, and Vg will also remain continuously written.

[0102] However, when the dimming interval ends and just after entering the hold frame, the Data voltage of the DTFT in the driving circuit will no longer write a new Vg voltage value. At this time, Vg will maintain the last written Vg. At this time, T7 and T8 in the driving circuit are still using 360Hz to perform high-frequency reset compensation on the DTFT. At this time, the DTFT characteristics are continuing to recover. When entering the hold frame, the characteristics of the DTFT in the driving circuits of the white pixels (pixels in the white dial area) and the black pixels (pixels in the black background area) have not yet recovered to a consistent state.

[0103] For details, please refer to Figure 5The brightness curves for pixels of different colors shown in the figure show that for the original white pixel, the Vth is initially negatively biased. During the first transition frame, the Vg written by the DDIC is too low. However, when the dimming interval ends, the data voltage of the DTFT in the driver circuit no longer writes a new Vg voltage value. While the DTFT characteristics continue to recover from the negative bias, the Vth becomes relatively positively biased, and the brightness of the white pixel increases, as shown by the dashed line corresponding to the white pixel.

[0104] For the original black pixel, Vth is in a positive bias state. During the first transition frame, the Vg written by the DDIC is too high. However, when the dimming interval ends, the DTFT data voltage in the driver circuit no longer writes the new Vg voltage value. While the DTFT characteristics continue to recover from the positive bias state, Vth becomes relatively negative, and the brightness of the black pixel decreases, as shown by the dotted line corresponding to the black pixel.

[0105] exist Figure 5 In the driving circuits of the white pixels and the black pixels, the characteristics of the DTFT have not yet returned to a consistent state, which is reflected in the fact that at the end of the Dimming interval, the dotted line corresponding to the white pixel and the dotted line corresponding to the black pixel do not intersect.

[0106] Therefore, the afterimage of the white dial will gradually appear in the dark chat interface. If the frame rate is kept at 0.1Hz, then within ten seconds of entering the dark chat interface, the afterimage of the white dial will become more and more obvious, affecting the user experience. Figure 5 As shown, when the screen displays a hold frame, the brightness difference between the original black pixel and the original white pixel is ⊿L1, which is greater than the brightness difference that the naked eye can tolerate. The human eye can clearly perceive the brightness difference between the white dial area and the black background area.

[0107] An embodiment of the present application provides a driving circuit control method, which, by resetting a transition frame with a longer playback duration, allows the DTFT characteristics of the driving circuit to be restored to a greater extent during the playback of the transition frame, thereby restoring the DTFT characteristics in the driving circuit of the black pixel or white pixel to a closer state, thereby avoiding the appearance of a residual image of the previous white screen in the dark interface when the screen switches from a black and white screen to a dark interface, thereby improving the display effect and thus improving the user experience.

[0108] The drive circuit control method provided in this application can be used for the above-mentioned 8T1C drive circuit, as well as for 7T1C or other drive circuits, and the embodiments of this application are not limited thereto. The method can also be used in screens that include 8T1C or 7T1C drive circuits.

[0109] Specifically, the user can debug the refresh rate of the transition frame and the number of frames at different refresh rates in advance to determine the final refresh rate and number of frames of the transition frame. The debugging process includes:

[0110] First, the user operates to set the screen to display an image with white areas and black areas, and maintains it for a certain period of time to simulate an image with white areas and black areas at a low refresh rate.

[0111] Optionally, in an image with white and black areas, the white area can be the area of pixels with the maximum brightness supported by the screen, which is 800 nits. Using an image with a white area of maximum brightness can cover the brightness of all white areas, ensuring that the debugged transition frame is applicable to all white area scenes, greatly reducing the probability of white area ghosting.

[0112] Optionally, in an image with white and black areas (referred to as a black / white image), the white area may also be the area of pixels with the highest brightness in a regular scene. A regular scene may be a scene with a relatively high probability of being used by a user. Optionally, the grayscale of the white area in a regular scene may be L1, and the grayscale of the black area may be L5. This can reduce the number of transition frames to a certain extent, thereby reducing power consumption. Here, an image of a clock interface with a white dial and a black background can be set as the desktop and kept displayed for more than 10 seconds.

[0113] Then, the user operates to set the screen to switch from a black / white image to display a dark image.

[0114] Optionally, the dark image can be displayed by opening a dark image from the image gallery on the desktop. Alternatively, the dark image can be completely black. Using a completely black image can cover the brightness of all dark images, ensuring that the debugged transition frame is applicable to all dark image scenarios and significantly reducing the probability of white area ghosting.

[0115] Alternatively, the dark image can be the image with the lowest brightness in a normal scene. Alternatively, the dark image can be a dark image with a grayscale of L17. A normal scene can be a scene with a high probability of user use. This can reduce the number of transition frames to a certain extent, thereby reducing power consumption. For example, the dark image can be a screenshot of a chat application interface in dark mode.

[0116] Optionally, the dark image can be displayed by the user directly opening the chat application in dark mode from the desktop to display the interface of the chat application, or the user calling out the sidebar on the desktop to open the interface of the chat application in dark mode.

[0117] At this time, users will find that white areas gradually appear in the dark image interface, for example Figure 4 As shown in Figure c in the figure, during this process, the DDIC first plays a transition frame when switching from a black / white image to a dark image. For example, the refresh rate and frame number of the transition frames here are: 30Hz-15 frames, 15Hz-15 frames. Afterwards, the DDIC enters the hold frame. That is, when the interface switches, the DDIC first enters the dimming interval. In this interval, the DDIC controls the screen to display 15 frames at a 30Hz refresh rate, then 15 frames at a 10Hz refresh rate, and finally the hold frame refresh rate. In the case of transition frames at 30Hz, 15 frames (denoted as 30Hz(15 frames)) and 10Hz, 15 frames (denoted as 10Hz(15 frames)), the transition frame playback duration is (1%30)*15+(1%10)*15, which is approximately 2 seconds.

[0118] Taking the DTFT recovery time of 2.5 seconds as an example, the playback time of the 2-second transition frame is less than the 2.5-second DTFT recovery time. After the screen finishes playing the transition frame, the DTFT characteristics have not yet fully recovered, and the user will observe a white area afterimage emerging in the dark image.

[0119] At this time, the user can increase the playback time of the transition frame and re-execute the above operation of switching from the black / white image to the dark image, and then observe again whether the afterimage of the white area emerges in the dark image.

[0120] The user may increase the playback duration of the transition frame by increasing the type and number of frames of the refresh rate of the transition frame.

[0121] For example, the user can change the transition frame from: 30Hz (15 frames) - 10Hz (15 frames) to 30Hz (15 frames) - 10Hz (15 frames) - 1Hz (8 frames), that is, a transition frame with a refresh rate of 1Hz is added, and a total of 8 frames are displayed at a refresh rate of 1Hz. Based on the modified transition frame, when the user re-executes the above operation of switching from a black / white image to a dark image, the DDIC first enters the dimming interval when the interface switches. In the dimming interval, it first controls the screen to display 15 frames at a refresh rate of 30Hz, then displays 15 frames at a refresh rate of 10Hz, then displays 8 frames at a refresh rate of 11Hz, and finally displays at the refresh rate of the maintained frame. In the case of a transition frame of 30Hz (15 frames) - 10Hz (15 frames) modified to 30Hz (15 frames) - 10Hz (15 frames) - 1Hz (8 frames), the playback duration of the transition frame is (1% 30) * 15 + (1% 10) * 15 + (1% 1) * 8, which is 10 seconds.

[0122] For example, if the DTFT recovery time is 2.5 seconds, then the 10-second transition frame playback duration is much longer than the DTFT recovery time. After the screen finishes playing the transition frame, the DTFT characteristics have fully recovered. Even when the refresh rate is maintained, users will not see white areas appearing in dark images.

[0123] Optionally, the playback duration of the transition frame can be increased by adding multiple transition frame gears. For example, 30Hz (15 frames) - 10Hz (15 frames) is modified to 60Hz (15 frames) - 30Hz (15 frames) - 10Hz (15 frames) - 5Hz (5 frames). The corresponding playback duration of the transition frame becomes 3.25 seconds. The playback duration of 3.25 seconds is also greater than the recovery duration of 2.5 seconds. Based on the transition frame 60Hz (15 frames) - 30Hz (15 frames) - 10Hz (15 frames) - 5Hz (5 frames), the user will not observe the afterimage of the white area emerging from the dark image.

[0124] Optionally, if the playback duration of the transition frame is greater than or equal to the DTFT characteristic recovery duration, the user will not observe the afterimage of the white area emerging from the dark image. However, due to the limited brightness resolution of the human eye, when the DDIC enters the hold frame, if the DTFT characteristic recovers to a certain degree, although there is still a brightness difference between the original white area and the original black area in the dark image, the user can no longer observe the brightness difference with the naked eye, and thus the afterimage of the white image will not be seen, and the user's viewing experience will not be affected. Based on this, the playback duration of the transition frame can be set to be less than the DTFT characteristic recovery duration, and the difference between the DTFT characteristic recovery duration and the playback duration of the transition frame is less than a preset duration threshold. Optionally, the preset duration threshold can be a shorter duration such as 0.2s or 0.3s. For example, if 30Hz (15 frames) - 10Hz (15 frames) is changed to 60Hz (15 frames) - 30Hz (15 frames) - 10Hz (15 frames), the corresponding playback duration of the transition frame becomes 2.25 seconds. The playback time of 2.25 seconds is less than the recovery time of 2.5 seconds, and the difference between 2.5 seconds and 2.25 seconds is 0.25 seconds. When the preset duration threshold is 0.3, the difference between the recovery time and the playback time is less than 0.3 seconds. Based on the transition frame of 60Hz (15 frames) - 30Hz (15 frames) - 10Hz (15 frames) - 5Hz (5 frames), users will not see white areas appearing in dark images when switching interfaces. The total playback time of the transition frames is shortened, which can reduce power consumption.

[0125] Optionally, when the difference between the DTFT characteristic recovery duration and the transition frame playback duration is less than a preset duration threshold, in a dark image at grayscale L17, the luminance Lw of the original white area and the luminance Lb of the original black area satisfy the following relationship: (Lw - Lb) / Lb is less than or equal to a preset luminance difference. Optionally, the preset luminance difference can be a smaller value such as 2%, 3%, or 1%. The luminance relationship in which (Lw - Lb) / Lb is less than or equal to the preset luminance difference ensures that the user does not observe afterimages of white areas in dark images.

[0126] The above implementation ensures that the playback duration of the transition frame does not exceed the DTFT recovery duration, which would otherwise cause white screen afterimages. Furthermore, compared to a method where the playback duration of the transition frame is greater than or equal to the DTFT recovery duration, setting the playback duration of the transition frame to be less than the DTFT recovery duration, and ensuring that the difference between the DTFT recovery duration and the playback duration of the transition frame is less than a preset duration threshold, effectively reduces the number of transition frames, thereby reducing power consumption, while ensuring that users do not observe white screen afterimages.

[0127] Optionally, in the above-mentioned setting process of the transition frame, the first frame of the transition frame is taken as 30Hz as an example. However, in actual application, when the black / white screen switches to a dark interface, the DDIC can enter the self-reduction state in the low refresh rate scenario (that is, after entering the low refresh rate scene, the DDIC automatically starts from the starting refresh rate and gradually reduces the refresh rate to enter the state of maintaining the frame). In this state, the DDIC can automatically reduce the refresh rate step by step without being subject to the upper-level control. Moreover, the DDIC is in the self-reduction state in the low refresh rate scenario, and can be compatible with a variety of higher refresh rate scenarios in the upper layer, that is, no matter what the refresh rate is, when the DDIC enters the self-reduction state in the low refresh rate scenario, it can adaptively switch to the starting refresh rate, thereby quickly transitioning to maintaining the frame, saving power consumption.

[0128] After the user has debugged the transition frame, the debugged result can be written into DDIC. DDIC can then play the transition frame according to the debugged result when the black / white screen switches to the dark interface.

[0129] During the playback of the transition frame, that is, in the dimming interval, the DDIC controls the playback of the transition frame, and the characteristics of the DTFT gradually recover. If the playback duration of the transition frame is greater than or equal to the characteristic recovery duration of the DTFT, then after the DTFT characteristics are restored and then enter the hold frame, there will be no brightness difference due to the difference in the DTFT characteristics of the driving circuit of the black pixel or the white pixel. Therefore, when switching from an interface with a white screen to a dark interface at a low refresh rate, there will be no afterimage of the white screen. If the playback duration of the transition frame is less than the characteristic recovery duration of the DTFT, then the difference between the duration of maintaining the characteristic recovery of the DTFT and the playback duration of the transition frame is less than the preset duration threshold. Then even if the characteristics of the DTFT are not completely restored to a consistent state when entering the hold frame, the brightness difference between the original white pixel and the original black pixel is relatively small, and the difference cannot be observed by the naked eye, and the user cannot see the afterimage of the white screen, so it will not affect the user experience.

[0130] Figure 6 Figure a shows the brightness curves of white and black pixels while maintaining a 1Hz frame rate. As can be seen, at the end of the dimming interval, the brightness of the original white pixels increases, while the brightness of the original black pixels decreases. The difference between the two brightnesses is ⊿L2. Optionally, ⊿L2 ≦ (Lw - Lb) / Lb.

[0131] When the frame rate is kept at 0.1 Hz, the brightness curve diagram of white pixels and black pixels can be seen as follows: Figure 6 As shown in Figure b of the figure, it can be seen that at the end of the dimming interval, the brightness of the original white pixel increases, while the brightness of the original black pixel decreases. The brightness difference between the two is ⊿L3. Optionally, ⊿L3 ≦ (Lw - Lb) / Lb.

[0132] Compare the brightness curves of the frames of 0.1Hz and 1Hz in the same figure, as shown in the figure below. Figure 7 shown.

[0133] It should be noted that when the holding frame is 1Hz, the DTFT Data voltage Vg is reset every 1 second, while when the holding frame is 0.1Hz, the DTFT Data voltage Vg is reset every 10 seconds. Therefore, for the DTFT, the required transition frame playback duration is longer than that of the 1Hz case. Therefore, for holding frames with a high refresh rate, the playback duration of the transition frame can be shorter than that of holding frames with a low refresh rate. Correspondingly, compared with holding frames with a high refresh rate, the playback duration of the transition frame for holding frames with a low refresh rate is longer, resulting in greater power consumption.

[0134] Optionally, if the characteristic recovery time of the DTFT is 2s, when the holding frame is 1Hz, the transition frame can be 30Hz (15 frames) -10Hz (15 frames), and then enter the holding frame 1Hz; optionally, when the holding frame is 0.1Hz, the transition frame can be 30Hz (15 frames) -10Hz (15 frames) -1Hz (8 frames), and then enter the holding frame 0.1Hz. Optionally, when the holding frame is other refresh rates, the transition frame can be adjusted following the holding frame, as long as the playback time of the holding frame is greater than or equal to the characteristic recovery time of the DTFT, or the playback time of the holding frame is less than the characteristic recovery time of the DTFT to ensure that the brightness difference between black pixels and white pixels is within the range acceptable to the human eye.

[0135] Figure 8 FIG. 4 is a schematic diagram showing the current peak value during the process of DDIC going from a refresh frame to a transition frame and then into a hold frame. Figure 8 The vertical axis is current, and the horizontal axis is time. It can be seen that when the DDIC writes the voltage to the pixel each time at the frame rate, a current peak appears. The higher the frame rate, the greater the power consumption.

[0136] Based on this, an embodiment of the present application further provides a driving circuit control method based on DDIC, which reduces the power consumption in the dimming interval by dynamically adjusting the Vrefp voltage of the driving circuit and reducing the number of transition frames.

[0137] Before the Vrefp voltage of the driving circuit is dynamically adjusted based on the DDIC, the reference voltage (Vrefp voltage) output by the DDIC to the driving circuit may be recorded as the first voltage.

[0138] In this embodiment, when the DDIC recognizes that it has entered a self-reduced state at a low refresh rate, it increases the Vrefp voltage output to the driver circuit. The increased Vrefp voltage is recorded as a second voltage. The second voltage is greater than the first voltage. When the Vrefp voltage increases, the voltage difference between Vg and Vs of the DTFT increases. Therefore, for the DTFT, whether in a positive or negative bias state, the increased Vrefp voltage will cause positive bias stress to occur in the DTFT. Therefore, for the entire screen, whether it is a white pixel or a black pixel, the DTFT in the driver circuit will recover its characteristics in the positive bias direction, which is more conducive to eliminating the brightness difference caused by the black / white image. Therefore, the speed of the DTFT's characteristic recovery is accelerated, and the characteristic recovery time can be shortened. Accordingly, even if the playback time of the transition frame is shortened, the residual image of the white screen can be avoided.

[0139] Optionally, when the second voltage increases by 0.1V compared to the first voltage, the transition frame can be reduced by one frame. For example, the transition frame can be modified from 30Hz (15 frames) - 10Hz (15 frames) - 1Hz (8 frames) to 30Hz (15 frames) - 10Hz (15 frames) - 1Hz (7 frames), that is, the number of frames is reduced by 1 frame of 1Hz. When the second voltage increases by 0.2V compared to the first voltage, the transition frame can be reduced by two frames. For example, the transition frame can be modified from 30Hz (15 frames) - 10Hz (15 frames) - 1Hz (8 frames) to 30Hz (15 frames) - 10Hz (15 frames) - 1Hz (6 frames), that is, the number of frames is reduced by 2 frames of 1Hz.

[0140] Figure 9 Figure 2 shows a schematic diagram comparing the brightness curves of white and black pixels after increasing the Vrefp voltage. It can be seen that after increasing the Vrefp voltage, the brightness difference between white and black pixels at the end of the dimming interval is smaller than when the Vrefp voltage is not increased. Furthermore, increasing the Vrefp voltage shortens the time it takes for the DTFT characteristics in the driver circuits of white and black pixels to return to a consistent state.

[0141] It can be understood that the amount by which the number of transition frames is reduced is proportional to or positively correlated with the degree to which the second voltage is increased. It can be understood that, that is, the number of transition frames is negatively correlated with the voltage value of the second voltage.

[0142] It should be noted that the maximum value of the Vrefp voltage does not exceed ELVDD. Optionally, the maximum value of the Vrefp voltage does not exceed 7.9V.

[0143] Figure 10 1 is a flow chart of a driving circuit control method provided in an embodiment of the present application. The method is used to control a driving circuit in a screen, wherein the driving circuit includes a driving transistor, and the method includes:

[0144] S1001 , sequentially outputting a first number of control signals of a frame rate to a driving circuit.

[0145] S1002 , after sequentially outputting control signals of a first number of frames to the driving circuit at the first frame rate, sequentially outputting control signals of a second number of frames to the driving circuit at a second frame rate, where the second frame rate is lower than the first frame rate.

[0146] S1003 , after sequentially outputting control signals of a second number of frames to the driving circuit at the second frame rate, sequentially outputting control signals of a first other number of frames to the driving circuit at a first other frame rate, where the first other frame rate is lower than the second frame rate.

[0147] The product of the reciprocal of the first frame rate and the first frame number is a first product, the product of the reciprocal of the second frame rate and the second frame number is a second product, the product of the reciprocal of the first other frame rate and the first other frame number is a first other product, and the sum of the first product, the second product, and the first other product is a first sum value. The difference between the characteristic recovery time of the driving transistor and the first sum value is less than or equal to a preset time threshold, and the preset time threshold is a positive number.

[0148] The control signal output by the DDIC to the driving circuit may be a control voltage. The control voltage output by the DDIC to the driving circuit at a certain frame rate is used to control the display state of the pixel driven by the driving circuit.

[0149] The first other frame rate may include one subframe rate or multiple subframe rates. The first other frame number may include one subframe number or multiple subframe numbers. The first other product may include one subproduct or multiple subproducts. When the first other frame rate is a subframe rate, the first other frame number is one subframe number, and the first other product includes one subproduct.

[0150] When the first other frame rate includes multiple sub-frame rates, the first other frame number includes multiple sub-frame numbers, and the first other product includes multiple sub-products. The first other frame rate is lower than the second frame rate. The first sum value can be the sum of the first product, the second product, and the multiple sub-products.

[0151] Regardless of whether the first other frame rate includes a single frame rate or multiple sub-frame rates, the difference between the characteristic recovery time of the driving transistor and the first sum value is less than or equal to the preset time threshold. It will be understood that the total playback time from the time the DDIC begins outputting the control signal for the first frame number until the time it outputs the control signal for the first other frame number is the first sum value. Optionally, the number of the multiple sub-frame rates can be one, two, three, or four, and they can be different from each other.

[0152] When the DDIC detects a low refresh rate and enters a self-reduction state (or self-reduction scenario), it refreshes the voltage of the driving circuit according to the transition frame. The transition frame includes multiple gradually decreasing frame rates (also called refresh rates), each frame rate can be regarded as a gear, and each frame rate corresponds to a frame number. When the DDIC outputs a control signal to the driving circuit according to a frame rate, the output frame number is the frame number corresponding to the frame rate. The DDIC performs frame reduction (or frequency reduction) in sequence according to the multiple gradually decreasing frame rates in the transition frame, and then enters a low refresh rate maintenance frame scenario.

[0153] It takes a certain amount of time for the characteristics of the driving transistor to recover when the voltage difference changes. This time is related to the physical characteristics of the driving transistor and may also be referred to as a characteristic recovery time.

[0154] Because the preset duration threshold is a positive number, if the difference between the driver transistor's characteristic recovery duration and the first sum is less than or equal to 0, it must be less than the preset duration threshold. In this case, the characteristic recovery duration is less than or equal to the playback duration. After the DDIC plays the transition frame, the driver transistor's characteristics have recovered, and the user will not observe white afterimages in dark images.

[0155] If the difference between the characteristic recovery time and the first sum is greater than 0, the characteristics of the driving transistor have not fully recovered, but because the difference between the characteristic recovery time and the first sum is less than the preset time threshold, it indicates that the characteristics of the driving transistor have recovered to a certain extent. Due to the limited brightness resolution of the human eye, although there is still a brightness difference between the original white area and the original black area in the dark image, the user cannot observe the brightness difference with the naked eye, and the afterimage of the white screen will not be seen, and the user's viewing experience will not be affected.

[0156] In some embodiments, the first sum value is greater than or equal to the characteristic recovery time length.

[0157] Because the preset duration threshold is a positive number, if the difference between the driver transistor's characteristic recovery duration and the first sum is less than or equal to 0, it must be less than the preset duration threshold. In this case, the characteristic recovery duration is less than or equal to the playback duration. After the DDIC plays the transition frame, the driver transistor's characteristics have recovered, and the user will not see white afterimages appearing in dark images, thus improving the user's viewing experience.

[0158] In some embodiments, the first sum is less than the characteristic recovery time, and the difference between the characteristic recovery time and the first sum is less than or equal to a preset time threshold.

[0159] The first sum is less than the characteristic recovery time, that is, the difference between the characteristic recovery time and the first sum is greater than 0. The difference between the characteristic recovery time and the first sum is greater than 0, indicating that after the transition frame is played, the characteristics of the driving transistor have not been fully restored. However, since the difference between the characteristic recovery time and the first sum is less than the preset time threshold, it means that the characteristics of the driving transistor have been restored to a certain extent. Since the human eye has limited ability to resolve brightness, although there is still a brightness difference between the original white area and the original black area in the dark image, the user can no longer observe the brightness difference with the naked eye, and the afterimage of the white screen cannot be seen, and it will not affect the user's viewing experience.

[0160] In some embodiments, the first other frame rate includes at least one sub-frame rate, the first other frame number includes at least one sub-frame number, the first other product includes at least one sub-product, at least one sub-product, at least one sub-frame rate and at least one sub-frame number correspond one to one, each of the at least one sub-frame rate is less than the second frame rate, and the control signal of the first other frame number is output to the driving circuit in sequence according to the first other frame rate, including: outputting the control signal of the first sub-frame number to the driving circuit in sequence according to the first sub-frame rate, the first sub-frame rate is any one of the at least one sub-frame rates, the first sub-frame number is the sub-frame number of the at least one sub-frame number corresponding to the first sub-frame rate, the product of the reciprocal of the first sub-frame rate and the first frame number is the first sub-product, and the first sub-product is the sub-product of the at least one sub-product corresponding to the first sub-frame number and the first sub-frame rate.

[0161] In some embodiments, the number of at least one subframe rate is at least two, and at least one subframe rate also includes a second subframe rate, which is less than the first subframe rate. After the control signal of the first subframe number is output to the driving circuit in sequence according to the first subframe rate, it also includes: outputting the control signal of the second subframe number to the driving circuit in sequence according to the second subframe rate, and the second subframe number is the subframe number corresponding to the second subframe rate in the at least one subframe number.

[0162] The first other frame rate may include one subframe rate or multiple subframe rates. The first other frame number may include one subframe number or multiple subframe numbers. The first other product may include one subproduct or multiple subproducts. When the first other frame rate is a subframe rate, the first other frame number is one subframe number, and the first other product includes one subproduct.

[0163] When the first other frame rate includes multiple sub-frame rates, the first other frame number includes multiple sub-frame numbers, and the first other product includes multiple sub-products. The first other frame rate is lower than the second frame rate. The first sum value can be the sum of the first product, the second product, and the multiple sub-products.

[0164] Regardless of whether the first other frame rate includes a single frame rate or multiple sub-frame rates, the difference between the characteristic recovery time of the driving transistor and the first sum value is less than or equal to the preset time threshold. It is understood that the total playback time from the time the DDIC starts outputting the control signal for the first frame number until the time it outputs the control signal for the first other frame number is the first sum value. Optionally, the number of the multiple sub-frame rates can be one, two, three, or four, and the multiple sub-frame rates can be different from each other. The number of frames corresponding to each sub-frame rate can be the same or different.

[0165] When the first other frame rate includes multiple sub-frame rates, the DDIC outputs control signals corresponding to the number of frames in order from largest to smallest according to the frame rates of the multiple sub-frame rates.

[0166] The specific size and type of the frame rate at which the DDIC operates can be flexibly determined based on specific needs and is not limited.

[0167] In some embodiments, before outputting a control signal of a first number of frames to the driving circuit in sequence according to a first frame rate, the method includes: controlling the screen to display a first image, the first image including a light pixel area and a dark pixel area; after outputting a control signal of a first other number of frames to the driving circuit in sequence according to a first other frame rate, controlling the screen to display a second image, the second image being a dark image; in the second image, the difference between a first brightness corresponding to the light pixel area and a second brightness corresponding to the dark pixel area meets a preset brightness difference requirement.

[0168] Optionally, the light pixel area can be an area of a white screen, and the dark pixel area can be an area of a black screen. The dark image can be a black image, or the darkest color image can be used in most cases.

[0169] When the DDIC outputs control signals in this manner, when displaying a dark image, the brightness of the previously light-colored pixel area is set to the first brightness, while the brightness of the previously dark image is set to the second brightness. When the difference between the first brightness and the second brightness meets the preset brightness difference requirement, the user cannot detect the brightness difference, and thus no white image afterimage is observed.

[0170] In some embodiments, a ratio of a difference between the first brightness and the second brightness to the second brightness is less than a brightness difference threshold.

[0171] The preset brightness difference requirement can be the difference between the first brightness and the second brightness, with the ratio of the difference to the second brightness being less than a brightness difference threshold. Alternatively, the brightness difference threshold can be 2%, 3%, or another smaller value. The smaller the brightness difference threshold, the less likely the user will notice white screen afterimages. The larger the brightness difference threshold, the shorter the duration that the DDIC enters the hold frame, which can save power.

[0172] In some embodiments, the grayscale of the light pixel area of the first image is L1, the grayscale of the dark pixel area of the first image is L5, and the grayscale of the second image is L17.

[0173] When using this grayscale, users will not notice any afterimages on the white screen. Then, users will not notice any afterimages on the white screen at other daily grayscales.

[0174] In some embodiments, the reference voltage of the driving circuit is a first voltage, and the method further includes: when a self-frequency reduction scenario is detected, controlling the reference voltage of the driving circuit to be a second voltage, and sequentially outputting a control signal of a third frame number to the driving circuit according to the first frame rate, wherein the second voltage is greater than the first voltage; after sequentially outputting the control signal of the third frame number to the driving circuit according to the first frame rate, sequentially outputting a control signal of a fourth frame number to the driving circuit according to the second frame rate; after sequentially outputting the control signal of the fourth frame number to the driving circuit according to the second frame rate, sequentially outputting the control signal of the second frame number to the driving circuit according to the second other frame rate. A control signal for a second other frame number is output, the second other frame rate is less than the second frame rate; the product of the reciprocal of the first frame rate and the third frame number is the third product, the product of the reciprocal of the second frame rate and the fourth frame number is the fourth product, the product of the reciprocal of the second other frame rate and the second other frame number is the second other product, and the sum of the third product, the fourth product and the second other product is the second sum value; the third frame number is less than the first frame number, and / or the fourth frame number is less than the second frame number, and / or the second other frame number is less than the first other frame number, and the difference between the characteristic recovery time and the second sum value is less than or equal to the preset time threshold.

[0175] By increasing the reference voltage of the control drive circuit, the DDIC will cause forward bias stress on the drive transistor for both white and black pixels. The DTFT in the drive circuit will recover its characteristics in the forward bias direction, which is more conducive to eliminating the brightness difference caused by black / white images. As a result, the speed of the drive transistor's characteristic recovery is accelerated, which can shorten the characteristic recovery time. Correspondingly, even if the playback time of the transition frame is shortened, the afterimage of the white screen can be avoided.

[0176] DDIC can reduce the number of frames of one frame rate, or can reduce the number of frames of multiple frame rates, thereby shortening the playback time of transition frames. This embodiment of the present application does not limit this.

[0177] DDIC can reduce power consumption while ensuring that white screen afterimages do not occur by increasing the reference voltage of the control drive circuit and reducing the number of transition frames.

[0178] The above describes in detail an example of the method provided by the present application. It is understandable that, in order to implement the above functions, the corresponding device includes a hardware structure and / or software module corresponding to the execution of each function. Those skilled in the art should easily realize that, in combination with the units and algorithm steps of each example described in the embodiments disclosed herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in a hardware or computer software driven hardware manner depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0179] The present application can divide the functional modules of the drive circuit control device according to the above method example. For example, each function can be divided into each functional module, or two or more functions can be integrated into one module. The above integrated modules can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of modules in this application is schematic and is only a logical function division. In actual implementation, there may be other division methods.

[0180] Figure 11 1 shows a schematic diagram of the structure of a drive circuit control device provided by the present application. The device 1100 includes:

[0181] The first processing module 1101 is configured to sequentially output a first number of control signals to the driving circuit according to a first frame rate.

[0182] The second processing module 1102 is configured to output a first number of control signals to the driving circuit in sequence according to the first frame rate, and then output a second number of control signals to the driving circuit in sequence according to the second frame rate, where the second frame rate is lower than the first frame rate.

[0183] The third processing module 1103 is used to output control signals of a first other frame number to the driving circuit in sequence according to a first other frame rate after outputting control signals of a second frame number to the driving circuit in sequence according to the second frame rate, wherein the first other frame rate is less than the second frame rate; the product of the reciprocal of the first frame rate and the first frame number is a first product, the product of the reciprocal of the second frame rate and the second frame number is a second product, the product of the reciprocal of the first other frame rate and the first other frame number is a first other product, and the sum of the first product, the second product and the first other product is a first sum value; the difference between the characteristic recovery time of the driving transistor and the first sum value is less than or equal to a preset time threshold, and the preset time threshold is a positive number.

[0184] In some embodiments, the first sum value is greater than or equal to the characteristic recovery time length.

[0185] In some embodiments, the first sum is less than the characteristic recovery time, and the difference between the characteristic recovery time and the first sum is less than or equal to a preset time threshold.

[0186] In some embodiments, the first other frame rate includes at least one sub-frame rate, the first other frame number includes at least one sub-frame number, the first other product includes at least one sub-product, at least one sub-product, at least one sub-frame rate and at least one sub-frame number correspond one to one, each of the at least one sub-frame rate is less than the second frame rate, and the third processing module 1103 is specifically used to output the control signal of the first sub-frame number to the driving circuit in sequence according to the first sub-frame rate, the first sub-frame rate is any one of the at least one sub-frame rate, the first sub-frame number is the sub-frame number corresponding to the first sub-frame rate in the at least one sub-frame number, the product of the reciprocal of the first sub-frame rate and the first frame number is the first sub-product, and the first sub-product is the sub-product corresponding to the first sub-frame number and the first sub-frame rate in the at least one sub-product.

[0187] In some embodiments, the number of at least one subframe rate is at least two, and the at least one subframe rate also includes a second subframe rate, which is less than the first subframe rate. The third processing module 1103 is specifically used to output a control signal of the second subframe number to the driving circuit in sequence according to the second subframe rate. The second subframe number is the subframe number corresponding to the second subframe rate in the at least one subframe number.

[0188] In some embodiments, before sequentially outputting the control signals of the first number of frames to the driving circuit at the first frame rate, the first processing module 1101 is further configured to control the screen to display a first image, where the first image includes a light pixel area and a dark pixel area;

[0189] After outputting the control signal of the first other frame number to the driving circuit in sequence according to the first other frame rate, the third processing module 1103 is also used to control the screen to display a second image, which is a dark image; in the second image, the difference between the first brightness corresponding to the light pixel area and the second brightness corresponding to the dark pixel area meets the preset brightness difference requirement.

[0190] In some embodiments, a ratio of a difference between the first brightness and the second brightness to the second brightness is less than a brightness difference threshold.

[0191] In some embodiments, the grayscale of the light pixel area of the first image is L1, the grayscale of the dark pixel area of the first image is L5, and the grayscale of the second image is L17.

[0192] In some embodiments, the reference voltage of the driving circuit is a first voltage, and the first processing module 1101 is also used to control the reference voltage of the driving circuit to a second voltage when a self-reduction scenario is detected, and output a control signal of a third frame number to the driving circuit in sequence according to the first frame rate, and the second voltage is greater than the first voltage.

[0193] The second processing module 1102 is further configured to output control signals of a fourth number of frames to the driving circuit in sequence at the second frame rate after outputting control signals of a third number of frames to the driving circuit in sequence at the first frame rate.

[0194] The third processing module 1103 is also used to output control signals of a second other frame number to the driving circuit in sequence according to the second frame rate after outputting control signals of a fourth frame number to the driving circuit in sequence according to the second frame rate, and the second other frame rate is less than the second frame rate; the product of the reciprocal of the first frame rate and the third frame number is the third product, the product of the reciprocal of the second frame rate and the fourth frame number is the fourth product, the product of the reciprocal of the second other frame rate and the second other frame number is the second other product, and the sum of the third product, the fourth product and the second other product is the second sum value; the third frame number is less than the first frame number, and / or the fourth frame number is less than the second frame number, and / or the second other frame number is less than the first other frame number, and the difference between the characteristic recovery time and the second sum value is less than or equal to the preset time threshold.

[0195] The specific manner in which the device 1100 executes the driving circuit control method and the beneficial effects produced can be found in the relevant description of the method embodiment, which will not be repeated here.

[0196] The embodiment of the present application also provides an electronic device, including the above-mentioned processor. The electronic device provided by this embodiment can be Figure 1 The terminal device 100 shown is used to implement the above-mentioned drive circuit control method. When using an integrated unit, the terminal device may include a processing module, a storage module, and a communication module. The processing module can be used to control and manage the terminal device's operations. For example, it can be used to support the terminal device in executing the steps performed by the display unit, detection unit, and processing unit. The storage module can be used to support the terminal device in executing and storing program code and data. The communication module can be used to support communication between the terminal device and other devices.

[0197] The processing module may be a processor or a controller. It may implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the disclosure of this application. The processor may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a digital signal processor (DSP) and a microprocessor, and so on. The storage module may be a memory. The communication module may specifically be a device that interacts with other terminal devices, such as a radio frequency circuit, a Bluetooth chip, or a Wi-Fi chip.

[0198] In one embodiment, when the processing module is a processor and the storage module is a memory, the terminal device involved in this embodiment may be a Figure 1 Device with the structure shown.

[0199] Alternatively, the processor may be a DDIC.

[0200] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the processor executes the drive circuit control method described in any of the above embodiments.

[0201] The embodiment of the present application further provides a computer program product. When the computer program product is run on a computer, the computer is caused to execute the above-mentioned related steps to implement the driving circuit control method in the above-mentioned embodiment.

[0202] Among them, the electronic device, computer-readable storage medium, computer program product or chip provided in this embodiment are all used to execute the corresponding methods provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding methods provided above, and will not be repeated here.

[0203] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic, for example, the division of modules or units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, the replaced units may or may not be physically separated, and the components displayed as units may be one physical unit or multiple physical units, that is, they may be located in one place, or they may be distributed in multiple different places. Some or all of the units can be selected according to actual needs to achieve the purpose of the scheme of this embodiment.

[0204] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0205] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a device (which can be a single-chip microcomputer, chip, etc.) or a processor (processor) to execute all or part of the steps of the various embodiments of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0206] The above content is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A driving circuit control method, characterized in that: The driving circuit includes a driving transistor, including: sequentially outputting a first number of control signals of the frame rate to the driving circuit; After sequentially outputting the control signals of the first frame number to the driving circuit at the first frame rate, sequentially outputting the control signals of the second frame number to the driving circuit at a second frame rate, wherein the second frame rate is lower than the first frame rate; After sequentially outputting the control signal of the second frame number to the driving circuit at the second frame rate, sequentially outputting the control signal of a first other frame number to the driving circuit at a first other frame rate, where the first other frame rate is lower than the second frame rate; The product of the reciprocal of the first frame rate and the first number of frames is a first product, the product of the reciprocal of the second frame rate and the second number of frames is a second product, the product of the reciprocal of the first other frame rate and the first other number of frames is a first other product, and the sum of the first product, the second product, and the first other product is a first sum value; A difference between the characteristic recovery time of the driving transistor and the first sum is less than or equal to a preset time threshold, and the preset time threshold is a positive number.

2. The method according to claim 1, characterized in that The first sum value is greater than or equal to the characteristic recovery time.

3. The method according to claim 1, characterized in that The first sum is less than the characteristic recovery time, and the difference between the characteristic recovery time and the first sum is less than or equal to a preset time threshold.

4. The method according to any one of claims 1 to 3, characterized in that The first other frame rate includes at least one sub-frame rate, the first other frame number includes at least one sub-frame number, the first other product includes at least one sub-product, the at least one sub-product, the at least one sub-frame rate, and the at least one sub-frame number have a one-to-one correspondence, each of the at least one sub-frame rate is smaller than the second frame rate, and the control signal of the first other frame number is sequentially outputted to the driving circuit according to the first other frame rate, comprising: A control signal of a first subframe number is output to the driving circuit in sequence according to a first subframe rate, wherein the first subframe rate is any one of the at least one subframe rate, the first subframe number is the subframe number corresponding to the first subframe rate in the at least one subframe number, the product of the reciprocal of the first subframe rate and the first frame number is the first subproduct, and the first subproduct is the subproduct corresponding to the first subframe number and the first subframe rate in the at least one subproduct.

5. The method according to claim 4, characterized in that The number of the at least one subframe rate is at least two, the at least one subframe rate further includes a second subframe rate, the second subframe rate is smaller than the first subframe rate, and after the control signal of the first subframe number is sequentially output to the driving circuit according to the first subframe rate, the method further includes: Control signals for a second sub-frame number are sequentially output to the driving circuit according to the second sub-frame rate, where the second sub-frame number is a sub-frame number corresponding to the second sub-frame rate in the at least one sub-frame number.

6. The method according to any one of claims 1 to 5, characterized in that Before sequentially outputting a first number of control signals of a frame to the driving circuit according to the first frame rate, the method includes: Controlling a screen to display a first image, wherein the first image includes a light-colored pixel area and a dark-colored pixel area; After the control signals of the first other frame number are sequentially output to the driving circuit according to the first other frame rate, the screen is controlled to display a second image, where the second image is a dark image; In the second image, a difference between a first brightness corresponding to the light-colored pixel region and a second brightness corresponding to the dark-colored pixel region meets a preset brightness difference requirement.

7. The method according to claim 6, characterized in that A ratio of a difference between the first brightness and the second brightness to the second brightness is smaller than a brightness difference threshold.

8. The method according to claim 6 or 7, characterized in that The grayscale of the light-colored pixel area of the first image is L1, the grayscale of the dark-colored pixel area of the first image is L5, and the grayscale of the second image is L17.

9. The method according to any one of claims 1 to 8, characterized in that The reference voltage of the driving circuit is a first voltage, and the method further includes: When a self-frequency reduction scenario is detected, controlling the reference voltage of the driving circuit to be a second voltage, and sequentially outputting control signals of a third number of frames to the driving circuit according to the first frame rate, wherein the second voltage is greater than the first voltage; After sequentially outputting the control signals of the third frame number to the driving circuit at the first frame rate, sequentially outputting the control signals of the fourth frame number to the driving circuit at the second frame rate; After sequentially outputting the control signal of the fourth frame number to the driving circuit at the second frame rate, sequentially outputting the control signal of a second other frame number to the driving circuit at a second other frame rate, where the second other frame rate is lower than the second frame rate; The product of the reciprocal of the first frame rate and the third frame number is a third product, the product of the reciprocal of the second frame rate and the fourth frame number is a fourth product, the product of the reciprocal of the second other frame rate and the second other frame number is a second other product, and the sum of the third product, the fourth product, and the second other product is a second sum value; The third frame number is smaller than the first frame number, and / or the fourth frame number is smaller than the second frame number, and / or the second other frame number is smaller than the first other frame number, and the difference between the characteristic recovery duration and the second sum value is smaller than or equal to the preset duration threshold.

10. An electronic device, characterized in that: The electronic device includes a screen, the screen includes a plurality of driving circuits, the driving circuits include DTFTs, and the electronic device includes: a processor, a memory, and an interface; The processor, the memory, and the interface cooperate with each other so that the electronic device executes the method according to any one of claims 1 to 9.

11. The electronic device according to claim 10, characterized in that The processor is a DDIC.

12. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the processor is caused to perform the method according to any one of claims 1 to 9.

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