Capacitive-coupled chopper instrumentation amplifier circuit and ripple calibration method

Abstract

The present invention discloses a capacitively coupled chopper instrumentation amplifier circuit and a ripple calibration method. The circuit includes: a first chopper switch, an input capacitor, a first resistor, a second resistor, a two-stage operational amplifier circuit, a feedback capacitor, a second chopper switch, and a ripple calibration module. The two-stage operational amplifier circuit includes a plurality of first transistors and a plurality of second transistors for signal amplification. The control end of the first transistor is connected to the first input end of the two-stage operational amplifier circuit, and the control end of the second transistor is connected to the second input end of the two-stage operational amplifier circuit. The ripple calibration module is connected to the first output end and the second output end of the two-stage operational amplifier circuit. The ripple calibration module samples the signals at the first output end and the second output end of the two-stage operational amplifier circuit and controls the number of first and second transistors connected based on the sampled signals to reduce the ripple generated by the chopper instrumentation amplifier circuit. This solves the problem of ripple generated by offset voltage in the capacitively coupled chopper instrumentation amplifier circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of chopper operational amplifiers, and in particular to a capacitive-coupled chopper instrument amplifier circuit and a ripple calibration method. Background Art

[0002] In many measurement scenarios, such as automotive applications and medical testing, the target signal is often very weak, perhaps only on the order of tens of microvolts, and superimposed on a much higher-amplitude DC common-mode signal, potentially reaching several volts. For traditional interface circuits that use resistors as feedback elements, processing such large common-mode signals while accurately measuring these tiny signals presents a significant technical challenge. To address these issues, capacitor-coupled chopper instrumentation amplifiers (CCIAs) have emerged. These instrumentation amplifiers use capacitors as feedback elements, leveraging their high voltage resistance and excellent matching to effectively address these issues. CCIAs are commonly used in magnetic sensing, biosignal detection, and various medical diagnostics. Their small size and low power consumption help reduce costs, minimize heat generation, and improve battery life.

[0003] However, traditional capacitive-coupled chopper instrumentation amplifiers (IAMPs) use capacitors as feedback elements, which can accurately amplify weak differential-mode signals at high common-mode voltages. However, due to the equivalent offset voltage at the op amp input in real-world situations, ripple will appear at the op amp output. Summary of the Invention

[0004] The present invention provides a capacitive coupling chopper instrument amplifier circuit and a ripple calibration method, so as to reduce the ripple generated by the capacitive coupling chopper instrument amplifier circuit.

[0005] According to one aspect of the present invention, there is provided a capacitive-coupled chopper instrumentation amplifier circuit, comprising: a first chopping switch, an input capacitor, a first resistor, a second resistor, a two-stage operational amplifier circuit, a feedback capacitor, a second chopping switch, and a ripple calibration module;

[0006] The first chopping switch receives an input signal, and the first chopping switch is connected to the first input terminal and the second input terminal of the two-stage operational amplifier circuit through the input capacitor;

[0007] A first end of the first resistor is connected to a first input end of the two-stage operational amplifier circuit, a second end of the first resistor is connected to a reference voltage signal, a first end of the second resistor is connected to a second input end of the two-stage operational amplifier circuit, and a second end of the second resistor is connected to a reference voltage signal;

[0008] The second chopping switch is connected to the first output terminal and the second output terminal of the two-stage operational amplifier circuit, and the second chopping switch is connected to the first input terminal and the second input terminal of the two-stage operational amplifier circuit through the feedback capacitor; the two-stage operational amplifier circuit includes a plurality of first transistors and a plurality of second transistors for signal amplification; the control terminal of the first transistor is connected to the first input terminal of the two-stage operational amplifier circuit, and the control terminal of the second transistor is connected to the second input terminal of the two-stage operational amplifier circuit; the input terminal of the ripple calibration module is connected to the first output terminal and the second output terminal of the two-stage operational amplifier circuit, and the output terminal of the ripple calibration module is connected to the input terminal of the two-stage operational amplifier circuit. The ripple calibration module is used to sample the signals at the first output terminal and the second output terminal of the two-stage operational amplifier circuit, and control the number of the first transistors and the second transistors connected according to the sampling signal to reduce the ripple generated by the chopping instrumentation amplifier circuit.

[0009] Optionally, the ripple calibration module includes a sampling unit and a logic processing unit;

[0010] A first input terminal of the sampling unit is connected to a first output terminal of the two-stage operational amplifier circuit, a second input terminal of the sampling unit is connected to a second output terminal of the two-stage operational amplifier circuit, an output terminal of the sampling unit is connected to an input terminal of the logic processing unit, and the sampling unit is used to sample a first voltage at the first output terminal and a second voltage at the second output terminal of the two-stage operational amplifier circuit;

[0011] The output end of the logic processing unit is connected to the input end of the two-stage operational amplifier circuit. The logic processing unit is used to determine the change trend of the ripple according to the magnitude relationship between the first voltage and the second voltage, and control the number of connections of the first transistor and the second transistor according to the change trend to reduce the generated ripple.

[0012] Optionally, the sampling unit includes an analog-to-digital converter, which is used to sample the first voltage at the first output end and the second voltage at the second output end of the two-stage operational amplifier circuit within a sampling period; wherein the chopping signal of the first chopping switch is a periodic clock signal, and the sampling frequency of the analog-to-digital converter is twice the chopping frequency of the first chopping switch.

[0013] Optionally, the logic processing unit includes a digital logic device, which is used to determine the ripple change trend according to the magnitude relationship between the first voltage and the second voltage in each sampling period, and control the number of connections of the first transistor and the second transistor according to the change trend to minimize the equivalent input offset voltage of the two-stage operational amplifier circuit.

[0014] Optionally, the two-stage operational amplifier circuit includes a bias current source, a first switching circuit, and a second switching circuit, the first switching circuit includes a plurality of first transistors, a third transistor, and a plurality of first switches, and the first transistors are arranged in a one-to-one correspondence with the first switches;

[0015] The gate of the third transistor is connected to the first input terminal of the two-stage operational amplifier circuit, the first electrode of the third transistor is connected to the output terminal of the bias current source, the second electrode of the third transistor is connected to the first internal node of the two-stage operational amplifier circuit, the gate of the first transistor is connected to the first input terminal of the two-stage operational amplifier circuit, the first electrode of the first transistor is connected to the output terminal of the bias current source, the second electrode of the first transistor is connected to the first terminal of the corresponding first switch, and the second terminal of the first switch is connected to the first internal node of the two-stage operational amplifier circuit;

[0016] The second switch circuit includes a plurality of second transistors and fourth transistors and a plurality of second switches, and the second transistors are arranged in a one-to-one correspondence with the second switches;

[0017] The gate of the fourth transistor is connected to the second input terminal of the two-stage operational amplifier circuit, the first electrode of the fourth transistor is connected to the output terminal of the bias current source, the second electrode of the fourth transistor is connected to the second internal node of the two-stage operational amplifier circuit, the gate of the second transistor is connected to the second input terminal of the two-stage operational amplifier circuit, the first electrode of the second transistor is connected to the bias current source, the second electrode of the second transistor is connected to the first terminal of the corresponding second switch, and the second terminal of the second switch is connected to the second internal node of the two-stage operational amplifier circuit; wherein the number of the third transistors and the number of the fourth transistors are equal.

[0018] Optionally, the capacitive-coupled chopper instrumentation amplifier circuit further includes a third switch and a fourth switch, wherein the first end of the third switch is connected to the input common-mode voltage, the second end of the third switch is connected to the first input end of the first chopper switch, the first end of the fourth switch is connected to the input common-mode voltage, and the second end of the fourth switch is connected to the second input end of the first chopper switch.

[0019] Optionally, the two-stage operational amplifier circuit includes a first amplifier, a third chopper switch, a second amplifier, a third capacitor, and a fourth capacitor;

[0020] The first input end of the first amplifier is connected to the first end of the first resistor, the second input end of the first amplifier is connected to the first end of the second resistor, the first output end of the first amplifier is connected to the first input end of the third chopping switch, the second output end of the first amplifier is connected to the second input end of the third chopping switch, the first input end of the second amplifier is connected to the first output end of the third chopping switch and the second end of the third capacitor, the second input end of the second amplifier is connected to the second output end of the third chopping switch and the second end of the fourth capacitor, the first output end of the second amplifier is connected to the first input end of the ripple calibration module and the first end of the third capacitor, and the second output end of the second amplifier is connected to the second input end of the ripple calibration module and the first end of the fourth capacitor.

[0021] According to another aspect of the present invention, a ripple calibration method for a capacitively coupled chopper instrumentation amplifier circuit is provided, which is applied to the capacitively coupled chopper instrumentation amplifier circuit described in any of the above embodiments. The ripple calibration method for a capacitively coupled chopper instrumentation amplifier circuit includes:

[0022] The ripple calibration module samples the signals at the first output terminal and the second output terminal of the two-stage operational amplifier circuit, and controls the number of connected first transistors and second transistors according to the sampling signals to reduce the ripple generated by the chopper instrumentation amplifier circuit.

[0023] Optionally, the ripple calibration module includes a sampling unit and a logic processing unit; the two-stage operational amplifier circuit includes N first transistors, N first switches, N second transistors, and N second switches, the N first transistors being connected to the N first switches in a one-to-one correspondence, and the N second transistors being connected to the N second switches in a one-to-one correspondence; the ripple calibration module samples signals at the first output terminal and the second output terminal of the two-stage operational amplifier circuit, and controls the number of connected first transistors and second transistors based on the sampling signal to reduce ripple generated by the chopper instrumentation amplifier circuit, including:

[0024] In the Kth sampling period, the sampling unit samples the first voltage of the first output end and the second voltage of the second output end of the two-stage operational amplifier circuit, and the logic processing unit turns on or off the Kth first switch and the Kth second switch according to the magnitude relationship between the first voltage and the second voltage, controlling the Kth first transistor or the Kth second transistor to be connected; wherein K is greater than 1 and K is less than or equal to N.

[0025] Optionally, in the Kth sampling period, if the second voltage is greater than the first voltage, the Kth first switch is controlled to be turned on and the Kth second switch is controlled to be turned off; if the second voltage is less than or equal to the first voltage, the Kth first switch is controlled to be turned off and the Kth second switch is controlled to be turned on.

[0026] The technical solution of the embodiment of the present invention provides a ripple calibration module that periodically samples the signal at the output of the two-stage op amp circuit. Based on the sampled signal, the module sequentially adjusts the effective number of first and second transistors in the two-stage op amp circuit, adjusting the equivalent transconductance of the op amp input pair. This compensates or cancels out output ripple, reducing output ripple. Compared with traditional methods using filters or introducing ripple suppression loops, this approach does not affect the bandwidth of the capacitive-coupled chopper instrumentation amplifier. This approach solves the problem of ripple generated by offset voltage in capacitive-coupled chopper instrumentation amplifier circuits and improves the accuracy of output signal acquisition.

[0027] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0029] Figure 1 It is a structural diagram of a capacitor-coupled chopper instrument amplifier circuit in the related art.

[0030] Figure 2 The diagram is a waveform diagram of the chopping frequency and output voltage of a capacitor-coupled chopper instrumentation amplifier circuit in the related art when the input signal is a DC signal.

[0031] Figure 3 The present invention provides a schematic diagram of a capacitive-coupled chopper instrumentation amplifier circuit.

[0032] Figure 4 1 is a schematic structural diagram of another capacitive-coupled chopper instrument amplifier circuit provided by an embodiment of the present invention.

[0033] Figure 5 3 is a waveform diagram of the chopping frequency, the sampling frequency of the analog-to-digital converter, and the sampled output voltage provided by an embodiment of the present invention.

[0034] Figure 6 The present invention provides a schematic diagram of an input pair circuit of a two-stage operational amplifier circuit of a capacitive-coupled chopper instrumentation amplifier circuit.

[0035] Figure 7 This is a structural diagram of another capacitive-coupled chopper instrument amplifier circuit provided by an embodiment of the present invention.

[0036] Figure 8 The diagram is a circuit schematic diagram of a capacitive-coupled chopper instrument amplifier circuit provided by an embodiment of the present invention.

[0037] Figure 9 The present invention provides a flow chart of a method for calibrating ripple of a capacitively coupled chopper instrumentation amplifier circuit. DETAILED DESCRIPTION

[0038] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0039] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0040] The structure of the capacitor-coupled chopper instrument amplifier in the related art is as follows: Figure 1 As shown, the working sequence and output of the circuit when the input signal is DC are as follows Figure 2As shown. The input signal Vin is modulated into +Vin and -Vin by the first chopper switch CH1. The first chopper switch CH1 is controlled by the chopping frequency fchop. The output of the first chopper switch CH1 is connected to the lower plate of the input capacitor Cin1. The upper plate of the input capacitor Cin1 is connected to the reference voltage signal Vref through the common-mode clamping resistor Rb1, and the upper plate of the input capacitor Cin2 is connected to the reference voltage Vref through the common-mode clamping resistor Rb2. Therefore, the common-mode voltage at the upper plates of the input capacitors Cin1 and Cin2 is clamped to Vref, which ensures the normal operation of the two-stage op amp. The upper plate of the input capacitor Cin1 is connected to the non-inverting input of the first stage Gm1 of the two-stage op amp, and the upper plate of the input capacitor Cin2 is connected to the inverting input of the first stage Gm1 of the two-stage op amp. The inverting output and non-inverting output of the first stage Gm1 of the two-stage op amp are connected to the non-inverting output and inverting input of the second stage Gm2, respectively, through the second chopper switch CH2. Miller compensation capacitor Cm1 is connected between the non-inverting input and inverting output of the second-stage op amp Gm2, and Miller compensation capacitor Cm2 is connected between the non-inverting input and inverting output of the second-stage op amp Gm2 to ensure the stability of the two-stage op amp. The inverting output and non-inverting output of the second-stage op amp Gm2 are connected to the lower plates of feedback capacitors Cf1 / Cf2, respectively, via a third chopper switch CH3. The upper plate of feedback capacitor Cf1 is connected to the inverting input of the first-stage op amp Gm1, and the upper plate of feedback capacitor Cf2 is connected to the non-inverting input of the first-stage op amp Gm1, forming a closed-loop feedback loop.

[0041] In the actual manufacturing process, mismatch will occur in the matching components of the op amp. The mismatch can be equivalent to the input of the two-stage op amp, such as Figure 1 The offset voltage Vos is shown in the figure. Due to the existence of the offset voltage Vos, the output of the op amp will rise or fall. And because there is a second chopper switch CH2 between the first stage Gm1 and Gm2 of the op amp, the rise or fall will switch with the switching of the second chopper switch CH2. Therefore, the output voltage Vout of the capacitive coupled chopper instrumentation amplifier is as follows: Figure 2 The waveform shown is also known as ripple. The presence of ripple can significantly undermine signal acquisition accuracy, as it is often indistinguishable from the actual signal. Common methods for addressing ripple include connecting a lowpass filter to the output of a capacitive-coupled chopper instrumentation amplifier to remove high-frequency ripple. Alternatively, a ripple suppression loop, equivalent to a notch filter, can be introduced to remove fixed-frequency ripple. These methods significantly reduce the overall circuit bandwidth, and the introduction of a lowpass filter or loop increases design complexity and may limit signal accuracy.

[0042] In view of this, Figure 3This is a schematic diagram of the structure of a capacitive coupled chopper instrument amplifier circuit provided by an embodiment of the present invention. This embodiment is suitable for weak signal processing scenarios, such as precision instruments, medical electronics, and sensor technology. Figure 3 As shown, the circuit includes: a first chopping switch CS1, an input capacitor C1, a first resistor R1, a second resistor R2, a two-stage operational amplifier circuit 101, a feedback capacitor C2, a second chopping switch CS2 and a ripple calibration module 102;

[0043] The first chopping switch CS1 receives the input signal Vin, and the first chopping switch CH1 is connected to the first input terminal and the second input terminal of the two-stage operational amplifier circuit 101 through the input capacitor C1;

[0044] A first end of the first resistor R1 is connected to the first input terminal of the two-stage operational amplifier circuit 101, and a second end of the first resistor R1 is connected to the reference voltage signal Vref. A first end of the second resistor R2 is connected to the second input terminal of the two-stage operational amplifier circuit 101, and a second end of the second resistor R2 is connected to the reference voltage signal Vref.

[0045] The second chopping switch CS2 is connected to the first output terminal and the second output terminal of the two-stage operational amplifier circuit 101. The second chopping switch CS2 is connected to the first input terminal and the second input terminal of the two-stage operational amplifier circuit 101 through the feedback capacitor C2. The two-stage operational amplifier circuit 101 includes multiple first transistors M1 and multiple second transistors M2 for signal amplification. The control terminal of the first transistor M1 is connected to the first input terminal of the two-stage operational amplifier circuit 101, and the control terminal of the second transistor M2 is connected to the second input terminal of the two-stage operational amplifier circuit 101. The input terminal of the ripple calibration module 102 is connected to the first output terminal and the second output terminal of the two-stage operational amplifier circuit 101, and the output terminal of the ripple calibration module 102 is connected to the input terminal of the two-stage operational amplifier circuit 101. The ripple calibration module 102 is used to sample the signals at the first output terminal and the second output terminal of the two-stage operational amplifier circuit 101 and control the number of first transistors M1 and second transistors M2 connected according to the sampling signal to reduce the ripple generated by the chopping instrumentation amplifier circuit.

[0046] The input signal Vin is modulated into +Vin and -Vin by a first chopper switch CS1, which is controlled by a chopping frequency fchop. The output of the first chopper switch CS1 is connected to the lower plate of the input capacitor C1; the upper plate of the input capacitor C1 is connected to the reference voltage signal Vref via a first resistor R1 and a second resistor R2, respectively. The common-mode voltage at the upper plate of the input capacitor C1 is clamped to the reference voltage signal Vref, ensuring that the two-stage operational amplifier circuit 101 can operate normally; the upper plate of the input capacitor C1 is connected to the first input terminal and the second input terminal of the two-stage operational amplifier circuit 101; the first output terminal and the second output terminal of the two-stage operational amplifier circuit 101 are connected to the ripple calibration module 102 and connected to the lower plate of the feedback capacitor C2 via a second chopper switch CS2. The upper plate of the feedback capacitor C2 is connected to the input terminal of the two-stage operational amplifier circuit 101, forming a closed-loop feedback loop. The two-stage operational amplifier circuit 101 includes a plurality of first transistors M1 and a plurality of second transistors M2. The input stage of an op amp typically uses a differential pair structure, and the number of transistors connected can be controlled by a switch connected in series with the transistors. The input of the ripple calibration module 102 is connected to the output of the two-stage op amp circuit 101, and the output is connected to the input of the two-stage op amp circuit 101. The ripple calibration module 102 can collect the output signal of the two-stage op amp circuit 101. Due to the presence of offset voltage, the output signal will have ripple. The ripple calibration module 102 samples and analyzes the output ripple. Based on the sampled ripple signal, the number of first and / or second transistors connected in parallel is dynamically adjusted, that is, the equivalent transconductance of the op amp input pair is adjusted, thereby compensating or offsetting the output ripple and reducing the output ripple. The ripple calibration module 102 can periodically sample the two differential output signals of the two-stage op amp circuit 101. Sampling can be performed using an analog-to-digital converter (ADC). The sampled signal can be a voltage signal. The number of first and second transistors M1 and M2 connected to the op amp input pair can be adjusted based on the relative magnitude of the voltage within a sampling period. When multiple transistor pairs are connected in parallel, the random mismatch of a single transistor is averaged by the other transistors, thereby reducing the overall offset. By adjusting the number of first and second transistors M1 and M2 connected to the op amp input pair, the offset voltage at the input of the two-stage op amp circuit 101 can be compensated, thereby reducing the ripple at the output.

[0047] The technical solution of the embodiment of the present invention provides a ripple calibration module that periodically samples the signal at the output of the two-stage op amp circuit. Based on the sampled signal, the module sequentially adjusts the effective number of first and second transistors in the two-stage op amp circuit, adjusting the equivalent transconductance of the op amp input pair. This compensates or cancels out output ripple, reducing output ripple. Compared with traditional methods using filters or introducing ripple suppression loops, this approach does not affect the bandwidth of the capacitive-coupled chopper instrumentation amplifier. This approach solves the problem of ripple generated by offset voltage in capacitive-coupled chopper instrumentation amplifier circuits and improves the accuracy of output signal acquisition.

[0048] Figure 4 is a structural diagram of another capacitive-coupled chopper instrumentation amplifier circuit provided by an embodiment of the present invention. In some optional embodiments of the present invention, the ripple calibration module includes a sampling unit 1021 and a logic processing unit 1022;

[0049] A first input terminal of the sampling unit 1021 is connected to a first output terminal of the two-stage operational amplifier circuit 101, a second input terminal of the sampling unit 1021 is connected to a second output terminal of the two-stage operational amplifier circuit 101, and an output terminal of the sampling unit 1021 is connected to an input terminal of the logic processing unit 1022. The sampling unit 1021 is configured to sample a first voltage at the first output terminal and a second voltage at the second output terminal of the two-stage operational amplifier circuit 101.

[0050] The output end of the logic processing unit 1022 is connected to the input end of the two-stage operational amplifier circuit 101. The logic processing unit 1022 is used to determine the change trend of the ripple according to the magnitude relationship between the first voltage and the second voltage, and control the number of connections of the first transistor M1 and the second transistor M2 according to the change trend to reduce the generated ripple.

[0051] The sampling unit 1021 can periodically collect voltage signals from the two output terminals of the two-stage operational amplifier circuit 101, namely, a first voltage at the first output terminal and a second voltage at the second output terminal. The logic processing unit 1022 receives the first voltage at the first output terminal and the second voltage at the second output terminal collected by the sampling unit 1021. The output terminal of the logic processing unit 1022 is connected to the input terminal of the two-stage operational amplifier circuit 101, and can be connected to the transistor array control terminal. The logic processing unit 1022 determines the amplitude and phase trend of the current output ripple based on the change in the magnitude relationship between the first voltage and the second voltage collected by the sampling unit 1021. Based on the determination of the ripple trend, the logic processing unit 1022 directly controls the number of first transistors M1 and second transistors M2 connected. The number of transistors connected can be controlled by switches. By controlling the number of transistors connected, a compensation voltage can be introduced into the input stage of the two-stage operational amplifier circuit 101 to offset the offset voltage of the operational amplifier, thereby reducing the output ripple. For example, within a sampling cycle, the ripple trend can be determined based on the relative magnitude of the second voltage and the first voltage. If the second voltage is greater than the first voltage, the logic processing unit 1022 can increase the number of first transistors M1 connected to the first input terminal. If the second voltage is less than or equal to the first voltage, the logic processing unit 1022 can increase the number of first transistors M2 connected to the second input terminal. In the next sampling cycle, the ripple trend can also be determined based on the relative magnitude of the second voltage and the first voltage, while maintaining the number of transistors connected in the previous sampling cycle unchanged.

[0052] In some optional embodiments of the present invention, continue to refer to Figure 4 The sampling unit 1021 includes an analog-to-digital converter, which is used to sample the first voltage at the first output terminal and the second voltage at the second output terminal of the two-stage operational amplifier circuit 101 within one sampling period; wherein the chopping signal of the first chopping switch CS1 is a periodic clock signal, and the sampling frequency of the analog-to-digital converter is twice the chopping frequency fchop of the first chopping switch CS1.

[0053] The sampling unit 1021 includes an analog-to-digital converter (ADC) that can sample the first voltage and the second voltage output by the two-stage operational amplifier circuit 101. A built-in ADC can be used. As a universal module, the ADC is integrated into most chips, without increasing any peripheral and application costs. Figure 5 The chopping frequency fchop, the sampling frequency fadc of the analog-to-digital converter, and the sampled output voltage Vout are shown. The first chopping switch CS1 can be controlled by a periodic chopping signal with a frequency equal to the chopping frequency fchop. The sampling frequency fadc of the analog-to-digital converter is twice the chopping frequency fchop of the first chopping switch CS1. In one complete chopping cycle, the ADC performs two samplings. Figure 5 As shown, in the first sampling period, the ADC collects the first voltage Vs1 and the second voltage Vs2; in the second sampling period, the ADC collects the first voltage Vs3 and the second voltage Vs4; in the third sampling period, the ADC collects the first voltage Vs5 and the second voltage Vs6.

[0054] In some optional embodiments of the present invention, continue to refer to Figure 4 The logic processing unit 1021 includes a digital logic device, which is used to determine the ripple change trend according to the magnitude relationship between the first voltage and the second voltage in each sampling period, and control the number of connections of the first transistor M1 and the second transistor M2 according to the change trend, so as to minimize the equivalent input offset voltage of the two-stage operational amplifier circuit 101.

[0055] The digital logic device can receive the first and second voltages sampled by the ADC, compare the first and second voltages, determine the ripple variation trend, and control the number of first and second transistors M1 and M2 connected based on the variation trend. The number of transistors connected can be controlled by switches. During each sampling cycle, the digital logic device determines the ripple variation trend in real time based on the magnitude relationship between the first and second voltages sampled by the ADC, and adjusts the input stage differential pair, i.e., the number of first and second transistors M1 and M2 connected, accordingly.

[0056] Specifically, such as Figure 5As shown, in the first sampling cycle, the ADC collects the first voltage Vs1 and the second voltage Vs2; if the second voltage Vs2 is greater than the first voltage Vs1, the digital logic device controls the increase of the number of connections of the first transistor M1 connected to the first input terminal; if the second voltage Vs2 is less than or equal to the first voltage Vs1, the digital logic device controls the increase of the number of connections of the second transistor M2 connected to the second input terminal; in the second sampling cycle, the ADC collects the first voltage Vs3 and the second voltage Vs4; if the second voltage Vs4 is greater than the first voltage Vs3, the digital logic device controls the increase of the number of connections of the first transistor M1 connected to the first input terminal; if the second voltage Vs4 is less than or equal to the first voltage Vs3, the digital logic device controls the increase of the number of connections of the second transistor M2 connected to the second input terminal; at this time, the number of connections of the first transistor M1 and the second transistor M2 in the previous sampling cycle remains unchanged. In the third sampling cycle, the sampling unit 1021 collects the first voltage Vs5 and the second voltage Vs6. If the second voltage Vs6 is greater than the first voltage Vs5, the digital logic controller increases the number of first transistors M1 connected to the first input terminal. If the second voltage Vs6 is less than or equal to the first voltage Vs5, the digital logic controller increases the number of second transistors M2 connected to the second input terminal. The number of first and second transistors M1 and M2 connected during the previous sampling cycle remains unchanged. By repeatedly controlling the number of first and second transistors M1 and M2 connected, the op amp input stage is regulated. Because the op amp's input offset voltage causes output ripple, adjusting the number of transistors connected on both sides of the input stage introduces a compensation voltage to offset the op amp's offset voltage, thereby reducing output ripple.

[0057] Figure 6 This is a schematic diagram of an input pair circuit of a two-stage operational amplifier circuit of a capacitively coupled chopper instrument amplifier circuit provided by an embodiment of the present invention, with reference to FIG. Figure 4 and Figure 6 In some optional embodiments of the present invention, the two-stage operational amplifier circuit 101 includes a bias current source IB, a first switch circuit 1011, and a second switch circuit 1012. The first switch circuit 1011 includes a plurality of first transistors M1, a third transistor M3, and a plurality of first switches S1. The first transistors M1 and the first switches S1 are arranged in a one-to-one correspondence.

[0058] The gate of the third transistor M3 is connected to the first input terminal of the two-stage operational amplifier circuit 101, the first electrode of the third transistor M3 is connected to the output terminal of the bias current source IB, the second electrode of the third transistor M3 is connected to the first internal node of the two-stage operational amplifier circuit 101, the gate of the first transistor M1 is connected to the first input terminal of the two-stage operational amplifier circuit 101, the first electrode of the first transistor M1 is connected to the output terminal of the bias current source IB, the second electrode of the first transistor M1 is connected to the first terminal of the corresponding first switch S1, and the second terminal of the first switch S1 is connected to the first internal node of the two-stage operational amplifier circuit 101;

[0059] The second switch circuit 1012 includes a plurality of second transistors M2 and fourth transistors M4 and a plurality of second switches S2, wherein the second transistors M2 and the second switches S2 are arranged in a one-to-one correspondence;

[0060] A gate of the fourth transistor M4 is connected to the second input terminal of the two-stage operational amplifier circuit 101, a first electrode of the fourth transistor M4 is connected to the output terminal of the bias current source IB, a second electrode of the fourth transistor M4 is connected to the second internal node of the two-stage operational amplifier circuit 101, a gate of the second transistor M2 is connected to the second input terminal of the two-stage operational amplifier circuit 101, a first electrode of the second transistor M2 is connected to the bias current source IB, a second electrode of the second transistor M2 is connected to the first terminal of the corresponding second switch S2, and a second terminal of the second switch S2 is connected to the second internal node of the two-stage operational amplifier circuit 101; wherein, the number of third transistors M3 and fourth transistors M4 is equal.

[0061] The bias current source IB can provide a constant current for the differential pair of the entire op amp input stage. The first electrodes of the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 can be sources and connected to the output of the bias current source IB. The second electrodes of the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 can be drains. The first switch circuit is connected to the first input of the two-stage op amp circuit 101. The first internal node Vp can be the load of the first-stage amplifier or the input point of subsequent circuits. Multiple first transistors M1 correspond one-to-one to multiple first switches S1. Each switch controls whether its corresponding first transistor M1 is connected to the circuit. The second electrode of the first transistor M1 is connected to the first internal node Vp through its corresponding first switch S1. When the switch is on, the second electrode of the first transistor M1 is connected to the first internal node Vp, and the transistor is connected in parallel to the differential pair for operation. When the switch is off, the second electrode of the first transistor M1 is floating or in a high-impedance state and does not participate in amplification. The second switch circuit structure is completely symmetrical with the first switch circuit. The second transistor M2 determines whether to connect in parallel and work by turning on or off its corresponding second switch S2. The third transistor M3 and the fourth transistor M4 are always in the working state, forming a basic differential input pair, which determines the minimum transconductance of the op amp input stage. The number of third transistors M3 and the number of fourth transistors M4 are equal. For example, the number of third transistors M3 and fourth transistors can be set to 100. Figure 6 As shown, the number of first transistors M1 and second transistors M2 can be multiples of 2. For example, the number of first transistors M1 can decrease from left to right, so the number from left to right is 32, 16, 8, 4, 2, and 1, respectively. The number of second transistors M2 from right to left is 32, 16, 8, 4, 2, and 1, respectively. The digital logic of the ripple calibration module 102 controls the switching states of the first switch S1 and the second switch S2. By controlling the switches, the number of first transistors M1 and second transistors M2 connected in parallel is varied, thereby controlling the equivalent transconductance and mismatch on both sides of the op amp input pair. By introducing a controllable mismatch, the op amp input offset voltage is offset, reducing output ripple.

[0062] Figure 7 is a structural diagram of another capacitive coupled chopper instrument amplifier circuit provided by an embodiment of the present invention. In some optional embodiments of the present invention, such as Figure 7 As shown, the capacitive-coupled chopper instrumentation amplifier circuit further includes a third switch S3 and a fourth switch S4. The first end of the third switch S3 is connected to the input common-mode voltage Vc, and the second end of the third switch S3 is connected to the first input end of the first chopping switch CS1. The first end of the fourth switch S4 is connected to the input common-mode voltage Vc, and the second end of the fourth switch S4 is connected to the second input end of the first chopping switch CS1.

[0063] The third switch S3 and the fourth switch S4 can be used to short-circuit the input terminals of the capacitive-coupled chopper instrumentation amplifier circuit, allowing the circuit's input terminals to be connected to a common-mode voltage Vc, which can also be a reference voltage signal Vref. After shorting the input terminals, the capacitive-coupled chopper instrumentation amplifier enters a ripple calibration mode.

[0064] Figure 8 is a circuit schematic diagram of a capacitive coupled chopper instrument amplifier circuit provided by an embodiment of the present invention. In some optional embodiments of the present invention, such as Figure 8 As shown, the two-stage operational amplifier circuit includes a first amplifier Gm1, a third chopping switch CS3, a second amplifier Gm2, a third capacitor C3 and a fourth capacitor C4;

[0065] A first input terminal of the first amplifier Gm1 is connected to the first end of the first resistor R1, a second input terminal of the first amplifier Gm1 is connected to the first end of the second resistor R2, a first output terminal of the first amplifier Gm1 is connected to the first input terminal of the third chopping switch CS3, a second output terminal of the first amplifier Gm1 is connected to the second input terminal of the third chopping switch CS3, a first input terminal of the second amplifier Gm2 is connected to the first output terminal of the third chopping switch CS3 and the second end of the third capacitor C3, a second input terminal of the second amplifier Gm2 is connected to the second output terminal of the third chopping switch CS3 and the second end of the fourth capacitor C4, a first output terminal of the second amplifier Gm2 is connected to the first input terminal of the ripple calibration module 102 and the first end of the third capacitor C3, and a second output terminal of the second amplifier Gm2 is connected to the second input terminal of the ripple calibration module 102 and the first end of the fourth capacitor C4.

[0066] Working principle of the embodiment of the present invention: Figure 5 、 Figure 6 and Figure 8 By shorting the input terminals of the capacitive-coupled chopper instrumentation amplifier circuit, the capacitive-coupled chopper instrumentation amplifier enters ripple calibration mode. The non-inverting and inverting output terminals of the capacitive-coupled chopper instrumentation amplifier are connected to the ADC inputs, which samples them. The ADC sampling frequency fadc is twice the chopping frequency fchop. During one sampling cycle, the ADC samples the output Vout twice. After sampling the first voltage Vs1 and the second voltage Vs2, the ADC transmits the sampled values ​​to the digital logic for calculation. The digital logic determines the ripple trend by calculating the relative magnitude of the second voltage Vs2 to the first voltage Vs1 and adjusts the number of input pairs of the op amp.

[0067] Assume that the structure of the input end of the two-stage operational amplifier circuit is as follows Figure 6As shown, all switches are disconnected by default, and it is necessary to sample the first voltage and the second voltage for 6 cycles. The control order of the first switch S1 on the left is from left to right, and the first, second...Nth from left to right; the control order of the second switch S2 on the right is from right to left, and the first, second...Nth from right to left; in the first sampling cycle, the ADC collects the first voltage Vs1 and the second voltage Vs2; if the second voltage Vs2 is greater than the first voltage Vs1, the digital logic controller controls the first first switch S1 on the left to close, the first second switch S2 on the right to open, and the other switches to remain in their original states, thereby increasing the number of connections of the first transistor M1 connected to the first input terminal; if the second voltage Vs2 is less than or equal to the first voltage Vs1, the digital logic controller controls the first first switch S1 on the left to open, the first second switch S2 on the right to close, and the other switches to remain in their original states, thereby increasing Increase the number of connections of the second transistor M2 connected to the second input terminal; in the second sampling period, the ADC collects the first voltage Vs3 and the second voltage Vs4; if the second voltage Vs4 is greater than the first voltage Vs3, the digital logic device logic controls the second first switch S1 on the left to close, the second second switch S2 on the right to open, and the other switches to remain in their original states, thereby increasing the number of connections of the first transistor M1 connected to the first input terminal; if the second voltage Vs4 is less than or equal to the first voltage Vs3, the digital logic device logic controls the second first switch S1 on the left to open, the second second switch S2 on the right to close, and the other switches to remain in their original states, thereby increasing the number of connections of the second transistor M2 connected to the second input terminal; in the third sampling period, the ADC collects the first voltage Vs5 and the second voltage Vs6. If the second voltage Vs6 is greater than the first voltage Vs5, the digital logic controller controls the third first switch S1 on the left to close and the third second switch S2 on the right to open, while the other switches remain in their original states, thereby increasing the number of first transistors M1 connected to the first input terminal. If the second voltage Vs6 is less than or equal to the first voltage Vs5, the digital logic controller controls the third first switch S1 on the left to open and the third second switch S2 on the right to close, while the other switches remain in their original states, thereby increasing the number of second transistors M2 connected to the second input terminal. The operation process from the fourth sampling cycle to the sixth sampling cycle is consistent with the above sampling process. After the N first switches S1 on the left and the N second switches S2 on the right are adjusted, the number of transistors at the two input terminals of the two-stage operational amplifier circuit 101 is also adjusted. At this time, the input offset voltage of the operational amplifier is minimized, and the ripple of the output of the capacitor-coupled chopper instrumentation amplifier is also minimized.

[0068] Figure 9This is a flow chart of a ripple calibration method for a capacitively coupled chopper instrumentation amplifier circuit provided by an embodiment of the present invention, which is applied to the capacitively coupled chopper instrumentation amplifier circuit described in any of the above embodiments, with reference to Figure 7 、 Figure 8 and Figure 9 , the ripple calibration method for the capacitive-coupled chopper instrumentation amplifier circuit includes:

[0069] The ripple calibration module 102 samples the signals at the first output terminal and the second output terminal of the two-stage operational amplifier circuit 101 and controls the number of connected first transistors M1 and second transistors M2 according to the sampling signals to reduce the ripple generated by the chopper instrumentation amplifier circuit.

[0070] The sampling unit 1021 of the ripple calibration module 102 is connected to the first and second output terminals of the two-stage op amp circuit 101. The voltage signal between the two output terminals can be sampled continuously or periodically. The logic processing unit 1022 of the ripple calibration module 102 can determine the ripple trend based on the sampled signal and control the number of first and second transistors M1 and M2 connected based on the trend. Ripple is primarily caused by output stage imbalance due to input stage mismatch. By changing the number of transistors connected, the ripple calibration module 102 introduces a compensation voltage to compensate for the offset voltage at the input of the two-stage op amp circuit 101, thereby reducing the ripple at the output.

[0071] In some optional embodiments of the present invention, reference Figure 6 and Figure 7 The ripple calibration module 102 includes a sampling unit 1021 and a logic processing unit 1022. The two-stage operational amplifier circuit includes N first transistors M1, N first switches S1, N second transistors M2, and N second switches S2. The N first transistors M1 are connected to the N first switches S1 in a one-to-one correspondence, and the N second transistors M2 are connected to the N second switches S2 in a one-to-one correspondence. The ripple calibration module 102 samples the signals at the first output terminal and the second output terminal of the two-stage operational amplifier circuit 101, and controls the number of connected first transistors M1 and second transistors M2 according to the sampling signal to reduce the ripple generated by the chopper instrumentation amplifier circuit, including:

[0072] During the Kth sampling period, the sampling unit 1021 samples the first voltage at the first output terminal and the second voltage at the second output terminal of the two-stage operational amplifier circuit 101, and the logic processing unit 1022 turns on or off the Kth first switch S1 and the Kth second switch S2 according to the magnitude relationship between the first voltage and the second voltage, controlling the Kth first transistor M1 or the Kth second transistor M2 to be connected; wherein K is greater than 1 and K is less than or equal to N.

[0073] The ADC can periodically sample the output voltage signal of the two-stage operational amplifier circuit 101. Within each sampling period, the ADC samples twice. Based on the magnitude relationship between the first and second voltages sampled by the ADC, the digital logic determines the ripple variation trend in real time and adjusts the number of input differential pairs, i.e., the number of first transistors M1 and second transistors M2, accordingly. Once the N first switches S1 and the N second switches S2 are adjusted, the number of transistors at the two input terminals of the two-stage operational amplifier circuit 101 is also adjusted. At this point, the input offset voltage of the operational amplifier is minimized, and thus the output ripple of the capacitive-coupled chopper instrumentation amplifier is also minimized.

[0074] In some optional embodiments of the present invention, reference Figure 6 and Figure 8 , in the Kth sampling period, if the second voltage is greater than the first voltage, the Kth first switch is controlled to be turned on and the Kth second switch is turned off; if the second voltage is less than or equal to the first voltage, the Kth first switch is controlled to be turned off and the Kth second switch is turned on.

[0075] During each cycle, the digital logic of the ripple calibration module 102 compares the sampled first voltage and the second voltage and controls the switches based on the voltage comparison result. During the Kth sampling cycle, when the second voltage is greater than the first voltage, the Kth first switch S1 is turned on, the Kth second switch S2 is turned off, and the Kth first transistor M1 is turned on. When the second voltage is less than or equal to the first voltage, the Kth first switch S1 is turned off, the Kth second switch S2 is turned on, and the Kth second transistor M2 is turned on.

[0076] Working principle of the ripple calibration method according to the embodiment of the present invention: Figure 6 and Figure 8 , assuming that the structure of the input terminal of the two-stage operational amplifier circuit 101 is as follows Figure 6As shown, all switches are disconnected by default, and it is necessary to sample the first voltage and the second voltage for 6 cycles. The control order of the first switch S1 on the left is from left to right, and the first, second...Nth from left to right; the control order of the second switch S2 on the right is from right to left, and the first, second...Nth from right to left; in the first sampling cycle, the sampling unit 1021 collects the first voltage Vs1 and the second voltage Vs2; if the second voltage Vs2 is greater than the first voltage Vs1, the digital logic controller logic controls the first first switch S1 on the left to close, the first second switch S2 on the right to open, and the other switches to remain in their original states, thereby increasing the number of connections to the first transistor M1 connected to the first input terminal; if the second voltage Vs2 is less than or equal to the first voltage Vs1, the digital logic controller logic controls the first first switch S1 on the left to open, the first second switch S2 on the right to close, and the other switches to remain in their original states, thereby increasing the number of connections to the first transistor M1 connected to the first input terminal; if the second voltage Vs2 is less than or equal to the first voltage Vs1, the digital logic controller logic controls the first first switch S1 on the left to open, the first second switch S2 on the right to close, and the other switches to remain in their original states, thereby increasing the number of connections to the first transistor M1 connected to the first input terminal. The number of connections of the second transistor M2 connected to the second input terminal; in the second sampling period, the sampling unit 1021 collects the first voltage Vs3 and the second voltage Vs4; if the second voltage Vs4 is greater than the first voltage Vs3, the digital logic device logic controls the second first switch S1 on the left to close, the second second switch S2 on the right to open, and the other switches to remain in their original states, thereby increasing the number of connections of the first transistor M1 connected to the first input terminal; if the second voltage Vs4 is less than or equal to the first voltage Vs3, the digital logic device logic controls the second first switch S1 on the left to open, the second second switch S2 on the right to close, and the other switches to remain in their original states, thereby increasing the number of connections of the second transistor M2 connected to the second input terminal; in the third sampling period, the sampling unit 1021 collects the first voltage Vs5 and the second voltage Vs6. If the second voltage Vs6 is greater than the first voltage Vs5, the digital logic controller controls the third left first switch S1 to close and the third right second switch S2 to open, while the other switches remain in their original states, thereby increasing the number of first transistors M1 connected to the first input terminal. If the second voltage Vs6 is less than or equal to the first voltage Vs5, the digital logic controller controls the third left first switch S1 to open and the third right second switch S2 to close, while the other switches remain in their original states, thereby increasing the number of second transistors M2 connected to the second input terminal. The operation process from the fourth sampling cycle to the sixth sampling cycle is consistent with the above sampling process. After the N first switches S1 on the left and the N second switches S2 on the right are adjusted, the number of transistors at the two input terminals of the two-stage operational amplifier circuit is also adjusted. At this time, the input offset voltage of the operational amplifier is minimized, and the output ripple of the capacitor-coupled chopper instrumentation amplifier is also minimized.

[0077] After calibration using the aforementioned method, the output ripple of a conventional capacitive-coupled chopper instrumentation amplifier (IAMP) is improved. This improvement increases with the number of op amp input pairs. However, as the number of bits increases, the number and area of ​​transistors also increase, resulting in a trade-off between area and accuracy. Compared to conventional methods using filters or loops, the technical solution of the present invention does not affect the bandwidth of the capacitive-coupled chopper IAMP and reduces circuit design complexity.

[0078] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in the present invention can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved. This is not limited herein.

[0079] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A capacitively coupled chopper instrumentation amplifier circuit, characterized in that: include: A first chopping switch, an input capacitor, a first resistor, a second resistor, a two-stage operational amplifier circuit, a feedback capacitor, a second chopping switch, and a ripple calibration module; The first chopping switch receives an input signal, and the first chopping switch is connected to the first input terminal and the second input terminal of the two-stage operational amplifier circuit through the input capacitor; A first end of the first resistor is connected to a first input end of the two-stage operational amplifier circuit, a second end of the first resistor is connected to a reference voltage signal, a first end of the second resistor is connected to a second input end of the two-stage operational amplifier circuit, and a second end of the second resistor is connected to a reference voltage signal; The second chopping switch is connected to the first output terminal and the second output terminal of the two-stage operational amplifier circuit, and the second chopping switch is connected to the first input terminal and the second input terminal of the two-stage operational amplifier circuit through the feedback capacitor; the two-stage operational amplifier circuit includes a plurality of first transistors and a plurality of second transistors for signal amplification; the control terminal of the first transistor is connected to the first input terminal of the two-stage operational amplifier circuit, and the control terminal of the second transistor is connected to the second input terminal of the two-stage operational amplifier circuit; the input terminal of the ripple calibration module is connected to the first output terminal and the second output terminal of the two-stage operational amplifier circuit, and the output terminal of the ripple calibration module is connected to the input terminal of the two-stage operational amplifier circuit; the ripple calibration module is used to sample the signals of the first output terminal and the second output terminal of the two-stage operational amplifier circuit, and control the number of the first transistor and the second transistor connected according to the sampling signal to reduce the ripple generated by the chopping instrumentation amplifier circuit; The two-stage operational amplifier circuit includes a bias current source, a first switching circuit, and a second switching circuit. The first switching circuit includes a plurality of first transistors, a third transistor, and a plurality of first switches. The first transistors are arranged in a one-to-one correspondence with the first switches. The gate of the third transistor is connected to the first input terminal of the two-stage operational amplifier circuit, the first electrode of the third transistor is connected to the output terminal of the bias current source, the second electrode of the third transistor is connected to the first internal node of the two-stage operational amplifier circuit, the gate of the first transistor is connected to the first input terminal of the two-stage operational amplifier circuit, the first electrode of the first transistor is connected to the output terminal of the bias current source, the second electrode of the first transistor is connected to the first terminal of the corresponding first switch, and the second terminal of the first switch is connected to the first internal node of the two-stage operational amplifier circuit; The second switch circuit includes a plurality of second transistors and fourth transistors and a plurality of second switches, and the second transistors are arranged in a one-to-one correspondence with the second switches; The gate of the fourth transistor is connected to the second input terminal of the two-stage operational amplifier circuit, the first electrode of the fourth transistor is connected to the output terminal of the bias current source, the second electrode of the fourth transistor is connected to the second internal node of the two-stage operational amplifier circuit, the gate of the second transistor is connected to the second input terminal of the two-stage operational amplifier circuit, the first electrode of the second transistor is connected to the bias current source, the second electrode of the second transistor is connected to the first terminal of the corresponding second switch, and the second terminal of the second switch is connected to the second internal node of the two-stage operational amplifier circuit; wherein the number of the third transistors and the number of the fourth transistors are equal.

2. The capacitive coupled chopper instrumentation amplifier circuit according to claim 1, wherein: The ripple calibration module includes a sampling unit and a logic processing unit; A first input terminal of the sampling unit is connected to a first output terminal of the two-stage operational amplifier circuit, a second input terminal of the sampling unit is connected to a second output terminal of the two-stage operational amplifier circuit, an output terminal of the sampling unit is connected to an input terminal of the logic processing unit, and the sampling unit is used to sample a first voltage at the first output terminal and a second voltage at the second output terminal of the two-stage operational amplifier circuit; The output end of the logic processing unit is connected to the input end of the two-stage operational amplifier circuit. The logic processing unit is used to determine the change trend of the ripple according to the magnitude relationship between the first voltage and the second voltage, and control the number of connections of the first transistor and the second transistor according to the change trend to reduce the generated ripple.

3. The capacitive coupled chopper instrumentation amplifier circuit according to claim 2, wherein: The sampling unit includes an analog-to-digital converter, which is used to sample a first voltage at a first output terminal and a second voltage at a second output terminal of the two-stage operational amplifier circuit within a sampling period; wherein the chopping signal of the first chopping switch is a periodic clock signal, and the sampling frequency of the analog-to-digital converter is twice the chopping frequency of the first chopping switch.

4. The capacitive coupled chopper instrumentation amplifier circuit according to claim 2, wherein: The logic processing unit includes a digital logic device, which is used to determine the ripple change trend according to the magnitude relationship between the first voltage and the second voltage in each sampling cycle, and control the number of connections of the first transistor and the second transistor according to the change trend to minimize the equivalent input offset voltage of the two-stage operational amplifier circuit.

5. The capacitive coupled chopper instrumentation amplifier circuit according to claim 1, wherein: It also includes a third switch and a fourth switch, wherein the first end of the third switch is connected to the input common-mode voltage, the second end of the third switch is connected to the first input end of the first chopper switch, the first end of the fourth switch is connected to the input common-mode voltage, and the second end of the fourth switch is connected to the second input end of the first chopper switch.

6. The capacitive coupled chopper instrumentation amplifier circuit according to claim 1, wherein: The two-stage operational amplifier circuit includes a first amplifier, a third chopper switch, a second amplifier, a third capacitor and a fourth capacitor; The first input end of the first amplifier is connected to the first end of the first resistor, the second input end of the first amplifier is connected to the first end of the second resistor, the first output end of the first amplifier is connected to the first input end of the third chopping switch, the second output end of the first amplifier is connected to the second input end of the third chopping switch, the first input end of the second amplifier is connected to the first output end of the third chopping switch and the second end of the third capacitor, the second input end of the second amplifier is connected to the second output end of the third chopping switch and the second end of the fourth capacitor, the first output end of the second amplifier is connected to the first input end of the ripple calibration module and the first end of the third capacitor, and the second output end of the second amplifier is connected to the second input end of the ripple calibration module and the first end of the fourth capacitor.

7. A method for calibrating ripple in a capacitively coupled chopper instrumentation amplifier circuit, characterized in that: The capacitive-coupled chopper instrumentation amplifier circuit according to any one of claims 1 to 6, wherein the ripple calibration method of the capacitive-coupled chopper instrumentation amplifier circuit comprises: The ripple calibration module samples the signals at the first output terminal and the second output terminal of the two-stage operational amplifier circuit, and controls the number of connected first transistors and second transistors according to the sampling signals to reduce the ripple generated by the chopper instrumentation amplifier circuit.

8. The ripple calibration method for a capacitively coupled chopper instrumentation amplifier circuit according to claim 7, wherein: The ripple calibration module includes a sampling unit and a logic processing unit; the two-stage operational amplifier circuit includes N first transistors, N first switches, N second transistors, and N second switches, wherein the N first transistors are connected to the N first switches in a one-to-one correspondence, and the N second transistors are connected to the N second switches in a one-to-one correspondence; The ripple calibration module samples the signals at the first output terminal and the second output terminal of the two-stage operational amplifier circuit, and controls the number of connected first transistors and second transistors according to the sampling signals to reduce the ripple generated by the chopper instrumentation amplifier circuit, including: In the Kth sampling period, the sampling unit samples the first voltage of the first output end and the second voltage of the second output end of the two-stage operational amplifier circuit, and the logic processing unit turns on or off the Kth first switch and the Kth second switch according to the magnitude relationship between the first voltage and the second voltage, controlling the Kth first transistor or the Kth second transistor to be connected; wherein K is greater than 1 and K is less than or equal to N.

9. The ripple calibration method for a capacitively coupled chopper instrumentation amplifier circuit according to claim 8, wherein: In the Kth sampling period, if the second voltage is greater than the first voltage, controlling the Kth first switch to be turned on and the Kth second switch to be turned off; If the second voltage is less than or equal to the first voltage, the Kth first switch is controlled to be turned off and the Kth second switch is controlled to be turned on.

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