Topology detection method, device, system and equipment for distributed PLC (Programmable Logic Controller) system
Through the topology detection method of the distributed PLC system, the detection packet interaction between the gateway module and the interface module and the circuit design of the main control module are realized, topology discovery of the PLC system is solved, and the inefficiency and stability problems in the traditional network configuration mode are improved, and the reliability and ease of use of the system are improved.
Patent Information
- Application Number
- CN202510548268.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-28
- Publication Date
- 2025-08-12
AI Technical Summary
The traditional large-scale PLC network configuration configuration mode is time-consuming and labor-intensive, prone to errors, affecting system stability and reliability, and relying on manual operations to lead to inefficiency.
The topology detection method of a distributed PLC system is adopted to determine the average processing delay of the data through the interaction of the detection packet between the gateway module and the interface module, and to determine the topology data based on the location and type information, and topology self-discovery is realized through the specific circuit design of the main control module and the communication module.
The topological self-discovery of the PLC system is realized, which reduces manual operations, improves work efficiency, ensures the stability and reliability of the system, and simplifies the configuration and configuration process.
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Figure CN120474924A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of PLC system topology detection, and in particular relates to a topology detection method, device, system and equipment for a distributed PLC system. Background Art
[0002] Modern industrial production of inverters is a highly integrated, complex and efficient system with distinct and intertwined characteristics. It usually involves large-scale production lines and manufacturing processes, and can produce a large number of products efficiently and continuously. This model requires the deployment of a large number of different types of PLCs (programmable logic controllers) to meet the control needs of different links and processes. The distributed PLC system adopts a remote mechanism to deploy PLC nodes in a remote location away from the control center, and realizes connection and data transmission with the control center through a communication network. This remote mechanism not only reduces wiring costs and complexity, but also improves the flexibility and scalability of the system. The distributed PLC system can easily cope with large-scale production environments and achieve comprehensive control of the entire production line through the collaborative work of multiple PLC nodes.
[0003] The traditional approach to the complex configuration required for large-scale PLC networking relies heavily on detailed record-keeping during the installation phase and module-by-module configuration during the engineering phase. This model is not only time-consuming but also involves numerous manual steps, each requiring extreme precision and consistency. Specifically, during the installation phase, engineers must thoroughly record key information such as the location, model, and connection relationships of each PLC node for reference during subsequent configuration. Once in the engineering phase, they must also configure each PLC module individually, including setting communication parameters, defining input and output variables, and writing control logic. Each step requires meticulous attention.
[0004] However, this model is not only time-consuming and labor-intensive, but also prone to alignment issues due to the involvement of multiple different personnel. Each engineer may have a different understanding of the system and different operating habits, which can lead to errors or omissions during the configuration process, affecting the stability and reliability of the entire system. As a result, the entire process, from recording to configuration, often takes over a month, which is not only inefficient but also increases project risks.
[0005] In summary, the traditional large-scale PLC networking configuration mode has many shortcomings, and a more efficient, accurate and automated solution is urgently needed to meet the increasingly complex industrial control needs. Summary of the Invention
[0006] In order to solve the above problems, the present invention proposes a topology detection method, device, system and equipment for a distributed PLC system, which can realize topology self-discovery of the PLC system, reduce labor, improve work efficiency, and ensure the stability and reliability of the PLC system.
[0007] In a first aspect, the present invention provides a topology detection method for a distributed PLC system, which is applied to a gateway module in the distributed PLC system, wherein the gateway module is connected to multiple interface modules of multiple nodes, and the method includes:
[0008] Sending first detection packets to multiple interface modules of multiple test nodes and obtaining multiple first response packets returned by multiple interface modules of multiple test nodes, determining the average data processing delay of the interface module according to the reception time of the multiple first detection packets and the transmission time of the multiple first response packets; wherein, the first response packet includes the reception time of the first detection packet and the transmission time of the first response packet; the average data processing delay represents the average data processing time of a single interface module from the start of receiving data to the completion of data processing and preparation for outputting processing results; the first detection packet is used to detect the topological network structure between the gateway module and the multiple interface modules; the test node is a pre-designated node for testing the average data processing delay of a single interface module;
[0009] Determine the total waiting delay for the gateway module to receive data from multiple interface modules of multiple target nodes based on the average data processing delay;
[0010] Sending a second detection packet to multiple interface modules of multiple target nodes, and obtaining a second response packet returned by the multiple interface modules of the multiple target nodes within the total waiting delay; wherein the second response packet includes location information and type information of the interface module;
[0011] First layer topology data between the gateway module and multiple interface modules of multiple target nodes is determined according to the location information and the type information.
[0012] In an optional embodiment, the sending of first detection packets to multiple interface modules of multiple test nodes and obtaining multiple first response packets returned by the multiple interface modules of the multiple test nodes, and determining the average data processing delay of the interface modules based on the reception time of the multiple first detection packets and the sending time of the multiple first response packets, includes:
[0013] Sending a first detection packet to multiple interface modules of multiple test nodes in unicast form;
[0014] Obtain multiple first response packets returned by multiple test nodes;
[0015] Determine an average delay of multiple interface modules of multiple test nodes according to a reception time of the first detection packet and a sending time of the multiple first response packets;
[0016] The average data processing delay of a single node is determined according to the average delay of the multiple interface modules and a preset empirical value.
[0017] In an optional embodiment, the method further includes:
[0018] When the distributed PLC system is running, acquiring interaction data sent to the gateway module by multiple interface modules of multiple target nodes, the interaction data including periodic data and non-periodic data; determining connection status of the multiple interface modules of the multiple target nodes according to the interaction data, the connection status including offline status and online status;
[0019] It is determined whether the connection statuses of the multiple interface modules of the multiple target nodes are in an offline state; if so, the first layer topology data is updated.
[0020] In a second aspect, the present invention provides a topology detection method for a distributed PLC system, which is applied to a main control module in the PLC system, wherein the main control module and multiple communication modules are respectively connected to a baseboard; wherein multiple first pins of the main control module are connected to a first power supply and are respectively electrically connected to second pins of the communication modules in different slots through the baseboard; wherein the first pins are general-purpose input / output pins, and the second pins are grounded; the method comprises:
[0021] Acquire voltage information of a plurality of first pins, and determine an online communication module according to the voltage information;
[0022] Sending a third detection packet to the multiple communication modules in the multiple designated slots based on the bus protocol, so that the multiple communication modules in the multiple designated slots match the slot numbers in the third detection packet with their own slot numbers, and then sending a third response packet to the main control module when the match is successful; wherein the third response packet includes the slot number and single board type of the communication module;
[0023] Obtain the third response packets sent by multiple communication modules in multiple designated slots;
[0024] Sending the third detection packet to multiple communication modules in multiple target slots based on the bus protocol;
[0025] Obtain the third response packets sent by multiple communication modules of multiple target slots;
[0026] The third layer topology data between the main control module and the plurality of communication modules is determined according to the third response packet.
[0027] In an optional embodiment, the multiple communication modules determine their own slot numbers by the following method:
[0028] Acquiring level values of a plurality of third pins electrically connected to the baseboard; wherein the third pins are connected to ground or a second power supply according to the binary value of the slot number thereof;
[0029] The own slot number is determined according to the level values of the multiple third pins.
[0030] In an optional embodiment, after determining the third layer topology data between the main control module and the plurality of communication modules according to the third response packet, the method further includes:
[0031] Determine the overall topology of the PLC system based on the first layer topology data determined by the distributed PLC topology data method according to any one of the first aspects, the second layer topology data between the communication module and the gateway module, and the third layer topology data; wherein the second layer topology data is obtained by the communication module and the gateway module self-discovery based on the bus protocol;
[0032] In response to the broadcast detection packet sent by the host computer, a fourth response packet is sent to the host computer, wherein the fourth response packet includes the overall topology structure, so that the host computer determines the site topology structure according to the overall topology relationship of all PLC systems and displays the site topology structure.
[0033] In a third aspect, the present invention provides a topology detection device for a distributed PLC system, which is applied to a gateway module in the distributed PLC system, wherein the gateway module is connected to multiple interface modules of multiple nodes, and the device includes:
[0034] A test node detection module is used to send a first detection packet to multiple interface modules of multiple test nodes and obtain multiple first response packets returned by multiple interface modules of multiple test nodes, and determine the average data processing delay of the interface module according to the reception time of the multiple first detection packets and the transmission time of the multiple first response packets; wherein, the first response packet includes the reception time of the first detection packet and the transmission time of the first response packet; the average data processing delay represents the average data processing time of a single interface module from the receipt of data to the completion of data processing and preparation for outputting the processing result; the first detection packet is used to detect the topological network structure between the gateway module and the multiple interface modules; the test node is a pre-designated node for testing the average data processing delay of a single interface module;
[0035] a total waiting delay module, configured to determine a total waiting delay for a gateway module to receive data from multiple interface modules of multiple target nodes according to the average data processing delay;
[0036] a target node detection module, configured to send a second detection packet to multiple interface modules of multiple target nodes, and obtain a second response packet returned by the multiple interface modules of the multiple target nodes within the total waiting delay; wherein the second response packet includes location information and type information of the interface module;
[0037] The first determining module is configured to determine first layer topology data between the gateway module and multiple interface modules of multiple target nodes according to the location information and the type information.
[0038] In a fourth aspect, the present invention provides a topology detection device for a distributed PLC system, which is applied to a main control module in the PLC system, wherein the main control module and multiple communication modules are respectively connected to a baseboard; wherein multiple first pins of the main control module are connected to a first power supply and are respectively electrically connected to second pins of the communication modules in different slots through the baseboard; wherein the first pins are general-purpose input / output pins, and the second pins are grounded; and the device method comprises:
[0039] an online detection module, configured to obtain voltage information of a plurality of first pins and determine an online communication module according to the voltage information;
[0040] The designated slot detection module is configured to send a third detection packet to the multiple communication modules in the multiple designated slots based on the bus protocol, so that the multiple communication modules in the multiple designated slots match the slot numbers in the third detection packet with their own slot numbers, and then send a third response packet to the main control module when the match is successful; wherein the third response packet includes the slot number and single board type of the communication module;
[0041] A first acquisition module is used to acquire the third response packets sent by multiple communication modules in multiple designated slots;
[0042] a target slot acquisition module, configured to send the third detection packet to multiple communication modules of multiple target slots based on a bus protocol;
[0043] A second acquisition module is used to acquire the third response packets sent by multiple communication modules of multiple target slots;
[0044] The second determining module is configured to determine the third layer topology data between the main control module and the plurality of communication modules according to the third response packet.
[0045] In a fifth aspect, the present invention provides a topology detection system for a distributed PLC system, comprising a host computer and multiple PLC systems, each of the PLC systems comprising a main control module, one or more communication modules, one or more gateway modules and one or more interface modules, the main control module being connected to one or more communication modules, each of the communication modules being connected to one or more gateway modules, each of the gateway modules being connected to one or more interface modules, and each of the interface modules being connected to one or more monitoring devices; wherein the gateway module executes the topology detection method for the distributed PLC described in any one of the first aspects, and the main control module executes the topology detection method for the distributed PLC described in any one of the second aspects.
[0046] In a sixth aspect, the present invention provides an electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the method described in any one of the first and second aspects when executing the computer program.
[0047] In a seventh aspect, the present invention provides a computer-readable medium having a non-volatile program code executable by a processor, wherein the program code enables the processor to execute the method described in any one of the first and second aspects.
[0048] The beneficial effects brought about by the technical solution provided by the present invention are:
[0049] First, the present invention provides a topology detection method, device, system and equipment for a distributed PLC system. The gateway module sends a first detection packet to the interface module of the test node, and determines the average data processing delay by combining the reception time of the first detection packet and the sending time of the first response packet in the first response packet fed back by the interface module, thereby determining the total waiting delay; sends a second detection packet to all target nodes, and obtains second response packets returned by multiple interface modules of multiple target nodes within the total waiting delay, wherein the second response packet includes location information and type information of the interface module; determines the first layer topology data between the gateway module and the interface module based on the location information and type information; the present invention proposes a training and detection discovery mechanism between the gateway module and the interface module based on master-slave bus communication, and proposes a bus conflict and topology detection discovery data model, which has guiding significance for other similar master-slave bus mechanisms;
[0050] Secondly, in the topology detection of the main control module and the communication module of the present invention, the first pin of the main control module is connected to the second pin of the corresponding communication module through the baseboard, wherein the second pin is grounded and the first pin is connected to the first power supply; in this way, when the corresponding communication module is inserted into the baseboard, the level of the first pin of the main control module is reduced, and the main control module can detect the online communication module; at the same time, based on the bus protocol, a third detection packet is sent to multiple communication modules in multiple specified slots, and the multiple communication modules in the specified slots match the slot number in the third detection packet with their own slot number, and then send a third response packet to the main control module when the match is successful; wherein, the third response packet includes the slot number and single board type of the communication module; similarly, the main control module sends a third response packet to the communication modules in all target slots to obtain the slot number and single board type of the target slot; the main control module determines the third layer topology data between the multiple communication modules based on information such as the slot number and single board type; the baseboard where the main control module and the communication module are located of the present invention has a specific circuit design, and realizes the topology self-discovery of the main control module and the communication module based on the bus protocol and circuit design, which is stable and reliable;
[0051] The present invention can detect the topological relationships of all PLC systems in the network, reduce labor, improve work efficiency, and ensure the stability and reliability of the PLC system; it greatly facilitates system configuration and maintenance, ease of use and observability, and significantly improves the competitiveness of the product. BRIEF DESCRIPTION OF THE DRAWINGS
[0052] Figure 1 A schematic diagram of a topology detection method for a distributed PLC system in which the execution subject is a gateway module provided in an embodiment of the present invention;
[0053] Figure 2 A schematic diagram of the structure of the gateway module and the interface module provided in an embodiment of the present invention;
[0054] Figure 3 A schematic flow chart of a topology detection method for a distributed PLC system in which the main control module is an execution subject provided by an embodiment of the present invention;
[0055] Figure 4 A schematic diagram of a circuit in which a main control module and a communication module are connected via a baseboard according to an embodiment of the present invention;
[0056] Figure 5 A circuit schematic diagram of some pins of a communication module provided by an embodiment of the present invention;
[0057] Figure 6 A topological relationship diagram of the host computer and PLC system of the site provided by the embodiment of the present invention;
[0058] Figure 7Schematic diagram of the communication principle between the PLC system and the host computer provided in an embodiment of the present invention;
[0059] Figure 8 A topological diagram of a PLC system provided in an embodiment of the present invention;
[0060] Figure 9 A schematic diagram illustrating the principle of the topology detection process provided by an embodiment of the present invention;
[0061] Figure 10 A schematic diagram of the system principle of a topology detection device for a distributed PLC system provided by an embodiment of the present invention;
[0062] Figure 11 A schematic diagram of the system principle of a topology detection device for a distributed PLC system provided by an embodiment of the present invention;
[0063] Figure 12 A schematic diagram of the principle of a topology detection system for a distributed PLC system provided by an embodiment of the present invention;
[0064] Figure 13 This is a system schematic diagram of an electronic device provided by an embodiment of the present invention.
[0065] In the figure: 1-PLC system; 11-gateway module; 12-main control module; 13-communication module; 14-interface module; 2-host computer; 110-test node detection module; 120-waiting total delay module; 130-module; 140-module; 210-module; 220-module; 230-module; 240-module; 250-module; 1000-electronic device; 1001-communication interface; 1002-processor; 1003-memory; 1004-bus. DETAILED DESCRIPTION
[0066] The present invention will be described in detail below with reference to the accompanying drawings and in conjunction with embodiments.
[0067] like Figure 12 As shown, the topology detection system of the distributed PLC system proposed in this embodiment includes a host computer and multiple PLC systems 1, each PLC system 1 includes a main control module 12, one or more communication modules 13, one or more gateway modules 11 and one or more interface modules 14, the main control module 12 is connected to one or more communication modules 13, each communication module 13 is connected to one or more gateway modules 11, each gateway module 11 is connected to one or more interface modules 14, and each interface module 14 is connected to one or more monitoring devices.
[0068] Specifically, the main control module is the central processing unit of the PLC system, and the interface module is also called the IO module, which is used to connect the monitoring equipment. Among them, the monitoring equipment in this embodiment is the field collection and control equipment such as sensors installed at the production end.
[0069] In one possible embodiment, Figure 7 As shown, the PLC system is connected to the host computer via a redundant Ethernet ring network. A master control module 12 and multiple communication modules 13 are plugged into the same baseboard. A gateway module 11 and multiple interface modules 14 are also plugged into the same baseboard. The interface modules 14 are connected to third-party DP devices (industrial peripherals that use the PROFIBUS DP protocol). The baseboard is a pluggable system with a base that provides power to each module and connects them together.
[0070] In this embodiment, multiple groups of main control modules and communication modules are arranged on a main rack, and multiple groups of gateway modules and interface modules are arranged on a slave rack.
[0071] In one possible embodiment, Figure 8 The figure shows the system topology, with two master racks at the top and slave racks at the bottom. The master and slave racks are connected via communication modules and gateway modules (IMx). The master racks include master control modules (Master Control Unit Module-A and Master Control Unit Module-B) and communication modules, while the slave racks include gateway modules (IM1-IMn) and the subsequent I / O modules (interface modules). Master control unit module-A and communication modules 1-n are mounted on the same baseboard, while master control unit module-B and communication modules 1-n are mounted on the same baseboard. Wires connect the master control unit-A and master control unit module-B between the two baseboards. Gateway module IM1 and multiple interface modules IO1-IOn are mounted on the same baseboard, while gateway module IM2 and multiple interface modules IO1-IOn are mounted on the same baseboard. The two gateway modules are connected to their respective master control modules, and wires connect the gateway modules IM1 and IM2 between the two baseboards.
[0072] The topology detection of this embodiment is divided into three levels. The first level of topology is the self-discovery of the topology between the gateway module and the interface module. The second level of topology is the connection structure between the communication module of the main rack and the gateway module of the slave rack. The third level of topology is the self-discovery of the topology between the communication module and the interface module. Here, in the second level of topology, the gateway module will send the information of the topological connectivity between itself and the interface module to the communication module. In the first level of topology data detection, the number of interface modules is unknown. This embodiment proposes a mathematical model and implementation mechanism based on master-slave bus topology detection. In the third level of topology data detection, a method for identifying the topology and type of the same baseboard module based on a specific circuit design and a detection packet interaction mechanism is proposed. In addition, the topology detection method of this embodiment is based on the Ethernet broadcast packet mechanism.
[0073] The following describes the first layer topology detection method and the third layer topology detection method through embodiments. First, the topology self-discovery between the gateway module and the interface module is described through embodiments.
[0074] Reference Figure 1 The topology detection method of the distributed PLC system proposed in this embodiment is applied to a gateway module in the distributed PLC system. The gateway module is connected to multiple interface modules of multiple nodes and includes the following steps S110 to S140.
[0075] Step S110, sending a first detection packet to multiple interface modules of multiple test nodes and obtaining multiple first response packets returned by multiple interface modules of multiple test nodes, determining the average data processing delay of the interface module according to the reception time of the multiple first detection packets and the transmission time of the multiple first response packets; wherein, the first response packet includes the reception time of the first detection packet and the transmission time of the first response packet; the average data processing delay represents the average data processing time of a single interface module from the receipt of data to the completion of data processing and preparation for outputting the processing results; the first detection packet is used to detect the topological network structure between the gateway module and the multiple interface modules; the test node is a pre-designated node for testing the average data processing delay of a single interface module.
[0076] Here, the distributed PLC system interface module is deployed remotely and close to the monitoring equipment, and communicates with the communication module and the main control module using a master-slave industrial bus protocol to complete the collection, calculation and output functions of the equipment input. Due to the remoteness of the IO module and the large number of modules, the number and model of the modules cannot be identified, such as Figure 2 The figure shows a typical industrial bus topology diagram, where the gateway module is connected to 10 nodes.
[0077] During the system production and test verification phase, after the system is started, the gateway module spontaneously executes the method of this embodiment to perform topology detection. For example, nodes 1, 5, and 10 are selected as test nodes (1, 5, and 10 are the slot numbers of the node modules. Based on the circuit design, the value is obtained by combining the high and low voltage levels. Only the interface module inserted in a certain slot can obtain this value). Interface modules are inserted in positions 1, 5, and 10, respectively. After the system is started, the gateway module first sends a first detection packet to the interface module of each test node to determine the average data processing delay.
[0078] Although the speed of electrical signals in conductors is slower than the speed of light, in short-distance communications based on master-slave protocols, the transmission path delay is essentially negligible. For example, in a 1000-meter bus, the path delay in master-slave communication using copper wire is approximately 5µs. This delay primarily refers to the time it takes each node to receive data from the master, process it, and then send it out. This embodiment calculates the data processing delay of several test nodes to determine their average data processing delay. This average data processing delay represents the data processing delay of all nodes for subsequent detection.
[0079] In a possible embodiment, this step specifically includes the following steps (1) to (4).
[0080] (1) Sending a first detection packet to multiple interface modules of multiple test nodes in unicast form.
[0081] (2) Obtain multiple first response packets returned by multiple test nodes.
[0082] (3) Determine the average delay of multiple interface modules of multiple test nodes according to the reception time of the first detection packet and the sending time of multiple first response packets.
[0083] (4) Determine the average data processing delay of a single node based on the average delay of multiple interface modules and preset empirical values.
[0084] Here, after sending the first probe packet to multiple designated test nodes, the designated receiving addresses prevent bus conflicts. Each node begins marking (the process of marking, recording, and updating the status of devices and paths in the network) upon receiving the packet, processes the received packet, fills in the response packet, and sends the first response packet. When sending the first response packet, the time difference (the time it takes to send the first response packet minus the time it takes to receive the first probe packet) is filled in. Upon receiving a response packet, the interface module obtains the transceiver time of each node. This embodiment uses the times of three nodes to calculate the average data processing delay of the node's transceiver. Adding this to an empirical value yields the average data processing delay, Tproc, for each node.
[0085] Step S120 : determining the total waiting delay of the gateway module receiving data from multiple interface modules of multiple target nodes according to the average data processing delay.
[0086] Specifically, the interface module of each node receives and processes packets serially, and the waiting delay of the nth (n>1) node is (1+2+3+······+(n-1))×Tproc. If the maximum number of interface modules carried by a gateway module is 127, and TProc is estimated to be 1ms, then the total waiting delay is (1+2+3+4+······+127)×Tproc=8128 (ms).
[0087] Step S130: Send a second detection packet to multiple interface modules of multiple target nodes, and obtain second response packets returned by multiple interface modules of multiple target nodes within the total waiting delay; wherein the second response packet includes location information and type information of the interface modules.
[0088] Specifically, the first detection packet of step S110 is sent by the gateway module, which is a unicast address (indicating specific node). The receiving node is identified as a test packet and will carry processing time information in the first response packet. The following step S130 is sent by the gateway module to all target nodes by the broadcast address (0xff or other instructions broadcast meaning). "Target node" in the present embodiment refers to the node that needs to be detected. Generally speaking, the target node is all nodes, that is, the gateway module sends the second detection packet to the interface module of all nodes. In the detection packet of the broadcast address, the interface module only needs to return its own slot (position information) and type data (type information).
[0089] Step S140 : determining first layer topology data between the gateway module and a plurality of interface modules of a plurality of target nodes according to the location information and the type information.
[0090] In this way, the gateway module collects slot and type data from all nodes and can then access all nodes and data connected to the current gateway module. The first-layer topology data here includes slot information and board types (i.e., interface module types), forming a topological map of the board types and slots in the slave rack. Specifically, it identifies which slots on a specific chassis on the slave rack contain which board types, ultimately forming a topological map of the board types and slots in the slave rack.
[0091] The above is the topology self-discovery between the gateway module and the interface module during the system testing phase. During the system operation, the topology detection is performed through the following steps (1) to (2).
[0092] (1) When the distributed PLC system is running, the interaction data sent by the multiple interface modules of the multiple target nodes to the gateway module is obtained, and the interaction data includes periodic data and non-periodic data; the connection status of the multiple interface modules of the multiple target nodes is determined according to the interaction data, and the connection status includes offline status and online status.
[0093] (2) Determine whether the connection status of multiple interface modules of multiple target nodes is offline. If yes, update the first layer topology data.
[0094] Specifically, during system operation, the gateway module and the downstream interface modules interact with periodic data (e.g., physical quantities collected by sensors are periodically sent to the gateway module) and non-periodic data (e.g., keep-alive messages, which are sent by the gateway and responded to by the interface module; if the interface module does not respond multiple times, it is considered offline). The gateway module obtains the channel value and diagnostic value of the interface module and relies on periodic and non-periodic data to determine whether the interface module is offline or online. In some embodiments, the gateway module can update the first-layer topology data based on whether a certain interface module is offline.
[0095] The following describes the topology self-discovery between the main control module and the communication module through an embodiment.
[0096] Reference Figure 3 The topology detection method for a distributed PLC system provided in this embodiment is applied to a master control module in the PLC system. The master control module and multiple communication modules are respectively connected to a baseboard. Multiple first pins of the master control module are connected to a first power source and are electrically connected to second pins of communication modules in different slots via the baseboard. The first pins are general-purpose input / output pins (i.e., GOIO pins), and the second pins are grounded. The method includes steps S210 to S260.
[0097] Step S210: acquiring voltage information of a plurality of first pins, and determining an online communication module according to the voltage information.
[0098] Here, a main control module and a communication module are installed on the main rack of the distributed PLC system. The main control module and the communication module are plugged into the same baseboard at the same time. Through the special circuit design of the baseboard and the modules, the main control module can realize the mechanism of detecting whether the module in a specific slot is online. As shown below, the four GPIO pins of the main control module are pulled up to connect to the power supply, and the communication module signal is pulled down to ground. These two signals are connected through the baseboard. When the module is inserted, the power signal of the corresponding GPIO pin of the main control module is pulled low. When the communication module is unplugged, the power signal of the corresponding GPIO pin of the main control module is pulled high. Based on this, it is determined whether the communication module is in place. At the same time, the correspondence between different slots and GPIO pins of the baseboard is relied on to determine which slots have online modules.
[0099] like Figure 4As shown, the main control module's four GPIO pins, J1, J2, J3, and J4, are connected to power supply E1. When a communication module is inserted into the corresponding slot, its ground pin, J5, is connected to GND1. J5 then conducts electricity through the baseboard to the main control module's J1 pin, causing J1 to change from a high level to a low level. The main control module determines that the communication module is online based on the voltage change on J1.
[0100] Step S220, based on the bus protocol, sends a third detection packet to multiple communication modules in multiple specified slots, so that the multiple communication modules in the multiple specified slots match the slot number in the third detection packet with their own slot number, and then sends a third response packet to the main control module when the match is successful; wherein, the third response packet includes the slot number and single board type of the communication module.
[0101] Step S230: Acquire third response packets sent by multiple communication modules in multiple designated slots.
[0102] The main control module obtains the online communication modules on the main rack and maps them to slots through GPIO channels. Similar to the above method, this embodiment also uses a designated slot as a test slot and sends a bottom three detection packet to the designated slot based on the bus protocol.
[0103] In an optional embodiment, multiple communication modules determine their own slot numbers through the following steps (1) to (2).
[0104] (1) obtaining the level values of a plurality of third pins electrically connected to the baseboard; wherein the third pins are connected to the ground or the second power supply according to the binary value of their slot numbers;
[0105] (2) Determine its own slot number according to the level values of multiple third pins.
[0106] Specifically, the up and down pull relationship of the slot addresses is pre-designed in different slots of the baseboard, and the third pin of the communication module is connected to the power supply or ground according to its own slot number. For example, Figure 5 The J6 and J7 pins of the communication module are designed to connect to power supplies E2 and E3, respectively, and the J8 pin is designed to connect to ground GND2. In this case, the J6 and J7 pins correspond to 1, and the J8 pin corresponds to 0, forming a combined code 011. The binary 011 corresponds to the decimal 3, indicating that the communication module is located in slot 3. In this way, the communication module can determine its own slot number based on the above mechanism. Only when its own slot number matches the slot number in the third detection packet will the communication module respond with a third response packet, which includes the corresponding slot board type (communication module type) and slot number.
[0107] Step S240: Send a third detection packet to multiple communication modules in multiple target slots based on the bus protocol.
[0108] Step S250: Acquire third response packets sent by multiple communication modules in multiple target slots.
[0109] Step S260: Determine the third layer topology data between the main control module and the multiple communication modules according to the third response packet.
[0110] In steps S240 to S260, after sending a probe packet request to all slots and receiving a probe packet response, the slot position and type of each communication module of the main rack can be obtained.
[0111] In an optional embodiment, step S260 is followed by steps S270 to S280.
[0112] Step S270, determine the overall topology of the PLC system based on the first-layer topology data determined by the aforementioned distributed PLC topology data method, the second-layer topology data between the communication module and the gateway module, and the third-layer topology data; wherein the second-layer topology data is obtained by self-discovery of the communication module and the gateway module based on the bus protocol.
[0113] Step S280: In response to the broadcast detection packet sent by the host computer, a fourth response packet is sent to the host computer, the fourth response packet including the overall topology structure, so that the host computer determines the site topology structure according to the overall topology relationship of all PLC systems and displays the site topology structure.
[0114] In this embodiment, based on the detection steps of the aforementioned first topology data, second topology data and third topology data, the main rack communication module detects the slave module address and the address and type of the downstream interface module, and the PLC system main control module has detected all communication modules of the main rack; the main rack communication module reports the topology data and type of its own communication slave module and interface module to the main control module, and the main rack obtains the entire topology arrangement of the system and the corresponding relationship with the type.
[0115] like Figure 6 As shown in the figure, the host computer of a certain site sends out a broadcast detection packet based on the UPD broadcast packet of a specific port. The main control module of each PLC system receives the broadcast packet at a specific UPD port, identifies it as a host computer detection packet based on authority authentication and packet type judgment, organizes the topology and type data, and SN number (uniquely identifies a site) to send a response packet to the host computer. At this time, to avoid excessive broadcast packets, a single broadcast is returned. The host computer collects the response packets of each PLC system for a period of time at a certain interval, determines that the collection is completed, and identifies a site with the SN number, presenting the topology and type relationship of the site, as shown in the figure. Figure 6 shown. Figure 6 The middle host computer 2 is connected to multiple PLC systems 1.
[0116] The method of this embodiment is as follows Figure 9As shown, after the PLC slave machines 1 to 3 perform three-layer topology discovery using the aforementioned method, the upper machine sends a detection message based on UPD broadcast to each PLC slave machine, and the slave machines 1 to 3 respectively return the topological relationship of their own PLC slave machines.
[0117] For example, the final topo relationship is displayed on the host computer as follows:
[0118] XXX PLC:
[0119] CPU (192.168.0.1);
[0120] Communication module 1 (slot 1);
[0121] Communication module 2 (slot 2);
[0122] Communication module 3 (slot 3);
[0123] Gateway module 1 (mac address *-*-*-*-*-*);
[0124] IO1(ID1);
[0125] IO2(ID2);
[0126] Gateway module 2 (mac address *-*-*-*-*-*);
[0127] IO1(ID1);
[0128] IO2(ID2);
[0129] IO3(ID3).
[0130] XXX PLC:
[0131] CPU (192.168.0.2);
[0132] Communication module 1 (slot 1);
[0133] Communication module 2 (slot 2);
[0134] Communication module 3 (slot 3);
[0135] Gateway module 1 (mac address *-*-*-*-*-*);
[0136] IO1(ID1);
[0137] IO2(ID2);
[0138] Gateway module 2 (mac address *-*-*-*-*-*);
[0139] IO1(ID1);
[0140] IO2(ID2);
[0141] IO3(ID3).
[0142] XXX PLC:
[0143] CPU (192.168.0.n);
[0144] Communication module 1 (slot 1);
[0145] Communication module 2 (slot 2);
[0146] Communication module 3 (slot 3);
[0147] Gateway module 1 (mac address *-*-*-*-*-*);
[0148] IO1(ID1);
[0149] IO2(ID2);
[0150] Gateway module 2 (mac address *-*-*-*-*-*);
[0151] IO1(ID1);
[0152] IO2(ID2);
[0153] IO3(ID3).
[0154] This embodiment proposes a three-level topology discovery mechanism for distributed PLCs, systematically solving the discovery problems of interface modules, communication modules and PLC systems. Based on master-slave bus communication, this embodiment innovatively proposes a training (testing) and detection discovery mechanism, which solves bus conflicts and topology detection and discovery data models, and has guiding significance for other similar master-slave bus mechanisms. This embodiment also implements specific circuit design and detection mechanism, which stably and reliably solves the first-layer topology data and second-layer topology discovery problems. The method based on this embodiment can comprehensively and completely solve the deployment and topological relationships of all PLC systems in the network, and on this basis, interface and simulation design and implementation are carried out, which provides great convenience for system configuration and maintenance, ease of use and observability, and significantly improves the competitiveness of the product.
[0155] See also Figure 10 An embodiment of the present invention provides a topology detection device for a distributed PLC system, which is applied to a gateway module in the distributed PLC system. The gateway module is connected to multiple interface modules of multiple nodes. The device includes a module 110, a total waiting delay module 120, a target node detection module 130, and a first determination module 140.
[0156] The test node detection module 110 is used to send a first detection packet to multiple interface modules of multiple test nodes and obtain multiple first response packets returned by multiple interface modules of multiple test nodes, and determine the average data processing delay of the interface module based on the reception time of the multiple first detection packets and the transmission time of the multiple first response packets; wherein, the average data processing delay represents the average data processing time of a single interface module from the receipt of data to the completion of data processing and preparation for outputting the processing results; the first detection packet is used to detect the topological network structure between the gateway module and the multiple interface modules; the test node is a pre-designated node for testing the average data processing delay of a single interface module.
[0157] The total waiting delay module 120 is used to determine the total waiting delay for the gateway module to receive data from multiple interface modules of multiple target nodes based on the average data processing delay. The target node detection module 130 is used to send a second detection packet to the multiple interface modules of the multiple target nodes and obtain a second response packet returned by the multiple interface modules of the multiple target nodes within the total waiting delay; the second response packet includes the location and type information of the interface modules. The first determination module 140 is used to determine the first layer topology data between the gateway module and the multiple interface modules of the multiple target nodes based on the location and type information.
[0158] In an optional embodiment, the test node detection module 110 includes a first detection packet sending module, a first response packet acquisition module, an average delay determination module, and a calculation module. The first detection packet sending module is used to send a first detection packet to multiple interface modules of multiple test nodes in unicast form. The first response packet acquisition module is used to obtain multiple first response packets returned by multiple test nodes. The average delay determination module is used to determine the average delay of multiple interface modules of multiple test nodes based on the reception time of the first detection packet and the transmission time of multiple first response packets. The calculation module is used to determine the average data processing delay of a single node based on the average delay of multiple interface modules and a preset empirical value.
[0159] In an optional embodiment, the device further includes: a status confirmation module and an update module. The status confirmation module is configured to obtain interaction data sent from multiple interface modules of multiple target nodes to the gateway module during operation of the distributed PLC system, the interaction data including periodic and aperiodic data; and determine the connection status of the multiple interface modules of the multiple target nodes based on the interaction data, the connection status including offline and online. The update module is configured to determine whether the connection status of the multiple interface modules of the multiple target nodes is offline, and if so, update the first-layer topology data.
[0160] See also Figure 11A topology detection device for a distributed PLC system provided by an embodiment of the present invention is applied to a main control module in the distributed PLC system, wherein the main control module and multiple communication modules are respectively connected to a baseboard; wherein multiple first pins of the main control module are connected to a first power supply and are respectively electrically connected to second pins of communication modules in different slots through the baseboard in a one-to-one correspondence; wherein the first pins are general-purpose input / output pins, and the second pins are grounded; the device comprises an online detection module 210, a designated slot detection module 220, a first acquisition module 230, a target slot acquisition module 240, a second acquisition module 250, and a second determination module.
[0161] The online detection module 210 is used to obtain voltage information of multiple first pins and determine the online communication module based on the voltage information. The designated slot detection module 220 is used to send a third detection packet to multiple communication modules in multiple designated slots based on the bus protocol, so that the multiple communication modules in the multiple designated slots match the slot numbers in the third detection packet with their own slot numbers, and then send a third response packet to the main control module when the match is successful; wherein the third response packet includes the slot number and single board type of the communication module. The first acquisition module 230 is used to obtain the third response packet sent by the multiple communication modules in the multiple designated slots. The target slot acquisition module 240 is used to send the third detection packet to the multiple communication modules in the multiple target slots based on the bus protocol. The second acquisition module 250 is used to obtain the third response packet sent by the multiple communication modules in the multiple target slots. The second determination module 260 is used to determine the third layer topology data between the main control module and the multiple communication modules based on the third response packet.
[0162] In an optional embodiment, the slot location detection module 220 includes a level acquisition module and a slot number determination module. The level acquisition module is configured to acquire the level values of a plurality of third pins electrically connected to the backplane; the third pins are connected to ground or the second power supply according to the binary value of the slot number. The slot number determination module is configured to determine the slot number of the slot based on the level values of the plurality of third pins.
[0163] In an optional embodiment, the device further includes: an overall topology module and a display module. The overall topology module is configured to determine the overall topology of the PLC system based on predetermined first-layer topology data, second-layer topology data between the communication module and the gateway module, and third-layer topology data; wherein the second-layer topology data is self-discovered by the communication module and the gateway module based on the bus protocol. The display module is configured to respond to a broadcast detection packet sent by the host computer and send a fourth response packet to the host computer. The fourth response packet includes the overall topology structure, so that the host computer can determine the site topology structure based on the overall topological relationship of all PLC systems and display the site topology structure.
[0164] Reference Figure 13An embodiment of the present invention further provides an electronic device 1000, including a communication interface 1001, a processor 1002, a memory 1003 and a bus 1004, wherein the processor 1002, the communication interface 1001 and the memory 1003 are connected via the bus 1004; the memory 1003 is used to store a computer program that supports the processor 1002 to execute the topology detection method of the distributed PLC system, and the processor 1002 is configured to execute the program stored in the memory 1003.
[0165] Optionally, an embodiment of the present invention further provides a computer-readable medium having a non-volatile program code executable by the processor 1002 , where the program code enables the processor 1002 to execute the topology detection method for the distributed PLC system in the above embodiment.
[0166] It is understood from common technical knowledge that the present invention may be implemented by other embodiments that do not depart from its spirit or essential features. Therefore, the embodiments disclosed above are, in all respects, merely illustrative and not exclusive. All modifications within the scope of the present invention or equivalent to the scope of the present invention are intended to be encompassed by the present invention.
Claims
1. A topology detection method for a distributed PLC system, characterized in that: A gateway module is applied to a distributed PLC system, wherein the gateway module is connected to multiple interface modules of multiple nodes, and the method includes: Sending first detection packets to multiple interface modules of multiple test nodes and obtaining multiple first response packets returned by multiple interface modules of multiple test nodes, determining the average data processing delay of the interface module according to the reception time of the multiple first detection packets and the transmission time of the multiple first response packets; wherein, the first response packet includes the reception time of the first detection packet and the transmission time of the first response packet; the average data processing delay represents the average data processing time of a single interface module from the start of receiving data to the completion of data processing and preparation for outputting processing results; the first detection packet is used to detect the topological network structure between the gateway module and the multiple interface modules; the test node is a pre-designated node for testing the average data processing delay of a single interface module; Determine the total waiting delay for the gateway module to receive data from multiple interface modules of multiple target nodes based on the average data processing delay; Sending a second detection packet to multiple interface modules of multiple target nodes, and obtaining a second response packet returned by the multiple interface modules of the multiple target nodes within the total waiting delay; wherein the second response packet includes location information and type information of the interface module; First layer topology data between the gateway module and multiple interface modules of multiple target nodes is determined according to the location information and the type information.
2. The topology detection method of a distributed PLC system according to claim 1, characterized in that: The step of sending first detection packets to multiple interface modules of multiple test nodes and obtaining multiple first response packets returned by multiple interface modules of the multiple test nodes, and determining an average data processing delay of the interface module according to reception time of the multiple first detection packets and sending time of the multiple first response packets, includes: Sending a first detection packet to multiple interface modules of multiple test nodes in unicast form; Obtain multiple first response packets returned by multiple test nodes; Determine an average delay of multiple interface modules of multiple test nodes according to a reception time of the first detection packet and a sending time of the multiple first response packets; The average data processing delay of a single node is determined according to the average delay of the multiple interface modules and a preset empirical value.
3. The topology detection method of a distributed PLC system according to claim 1, characterized in that: The method further comprises: When the distributed PLC system is running, acquiring interaction data sent to the gateway module by multiple interface modules of multiple target nodes, the interaction data including periodic data and non-periodic data; determining connection status of the multiple interface modules of the multiple target nodes according to the interaction data, the connection status including offline status and online status; It is determined whether the connection statuses of the multiple interface modules of the multiple target nodes are in an offline state; if so, the first layer topology data is updated.
4. A topology detection method for a distributed PLC system, characterized in that: A main control module is applied to a PLC system, wherein the main control module and multiple communication modules are respectively connected to a base plate; wherein multiple first pins of the main control module are connected to a first power supply and are respectively electrically connected to second pins of the communication modules in different slots through the base plate in a one-to-one correspondence; wherein the first pins are general-purpose input / output pins, and the second pins are grounded; and the method comprises: Acquire voltage information of a plurality of first pins, and determine an online communication module according to the voltage information; Sending a third detection packet to the multiple communication modules in the multiple designated slots based on the bus protocol, so that the multiple communication modules in the multiple designated slots match the slot numbers in the third detection packet with their own slot numbers, and then sending a third response packet to the main control module when the match is successful; wherein the third response packet includes the slot number and single board type of the communication module; Obtain the third response packets sent by multiple communication modules in multiple designated slots; Sending the third detection packet to multiple communication modules in multiple target slots based on the bus protocol; Obtain the third response packets sent by multiple communication modules of multiple target slots; The third layer topology data between the main control module and the plurality of communication modules is determined according to the third response packet.
5. The topology detection method of a distributed PLC system according to claim 4, characterized in that: The multiple communication modules determine their own slot numbers by the following method: Acquiring level values of a plurality of third pins electrically connected to the baseboard; wherein the third pins are connected to ground or a second power supply according to the binary value of the slot number thereof; The own slot number is determined according to the level values of the multiple third pins.
6. The topology detection method of a distributed PLC system according to claim 4, characterized in that: After determining the third layer topology data between the main control module and the plurality of communication modules according to the third response packet, the method further includes: Determine the overall topology of the PLC system based on the first layer topology data determined by the distributed PLC topology data method according to any one of claims 1 to 3, the second layer topology data between the communication module and the gateway module, and the third layer topology data; wherein the second layer topology data is obtained by the communication module and the gateway module through self-discovery based on the bus protocol; In response to the broadcast detection packet sent by the host computer, a fourth response packet is sent to the host computer, wherein the fourth response packet includes the overall topology structure, so that the host computer determines the site topology structure according to the overall topology relationship of all PLC systems and displays the site topology structure.
7. A topology detection device for a distributed PLC system, characterized in that: A gateway module used in a distributed PLC system, wherein the gateway module is connected to multiple interface modules of multiple nodes, and the device comprises: A test node detection module is used to send a first detection packet to multiple interface modules of multiple test nodes and obtain multiple first response packets returned by multiple interface modules of multiple test nodes, and determine the average data processing delay of the interface module according to the reception time of the multiple first detection packets and the transmission time of the multiple first response packets; wherein, the first response packet includes the reception time of the first detection packet and the transmission time of the first response packet; the average data processing delay represents the average data processing time of a single interface module from the receipt of data to the completion of data processing and preparation for outputting the processing result; the first detection packet is used to detect the topological network structure between the gateway module and the multiple interface modules; the test node is a pre-designated node for testing the average data processing delay of a single interface module; a total waiting delay module, configured to determine a total waiting delay for a gateway module to receive data from multiple interface modules of multiple target nodes according to the average data processing delay; a target node detection module, configured to send a second detection packet to multiple interface modules of multiple target nodes, and obtain a second response packet returned by the multiple interface modules of the multiple target nodes within the total waiting delay; wherein the second response packet includes location information and type information of the interface module; The first determining module is configured to determine first layer topology data between the gateway module and multiple interface modules of multiple target nodes according to the location information and the type information.
8. A topology detection device for a distributed PLC, characterized in that: A main control module used in a PLC system, wherein the main control module and multiple communication modules are respectively connected to a base plate; wherein multiple first pins of the main control module are connected to a first power supply and are respectively electrically connected to second pins of the communication modules in different slots through the base plate; wherein the first pins are general-purpose input / output pins, and the second pins are grounded; and the device method comprises: an online detection module, configured to obtain voltage information of a plurality of first pins and determine an online communication module according to the voltage information; The designated slot detection module is configured to send a third detection packet to the multiple communication modules in the multiple designated slots based on the bus protocol, so that the multiple communication modules in the multiple designated slots match the slot numbers in the third detection packet with their own slot numbers, and then send a third response packet to the main control module when the match is successful; wherein the third response packet includes the slot number and single board type of the communication module; A first acquisition module is used to acquire the third response packets sent by multiple communication modules in multiple designated slots; a target slot acquisition module, configured to send the third detection packet to multiple communication modules of multiple target slots based on a bus protocol; A second acquisition module is used to acquire the third response packets sent by multiple communication modules of multiple target slots; The second determining module is configured to determine the third layer topology data between the main control module and the plurality of communication modules according to the third response packet.
9. A distributed PLC topology detection system, characterized in that: The method comprises a host computer and multiple PLC systems, each of the PLC systems respectively comprising a main control module, one or more communication modules, one or more gateway modules and one or more interface modules, the main control module being connected to one or more communication modules, each of the communication modules being respectively connected to one or more gateway modules, each of the gateway modules being connected to one or more interface modules, and each of the interface modules being connected to one or more monitoring devices; wherein the gateway module executes the topology detection method of the distributed PLC according to any one of claims 1 to 3, and the main control module executes the topology detection method of the distributed PLC according to any one of claims 4 to 6.
10. An electronic device, characterized in that: The method comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the method according to any one of claims 1 to 6 when executing the computer program.