Solar cell and method of manufacturing the same, photovoltaic module

Abstract

The application relates to a solar cell and a preparation method thereof and a photovoltaic module, the preparation method comprising the following steps: forming an N-type doped microcrystalline silicon layer comprising a plurality of sub-doped layers, the plurality of sub-doped layers comprising a target sub-doped microcrystalline silicon layer, and a process gas for forming the target sub-doped microcrystalline silicon layer comprising SiH4, N2O, PH3 and H2, the process gas pressure ranging from 8 Torr to 12 Torr, the ignition power ranging from 10000 W to 15000 W, the flow rate ratio of SiH4, N2O, PH3 and H2 ranging from 1:0.5:4:200 to 1:2:7:250, and the ignition time ranging from 25 s to 55 s. The UV decay of the heterojunction solar cell is improved, and the short-circuit current loss and the conversion efficiency loss of the heterojunction solar cell are controlled within a lower range.

Description

Technical Field

[0001] This application relates to the field of solar energy, and in particular to a solar cell and its preparation method, and a photovoltaic module. Background Technology

[0002] Heterojunction with Intrinsic Thin-layer (HJT) solar cells are a type of highly efficient crystalline silicon solar cell. Due to their advantages such as simple manufacturing process, low processing temperature, high photoelectric conversion efficiency, and ease of thinning, they have become the main direction of high-efficiency cell development and have been developed on a large scale.

[0003] Existing heterojunction solar cells utilize a passivation layer (or intrinsic passivation layer) inserted between a silicon substrate and a doped microcrystalline silicon layer to passivate defects on the silicon substrate surface, suppress carrier recombination, and thus effectively improve open-circuit voltage, fill factor, and cell efficiency. However, existing heterojunction solar cells suffer from significant UV (ultraviolet) degradation, affecting normal outdoor use. UV degradation occurs when ultraviolet light penetrates the doped microcrystalline silicon layer to reach the passivation layer, disrupting the Si-H bonds and forming dangling bonds, thereby impairing the passivation performance of the heterojunction solar cell. Therefore, improving UV degradation in heterojunction solar cells while maintaining short-circuit current and conversion efficiency is a pressing issue that needs to be addressed in this field. Summary of the Invention

[0004] Based on this, this application provides a solar cell and its preparation method, as well as a photovoltaic module, which improves the UV degradation of heterojunction solar cells while controlling the short-circuit current loss and conversion efficiency loss of heterojunction solar cells within a low range.

[0005] In a first aspect, embodiments of this application provide a solar cell, comprising:

[0006] The N-type semiconductor substrate comprises a first passivation layer, a second passivation layer, an N-type doped microcrystalline silicon layer, a P-type doped microcrystalline silicon layer, a first transparent conductive layer, a second transparent conductive layer, a first electrode, and a second electrode. The N-type semiconductor substrate includes a light-receiving surface and a backlight surface.

[0007] The first passivation layer, the N-type doped microcrystalline silicon layer, the first transparent conductive layer, and the first electrode are sequentially stacked on the light-receiving surface of the N-type semiconductor substrate. The N-type doped microcrystalline silicon layer includes multiple sub-doped layers, and the multiple sub-doped layers include a target sub-doped microcrystalline silicon layer. The crystallinity of the target sub-doped microcrystalline silicon layer ranges from 10% to 30%, the thickness ranges from 8 nm to 12 nm, and the extinction coefficient ranges from 0.25 to 0.45.

[0008] The second passivation layer, the P-type doped microcrystalline silicon layer, the second transparent conductive layer, and the second electrode are sequentially stacked on the back surface of the N-type semiconductor substrate.

[0009] In some embodiments of this application, the plurality of sub-doped layers further include: a first transition layer located between the first passivation layer and the target sub-doped microcrystalline silicon layer, wherein the material of the first transition layer comprises microcrystalline silicon doped with N-type elements.

[0010] In some embodiments of this application, the crystallinity of the first transition layer is greater than that of the target sub-doped microcrystalline silicon layer.

[0011] In some embodiments of this application, the thickness of the first transition layer ranges from 3 nm to 6 nm.

[0012] In some embodiments of this application, the plurality of sub-doped layers further include: a contact layer located between the target sub-doped microcrystalline silicon layer and the first transparent conductive layer, wherein the material of the contact layer includes microcrystalline silicon that is not doped with oxygen but is doped with N-type elements.

[0013] In some embodiments of this application, the crystallinity of the target sub-doped microcrystalline silicon layer is greater than that of the contact layer.

[0014] In some embodiments of this application, the thickness of the contact layer ranges from 2 nm to 5 nm.

[0015] In some embodiments of this application, the material of the target sub-doped microcrystalline silicon layer includes microcrystalline silicon doped with oxygen and N-type elements, wherein the concentration of N-type elements in the first transition layer is less than the concentration of N-type elements in the target sub-doped microcrystalline silicon layer, and the concentration of N-type elements in the target sub-doped microcrystalline silicon layer is less than the concentration of N-type elements in the contact layer.

[0016] In some embodiments of this application, the solar cell further includes: an N-type doped amorphous silicon layer located between the contact layer and the first transparent conductive layer, wherein the thickness of the N-type doped amorphous silicon layer ranges from 1 to 2 nm.

[0017] In some embodiments of this application, the solar cell further includes an initial transition layer located between the N-type doped microcrystalline silicon layer and the first passivation layer, wherein the material of the initial transition layer comprises undoped N-type microcrystalline silicon.

[0018] In some embodiments of this application, the thickness of the initial transition layer ranges from 0.2 nm to 1 nm.

[0019] In some embodiments of this application, the solar cell further includes a seed layer located between the initial transition layer and the first passivation layer, wherein the seed layer is made of microcrystalline silicon without oxygen and N-type elements.

[0020] In some embodiments of this application, the thickness of the seed layer ranges from 0.1 nm to 0.5 nm.

[0021] In some embodiments of this application, the first passivation layer includes a plurality of first sub-passivation layers.

[0022] In some embodiments of this application, the plurality of first sub-passivation layers include a first anti-epitaxial layer, a first anti-yellowing layer, a first main passivation layer, and a first outer layer, which are sequentially stacked on the light-receiving surface of the N-type semiconductor substrate; the materials of the first anti-epitaxial layer, the first anti-yellowing layer, the first anti-yellowing layer, and the first outer layer include intrinsic amorphous silicon.

[0023] In some embodiments of this application, the thickness of the first anti-epitaxial layer ranges from 0.5 nm to 3 nm, the thickness of the first anti-yellowing layer ranges from 0.1 nm to 1 nm, the thickness of the first main passivation layer ranges from 2 nm to 6 nm, and the thickness of the first outer layer ranges from 0.5 nm to 2 nm.

[0024] In some embodiments of this application, the second passivation layer includes a plurality of second sub-passivation layers.

[0025] In some embodiments of this application, the plurality of second sub-passivation layers include a second anti-epitaxial layer, a second anti-yellowing layer, a second main passivation layer, and a second outer layer, which are sequentially stacked on the back surface of the N-type semiconductor substrate; the materials of the second anti-epitaxial layer, the second anti-yellowing layer, the second anti-yellowing layer, and the second outer layer include intrinsic amorphous silicon.

[0026] In some embodiments of this application, the thickness of the second anti-epitaxial layer ranges from 0.5 nm to 3 nm, the thickness of the second anti-yellowing layer ranges from 0.1 nm to 1 nm, the thickness of the second main passivation layer ranges from 2 nm to 6 nm, and the thickness of the second outer layer ranges from 0.5 nm to 2 nm.

[0027] In some embodiments of this application, the P-type doped microcrystalline silicon layer comprises multiple sublayers.

[0028] In some embodiments of this application, the plurality of sublayers include a first sublayer, a second sublayer, and a third sublayer stacked sequentially on the surface of the second passivation layer away from the N-type semiconductor substrate; the materials of the first sublayer, the second sublayer, and the third sublayer include microcrystalline silicon layers doped with oxygen and p-type elements.

[0029] In some embodiments of this application, the concentration of P-type elements in the first sublayer, the second sublayer, and the third sublayer gradually increases; the thickness of the first sublayer ranges from 5 nm to 10 nm, the thickness of the second sublayer ranges from 8 nm to 15 nm, and the thickness of the third sublayer ranges from 8 nm to 15 nm.

[0030] In some embodiments of this application, the solar cell further includes a second transition layer located between the second passivation layer and the first sublayer, wherein the material of the second transition layer is microcrystalline silicon doped with oxygen but not doped with p-type elements.

[0031] Secondly, this application also provides a method for preparing a solar cell, comprising:

[0032] An N-type semiconductor substrate is provided, the N-type semiconductor substrate comprising an opposing light-receiving surface and a back-lighting surface;

[0033] A first passivation layer, an N-type doped microcrystalline silicon layer, a first transparent conductive layer, and a first electrode are sequentially stacked on the light-receiving surface of the N-type semiconductor substrate. The N-type doped microcrystalline silicon layer includes multiple sub-doped layers, including a target sub-doped microcrystalline silicon layer. The crystallinity of the target sub-doped microcrystalline silicon layer ranges from 10% to 30%, the thickness ranges from 8 nm to 12 nm, and the extinction coefficient ranges from 0.25 to 0.45. The target sub-doped microcrystalline silicon layer is formed using a plasma-enhanced chemical vapor deposition process, and the process gas range during the formation of the target sub-doped microcrystalline silicon layer is 8 Torr to 12 Torr.

[0034] A second passivation layer, a P-type doped microcrystalline silicon layer, a second transparent conductive layer, and a second electrode are sequentially stacked on the back surface of the N-type semiconductor substrate.

[0035] In some embodiments of this application, the process gases used to form the target sub-doped microcrystalline silicon layer include SiH4, N2O, PH3, and H2, with an ignition power range of 10000W to 15000W, a flow ratio of SiH4, N2O, PH3, and H2 ranging from 1:0.5:4:200 to 1:2:7:250, and an ignition time range of 25s to 55s.

[0036] In some embodiments of this application, before forming the N-type doped microcrystalline silicon layer, the method further includes: forming a seed layer on the surface of the first passivation layer away from the N-type semiconductor substrate, wherein the material of the seed layer includes microcrystalline silicon without oxygen and N-type elements.

[0037] In some embodiments of this application, the process gases used to form the seed layer include SiH4 and H2, the process gas pressure ranges from 4 Torr to 6 Torr, the ignition power ranges from 6000W to 8000W, the flow ratio of SiH4 to H2 ranges from 1:250 to 1:350, and the ignition time ranges from 2s to 5s.

[0038] In some embodiments of this application, it also includes:

[0039] An initial transition layer is formed on the surface of the seed layer away from the first passivation layer, and the material of the initial transition layer includes undoped N-type microcrystalline silicon;

[0040] The N-type doped microcrystalline silicon layer is formed on the surface of the initial transition layer away from the seed layer.

[0041] In some embodiments of this application, forming the N-type doped microcrystalline silicon layer includes:

[0042] A first transition layer is formed on the surface of the initial transition layer that is away from the seed layer;

[0043] The target sub-doped microcrystalline silicon layer is formed on the surface of the first transition layer away from the initial transition layer;

[0044] A contact layer is formed on the surface of the target sub-doped microcrystalline silicon layer away from the first passivation layer.

[0045] In some embodiments of this application, the process gas pressure during the formation of the first transition layer, the target sub-doped microcrystalline silicon layer, and the contact layer is greater than the process gas pressure during the formation of the seed layer and the initial transition layer.

[0046] Furthermore, the ignition power during the formation of the first transition layer, the target sub-doped microcrystalline silicon layer, and the contact layer is greater than the ignition power during the formation of the seed layer and the initial transition layer.

[0047] Furthermore, the hydrogen dilution ratio during the formation of the first transition layer, the target sub-doped microcrystalline silicon layer, and the contact layer is less than the hydrogen dilution ratio during the formation of the seed layer and the initial transition layer.

[0048] In some embodiments of this application, the process gases used to form the initial transition layer include SiH4, N2O and H2, the process gas pressure ranges from 4 Torr to 6 Torr, the ignition power ranges from 6000W to 8000W, the flow ratio of SiH4, N2O and H2 ranges from 1:1:250 to 1:8:350, and the ignition time ranges from 4s to 10s.

[0049] In some embodiments of this application, the process gas used to form the first transition layer includes SiH4, N2O, PH3, and H2. The process gas pressure ranges from 8 Torr to 12 Torr, the ignition power ranges from 10000W to 15000W, the flow ratio of SiH4, N2O, PH3, and H2 ranges from 1:0.5:3:250 to 1:2:6:300, and the ignition time ranges from 10s to 25s.

[0050] In some embodiments of this application, the process gas used to form the contact layer includes SiH4, PH3 and H2, the process gas pressure ranges from 8 Torr to 12 Torr, the ignition power ranges from 10000W to 15000W, the flow ratio of SiH4, PH3 and H2 ranges from 1:5:200 to 1:8:250, and the ignition time ranges from 8s to 25s.

[0051] Thirdly, this application also provides a method for preparing a solar cell, comprising:

[0052] An N-type semiconductor substrate is provided, the N-type semiconductor substrate comprising an opposing light-receiving surface and a back-lighting surface;

[0053] A first passivation layer, an N-type doped microcrystalline silicon layer, a first transparent conductive layer, and a first electrode are sequentially stacked on the light-receiving surface of the N-type semiconductor substrate. The N-type doped microcrystalline silicon layer includes multiple sub-doped layers, including a target sub-doped microcrystalline silicon layer. The target sub-doped microcrystalline silicon layer is formed using plasma-enhanced chemical vapor deposition (PECVD). The process gases used to form the target sub-doped microcrystalline silicon layer include SiH4, N2O, PH3, and H2. The process gas pressure ranges from 8 Torr to 12 Torr, the ignition power ranges from 10000W to 15000W, the flow ratio of SiH4, N2O, PH3, and H2 ranges from 1:0.5:4:200 to 1:2:7:250, and the ignition time ranges from 25s to 55s.

[0054] A second passivation layer, a P-type doped microcrystalline silicon layer, a second transparent conductive layer, and a second electrode are sequentially stacked on the back surface of the N-type semiconductor substrate.

[0055] In some embodiments of this application, before forming the N-type doped microcrystalline silicon layer, the method further includes: forming a seed layer on the surface of the first passivation layer away from the N-type semiconductor substrate, wherein the material of the seed layer includes microcrystalline silicon without oxygen and N-type elements.

[0056] In some embodiments of this application, the process gases used to form the seed layer include SiH4 and H2, the process gas pressure ranges from 4 Torr to 6 Torr, the ignition power ranges from 6000W to 8000W, the flow ratio of SiH4 to H2 ranges from 1:250 to 1:350, and the ignition time ranges from 2s to 5s.

[0057] In some embodiments of this application, it also includes:

[0058] An initial transition layer is formed on the surface of the seed layer away from the first passivation layer, and the material of the initial transition layer includes undoped N-type microcrystalline silicon;

[0059] The N-type doped microcrystalline silicon layer is formed on the surface of the initial transition layer away from the seed layer.

[0060] In some embodiments of this application, forming the N-type doped microcrystalline silicon layer includes:

[0061] A first transition layer is formed on the surface of the initial transition layer that is away from the seed layer;

[0062] The target sub-doped microcrystalline silicon layer is formed on the surface of the first transition layer away from the initial transition layer;

[0063] A contact layer is formed on the surface of the target sub-doped microcrystalline silicon layer away from the first passivation layer.

[0064] In some embodiments of this application, the process gas pressure during the formation of the first transition layer, the target sub-doped microcrystalline silicon layer, and the contact layer is greater than the process gas pressure during the formation of the seed layer and the initial transition layer.

[0065] Furthermore, the ignition power during the formation of the first transition layer, the target sub-doped microcrystalline silicon layer, and the contact layer is greater than the ignition power during the formation of the seed layer and the initial transition layer.

[0066] Furthermore, the hydrogen dilution ratio during the formation of the first transition layer, the target sub-doped microcrystalline silicon layer, and the contact layer is less than the hydrogen dilution ratio during the formation of the seed layer and the initial transition layer.

[0067] In some embodiments of this application, the process gases used to form the initial transition layer include SiH4, N2O and H2, the process gas pressure ranges from 4 Torr to 6 Torr, the ignition power ranges from 6000W to 8000W, the flow ratio of SiH4, N2O and H2 ranges from 1:1:250 to 1:8:350, and the ignition time ranges from 4s to 10s.

[0068] In some embodiments of this application, the process gas used to form the first transition layer includes SiH4, N2O, PH3, and H2. The process gas pressure ranges from 8 Torr to 12 Torr, the ignition power ranges from 10000W to 15000W, the flow ratio of SiH4, N2O, PH3, and H2 ranges from 1:0.5:3:250 to 1:2:6:300, and the ignition time ranges from 10s to 25s.

[0069] In some embodiments of this application, the process gas used to form the contact layer includes SiH4, PH3 and H2, the process gas pressure ranges from 8 Torr to 12 Torr, the ignition power ranges from 10000W to 15000W, the flow ratio of SiH4, PH3 and H2 ranges from 1:5:200 to 1:8:250, and the ignition time ranges from 8s to 25s.

[0070] Fourthly, this application also provides a photovoltaic module, comprising:

[0071] A battery string, comprising a plurality of the aforementioned solar cells, or a solar cell prepared by a method comprising a plurality of the aforementioned solar cells.

[0072] The embodiments of this application may have, or at least have, the following advantages:

[0073] In the embodiments of this application, the solar cell and its preparation method, and the photovoltaic module, the preparation method forms an N-type doped microcrystalline silicon layer comprising multiple sub-doped layers, the multiple sub-doped layers including a target sub-doped microcrystalline silicon layer, and the target sub-doped microcrystalline silicon layer is formed by plasma-enhanced chemical vapor deposition. The process gas for forming the target sub-doped microcrystalline silicon layer includes SiH4, N2O, PH3 and H2, the process gas pressure range is 8 Torr to 12 Torr, the ignition power range is 10000W to 15000W, the flow ratio of SiH4, N2O, PH3 and H2 ranges from 1:0.5:4:200 to 1:2:7:250, and the ignition time ranges from 25s to 55s. In this application, the target sub-doped microcrystalline silicon layer is formed using the aforementioned specific process parameters. Specifically, a higher process gas pressure is used to form the target sub-doped microcrystalline silicon layer. When the process gas pressure ranges from 8 Torr to 12 Torr, the atomic arrangement becomes disordered under this high process gas pressure, and the etching effect of H is weakened. At this time, Si atoms and H atoms will combine to form more amorphous structures, resulting in a higher proportion of amorphous structures in the target sub-doped microcrystalline silicon layer. This narrows the optical band gap of the target sub-doped microcrystalline silicon layer and reduces the crystallinity of the formed target sub-doped microcrystalline silicon layer, thereby improving the absorption capacity of the target sub-doped microcrystalline silicon layer for ultraviolet light (UV light) to reduce the amount of ultraviolet light (UV light) reaching the first passivation layer, thereby reducing the damage of ultraviolet light (UV light) to the first intrinsic passivation layer and improving UV attenuation. However, under such high process gas pressure, the crystallinity of the target sub-doped microcrystalline silicon layer will decrease excessively, affecting the carrier mobility and light transmittance of the layer. This leads to short-circuit current loss and conversion efficiency loss in the solar cell. Furthermore, the uniformity and density of the target sub-doped microcrystalline silicon layer will deteriorate, increasing the extinction coefficient and further affecting light transmittance, ultimately resulting in a loss of conversion efficiency. Therefore, during the formation of the target sub-doped microcrystalline silicon layer, it is necessary to maintain the ignition power range of 10000W to 15000W. This ignition power generates more active particles and increases their density. These particles promote the rearrangement of silicon atoms, thereby improving the excessively low crystallinity and keeping the crystallinity of the formed target sub-doped microcrystalline silicon layer within a low range (e.g., 10%). Within the range of ~30%, and the flow ratio of SiH4, N2O, PH3 and H2 is in the range of 1:1:3:200~1:3:5:250. Under this ratio, the hydrogen dilution ratio is relatively large, which can control the deposition rate, stabilize the uniformity of the target sub-doped microcrystalline silicon layer, reduce the extinction coefficient of the target sub-doped microcrystalline silicon layer, and thus enhance the transmittance of incident light in the target sub-doped microcrystalline silicon layer.Furthermore, by controlling the ignition time range to 25s~55s, the thickness range of the target sub-doped microcrystalline silicon layer can be controlled, thereby reducing the parasitic absorption of incident light by the target sub-doped microcrystalline silicon layer and further reducing the short-circuit current loss and conversion efficiency loss of the solar cell.

[0074] Details of one or more embodiments of this application are set forth in the following drawings and description. Other features, objects, and advantages of this application will become apparent from the specification, drawings, and claims. Attached Figure Description

[0075] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0076] Figure 1 This is a schematic diagram of the structure of a solar cell provided in some embodiments of this application;

[0077] Figure 2 This is a schematic diagram of the structure of a solar cell provided in some embodiments of this application;

[0078] Figure 3 This is a schematic diagram of the structure of a solar cell provided in some embodiments of this application;

[0079] Figure 4 This is a schematic diagram of the structure of a solar cell provided in some embodiments of this application;

[0080] Figure 5 This is a schematic flowchart illustrating the method for fabricating solar cells provided in some embodiments of this application;

[0081] Figure 6 This is a schematic flowchart illustrating the method for fabricating solar cells provided in some embodiments of this application;

[0082] Figure 7 Provided in some embodiments of this application Figure 5 or Figure 6 The diagram shows a partial flow chart of the method for fabricating a solar cell.

[0083] Figure 8 This is a schematic diagram of the structure behind the N-type semiconductor substrate provided in some embodiments of this application;

[0084] Figure 9 This is a schematic diagram of the structure after forming the first passivation layer and the second passivation layer according to some embodiments of this application;

[0085] Figure 10 This is a schematic diagram of the structure after the formation of the seed layer and the initial transition layer provided in some embodiments of this application;

[0086] Figure 11 This is a schematic diagram of the structure after forming an N-type doped microcrystalline silicon layer provided in some embodiments of this application;

[0087] Figure 12 This is a schematic diagram of the structure after forming a P-type doped microcrystalline silicon layer provided in some embodiments of this application;

[0088] Figure 13 This is a schematic diagram of the structure after forming the first transparent conductive layer and the second transparent conductive layer according to some embodiments of this application;

[0089] Figure 14 This is a schematic diagram of the structure after forming the first electrode and the second electrode according to some embodiments of this application.

[0090] Explanation of reference numerals in the attached figures:

[0091] 100 - N-type semiconductor substrate; 101 - First passivation layer; 102 - Second passivation layer; 103 - N-type doped microcrystalline silicon layer; 103a - First transition layer; 103b - Target doped microcrystalline silicon layer; 103c - Contact layer; 104 - P-type doped microcrystalline silicon layer; 105 - First transparent conductive layer; 106 - Second transparent conductive layer; 107 - First electrode; 108 - Second electrode; 109 - Initial transition layer; 110 - Seed layer; 111 - N-type doped amorphous silicon layer. Detailed Implementation

[0092] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0093] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0094] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, parts, regions, layers, doping types, and / or portions, these elements, parts, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, part, region, layer, doping type, or portion from another element, part, region, layer, doping type, or portion. Therefore, without departing from the teachings of this application, the first element, part, region, layer, doping type, or portion discussed below may be referred to as a second element, part, region, layer, or portion.

[0095] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0096] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, in this specification, the term “and / or” includes any and all combinations of the associated listed items.

[0097] The structure of the embodiments of this application should not be limited to the specific shape shown in the accompanying drawings, but includes shape deviations due to, for example, manufacturing techniques.

[0098] It is understood that in the accompanying drawings of this application, some adjacent membrane layers with the same processed membrane material are drawn as connected to make them resemble the actual structure.

[0099] Existing heterojunction solar cells use doped microcrystalline silicon layers instead of traditional doped amorphous silicon layers. Compared to doped amorphous silicon layers, doped microcrystalline silicon layers have better conductivity, higher carrier mobility, and higher conversion efficiency. The crystallinity of the doped microcrystalline silicon layer directly affects carrier mobility and lattice defects. To balance carrier mobility and lattice defects, existing doped microcrystalline silicon layers maintain a high crystallinity (generally greater than 30%, and sometimes even reaching 40% or higher). This high crystallinity results in weak absorption of short-wavelength ultraviolet (UV) light by the doped microcrystalline silicon layer. This allows UV light to penetrate the doped microcrystalline silicon layer and reach the passivation layer, disrupting the Si-H bonds in the passivation layer and forming dangling bonds. Consequently, the passivation performance of the heterojunction solar cell is impaired, leading to severe UV degradation problems. Furthermore, in existing processes for preparing doped microcrystalline silicon layers, when the doped microcrystalline silicon layer includes multiple layers, the deposition pressure during the preparation of the multilayer doped microcrystalline silicon is almost the same, and the deposition pressure is not high, generally less than 6 Torr, which makes the absorption of ultraviolet light (UV light) of the prepared doped microcrystalline silicon layer very weak.

[0100] In some embodiments, although the absorption of ultraviolet (UV) light by the doped microcrystalline silicon layer can be improved by reducing the crystallinity of the doped microcrystalline silicon layer, thereby improving UV attenuation, the reduction in the crystallinity of the doped microcrystalline silicon layer will lead to serious problems of short-circuit current loss and conversion efficiency loss in heterojunction solar cells.

[0101] Therefore, the first aspect of this application provides a solar cell. Figure 1 This is a schematic diagram of the structure of a solar cell provided in some embodiments of this application. (Reference) Figure 1 The solar cell includes:

[0102] The N-type semiconductor substrate 100 comprises an N-type semiconductor substrate 100, a first passivation layer 101, a second passivation layer 102, an N-type doped microcrystalline silicon layer 103, a P-type doped microcrystalline silicon layer 104, a first transparent conductive layer 105, a second transparent conductive layer 106, a first electrode 107, and a second electrode 108. The N-type semiconductor substrate 100 includes a light-receiving surface and a backlighting surface.

[0103] The first passivation layer 101, the N-type doped microcrystalline silicon layer 103, the first transparent conductive layer 105, and the first electrode 107 are sequentially stacked on the light-receiving surface of the N-type semiconductor substrate 100. The N-type doped microcrystalline silicon layer 103 includes multiple sub-doped layers, including a target sub-doped microcrystalline silicon layer 103b. The crystallinity of the target sub-doped microcrystalline silicon layer ranges from 10% to 30%, the thickness ranges from 8 nm to 12 nm, and the extinction coefficient ranges from 0.25 to 0.45.

[0104] The second passivation layer 102, the P-type doped microcrystalline silicon layer 104, the second transparent conductive layer 106, and the second electrode 108 are sequentially stacked on the back surface of the N-type semiconductor substrate 100.

[0105] Specifically, the N-type semiconductor substrate 100 serves as the main light-absorbing layer of the solar cell to generate electron-hole pairs. In some embodiments, the material of the N-type semiconductor substrate 100 may be single-crystal silicon doped with an N-type element. In one example, the N-type element includes phosphorus atoms. In another example, the N-type element may also include one or more of phosphorus atoms, arsenic atoms, or antimony atoms.

[0106] The light-receiving surface of the N-type semiconductor substrate 100 is the side on which light is incident, and the back-lighting surface is the side opposite to the light-receiving surface. In some embodiments, the light-receiving and back-lighting surfaces of the N-type semiconductor substrate 100 have uneven shapes (not shown in the figure) to improve light absorption efficiency. In one example, the uneven shape includes a V-groove shape, a pyramid shape, or an inverted pyramid shape.

[0107] The first passivation layer 101 and the second passivation layer 102 are used to passivate the surface defects of the light-receiving surface and the back-light-receiving surface of the N-type semiconductor substrate 100 (by passingivating the dangling bonds on the surface of the N-type semiconductor substrate 100 with hydrogen atoms), thereby suppressing carrier recombination and improving conversion efficiency.

[0108] In some embodiments, the first passivation layer 101 includes a plurality of first sub-passivation layers. In one example, the plurality of first sub-passivation layers include a first anti-epitaxial layer, a first anti-yellowing layer, a first main passivation layer, and a first outer layer, which are sequentially stacked on the light-receiving surface of the N-type semiconductor substrate 100; the materials of the first anti-epitaxial layer, the first anti-yellowing layer, the first anti-yellowing layer, and the first outer layer include intrinsic amorphous silicon (ia-Si:H).

[0109] The first anti-epitaxial layer primarily prevents epitaxial growth; excessive thickness will not have a significant effect and may even increase series resistance. The first anti-yellowing layer prevents the formation of yellow powder, as excessive yellow powder will affect the passivation performance of the first sub-passivation layer. The first main passivation layer is the main layer of the first passivation layer 101, and it plays a major role in passivation; this layer is relatively thick. The first outer layer primarily enhances the contact with the N-type doped microcrystalline silicon layer 103, reduces the series resistance of the battery, and improves the fill factor. The first outer layer should not be too thick or too thin; excessive thickness will affect the uniformity of the film and increase the series resistance, while excessive thinness will not achieve the desired effect. In some embodiments, the thickness range of the first anti-epitaxial layer is 0.5 nm to 3 nm, the thickness range of the first anti-yellowing layer is 0.1 nm to 1 nm, the thickness range of the first main passivation layer is 2 nm to 6 nm, and the thickness range of the first outer layer is 0.5 nm to 2 nm.

[0110] In some embodiments, the second passivation layer 102 includes a plurality of second sub-passivation layers. In one example, the plurality of second sub-passivation layers include a second anti-epitaxial layer, a second anti-yellowing layer, a second main passivation layer, and a second outer layer, which are sequentially stacked on the back surface of the N-type semiconductor substrate 100; the materials of the second anti-epitaxial layer, the second anti-yellowing layer, the second anti-yellowing layer, and the second outer layer include intrinsic amorphous silicon (ia-Si:H).

[0111] The second anti-epitaxial layer primarily prevents epitaxial growth; excessive thickness will not be effective and may even increase series resistance. The second anti-yellowing layer prevents the formation of yellow powder, as excessive yellow powder can negatively impact the passivation performance of the second sub-passivation layer. The second main passivation layer is the primary layer of the second passivation layer 102, playing a major role in passivation; this layer is relatively thick. The second outer layer primarily enhances the contact with the p-type doped microcrystalline silicon layer 104, reduces the battery's series resistance, and improves the battery's fill factor. The second outer layer should not be too thick or too thin; excessive thickness will affect the film uniformity and increase series resistance, while excessive thinness will not achieve the desired effect. In some embodiments, the thickness range of the second anti-epitaxial layer is 0.5 nm to 3 nm, the thickness range of the second anti-yellowing layer is 0.1 nm to 1 nm, the thickness range of the second main passivation layer is 2 nm to 6 nm, and the thickness range of the second outer layer is 0.5 nm to 2 nm.

[0112] The main function of the N-type doped microcrystalline silicon layer is to form a surface electric field with the N-type semiconductor substrate 100 to promote the transport of charge carriers (electrons) to the first transparent conductive layer. The N-type doped microcrystalline silicon layer 103 includes multiple sub-doped layers, including the target sub-doped microcrystalline silicon layer 103b. Research has found that the parameters of the target sub-doped silicon layer 103b have a significant impact on UV degradation, short-circuit current, and conversion efficiency. Specifically, when the crystallinity of the target sub-doped silicon layer 103b is too high, although the short-circuit current loss and conversion efficiency loss of the solar cell will be reduced, it will lead to an increase in UV light (ultraviolet light) reaching the first passivation layer 101 through the target sub-doped silicon layer 103b, resulting in particularly severe UV degradation of the solar cell. Conversely, when the crystallinity of the target sub-doped silicon layer 103b is too low, the amount of UV light reaching the first passivation layer 101 through the target sub-doped silicon layer 103b will be reduced. Although this can improve UV degradation, the conversion efficiency loss of the solar cell will be particularly severe. When the thickness of the target sub-doped silicon layer 103b is too large, although it can slightly improve UV degradation, the thickness of the target sub-doped silicon layer 103b will also be affected. Parasitic absorption is aggravated, leading to excessive short-circuit current loss and conversion efficiency loss in solar cells. Conversely, if the thickness of the target doped silicon 103b layer is too small, although the parasitic absorption of the target doped silicon 103b layer will decrease, thus reducing the short-circuit current loss and conversion efficiency loss of the solar cell, it is still not conducive to improving UV degradation. If the extinction coefficient of the target doped silicon 103b layer is too large, it will increase the absorption ratio of the target doped silicon 103b layer for short-wavelength light, which can improve UV degradation to some extent, but it will also exacerbate the short-circuit current loss and conversion efficiency loss of the cell. Conversely, if the extinction coefficient of the target doped silicon 103b layer is too small, it will decrease the absorption ratio of the target doped silicon 103b layer for short-wavelength light, which can reduce the short-circuit current loss and conversion efficiency loss of the cell, but it is not conducive to improving UV degradation.Therefore, this application creatively improves the crystallinity, thickness, and extinction coefficient of the target sub-doped microcrystalline silicon layer 103b within a specific range in the N-type doped microcrystalline silicon layer 103. This improves UV degradation while controlling the short-circuit current and conversion efficiency loss of the battery within a low range. Specifically, the crystallinity of the target sub-doped microcrystalline silicon layer 103b is in the range of 10%-30%, and the thickness is in the range of 8 nm. When the thickness of the target sub-doped microcrystalline silicon layer 103b is ~12nm, the extinction coefficient ranges from 0.25 to 0.45, and the crystallinity ranges from 10% to 30%, the proportion of amorphous silicon in the target sub-doped microcrystalline silicon layer 103b will be relatively high. This results in a narrower optical band gap in the target sub-doped microcrystalline silicon layer 103b, thereby enhancing the absorption of short-wavelength ultraviolet (or UV) light by the target sub-doped microcrystalline silicon layer 103b. This reduces the amount of UV light reaching the first passivation layer 101, thereby reducing the damage to Si-H bonds in the first passivation layer 101 and the Si-H bonds at the interface between the first passivation layer 101 and the N-type semiconductor substrate 100 caused by UV light. This reduces the formation of dangling bonds, preventing or reducing damage to the passivation performance of the first passivation layer 101, thus improving UV attenuation. Furthermore, the thickness of the target sub-doped microcrystalline silicon layer 103b is in the range of 8 nm. At ~12nm, the parasitic absorption of incident light by the target sub-doped microcrystalline silicon layer 103b can be reduced to compensate for some of the short-circuit current loss caused by the low crystallinity of the target sub-doped microcrystalline silicon layer 103b. When the extinction coefficient of the target sub-doped microcrystalline silicon layer 103b is in the range of 0.25-0.45, the transmittance of incident light (long-wavelength red light and infrared light) in the target sub-doped microcrystalline silicon layer 103b can be enhanced to compensate for some of the conversion efficiency loss caused by the low crystallinity of the target sub-doped microcrystalline silicon layer 103b.

[0113] The solar cell of this application will be further described below with reference to specific embodiments and comparative examples, but it should not be construed as a limitation on the scope of protection of this application.

[0114] Example 1, a solar cell, comprising:

[0115] The N-type semiconductor substrate 100 comprises an N-type semiconductor substrate 100, a first passivation layer 101, a second passivation layer 102, an N-type doped microcrystalline silicon layer 103, a P-type doped microcrystalline silicon layer 104, a first transparent conductive layer 105, a second transparent conductive layer 106, a first electrode 107, and a second electrode 108. The N-type semiconductor substrate 100 includes a light-receiving surface and a backlighting surface.

[0116] The first passivation layer 101, the N-type doped microcrystalline silicon layer 103, the first transparent conductive layer 105, and the first electrode 107 are sequentially stacked on the light-receiving surface of the N-type semiconductor substrate 100. The N-type doped microcrystalline silicon layer 103 includes multiple sub-doped layers, including a target sub-doped microcrystalline silicon layer 103b. The crystallinity of the target sub-doped microcrystalline silicon layer 103b is in the range of 25%, the thickness is in the range of 10 nm, and the extinction coefficient is in the range of 0.30.

[0117] The second passivation layer 102, the P-type doped microcrystalline silicon layer 104, the second transparent conductive layer 106, and the second electrode 108 are sequentially stacked on the back surface of the N-type semiconductor substrate 100.

[0118] Example 2, a solar cell, differs from Example 1 mainly in that: the crystallinity of the target sub-doped microcrystalline silicon layer 103b ranges from 30%, the thickness ranges from 8 nm, and the extinction coefficient ranges from 0.25.

[0119] Example 3, a solar cell, differs from Example 1 mainly in that: the crystallinity of the target sub-doped microcrystalline silicon layer 103b ranges from 20%, the thickness ranges from 10 nm, and the extinction coefficient ranges from 0.36.

[0120] Example 4, a solar cell, differs from Example 1 mainly in that: the crystallinity of the target sub-doped microcrystalline silicon layer 103b ranges from 10%, the thickness ranges from 12nm, and the extinction coefficient ranges from 0.45.

[0121] Comparative Example 1, a solar cell, differs from Example 1 mainly in that: the crystallinity of the target sub-doped microcrystalline silicon layer 103b ranges from 35%, the thickness ranges from 10 nm, and the extinction coefficient ranges from 0.20.

[0122] Comparative Example 2, a solar cell, differs from Example 1 mainly in that: the crystallinity of the target sub-doped microcrystalline silicon layer 103b ranges from 25%, the thickness ranges from 6 nm, and the extinction coefficient ranges from 0.29.

[0123] Comparative Example 3, a solar cell, differs from Example 1 mainly in that: the crystallinity of the target sub-doped microcrystalline silicon layer 103b ranges from 25%, the thickness ranges from 15 nm, and the extinction coefficient ranges from 0.31.

[0124] Comparative Example 4, a solar cell, differs from Example 1 mainly in that: the crystallinity of the target sub-doped microcrystalline silicon layer 103b ranges from 8%, the thickness ranges from 10 nm, and the extinction coefficient ranges from 0.48.

[0125] UV attenuation, short-circuit current loss, and conversion efficiency loss were tested for Examples 1-4 and Comparative Examples 1-4. The relevant parameters of the target sub-doped microcrystalline silicon layer in Examples 1-4 and Comparative Examples 1-4 and the corresponding test results are shown in Table 1.

[0126] Table 1:

[0127]

[0128] In Table 1, UV60 attenuation indicates an ultraviolet radiation level of 60 kWh / m². 2 The performance degradation of solar cells under the test conditions.

[0129] As shown in Table 1, the solar cells using the embodiments of this application exhibit improved UV degradation (less than or equal to 1.68%), while controlling the short-circuit current loss (less than or equal to 32mA) and conversion efficiency loss (less than or equal to 0.1%) within a low range. A comparison of Comparative Examples 1-4 with Examples 1-4 reveals that when only one or two of the parameters—crystallinity, extinction coefficient, and thickness—are within the range of this application, two undesirable scenarios exist: First, the UV degradation of the solar cell is improved, but the short-circuit current loss and conversion efficiency loss are relatively severe; second, the short-circuit current loss and conversion efficiency loss of the solar cell can be controlled within a small range, but the UV degradation is relatively severe.

[0130] Furthermore, the material of the target sub-doped microcrystalline silicon layer 103b comprises microcrystalline silicon (μc-Si:H) doped with oxygen and N-type elements. In one example, the N-type element comprises phosphorus atoms. In another example, the N-type element may also comprise one or more of phosphorus atoms, arsenic atoms, or antimony atoms.

[0131] In some embodiments, continue to refer to Figure 1 In addition to the target sub-doped microcrystalline silicon layer 103b, the plurality of sub-doped layers further include a first transition layer 103a, located between the first passivation layer 101 and the target sub-doped microcrystalline silicon layer 103b. The material of the first transition layer 103a includes microcrystalline silicon (μc-Si:H) doped with an N-type element. In one example, the N-type element includes phosphorus atoms; in another example, the N-type element may also include one or more of phosphorus atoms, arsenic atoms, or antimony atoms. The thickness of the first transition layer 103a is typically thinner than that of the target sub-doped microcrystalline silicon layer 103b. In one example, the thickness of the first transition layer 103a is less than that of the target sub-doped microcrystalline silicon layer 103b, and the thickness of the first transition layer 103a ranges from 3 nm to 6 nm.

[0132] In some embodiments, in addition to the first transition layer 103a and the target sub-doped microcrystalline silicon layer 103b, the plurality of sub-doped layers further include a contact layer 103c located between the target sub-doped microcrystalline silicon layer 103b and the first transparent conductive layer 105. The material of the contact layer 103c includes undoped oxygen-doped microcrystalline silicon (μc-Si:H). In one example, the N-type element includes phosphorus atoms; in another example, the N-type element may also include one or more of phosphorus atoms, arsenic atoms, or antimony atoms. The function of the contact layer 103c is to improve contact with the first transparent conductive layer and reduce contact resistance. The thickness of the contact layer 103c is typically thinner than that of the target sub-doped microcrystalline silicon layer 103b. In one embodiment, the thickness of the contact layer 103c is less than that of the target sub-doped microcrystalline silicon layer 103b, and the thickness range of the contact layer 103c is 2 nm to 5 nm.

[0133] In some embodiments, reference Figure 2 The first transition layer 103a, the target sub-doped microcrystalline silicon layer 103b, and the contact layer 103c are all doped with the same N element, for example, phosphorus atoms. The concentration of N-type element in the first transition layer 103a is lower than that in the target sub-doped microcrystalline silicon layer 103b, and the concentration of N-type element in the target sub-doped microcrystalline silicon layer 103b is lower than that in the contact layer 103c. The concentration of N-type element in the multiple sub-doped layers (the first transition layer 103a, the target sub-doped microcrystalline silicon layer 103b, and the contact layer 103c) of the N-type doped microcrystalline silicon layer 103 exhibits the aforementioned gradient change, which facilitates the construction of a built-in electric field and is more conducive to promoting the directional transport of charge carriers (electrons) and reducing recombination. Furthermore, the contact layer 103c, which is close to the first transparent conductive layer 105, has the highest concentration of N-type elements and is not doped with oxygen. This not only improves the conductivity of the contact layer 103c itself, but also helps to optimize the contact performance between the contact layer 103c and the first transparent conductive layer 105, resulting in better contact between the contact layer 103c and the first transparent conductive layer 105 and reducing the contact resistance. As a result, charge carriers (electrons) are more effectively transported to the first transparent conductive layer 105.

[0134] In some embodiments, the crystallinity of the first transition layer 103a is greater than that of the target sub-doped microcrystalline silicon layer 103b, and the crystallinity of the target sub-doped microcrystalline silicon layer 103b is greater than that of the contact layer 103c. The first transition layer 103a, which is close to the first passivation layer 101, needs a high crystallinity to achieve high optical performance, while the contact layer 103c, which is close to the first transparent conductive layer 105, needs high doping to improve conductivity, allowing charge carriers to be transported to the first transparent conductive layer 105 more effectively. Furthermore, high doping is also beneficial for optimizing the contact performance between the contact layer 103c and the first transparent conductive layer 105.

[0135] In some embodiments, reference Figure 3 The solar cell further includes an N-type doped amorphous silicon layer 111, located between the contact layer 103c and the first transparent conductive layer 105, wherein the thickness of the N-type doped amorphous silicon layer 111 ranges from 1 to 2 nm. The thinner thickness of the N-type doped amorphous silicon layer 111 has a smaller impact on carrier mobility, but it exhibits strong absorption capacity for ultraviolet (UV) light. Through the combination of the N-type doped amorphous silicon layer 111 and the N-type doped microcrystalline silicon layer 103, multi-level absorption of UV light can be achieved, improving the UV light absorption capacity and further improving the UV attenuation of the solar cell. The N-type doped amorphous silicon layer 111 exhibits strong absorption of ultraviolet (UV) light, and its absorption capacity is superior to that of microcrystalline silicon materials. This is due to the following reasons: 1. The disordered atomic arrangement of amorphous silicon forms localized band tails (Urbach tail states). These tails extend into the band gap of amorphous silicon. Although the photon energy of UV light is much higher than the optical band gap of amorphous silicon, which can excite higher-energy electronic transitions, the continuous distribution of the band tails still allows for the absorption of UV light, rather than reflecting or transmitting it due to the steep cutoff of the band structure. 2. Defect-enhanced absorption: The doping process disrupts atomic bonds, increases dangling bond density, and forms defects. These defects introduce deep-level transition channels in the band gap, such as transitions from the valence band to defect states or from defect states to the conduction band, significantly enhancing the absorption of high-energy UV light. 3. High absorption coefficient of amorphous silicon: The absorption coefficient of amorphous silicon is particularly high in the ultraviolet (UV) light range (300 nm~400 nm).

[0136] In some embodiments, reference Figure 4The solar cell further includes: a seed layer 110 located between an initial transition layer 109 and a first passivation layer 101, wherein the material of the seed layer 110 comprises microcrystalline silicon without oxygen and N-type elements; and an initial transition layer 109 located between the N-type doped microcrystalline silicon layer 103 and the first passivation layer 101, and located between the seed layer 110 and the N-type doped microcrystalline silicon layer 103, wherein the material of the initial transition layer 109 comprises microcrystalline silicon without N-type elements.

[0137] The seed layer 110 serves to make the growth of microcrystalline silicon more orderly during the formation of the N-type doped microcrystalline silicon layer 103, thereby improving the density of the formed N-type doped microcrystalline silicon layer 103, especially improving the density of the target sub-doped microcrystalline silicon layer 103b, thereby reducing the extinction coefficient of the target sub-doped microcrystalline silicon layer 103b, and thus enhancing the transmittance of long-wavelength incident light (such as red light and infrared light) in the target sub-doped microcrystalline silicon layer 103b. Furthermore, the seed layer 110 is neither oxygen-doped nor phosphorus-doped. The purpose of not doping oxygen in the seed layer 110 is that it directly contacts the first passivation layer 101; adding oxygen would worsen the contact performance between the seed layer 110 and the first passivation layer 101. The purpose of not doping phosphorus is that phosphorus doping in the seed layer would inhibit the crystallization process of microcrystalline silicon, leading to an increase in the proportion of amorphous phase (a-Si:H), hindering the growth of the more conductive microcrystalline phase, and reducing carrier mobility. Undoping phosphorus in the seed layer 110 promotes crystallization. Moreover, if the seed layer 110 were doped with phosphorus, the phosphorus might diffuse into the first passivation layer 101, affecting its passivation performance. Phosphorus diffusion could also cause band anomalies at the interface, reducing the electric field strength and affecting carrier transport efficiency. In addition, the undoped seed layer 110 is more likely to form small and uniform crystal nuclei, reducing lattice defects and laying the foundation for the subsequent deposition of a highly conductive N-type doped microcrystalline silicon layer 103 with a specific crystallinity.

[0138] The seed layer 110 is typically thin; in one example, its thickness ranges from 0.1 nm to 0.5 nm. An excessively thick seed layer 110 can lead to increased series resistance and decreased short-circuit current.

[0139] The initial transition layer 109 serves as a carrier for depositing the first transition layer 103a and the target sub-doped microcrystalline silicon layer 103b. Through the design of the seed layer 110 and the initial transition layer 109, the first transition layer 103a can grow well, thereby enabling the target sub-doped microcrystalline silicon layer 103b to grow well as well.

[0140] The initial transition layer 109 is relatively thin; in one example, the thickness of the initial transition layer 109 ranges from 0.2 nm to 1 nm.

[0141] Continue to refer to Figures 1-4 In any of the figures, the P-type doped microcrystalline silicon layer 104 is used to form a heterojunction with the N-type semiconductor substrate 100 to selectively collect holes and reduce contact resistance. In one example, the material of the P-type doped microcrystalline silicon layer 104 is microcrystalline silicon doped with P-type elements, including boron atoms.

[0142] In some embodiments, the p-type doped microcrystalline silicon layer 104 comprises a plurality of sublayers. In one example, the plurality of sublayers comprises a first sublayer, a second sublayer, and a third sublayer sequentially stacked on the surface of the second passivation layer 102 away from the N-type semiconductor substrate 100; the materials of the first sublayer, the second sublayer, and the third sublayer comprise microcrystalline silicon layers doped with oxygen and p-type elements. In some embodiments, the concentration of p-type elements in the first sublayer, the second sublayer, and the third sublayer gradually increases; the thickness of the first sublayer ranges from 5 nm to 10 nm, the thickness of the second sublayer ranges from 8 nm to 15 nm, and the thickness of the third sublayer ranges from 8 nm to 15 nm.

[0143] In some embodiments, the solar cell further includes a second transition layer (not shown) located between the second passivation layer 102 and the first sublayer, wherein the material of the second transition layer is microcrystalline silicon doped with oxygen but not doped with p-type elements.

[0144] Continue to refer to Figures 1-4 In any of the figures, the first transparent conductive layer 105 and the second transparent conductive layer 106 are used to reduce the series resistance when collecting current and to reduce light reflection. In some embodiments, the materials of the first transparent conductive layer 105 and the second transparent conductive layer 106 include indium tin oxide (ITO) or ZnO.

[0145] Continue to refer to Figures 1-4 In any of the figures, the first electrode 107 and the second electrode 108 are used to collect current. In some embodiments, the first electrode 107 and the second electrode 108 are fine grid lines to reduce light shading. The materials of the first electrode 107 and the second electrode 108 include silver (Ag) or copper (Cu).

[0146] The second aspect of this application also provides a method for preparing a solar cell, referring to... Figure 5 The preparation method includes:

[0147] Step S201: Provide an N-type semiconductor substrate, the N-type semiconductor substrate including a light-receiving surface and a back-lighting surface;

[0148] Step S202: A first passivation layer, an N-type doped microcrystalline silicon layer, a first transparent conductive layer, and a first electrode are sequentially stacked on the light-receiving surface of an N-type semiconductor substrate. The N-type doped microcrystalline silicon layer includes multiple sub-doped layers, including a target sub-doped microcrystalline silicon layer. The crystallinity of the target sub-doped microcrystalline silicon layer ranges from 10% to 30%, the thickness ranges from 8 nm to 12 nm, and the extinction coefficient ranges from 0.25 to 0.45. The target sub-doped microcrystalline silicon layer is formed using a plasma-enhanced chemical vapor deposition process, and the process gas pressure range during the formation of the target sub-doped microcrystalline silicon layer is from 8 Torr to 12 Torr.

[0149] In step S203, a second passivation layer, a P-type doped microcrystalline silicon layer, a second transparent conductive layer, and a second electrode are sequentially stacked on the back surface of an N-type semiconductor substrate.

[0150] In the preparation method of this embodiment, the crystallinity of the target sub-doped microcrystalline silicon layer ranges from 10% to 30%, the thickness ranges from 8 nm to 12 nm, and the extinction coefficient ranges from 0.25. The target sub-doped silicon layer with a specific parameter of ~0.45 can improve UV decay while controlling the short-circuit current and conversion efficiency loss of the battery within a low range (for specific description, please refer to the corresponding paragraphs of the aforementioned embodiments, which will not be repeated here). The target sub-doped silicon layer is formed using a plasma-enhanced chemical vapor deposition process, and the process gas pressure range during the formation of the target sub-doped silicon layer is 8 Torr to 12 Torr (greater than the existing process gas pressure of 6 Torr). That is, the formation of the target sub-doped silicon layer in this application will use a higher process gas pressure. Under a high process gas pressure, the atomic arrangement becomes disordered, the etching effect of H is weakened, and at this time, Si atoms and H atoms will combine to form more amorphous structures, resulting in a higher proportion of amorphous structures in the target sub-doped silicon layer, a narrower optical band gap of the target sub-doped silicon layer, and a lower crystallinity of the formed target sub-doped silicon layer (crystallization range of 10% to 30%). Furthermore, by using a higher process gas pressure, it is easier to reduce the crystallinity of the target sub-doped silicon layer compared to adjusting other process parameters. Furthermore, under high process gas pressure, hydrogen atoms bond more effectively to silicon dangling bonds, passivating grain boundaries and lattice defects. When irradiated with ultraviolet (UV) light, the stable Si-H bonds in the microcrystalline silicon film can reduce the generation of photoexcited defect states (such as photo-induced metastable defects). Under high process gas pressure, the diffusion of reactive gases (such as PH3) is restricted, resulting in a more uniform distribution of dopants (phosphorus atoms), reducing local carrier trapping. Uniform doping reduces carrier localization and nonradiative recombination induced by ultraviolet (UV) light. Under high process gas pressure, the mean free path of gas molecules is shortened, and the kinetic energy of high-energy particles in the plasma is reduced, reducing excessive bombardment of the growth surface and improving the film quality of the target doped microcrystalline silicon layer.

[0151] The third aspect of this application also provides a method for preparing a solar cell, referring to... Figure 6 The preparation method includes:

[0152] Step S301: Provide an N-type semiconductor substrate, the N-type semiconductor substrate including a light-receiving surface and a back-light surface opposite each other;

[0153] Step S302: A first passivation layer, an N-type doped microcrystalline silicon layer, a first transparent conductive layer, and a first electrode are sequentially stacked on the light-receiving surface of the N-type semiconductor substrate. The N-type doped microcrystalline silicon layer includes multiple sub-doped layers, including a target sub-doped microcrystalline silicon layer. The target sub-doped microcrystalline silicon layer is formed using plasma-enhanced chemical vapor deposition (PECVD). The process gases used to form the target sub-doped microcrystalline silicon layer include SiH4, N2O, PH3, and H2. The process gas pressure ranges from 8 Torr to 12 Torr, the ignition power ranges from 10000W to 15000W, the flow ratio of SiH4, N2O, PH3, and H2 ranges from 1:0.5:4:200 to 1:2:7:250, and the ignition time ranges from 25s to 55s.

[0154] Step S303: A second passivation layer, a P-type doped microcrystalline silicon layer, a second transparent conductive layer, and a second electrode are sequentially stacked on the back surface of the N-type semiconductor substrate.

[0155] Forming a target sub-doped microcrystalline silicon layer using plasma-enhanced chemical vapor deposition (PECVD) is a complex process requiring coordination of various process parameters. Studies have shown that excessively high process gas pressure during formation degrades the uniformity of the sub-doped microcrystalline silicon layer, increases the proportion of amorphous silicon, and enhances UV light absorption. While this improves UV attenuation, it also leads to excessive short-circuit current loss and conversion efficiency loss. Conversely, lower process gas pressure during formation... If the starting power is too low, the uniformity of the target sub-doped microcrystalline silicon layer will improve, and the proportion of amorphous silicon will decrease. Although this will reduce short-circuit current loss and conversion efficiency loss, it will not be conducive to improving UV attenuation. If the starting power during the formation of the target sub-doped microcrystalline silicon layer is too high, although it can improve UV attenuation to some extent, the density of the target sub-doped microcrystalline silicon layer will deteriorate, resulting in excessive conversion efficiency loss. Conversely, if the starting power during the formation of the target sub-doped microcrystalline silicon layer is too low, although it can reduce conversion efficiency loss, it will not be conducive to improving UV attenuation. When the SiH4, N2O, PH3, and H2 flow ratio is too high, especially when the H2 flow ratio is too high, although it can improve the crystallinity and transmittance of the target doped microcrystalline silicon layer to some extent, thereby improving the conversion efficiency, it is not conducive to improving UV attenuation. Conversely, when the SiH4, N2O, PH3, and H2 flow ratio is too low, especially when the H2 flow ratio is too low, although it can improve UV attenuation to some extent, it will reduce the transmittance of the target doped microcrystalline silicon layer, thereby reducing the conversion efficiency. The ignition time during the formation of the target doped microcrystalline silicon layer is related to the thickness of the target doped microcrystalline silicon layer. The longer the ignition time, the thicker the layer. Although a thicker target doped microcrystalline silicon layer can slightly improve UV attenuation, the parasitic absorption of 103b in the target doped microcrystalline silicon layer will be aggravated, resulting in excessive short-circuit current loss and conversion efficiency loss of the solar cell. Conversely, the thinner the target doped microcrystalline silicon layer, the less parasitic absorption of 103b in the target doped microcrystalline silicon layer will be, thus reducing the short-circuit current loss and conversion efficiency loss of the solar cell.Therefore, in the method for preparing a solar cell in this embodiment of the present application, the process parameters for forming the target sub-doped microcrystalline silicon layer are creatively improved by adopting the specific process parameters described in step S302. Specifically, a higher process gas pressure is used to form the target sub-doped microcrystalline silicon layer. When the process gas pressure ranges from 8 Torr to 12 Torr, the atomic arrangement becomes disordered under this high process gas pressure, and the etching effect of H is weakened. At this time, Si atoms and H atoms will combine to form more amorphous structures, resulting in a higher proportion of amorphous structures in the target sub-doped microcrystalline silicon layer. This narrows the optical band gap of the target sub-doped microcrystalline silicon layer and reduces the crystallinity of the formed target sub-doped microcrystalline silicon layer, thereby improving the absorption capacity of the target sub-doped microcrystalline silicon layer for ultraviolet light (UV light) and improving the UV decay of the solar cell. However, under such high process gas pressure, the crystallinity of the target sub-doped microcrystalline silicon layer will decrease excessively, affecting the carrier mobility and light transmittance of the layer. This leads to short-circuit current loss and conversion efficiency loss in the solar cell. Furthermore, the uniformity and density of the target sub-doped microcrystalline silicon layer will deteriorate, increasing the extinction coefficient and further affecting light transmittance, ultimately resulting in a loss of conversion efficiency. Therefore, during the formation of the target sub-doped microcrystalline silicon layer, it is necessary to maintain the ignition power range of 10000W to 15000W. This ignition power generates more active particles and increases their density. These particles promote the rearrangement of silicon atoms, thereby improving the excessively low crystallinity and keeping the crystallinity of the formed target sub-doped microcrystalline silicon layer within a low range (e.g., 10%). Within a range of ~30%, and with a flow ratio of SiH4, N2O, PH3, and H2 ranging from 1:1:3:200 to 1:3:5:250, the hydrogen dilution ratio is relatively large, which can control the deposition rate, stabilize the uniformity of the target sub-doped microcrystalline silicon layer, reduce the extinction coefficient of the target sub-doped microcrystalline silicon layer, and thus enhance the transmittance of incident light through the target sub-doped microcrystalline silicon layer. Furthermore, by controlling the ignition time range from 25s to 55s, the thickness range of the formed target sub-doped microcrystalline silicon layer can be controlled, thereby reducing the parasitic absorption of incident light by the target sub-doped microcrystalline silicon layer and further reducing the short-circuit current loss and conversion efficiency loss of the solar cell.

[0156] The preparation method of the solar cell of this application will be further described below with reference to specific embodiments and comparative examples, but it should not be construed as a limitation on the scope of protection of this application.

[0157] Example 5: A method for preparing a solar cell, comprising:

[0158] An N-type semiconductor substrate is provided, the N-type semiconductor substrate comprising an opposing light-receiving surface and a back-lighting surface;

[0159] A first passivation layer, an N-type doped microcrystalline silicon layer, a first transparent conductive layer, and a first electrode are sequentially stacked on the light-receiving surface of the N-type semiconductor substrate. The N-type doped microcrystalline silicon layer includes multiple sub-doped layers, including a target sub-doped microcrystalline silicon layer. The target sub-doped microcrystalline silicon layer is formed using a plasma-enhanced chemical vapor deposition process. The process gases used to form the target sub-doped microcrystalline silicon layer include SiH4, N2O, PH3, and H2. The process gas pressure range is 8 Torr, the ignition power range is 10000W, the flow ratio of SiH4, N2O, PH3, and H2 ranges from 1:0.5:4:200, and the ignition time ranges from 36s.

[0160] A second passivation layer, a P-type doped microcrystalline silicon layer, a second transparent conductive layer, and a second electrode are sequentially stacked on the back surface of the N-type semiconductor substrate.

[0161] Example 6, a solar cell, differs from Example 5 mainly in that: the process gas for forming the target sub-doped microcrystalline silicon layer includes SiH4, N2O, PH3 and H2, the process gas pressure range is 10 Torr, the ignition power range is 12000W, the flow ratio of SiH4, N2O, PH3 and H2 is 1:1:5:220, and specifically, the ignition time range is 30s.

[0162] Example 7, a solar cell, differs from Example 5 mainly in that: the process gas for forming the target sub-doped microcrystalline silicon layer includes SiH4, N2O, PH3 and H2, the process gas pressure range is 11 Torr, the ignition power range is 13000W, the flow ratio of SiH4, N2O, PH3 and H2 ranges from 1:1.5:5:230, and the ignition time ranges from 28s.

[0163] Example 8, a solar cell, differs from Example 5 mainly in that: the process gas for forming the target sub-doped microcrystalline silicon layer includes SiH4, N2O, PH3 and H2, the process gas pressure range is 12 Torr, the ignition power range is 15000W, the flow ratio of SiH4, N2O, PH3 and H2 ranges from 1:2:7:250, and the ignition time ranges from 25s.

[0164] Comparative Example 5, a solar cell, differs from Example 5 mainly in that: the process gas for forming the target sub-doped microcrystalline silicon layer includes SiH4, N2O, PH3 and H2, the process gas pressure range is 7 Torr, the ignition power range is 12000W, the flow ratio of SiH4, N2O, PH3 and H2 ranges from 1:1:5:220, and the ignition time ranges from 35s.

[0165] Comparative Example 6, a solar cell, differs from Example 5 mainly in that: the process gas for forming the target sub-doped microcrystalline silicon layer includes SiH4, N2O, PH3 and H2, the process gas pressure range is 10 Torr, the ignition power range is 9000W, the flow ratio of SiH4, N2O, PH3 and H2 ranges from 1:1:5:220, and the ignition time ranges from 35s.

[0166] Comparative Example 7, a solar cell, differs from Example 5 mainly in that: the process gas for forming the target sub-doped microcrystalline silicon layer includes SiH4, N2O, PH3 and H2, the process gas pressure range is 10 Torr, the ignition power range is 16000W, the flow ratio of SiH4, N2O, PH3 and H2 ranges from 1:1:5:220, and the ignition time ranges from 24s.

[0167] Comparative Example 8, a solar cell, differs from Example 5 mainly in that: the process gas for forming the target sub-doped microcrystalline silicon layer includes SiH4, N2O, PH3 and H2, the process gas pressure range is 14 Torr, the ignition power range is 16000W, the flow ratio of SiH4, N2O, PH3 and H2 ranges from 1:1:5:220, the ignition power ranges from 12000W, and the ignition time ranges from 24s.

[0168] The solar cells prepared in Examples 5-8 and Comparative Examples 5-8 were tested for UV decay, short-circuit current loss and conversion efficiency loss. The relevant process parameters and corresponding test results for forming the target sub-doped microcrystalline silicon layer in Examples 5-8 and Comparative Examples 5-8 are shown in Table 2.

[0169] Table 2:

[0170]

[0171] Table 2 shows that the solar cells prepared using the preparation method of this application have improved UV degradation (less than or equal to 1.72%), while the short-circuit current loss (less than or equal to 20mA) and conversion efficiency loss (less than or equal to 0.06%) are controlled within a low range. By comparing Comparative Examples 5-8 with Examples 5-8, it can be seen that when only one or two to three parameters of the process gas pressure, ignition power, flow ratio of SiH4, N2O, PH3 and H2, and ignition time are within the range of this application, there are two undesirable situations. The first situation is that the UV degradation of the solar cell is improved, but the short-circuit current loss and conversion efficiency loss are relatively serious. The second situation is that the short-circuit current loss and conversion efficiency loss of the solar cell can be controlled within a small range, but the UV degradation is relatively serious.

[0172] Furthermore, it should be noted that there are various ways to determine the specific order in which the N-type semiconductor substrate, the first passivation layer, the second passivation layer, the N-type doped microcrystalline silicon layer, the P-type doped microcrystalline silicon layer, the first transparent conductive layer, the second transparent conductive layer, the first electrode, and the second electrode are formed when performing the aforementioned steps S202 and S203 or steps S302 and S303.

[0173] In one embodiment, reference Figure 7 When performing steps S202 and S203, or performing the aforementioned steps S302 and S303, the sequence of forming the N-type semiconductor substrate, the first passivation layer, the second passivation layer, the N-type doped microcrystalline silicon layer, the P-type doped microcrystalline silicon layer, the first transparent conductive layer, the second transparent conductive layer, the first electrode, and the second electrode includes:

[0174] Step S21: Form a second passivation layer on the back surface of the N-type semiconductor substrate; after forming the second passivation layer, form a first passivation layer on the light-receiving surface of the N-type semiconductor substrate.

[0175] Step S22: An N-type doped microcrystalline silicon layer is formed on the surface of the first passivation layer away from the N-type semiconductor substrate;

[0176] Step S23: After forming an N-type doped microcrystalline silicon layer, a P-type doped microcrystalline silicon layer is formed on the surface of the second passivation layer away from the N-type semiconductor substrate.

[0177] Step S24: A first transparent conductive layer is formed on the surface of the N-type doped microcrystalline silicon layer away from the N-type semiconductor substrate; a second transparent conductive layer is formed on the surface of the P-type doped microcrystalline silicon layer away from the N-type semiconductor substrate.

[0178] Step S25: A first electrode is formed on the surface of the first transparent conductive layer away from the N-type semiconductor substrate; a second electrode is formed on the surface of the second transparent conductive layer away from the N-type semiconductor substrate.

[0179] In another embodiment, when performing steps S202 and S203, or when performing the aforementioned steps S302 and S303, the order in which the first passivation layer, the second passivation layer, the N-type doped microcrystalline silicon layer, and the P-type doped microcrystalline silicon layer are formed may include:

[0180] The first passivation layer is formed on the light-receiving surface of the N-type semiconductor substrate;

[0181] After the first passivation layer is formed, the second passivation layer is formed on the back surface of the N-type semiconductor substrate;

[0182] After the second passivation layer is formed, the N-type doped microcrystalline silicon layer is formed on the surface of the first passivation layer away from the N-type semiconductor substrate;

[0183] After the N-type doped microcrystalline silicon layer is formed, the P-type doped microcrystalline silicon layer is formed on the surface of the second passivation layer away from the N-type semiconductor substrate.

[0184] In another embodiment, the order in which the first passivation layer, the second passivation layer, the N-type doped microcrystalline silicon layer, and the P-type doped microcrystalline silicon layer are formed may include:

[0185] The first passivation layer is formed on the light-receiving surface of the N-type semiconductor substrate;

[0186] After the first passivation layer is formed, the N-type doped microcrystalline silicon layer is formed on the surface of the first passivation layer away from the N-type semiconductor substrate;

[0187] After forming the N-type doped microcrystalline silicon layer, the second passivation layer is formed on the back surface of the N-type semiconductor substrate;

[0188] After the second passivation layer is formed, the P-type doped microcrystalline silicon layer is formed on the surface of the second passivation layer away from the N-type semiconductor substrate.

[0189] In another embodiment, when performing steps S202 and S203, or when performing the aforementioned steps S302 and S303, the order in which the first passivation layer, the second passivation layer, the N-type doped microcrystalline silicon layer, and the P-type doped microcrystalline silicon layer are formed may include:

[0190] The first passivation layer is formed on the light-receiving surface of the N-type semiconductor substrate;

[0191] After the first passivation layer is formed, the second passivation layer is formed on the back surface of the N-type semiconductor substrate;

[0192] After the second passivation layer is formed, the P-type doped microcrystalline silicon layer is formed on the surface of the second passivation layer away from the N-type semiconductor substrate;

[0193] After the P-type doped microcrystalline silicon layer is formed, the N-type doped microcrystalline silicon layer is formed on the surface of the first passivation layer away from the N-type semiconductor substrate.

[0194] The following embodiments, in conjunction with the appendix Figure 5 - Appendix Figure 7 and appendix Figure 8 - Appendix Figure 14 The specific formation process of solar cells is described in detail.

[0195] First, refer to Figure 5 (or reference) Figure 6 (and in conjunction with references) Figure 8In step S201, an N-type semiconductor substrate 100 is provided, the N-type semiconductor substrate 100 including a light-receiving surface and a back-lighting surface opposite each other.

[0196] Next, continue to refer to Figure 5 Proceed to steps S202 and S203 (or refer to...) Figure 6 (Proceeding steps S302 and S303), in one embodiment, the specific process of performing steps S202 and S203 or steps S302 and S303 is as follows: Figure 7 As shown below, in conjunction with Figure 7 The specific process of performing steps S202 and S203 or steps S302 and S303 is described.

[0197] refer to Figure 7 In conjunction with references Figure 9 In step S21, a second passivation layer 102 is formed on the back surface of the N-type semiconductor substrate 100; after forming the second passivation layer 102, a first passivation layer 101 is formed on the light-receiving surface of the N-type semiconductor substrate 100.

[0198] In some embodiments, the first passivation layer 101 includes a plurality of first sub-passivation layers. In one example, the plurality of first sub-passivation layers include a first anti-epitaxial layer, a first anti-yellowing layer, a first main passivation layer, and a first outer layer, sequentially stacked on the light-receiving surface of the N-type semiconductor substrate 100; the materials of the first anti-epitaxial layer, the first anti-yellowing layer, the first anti-yellowing layer, and the first outer layer include intrinsic amorphous silicon (ia-Si:H). In some embodiments, the thickness of the first anti-epitaxial layer ranges from 0.5 nm to 3 nm, the thickness of the first anti-yellowing layer ranges from 0.1 nm to 1 nm, the thickness of the first main passivation layer ranges from 2 nm to 6 nm, and the thickness of the first outer layer ranges from 0.5 nm to 2 nm.

[0199] The process for forming the first passivation layer 101 includes: PECVD (plasma-enhanced chemical vapor deposition), Cat-CVD (catalytic chemical vapor deposition), HDPCVD (high-density plasma chemical vapor deposition), MPCVD (microwave plasma chemical vapor deposition), or UHVCVD (ultra-high vacuum chemical vapor deposition).

[0200] In some embodiments, when the first passivation layer 101 is formed by PECVD, the process gas for forming the first anti-epitaxial layer specifically includes SiH4 and N2O, the SiH4 and N2O flow ratio is in the range of 1:1 / 20 to 1:1 / 10, the process gas pressure is in the range of 0.5 Torr to 0.7 Torr, the ignition power is in the range of 1000W to 2500W, and the ignition time is in the range of 1s to 5s. In some embodiments, the oxygen source, in addition to N2O, can also be in the range of CO2 / O2, etc.

[0201] The process gas used to form the first anti-yellow powder layer includes SiH4, with a flow rate range of 1500 sccm to 2500 sccm, a process gas pressure range of 0.5 Torr to 0.7 Torr, an ignition power range of 200 W to 800 W, and an ignition time range of 1 s to 5 s.

[0202] The process gases that form the first main passivation layer include SiH4 and H2, with a SiH4 to H2 flow ratio of 1:1 to 1:4, a process gas pressure of 0.5 Torr to 0.7 Torr, an ignition power of 500W to 1000W, and an ignition time of 25s to 35s.

[0203] The process gases forming the first outer layer include SiH4 and H2, with a SiH4 to H2 flow ratio ranging from 1:1 to 1:25, a process gas pressure ranging from 0.5 Torr to 0.7 Torr, an ignition power ranging from 2500W to 5000W, and an ignition time ranging from 8s to 15s.

[0204] In some embodiments, the second passivation layer 102 includes a plurality of second sub-passivation layers. In one example, the plurality of second sub-passivation layers include a second anti-epitaxial layer, a second anti-yellowing layer, a second main passivation layer, and a second outer layer sequentially stacked on the back surface of the N-type semiconductor substrate 100; the materials of the second anti-epitaxial layer, the second anti-yellowing layer, the second anti-yellowing layer, and the second outer layer include intrinsic amorphous silicon (ia-Si:H). In some embodiments, the thickness of the second anti-epitaxial layer ranges from 0.5 nm to 3 nm, the thickness of the second anti-yellowing layer ranges from 0.1 nm to 1 nm, the thickness of the second main passivation layer ranges from 2 nm to 6 nm, and the thickness of the second outer layer ranges from 0.5 nm to 2 nm.

[0205] The process for forming the second passivation layer 102 includes: PECVD (plasma-enhanced chemical vapor deposition), Cat-CVD (catalytic chemical vapor deposition), HDPCVD (high-density plasma chemical vapor deposition), MPCVD (microwave plasma chemical vapor deposition), or UHVCVD (ultra-high vacuum chemical vapor deposition).

[0206] In some embodiments, when the second passivation layer 102 is formed by PECVD, the process gas for forming the second anti-epitaxial layer specifically includes SiH4, the flow rate of SiH4 is in the range of 1500 sccm to 2500 sccm, the process gas pressure is in the range of 0.5 Torr to 0.7 Torr, the ignition power is in the range of 1000 W to 2500 W, and the ignition time is in the range of 2 s to 6 s.

[0207] The process gas used to form the second anti-yellow powder layer includes SiH4, with a flow rate range of 1500 sccm to 2500 sccm, a process gas pressure range of 0.3 Torr to 0.5 Torr, an ignition power range of 200 W to 800 W, and an ignition time range of 2 s to 10 s.

[0208] The process gases that form the second main passivation layer include SiH4 and H2, with a SiH4 to H2 flow ratio of 1:1 to 1:4, a process gas pressure of 0.5 Torr to 0.7 Torr, an ignition power of 500W to 1000W, and an ignition time of 25s to 50s.

[0209] The process gases forming the second outer layer include SiH4 and H2, with a SiH4 to H2 flow ratio ranging from 1:1 to 1:25, a process gas pressure ranging from 0.5 Torr to 0.7 Torr, an ignition power ranging from 2500W to 5000W, and an ignition time ranging from 8s to 15s.

[0210] In some embodiments, reference Figure 10 Before forming the N-type doped microcrystalline silicon layer, the method further includes: forming a seed layer 110 on the surface of the first passivation layer 101 away from the N-type semiconductor substrate 100, wherein the material of the seed layer 110 includes microcrystalline silicon without oxygen and N-type elements; and forming an initial transition layer 109 on the surface of the seed layer 110 away from the first passivation layer 101, wherein the material of the initial transition layer 109 includes microcrystalline silicon without N-type elements.

[0211] Subsequently, under high process gas pressure, when the target sub-doped microcrystalline silicon layer 103b is formed, its crystallinity will significantly decrease. Simultaneously, the high process gas pressure will increase the extinction coefficient of the target sub-doped microcrystalline silicon layer 103b, thereby affecting the carrier mobility and light transmittance of the target sub-doped microcrystalline silicon layer. This leads to significant short-circuit current loss and conversion efficiency loss in the solar cell. By forming the seed layer 110, the N-type doped microcrystalline silicon layer 103 is subsequently formed. This process makes the growth of microcrystalline silicon more orderly, thereby improving the density of the formed N-type doped microcrystalline silicon layer 103, especially the density of the target sub-doped microcrystalline silicon layer 103b. This reduces the extinction coefficient of the target sub-doped microcrystalline silicon layer 103b, thereby enhancing the transmittance of long-wavelength incident light (such as red light and infrared light) through the target sub-doped microcrystalline silicon layer 103b, reducing the loss of conversion efficiency. At the same time, it can also restore the excessively low crystallinity of the target sub-doped microcrystalline silicon layer 103b, thereby reducing the loss of short-circuit current.

[0212] The process for forming the seed layer 110 includes: PECVD (plasma-enhanced chemical vapor deposition), Cat-CVD (catalytic chemical vapor deposition), HDPCVD (high-density plasma chemical vapor deposition), MPCVD (microwave plasma chemical vapor deposition), or UHVCVD (ultra-high vacuum chemical vapor deposition).

[0213] In one embodiment, when the seed layer 110 is formed using PECVD, the process gases used include SiH4 and H2, the process gas pressure ranges from 4 Torr to 6 Torr, the ignition power ranges from 6000 W to 8000 W, the SiH4 to H2 flow ratio ranges from 1:250 to 1:350, and the ignition time ranges from 2 s to 5 s. These specific process parameters result in better compactness and easier control of the subsequently formed target sub-doped microcrystalline silicon layer 103b, making it easier to achieve an extinction coefficient range of 0.25-0.45 for the subsequently formed target sub-doped microcrystalline silicon layer. Furthermore, the seed layer 110 is formed without oxygen or phosphorus doping. The purpose of not doping oxygen in the seed layer 110 is that it directly contacts the first passivation layer 101; adding oxygen would worsen the contact performance between the seed layer 110 and the first passivation layer 101. The purpose of not doping phosphorus is that phosphorus doping in the seed layer would inhibit the crystallization process of microcrystalline silicon, leading to an increase in the proportion of amorphous phase (a-Si:H), hindering the growth of the more conductive microcrystalline phase, and reducing carrier mobility. The absence of phosphorus doping in the seed layer 110 promotes crystallization. Moreover, if the seed layer 110 were doped with phosphorus, the phosphorus might diffuse into the first passivation layer 101, affecting its passivation performance. Phosphorus diffusion could also cause band anomalies at the interface, reducing the electric field strength and affecting carrier transport efficiency. Furthermore, the undoped seed layer 110 is more likely to form small and uniform crystal nuclei, reducing lattice defects and laying the foundation for the subsequent deposition of an N-type doped microcrystalline silicon layer 103 with a specific crystallinity and high conductivity.

[0214] The initial transition layer 109 serves as a carrier for the subsequent deposition of the first transition layer 103a and the target sub-doped microcrystalline silicon layer 103b. Through the design of the seed layer 110 and the initial transition layer 109, the first transition layer 103a can grow well, which in turn allows the target sub-doped microcrystalline silicon layer 103b to grow well as well.

[0215] The process for forming the initial transition layer 109 includes: PECVD (plasma-enhanced chemical vapor deposition), Cat-CVD (catalytic chemical vapor deposition), HDPCVD (high-density plasma chemical vapor deposition), MPCVD (microwave plasma chemical vapor deposition), or UHVCVD (ultra-high vacuum chemical vapor deposition).

[0216] In one embodiment, when the initial transition layer 109 is formed by PECVD, the process gas used in forming the initial transition layer 109 includes SiH4, N2O and H2, the process gas pressure ranges from 4 Torr to 6 Torr, the ignition power ranges from 6000W to 8000W, the flow ratio of SiH4, N2O and H2 ranges from 1:1:250 to 1:8:350, and the ignition time ranges from 4s to 10s.

[0217] refer to Figure 7 In conjunction with references Figure 11 In step S22, an N-type doped microcrystalline silicon layer 103 is formed on the surface of the first passivation layer 101 away from the N-type semiconductor substrate 100.

[0218] In some embodiments, the N-type doped microcrystalline silicon layer 103 is formed on the initial transition layer 109 of the first passivation layer 101 on the surface away from the N-type semiconductor substrate 100. Specifically, the N-type doped microcrystalline silicon layer 103 is formed on the surface of the initial transition layer 109 away from the seed layer 110.

[0219] In some embodiments, forming the N-type doped microcrystalline silicon layer 103 includes:

[0220] A first transition layer 103a is formed on the surface of the initial transition layer 109 that is away from the seed layer 110;

[0221] The target sub-doped microcrystalline silicon layer 103b is formed on the surface of the first transition layer 103a that is away from the initial transition layer 109;

[0222] A contact layer 103c is formed on the surface of the target sub-doped microcrystalline silicon layer 103b that is away from the first passivation layer 101.

[0223] In some embodiments, the process gas pressure during the formation of the first transition layer 103a, the target sub-doped microcrystalline silicon layer 103b, and the contact layer 103c is greater than the process gas pressure during the formation of the seed layer 110 and the initial transition layer 109.

[0224] Furthermore, the ignition power during the formation of the first transition layer 103a, the target sub-doped microcrystalline silicon layer 103b, and the contact layer 103c is greater than the ignition power during the formation of the seed layer 110 and the initial transition layer 109.

[0225] Furthermore, the hydrogen dilution ratio during the formation of the first transition layer 103a, the target sub-doped microcrystalline silicon layer 103b, and the contact layer 103c is less than the hydrogen dilution ratio during the formation of the seed layer 110 and the initial transition layer 109. It should be noted that the formation of the first transition layer 103a, the target sub-doped microcrystalline silicon layer 103b, and the contact layer 103c can be performed in the same deposition chamber as the formation of the seed layer 110 and the initial transition layer 109.

[0226] The process for forming the first transition layer 103a, the target sub-doped microcrystalline silicon layer 103b, and the contact layer 103c includes: PECVD (plasma-enhanced chemical vapor deposition), Cat-CVD (catalytic chemical vapor deposition), HDPCVD (high-density plasma chemical vapor deposition), MPCVD (microwave plasma chemical vapor deposition), or UHVCVD (ultra-high vacuum chemical vapor deposition).

[0227] In some embodiments, when the first transition layer 103a, the target sub-doped microcrystalline silicon layer 103b, and the contact layer 103c are formed using PECVD, the process gas used to form the first transition layer 103a includes SiH4, N2O, PH3, and H2. The process gas pressure range is 8 Torr to 12 Torr, and can be 8 Torr, 9 Torr, 10 Torr, 11 Torr, or 12 Torr. The ignition power range is 10000W to 15000W, and can be 10000W, 11000W, 12000W, 13000W, 14000W, or 15000W. The flow rate ratio of SiH4, N2O, PH3, and H2 ranges from 1:0.5:3:250 to 1:2:6:300, and the ignition time ranges from 10 s. ~25s, which can be 10 seconds, 15 seconds, 20 seconds, or 25 seconds;

[0228] The process gases used to form the target sub-doped microcrystalline silicon layer 103b include SiH4, N2O, PH3, and H2. The process gas pressure ranges from 8 Torr to 12 Torr, and can be 8 Torr, 9 Torr, 10 Torr, 11 Torr, or 12 Torr. The ignition power ranges from 10000W to 15000W, and can be 10000W, 11000W, 12000W, 13000W, 14000W, or 15000W. The flow ratio of SiH4, N2O, PH3, and H2 ranges from 1:0.5:4:200 to 1:2:7:250. The ignition time ranges from 25s to 55s, and can be 25 seconds, 30 seconds, 35 seconds, 40 seconds, 45 seconds, 50 seconds, or 55 seconds.

[0229] The process gases used to form the contact layer 103c include SiH4, PH3, and H2. The process gas pressure ranges from 8 Torr to 12 Torr, and can be 8 Torr, 9 Torr, 10 Torr, 11 Torr, or 12 Torr. The ignition power ranges from 10000W to 15000W, and can be 10000W, 11000W, 12000W, 13000W, 14000W, or 15000W. The flow ratio of SiH4, PH3, and H2 ranges from 1:5:200 to 1:8:250. The ignition time ranges from 8s to 25s, and can be 8 seconds, 10 seconds, 15 seconds, 20 seconds, or 25 seconds. It should be noted that, in addition to PH3, the process gases used to form the first transition layer 103a, the target sub-doped microcrystalline silicon layer 103b, and the contact layer 103c can also be POCl3, P2O5, or P2O3.

[0230] When forming the N-type doped microcrystalline silicon layer 103 (including the first transition layer 103a, the target sub-doped microcrystalline silicon layer 103b, and the contact layer 103c) using the aforementioned specific parameters, a relatively high process gas pressure was used. When the process gas pressure ranged from 8 Torr to 12 Torr, the atomic arrangement became disordered under this high process gas pressure, and the etching effect of H was weakened. At this time, Si atoms and H atoms would combine to form more amorphous structures, resulting in amorphous structures in the N-type doped microcrystalline silicon layer 103 (especially the target sub-doped microcrystalline silicon layer 103b). The higher proportion of N-type doped microcrystalline silicon layer 103 (especially target sub-doped microcrystalline silicon layer 103b) narrows the optical band gap, reduces the crystallinity of the N-type doped microcrystalline silicon layer 103 (especially target sub-doped microcrystalline silicon layer 103b), thereby improving the absorption capacity of the N-type doped microcrystalline silicon layer 103 (especially target sub-doped microcrystalline silicon layer 103b) for ultraviolet light (UV light), reducing the amount of ultraviolet light (UV light) reaching the first passivation layer, thereby reducing the damage of ultraviolet light (UV light) to the first intrinsic passivation layer and improving UV attenuation. However, under this high process gas pressure, the crystallinity of the target doped microcrystalline silicon layer 103b will decrease too much, affecting its carrier mobility and light transmittance, which in turn leads to short-circuit current loss and conversion efficiency loss in the solar cell. Furthermore, the uniformity and density of the target doped microcrystalline silicon layer 103b will deteriorate, resulting in a higher extinction coefficient and affecting light transmittance, further leading to a loss in solar cell conversion efficiency. Therefore, during the formation of the target doped microcrystalline silicon layer 103b, it is necessary to maintain the ignition power range of 10000W to 15000W. At this ignition power, more active materials can be generated. The active particles enhance the density of active particles, which can promote the rearrangement of silicon atoms, thereby improving the low crystallinity and keeping the crystallinity of the formed target sub-doped microcrystalline silicon layer 103b within a low range (e.g., 10%~30%). Furthermore, when forming the target sub-doped microcrystalline silicon layer 103b, the flow ratio of SiH4, N2O, PH3, and H2 is in the range of 1:1:3:200 to 1:3:5:250. At this ratio, the hydrogen dilution is relatively large, which can control the deposition rate and stabilize the uniformity of the target sub-doped microcrystalline silicon layer 103b, thereby reducing the extinction coefficient of the target sub-doped microcrystalline silicon layer 103b to a range of 0.25~0.45, thus enhancing the transmittance of incident light in the target sub-doped microcrystalline silicon layer 103b. When forming the target sub-doped microcrystalline silicon layer 103b, the thickness range of the formed target sub-doped microcrystalline silicon layer 103b (8 nm ~ 12 nm) is controlled by controlling the ignition time range of 25s to 55s, thereby reducing the parasitic absorption of incident light by the target sub-doped microcrystalline silicon layer 103b and further reducing the short-circuit current loss and conversion efficiency loss of the solar cell.

[0231] refer to Figure 7 In conjunction with references Figure 12 After performing step S23 to form an N-type doped microcrystalline silicon layer 103, a P-type doped microcrystalline silicon layer 104 is formed on the surface of the second passivation layer 102 away from the N-type semiconductor substrate 100.

[0232] In some embodiments, the p-type doped microcrystalline silicon layer 104 comprises a plurality of sublayers. In one example, the plurality of sublayers comprises a first sublayer, a second sublayer, and a third sublayer sequentially stacked on the surface of the second passivation layer 102 away from the N-type semiconductor substrate 100; the materials of the first sublayer, the second sublayer, and the third sublayer comprise microcrystalline silicon layers doped with oxygen and p-type elements. In some embodiments, the concentration of p-type elements in the first sublayer, the second sublayer, and the third sublayer gradually increases; the thickness of the first sublayer ranges from 5 nm to 10 nm, the thickness of the second sublayer ranges from 8 nm to 15 nm, and the thickness of the third sublayer ranges from 8 nm to 15 nm.

[0233] In some embodiments, a second transition layer is further formed between the second passivation layer 102 and the first sublayer, wherein the material of the second transition layer is microcrystalline silicon doped with oxygen but not doped with p-type elements.

[0234] The process for forming the P-type doped microcrystalline silicon layer 104 and the second passivation layer 102 includes: PECVD (plasma-enhanced chemical vapor deposition), Cat-CVD (catalytic chemical vapor deposition), HDPCVD (high-density plasma chemical vapor deposition), MPCVD (microwave plasma chemical vapor deposition), or UHVCVD (ultra-high vacuum chemical vapor deposition).

[0235] In some embodiments, when the P-type doped microcrystalline silicon layer 104 and the second passivation layer 102 are formed by PECVD, the process gas for forming the second transition layer is SiH4, N2O, a second dopant source, and H2. The flow rate ratio of SiH4, N2O, and H2 is 1:0.12:0.5:250 to 1:0.16:0.8:400, the process gas pressure is 5 Torr to 7 Torr, the ignition power is 6000W to 10000W, the ignition time is 2s to 10s, and the film thickness is 0.1 to 1nm.

[0236] The process gases forming the first sublayer are SiH4, N2O, the second dopant source, and H2. The flow rate ratio of SiH4, N2O, the second dopant source, and H2 is 1:0.08:0.2:200 to 1:0.12:0.5:300. The process gas pressure is 5 Torr to 7 Torr. The ignition power is 10000W to 15000W. The ignition time is 50s to 100s. The film thickness is 5 to 10nm.

[0237] The process gases forming the second sublayer are SiH4, N2O, the second dopant source, and H2. The flow rate ratio of SiH4, N2O, the second dopant source, and H2 is 1:0.09:0.3:150 to 1:0.13:0.6:250. The process gas pressure is 5 Torr to 7 Torr. The ignition power is 10000W to 15000W. The ignition time is 80s to 120s. The film thickness is 8 to 15nm.

[0238] The process gas for forming the third sublayer is SiH4, N2O, the second dopant source, and H2. The flow rate ratio of SiH4, N2O, the second dopant source, and H2 is 1:0.1:0.4:100 to 1:0.14:0.7:200. The process gas pressure is 5 Torr to 7 Torr. The ignition power is 10000W to 15000W. The ignition time is 80s to 120s. The film thickness is 8 to 15nm.

[0239] It should be noted that, in addition to B2H6, the second doping source can also be BH3, BCl3, or TMB, etc.

[0240] refer to Figure 7 In conjunction with references Figure 13 In step S24, a first transparent conductive layer 105 is formed on the surface of the N-type doped microcrystalline silicon layer 103 away from the N-type semiconductor substrate 100; and a second transparent conductive layer 106 is formed on the surface of the P-type doped microcrystalline silicon layer 104 away from the N-type semiconductor substrate 100.

[0241] In some embodiments, the first transparent conductive layer 105 and the second transparent conductive layer 106 are made of indium tin oxide (ITO) or ZnO, and are formed by PVD (Physical Vapor Deposition) process.

[0242] In some embodiments, the first transparent conductive layer 105 and the second transparent conductive layer 106 may be formed simultaneously or sequentially.

[0243] refer to Figure 7 In conjunction with references Figure 14In step S25, a first electrode 107 is formed on the surface of the first transparent conductive layer 105 away from the N-type semiconductor substrate 100; and a second electrode 108 is formed on the surface of the second transparent conductive layer 106 away from the N-type semiconductor substrate 100.

[0244] In some embodiments, the materials of the first electrode 107 and the second electrode 108 include silver (Ag) or copper (Cu). When the materials of the first electrode 107 and the second electrode 108 are silver, they are generally prepared by screen printing; when the materials of the first electrode 107 and the second electrode 108 are copper, they are generally prepared by electroplating.

[0245] A fourth aspect of this application also provides a photovoltaic module, comprising:

[0246] A battery string, comprising a plurality of the aforementioned solar cells, or a solar cell prepared by a method comprising a plurality of the aforementioned solar cells.

[0247] In the description of this specification, the references to terms such as "some embodiments," "other embodiments," "ideal embodiments," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example that are included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0248] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0249] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A solar cell, characterized in that, include: The N-type semiconductor substrate comprises a first passivation layer, a second passivation layer, an N-type doped microcrystalline silicon layer, a P-type doped microcrystalline silicon layer, a first transparent conductive layer, a second transparent conductive layer, a first electrode, and a second electrode. The N-type semiconductor substrate includes a light-receiving surface and a backlight surface. The first passivation layer, the N-type doped microcrystalline silicon layer, the first transparent conductive layer, and the first electrode are sequentially stacked on the light-receiving surface of the N-type semiconductor substrate. The N-type doped microcrystalline silicon layer includes multiple sub-doped layers, and the multiple sub-doped layers include a target sub-doped microcrystalline silicon layer. The crystallinity of the target sub-doped microcrystalline silicon layer ranges from 10% to 30%, the thickness ranges from 8 nm to 12 nm, and the extinction coefficient ranges from 0.25 to 0.

45. The second passivation layer, the P-type doped microcrystalline silicon layer, the second transparent conductive layer, and the second electrode are sequentially stacked on the back surface of the N-type semiconductor substrate.

2. The solar cell according to claim 1, characterized in that, The plurality of sub-doped layers further include: a first transition layer located between the first passivation layer and the target sub-doped microcrystalline silicon layer, wherein the material of the first transition layer comprises microcrystalline silicon doped with N-type elements.

3. The solar cell according to claim 2, characterized in that, The crystallinity of the first transition layer is greater than that of the target sub-doped microcrystalline silicon layer; the thickness of the first transition layer ranges from 3 nm to 6 nm.

4. The solar cell according to claim 3, characterized in that, The plurality of sub-doped layers further include: a contact layer located between the target sub-doped microcrystalline silicon layer and the first transparent conductive layer, wherein the material of the contact layer includes microcrystalline silicon that is not doped with oxygen but is doped with N-type elements.

5. The solar cell according to claim 4, characterized in that, The crystallinity of the target sub-doped microcrystalline silicon layer is greater than that of the contact layer.

6. The solar cell according to claim 5, characterized in that, The thickness of the contact layer ranges from 2 nm to 5 nm.

7. The solar cell according to claim 5, characterized in that, The material of the target sub-doped microcrystalline silicon layer includes microcrystalline silicon doped with oxygen and N-type elements. The concentration of N-type elements in the first transition layer is less than the concentration of N-type elements in the target sub-doped microcrystalline silicon layer, and the concentration of N-type elements in the target sub-doped microcrystalline silicon layer is less than the concentration of N-type elements in the contact layer.

8. The solar cell according to claim 4, characterized in that, The solar cell further includes an N-type doped amorphous silicon layer located between the contact layer and the first transparent conductive layer, wherein the thickness of the N-type doped amorphous silicon layer ranges from 1 to 2 nm.

9. The solar cell according to claim 1, characterized in that, The solar cell further includes an initial transition layer located between the N-type doped microcrystalline silicon layer and the first passivation layer, wherein the material of the initial transition layer includes undoped N-type microcrystalline silicon; the thickness of the initial transition layer ranges from 0.2 nm to 1 nm.

10. The solar cell according to claim 1, characterized in that, The solar cell further includes a seed layer located between the initial transition layer and the first passivation layer, wherein the material of the seed layer comprises microcrystalline silicon without oxygen and N-type elements; and the thickness of the seed layer ranges from 0.1 nm to 0.5 nm.

11. A method for preparing a solar cell, characterized in that, include: An N-type semiconductor substrate is provided, the N-type semiconductor substrate comprising an opposing light-receiving surface and a back-lighting surface; A first passivation layer, an N-type doped microcrystalline silicon layer, a first transparent conductive layer, and a first electrode are sequentially stacked on the light-receiving surface of the N-type semiconductor substrate. The N-type doped microcrystalline silicon layer includes multiple sub-doped layers, including a target sub-doped microcrystalline silicon layer. The crystallinity of the target sub-doped microcrystalline silicon layer ranges from 10% to 30%, the thickness ranges from 8 nm to 12 nm, and the extinction coefficient ranges from 0.25 to 0.

45. The target sub-doped microcrystalline silicon layer is formed using a plasma-enhanced chemical vapor deposition process, and the process gas pressure range during the formation of the target sub-doped microcrystalline silicon layer is from 8 Torr to 12 Torr. A second passivation layer, a P-type doped microcrystalline silicon layer, a second transparent conductive layer, and a second electrode are sequentially stacked on the back surface of the N-type semiconductor substrate.

12. The method for preparing a solar cell according to claim 11, characterized in that, The process gases used to form the target sub-doped microcrystalline silicon layer include SiH4, N2O, PH3, and H2. The ignition power ranges from 10,000 W to 15,000 W, the flow ratio of SiH4, N2O, PH3, and H2 ranges from 1:0.5:4:200 to 1:2:7:250, and the ignition time ranges from 25 s to 55 s.

13. The method for preparing a solar cell according to claim 11 or 12, characterized in that, Before forming the N-type doped microcrystalline silicon layer, the method further includes forming a seed layer on the surface of the first passivation layer away from the N-type semiconductor substrate, wherein the material of the seed layer includes microcrystalline silicon without oxygen and N-type elements.

14. The method for preparing a solar cell according to claim 13, characterized in that, The process gases used to form the seed layer include SiH4 and H2, with a process gas pressure range of 4 Torr to 6 Torr, an ignition power range of 6000W to 8000W, a SiH4 to H2 flow ratio range of 1:250 to 1:350, and an ignition time range of 2s to 5s.

15. The method for preparing a solar cell according to claim 13, characterized in that, Also includes: An initial transition layer is formed on the surface of the seed layer away from the first passivation layer, and the material of the initial transition layer includes undoped N-type microcrystalline silicon; The N-type doped microcrystalline silicon layer is formed on the surface of the initial transition layer away from the seed layer.

16. The method for preparing a solar cell according to claim 15, characterized in that, Forming the N-type doped microcrystalline silicon layer includes: A first transition layer is formed on the surface of the initial transition layer that is away from the seed layer; The target sub-doped microcrystalline silicon layer is formed on the surface of the first transition layer away from the initial transition layer; A contact layer is formed on the surface of the target sub-doped microcrystalline silicon layer away from the first passivation layer.

17. The method for preparing a solar cell according to claim 16, characterized in that, The process gas pressure during the formation of the first transition layer, the target sub-doped microcrystalline silicon layer, and the contact layer is greater than the process gas pressure during the formation of the seed layer and the initial transition layer. Furthermore, the ignition power during the formation of the first transition layer, the target sub-doped microcrystalline silicon layer, and the contact layer is greater than the ignition power during the formation of the seed layer and the initial transition layer. Furthermore, the hydrogen dilution ratio during the formation of the first transition layer, the target sub-doped microcrystalline silicon layer, and the contact layer is less than the hydrogen dilution ratio during the formation of the seed layer and the initial transition layer.

18. The method for preparing a solar cell according to claim 17, characterized in that, The process gases used to form the initial transition layer include SiH4, N2O and H2, with a process gas pressure range of 4 Torr to 6 Torr, an ignition power range of 6000W to 8000W, a flow ratio of SiH4, N2O and H2 ranging from 1:1:250 to 1:8:350, and an ignition time range of 4s to 10s.

19. The method for preparing a solar cell according to claim 17, characterized in that, The process gases used to form the first transition layer include SiH4, N2O, PH3, and H2. The process gas pressure ranges from 8 Torr to 12 Torr, the ignition power ranges from 10,000 W to 15,000 W, the flow ratio of SiH4, N2O, PH3, and H2 ranges from 1:0.5:3:250 to 1:2:6:300, and the ignition time ranges from 10 s to 25 s.

20. The method for preparing a solar cell according to claim 17, characterized in that, The process gas used to form the contact layer includes SiH4, PH3 and H2, with a process gas pressure range of 8 Torr to 12 Torr, an ignition power range of 10000W to 15000W, a flow ratio of SiH4, PH3 and H2 ranging from 1:5:200 to 1:8:250, and an ignition time range of 8s to 25s.

21. A method for preparing a solar cell, characterized in that, include: An N-type semiconductor substrate is provided, the N-type semiconductor substrate comprising an opposing light-receiving surface and a back-lighting surface; A first passivation layer, an N-type doped microcrystalline silicon layer, a first transparent conductive layer, and a first electrode are sequentially stacked on the light-receiving surface of the N-type semiconductor substrate. The N-type doped microcrystalline silicon layer includes multiple sub-doped layers, including a target sub-doped microcrystalline silicon layer. The target sub-doped microcrystalline silicon layer is formed using plasma-enhanced chemical vapor deposition (PECVD). The process gases used to form the target sub-doped microcrystalline silicon layer include SiH4, N2O, PH3, and H2. The process gas pressure ranges from 8 Torr to 12 Torr, the ignition power ranges from 10000W to 15000W, the flow ratio of SiH4, N2O, PH3, and H2 ranges from 1:0.5:4:200 to 1:2:7:250, and the ignition time ranges from 25s to 55s. A second passivation layer, a P-type doped microcrystalline silicon layer, a second transparent conductive layer, and a second electrode are sequentially stacked on the back surface of the N-type semiconductor substrate.

22. The method for preparing a solar cell according to claim 21, characterized in that, Before forming the N-type doped microcrystalline silicon layer, the method further includes forming a seed layer on the surface of the first passivation layer away from the N-type semiconductor substrate, wherein the material of the seed layer includes microcrystalline silicon without oxygen and N-type elements.

23. The method for preparing a solar cell according to claim 22, characterized in that, The process gases used to form the seed layer include SiH4 and H2, with a process gas pressure range of 4 Torr to 6 Torr, an ignition power range of 6000W to 8000W, a SiH4 to H2 flow ratio range of 1:250 to 1:350, and an ignition time range of 2s to 5s.

24. The method for preparing a solar cell according to claim 22, characterized in that, Also includes: An initial transition layer is formed on the surface of the seed layer away from the first passivation layer, and the material of the initial transition layer includes undoped N-type microcrystalline silicon; The N-type doped microcrystalline silicon layer is formed on the surface of the initial transition layer away from the seed layer.

25. The method for preparing a solar cell according to claim 24, characterized in that, Forming the N-type doped microcrystalline silicon layer includes: A first transition layer is formed on the surface of the initial transition layer that is away from the seed layer; The target sub-doped microcrystalline silicon layer is formed on the surface of the first transition layer away from the initial transition layer; A contact layer is formed on the surface of the target sub-doped microcrystalline silicon layer away from the first passivation layer.

26. The method for preparing a solar cell according to claim 25, characterized in that, The process gas pressure during the formation of the first transition layer, the target sub-doped microcrystalline silicon layer, and the contact layer is greater than the process gas pressure during the formation of the seed layer and the initial transition layer. Furthermore, the ignition power during the formation of the first transition layer, the target sub-doped microcrystalline silicon layer, and the contact layer is greater than the ignition power during the formation of the seed layer and the initial transition layer. Furthermore, the hydrogen dilution ratio during the formation of the first transition layer, the target sub-doped microcrystalline silicon layer, and the contact layer is less than the hydrogen dilution ratio during the formation of the seed layer and the initial transition layer.

27. The method for preparing a solar cell according to claim 26, characterized in that, The process gases used to form the initial transition layer include SiH4, N2O and H2, with a process gas pressure range of 4 Torr to 6 Torr, an ignition power range of 6000W to 8000W, a flow ratio of SiH4, N2O and H2 ranging from 1:1:250 to 1:8:350, and an ignition time range of 4s to 10s.

28. The method for preparing a solar cell according to claim 26, characterized in that, The process gases used to form the first transition layer include SiH4, N2O, PH3, and H2. The process gas pressure ranges from 8 Torr to 12 Torr, the ignition power ranges from 10,000 W to 15,000 W, the flow ratio of SiH4, N2O, PH3, and H2 ranges from 1:0.5:3:250 to 1:2:6:300, and the ignition time ranges from 10 s to 25 s.

29. The method for preparing a solar cell according to claim 26, characterized in that, The process gas used to form the contact layer includes SiH4, PH3 and H2, with a process gas pressure range of 8 Torr to 12 Torr, an ignition power range of 10000W to 15000W, a flow ratio of SiH4, PH3 and H2 ranging from 1:5:200 to 1:8:250, and an ignition time range of 8s to 25s.

30. A photovoltaic module, characterized in that, include: A battery string, the battery string comprising a plurality of solar cells as described in any one of claims 1 to 10, or comprising a plurality of solar cells prepared using the method for preparing solar cells as described in any one of claims 11 to 29.

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