External memory expansion system and memory data transmission method
Through the combination of the drive adaptation system and the dual cache architecture, combined with the address identification technology of the built-in disk, the data protection problem of the external memory expansion system during power outage is solved, data integrity and system compatibility are achieved, and the service life of the built-in disk is extended.
Patent Information
- Application Number
- CN202510984223.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-17
- Publication Date
- 2025-09-12
- Estimated Expiration
- 2045-07-17
AI Technical Summary
Existing external memory expansion systems cannot effectively protect memory data in the event of a sudden power outage.
It adopts a combination of drive adaptation system, dual cache architecture and built-in disk. By synchronizing server memory data and dividing it into multiple disk segments, it uses address identification technology to store and verify data before power failure to ensure data integrity.
It can effectively protect disk data in the event of a sudden power outage, improve the accuracy of data transmission and system compatibility, reduce the number of data reads on the built-in disk, and extend the service life of the built-in disk.
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Figure CN120491909B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of memory expansion technology, and in particular to an external memory expansion system and a memory data transmission method. Background Art
[0002] External memory expansion technology is a hardware solution that temporarily expands external storage devices into virtual memory via a high-speed interface. Its core principle is to leverage the operating system's memory paging mechanism to use external storage space as a swap area, temporarily storing inactive data when physical memory is insufficient, thereby indirectly increasing available memory capacity. Its actual performance is limited by the interface bandwidth and storage device speed, making it suitable only for non-real-time tasks and not a substitute for physical memory upgrades. This solution primarily serves devices where memory expansion is not possible and requires a high-speed hard drive and system virtual memory configuration, but this often results in data loss during power outages.
[0003] In the related art, current external memory expansion systems include a remote direct memory access (RDMA) module and a memory module. The RDMA module receives RDMA messages from a server and determines the corresponding storage unit of the memory module, thereby serving as server memory expansion. However, the method of storing server memory data in the related art, in which the RDMA module receives RDMA messages from a server and determines the corresponding storage unit of the memory module, fails to protect the memory data in the event of a sudden power outage. Summary of the Invention
[0004] The present application provides an external memory expansion system and a memory data transmission method to at least solve the problem in the related art that a remote direct memory access module receives a remote direct memory access message from a server, determines the storage unit of the corresponding memory module, and stores the server memory data, but cannot protect the memory data in the event of a sudden power outage.
[0005] The present application provides an external memory expansion system, comprising:
[0006] A drive adaptation system (10) and an external memory device (20); the external memory device (20) includes a double buffer architecture (201) and a built-in disk (202);
[0007] The drive adaptation system (10) is respectively connected to the server unit (30) and the double buffer architecture (201); the double buffer architecture (201) is connected to the built-in disk (202);
[0008] The external memory device (20) synchronizes the memory data of the server unit (30) by driving the adaptation system (10) and stores the memory data in the double buffer architecture (201);
[0009] Double buffer architecture (201), sending memory data to built-in disk (202);
[0010] A built-in disk (202) divides memory data into multiple segments of disk data; divides each disk data into a reserved address identifier position segment and an original data segment; determines the data size and data type corresponding to each original data segment; determines the address identifier corresponding to each disk data according to each data size and each data type; allocates each address identifier to a corresponding reserved address identifier position segment to obtain each allocated disk data; verifies each allocated disk data; and stores each allocated disk data after each allocated disk data passes verification.
[0011] The built-in disk (202) sends one or more segments of allocated disk data to the double buffer architecture (201) after receiving a data call request from the server unit (30);
[0012] The double buffer architecture (201) sends one or more segments of allocated disk data to the server unit (30) via the driver adaptation system (10).
[0013] This application also provides a memory data transmission method, including:
[0014] External memory devices synchronize the memory data of the server unit through the driver adaptation system and store the memory data in the double buffer architecture;
[0015] Double-buffer architecture, sending memory data to the built-in disk;
[0016] The built-in disk divides memory data into multiple segments of disk data; divides each disk data into a reserved address identifier position segment and an original data segment; determines the data size and data type corresponding to each original data segment; determines the address identifier corresponding to each disk data according to each data size and each data type; allocates each address identifier to a corresponding reserved address identifier position segment to obtain each allocated disk data; verifies each allocated disk data; and stores each allocated disk data after each allocated disk data passes verification;
[0017] The built-in disk, upon receiving a data call request from the server unit, sends one or more segments of allocated disk data to the double-buffer architecture;
[0018] The double-buffer architecture sends one or more segments of allocated disk data to the server unit through the driver adaptation system.
[0019] Through the external memory expansion system and memory data transmission method provided by the present application, the external memory expansion system constructed by the drive adaptation system, the dual cache architecture and the built-in disk, the memory data of the server unit is synchronized, and the memory data is divided into multiple segments of disk data; each disk data is divided into a reserved address identification position segment and an original data segment; the data size and data type corresponding to each original data segment are determined; the address identification corresponding to each disk data is determined according to each data size and each data type; each address identification is assigned to the corresponding reserved address identification position segment to obtain each allocated disk data; after each allocated disk data is verified, each allocated disk data is stored; after receiving the data call request of the server unit, one or more segments of allocated disk data are sent to the server unit. By adding a built-in disk to the external memory device and adopting address identification technology, the disk data can be protected in the event of a sudden power outage. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0021] Figure 1 A schematic diagram of the structure of an external memory expansion system provided in an embodiment of the present application;
[0022] Figure 2 Schematic diagram of the memory data transmission method provided in the embodiment of the present application Figure 1 ;
[0023] Figure 3 Schematic diagram of the memory data transmission method provided in the embodiment of the present application Figure 2 . DETAILED DESCRIPTION
[0024] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0025] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.
[0026] External memory expansion technology is a hardware solution that temporarily expands external storage devices into virtual memory via a high-speed interface. Its core principle is to leverage the operating system's memory paging mechanism to use the external storage space as a swap area, temporarily storing inactive data when physical memory is insufficient, thereby indirectly increasing available memory capacity. Its actual performance is limited by the interface bandwidth and storage device speed, making it suitable only for non-real-time tasks and not a replacement for physical memory upgrades. This solution primarily serves devices that cannot have expandable memory and requires a high-speed hard drive and system virtual memory configuration, but it often suffers from data loss during power outages. In related art, current external memory expansion systems include a remote direct memory access (RDMA) module and a memory module. The RDMA module receives RDMA messages from the server and determines the corresponding memory module storage unit, thereby serving as server memory expansion. However, this method of storing server memory data by having the RDMA module receive RDMA messages from the server, determine the corresponding memory module storage unit, and thus fail to protect memory data in the event of a sudden power outage.
[0027] In order to solve the above technical problems, the embodiments of the present application propose the following technical concepts: the inventors take into account the drive adaptation system, the dual cache architecture and the external memory expansion system constructed with the built-in disk, and based on the external memory expansion system, synchronize the memory data of the server unit and divide the memory data into multiple segments of disk data; divide each disk data into a reserved address identification position segment and an original data segment; determine the address identifier corresponding to each original data segment; assign each address identifier to the corresponding reserved address identification position segment to obtain each allocated disk data; after each allocated disk data is verified, store each allocated disk data; after receiving the data call request from the server unit, send one or more segments of allocated disk data to the server unit, so that the disk data can be protected in the event of a sudden power outage.
[0028] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.
[0029] Figure 1A schematic diagram of the structure of the external memory expansion system provided in an embodiment of the present application.
[0030] like Figure 1 , an external memory expansion system includes: a drive adaptation system 10 and an external memory device 20; the external memory device 20 includes a dual cache architecture 201 and a built-in disk 202.
[0031] The drive adaptation system 10 is respectively connected to the server unit 30 and the dual-buffer architecture 201 ; the dual-buffer architecture 201 is connected to the built-in disk 202 .
[0032] The server unit 30 includes multiple servers.
[0033] The external memory device 20 synchronizes the memory data of the server unit 30 through the driver adaptation system 10 and stores the memory data in the double buffer architecture 201 .
[0034] The dual buffer architecture 201 sends memory data to the built-in disk 202 .
[0035] The built-in disk 202 divides the memory data into multiple segments of disk data; divides each disk data into a reserved address identifier position segment and an original data segment; determines the data size and data type corresponding to each original data segment; determines the address identifier corresponding to each disk data according to each data size and each data type; assigns each address identifier to a corresponding reserved address identifier position segment to obtain each assigned disk data; verifies each assigned disk data; and stores each assigned disk data after each assigned disk data passes verification.
[0036] After receiving the data call request from the server unit 30 , the built-in disk 202 sends one or more segments of allocated disk data to the double buffer architecture 201 .
[0037] The dual buffer architecture 201 sends one or more segments of allocated disk data to the server unit 30 via the drive adaptation system 10 .
[0038] Continue to refer Figure 1 The drive adaptation system 10 includes: an intelligent drive adapter 101 and multiple interface modules 102; the intelligent drive adapter 101 is communicatively connected with the multiple interface modules 102.
[0039] The external memory device 20 synchronizes the memory data of the server unit 30 through the intelligent drive adapter 101 and the corresponding one or more interface modules 102 .
[0040] In this embodiment, each interface module 102 can be a USB interface, a Type-C interface, a PCIe interface, or other high-speed interfaces.
[0041] In this embodiment, the driver adaptation system 10 can automatically identify the interface type and protocol standard of the corresponding server and switch to a matching communication mode. At the same time, the intelligent driver adapter 101 scans the system and hardware configuration of the corresponding server to automatically install and configure the driver, establish a stable data transmission channel, and achieve plug-and-play.
[0042] Continue to refer Figure 1 , the dual cache architecture 201 includes: a cache unit 2011 and a large-capacity data cache unit 2012.
[0043] The external memory device 20 determines whether the amount of memory data is greater than the storage capacity of the cache unit 2011; if it is determined that the amount of memory data is greater than the storage capacity of the cache unit 2011, the memory data is stored in the cache unit 2011 until the cache unit 2011 is full; the remaining data in the memory data is stored in the large-capacity data cache unit 2012.
[0044] In this embodiment, the cache unit 2011 is set as a foreground buffer, and the large-capacity data cache unit 2012 is set as a background buffer.
[0045] Continue to refer Figure 1 , further comprising a power module 203; the power module 203 is electrically connected to the dual cache architecture 201 and the built-in disk 202, respectively, for providing power.
[0046] In this embodiment, the power module 203 has an intelligent voltage regulation function and can automatically adjust the output voltage and current according to the number and power consumption of the memory modules in the dual-buffer architecture 201 .
[0047] In summary, the external memory expansion system provided by this embodiment is an external memory expansion system constructed by a drive adaptation system, a dual cache architecture and a built-in disk, which synchronizes the memory data of the server unit and divides the memory data into multiple segments of disk data; divides each disk data into a reserved address identification position segment and an original data segment; determines the data size and data type corresponding to each original data segment; determines the address identification corresponding to each disk data according to each data size and each data type; assigns each address identification to the corresponding reserved address identification position segment to obtain each allocated disk data; after each allocated disk data is verified, stores each allocated disk data; after receiving the data call request from the server unit, sends one or more segments of allocated disk data to the server unit. By adding a built-in disk to the external memory device and adopting address identification technology, the disk data can be protected in the event of a sudden power outage.
[0048] In addition, the external memory expansion system provided in this embodiment automatically identifies the interface type and protocol standard of the corresponding server by driving the adaptation system to switch to a matching communication mode, which can be applied to different usage environments and improves compatibility.
[0049] Figure 2 Schematic diagram of the memory data transmission method provided in the embodiment of the present application Figure 1 ,like Figure 2 As shown, an embodiment of the present application provides a memory data transmission method, which is described in detail as follows:
[0050] S201: An external memory device is connected to the server unit, and the memory data is synchronized with the server unit through the driver adaptation system, and the memory data is stored in the double buffer architecture.
[0051] S202: Double cache architecture, sending memory data to the built-in disk.
[0052] S203: The built-in disk divides the memory data into multiple segments of disk data; divides each disk data into a reserved address identification position segment and an original data segment; determines the data size and data type corresponding to each original data segment; determines the address identification corresponding to each disk data according to each data size and each data type; allocates each address identification to the corresponding reserved address identification position segment to obtain each allocated disk data; verifies each allocated disk data; and stores each allocated disk data after each allocated disk data passes the verification.
[0053] Specifically, the step S203 of "synchronizing the memory data of the server unit by driving the adaptation system" specifically includes:
[0054] S2031: Obtain the memory usage of the server unit in real time by driving the adaptation system.
[0055] In this embodiment, the memory usage of the server unit can be monitored by a resource monitor within the server unit.
[0056] S2032: Determine whether the memory usage is greater than a preset usage threshold.
[0057] In this embodiment, the preset usage rate threshold may be any value among 70%, 75% or 80%, or other values.
[0058] S2033: If it is determined that the memory usage is not greater than the preset usage threshold, the memory data of the server unit is synchronized according to a first preset period by driving the adaptation system.
[0059] In this embodiment, the first preset period may be any one of 5 minutes, 10 minutes, or 15 minutes, or other time periods.
[0060] S2034: If it is determined that the memory usage is greater than the preset usage threshold, the memory data of the server unit is continuously synchronized by driving the adaptation system.
[0061] In this embodiment, the address identifier corresponding to the reserved address identifier position segment is to be allocated. The address identifier has four bits of information, the first two bits of the four bits represent the data size, and the last two bits of the four bits represent the data type. Accordingly, the "determining the data size and data type corresponding to each original data segment" in step S203 specifically includes:
[0062] S2035: Determine the data interval corresponding to each original data segment from the plurality of preset data intervals corresponding to the first two bits of information, to express the data size of each original data segment.
[0063] In this embodiment, the preset data intervals are 676 data intervals from aa to zz.
[0064] S2036: Determine the data type corresponding to each original data segment from a plurality of preset data types corresponding to the last two digits of information.
[0065] In this embodiment, the preset data types are 256 data types in total from 00 to FF.
[0066] There are a total of 173,056 combinations of address identifiers integrated with each preset data interval and each preset data type.
[0067] In addition, after "verifying each allocated disk data" in step S203, steps a to e are also included:
[0068] Step a: If any allocated disk data fails verification, it is determined whether the allocated disk data can be modified normally.
[0069] Step b: If it is determined that the allocated disk data can be modified normally, the allocated disk data is corrected by using the built-in disk error correction mechanism and / or the built-in redundancy check algorithm to obtain corrected disk data.
[0070] Step c: If it is determined that the allocated disk data cannot be modified normally, the corresponding address identifier is obtained from the allocated disk data.
[0071] Step d: Determine the storage location of the corresponding original data segment in the server unit according to the address identifier.
[0072] Step e: When the original data segment at the saved location is transferred to the built-in disk again, the allocated disk data is deleted, and address marking processing is performed on the original data segment to obtain marked disk data.
[0073] S204: After receiving the data call request from the server unit, the built-in disk sends one or more segments of allocated disk data to the double buffer architecture.
[0074] S205: The dual-buffer architecture sends one or more segments of allocated disk data to the server unit through the driver adaptation system.
[0075] In addition, when the built-in disk and the double-buffer architecture perform data transmission, steps f to g are also included:
[0076] Step f: a double-buffer architecture, extracting any allocated disk data, and judging whether the same allocated disk data exists in the built-in disk according to the address identifier in the allocated disk data;
[0077] Step g: Double cache architecture, if it is determined that the same allocated disk data exists in the built-in disk, the allocated disk data is deleted; if it is determined that the same allocated disk data does not exist in the built-in disk, the allocated disk data is output to the built-in disk.
[0078] In summary, the memory data transmission method provided by this embodiment is that the external memory device synchronizes the memory data of the server unit through the drive adaptation system and stores the memory data in a dual-buffer architecture; the dual-buffer architecture sends the memory data to the built-in disk; the built-in disk divides the memory data into multiple segments of disk data; divides each disk data into a reserved address identification position segment and an original data segment; determines the data size and data type corresponding to each original data segment; determines the address identifier corresponding to each disk data according to each data size and each data type; assigns each address identifier to the corresponding reserved address identification position segment to obtain each allocated disk data; after each allocated disk data is verified, stores each allocated disk data; the built-in disk sends one or more segments of allocated disk data to the dual-buffer architecture after receiving a data call request from the server unit; the dual-buffer architecture sends one or more segments of allocated disk data to the server unit through the drive adaptation system. By adding a built-in disk to the external memory device and adopting address identification technology, the disk data can be protected in the event of a sudden power outage.
[0079] In addition, the memory data transmission method provided in this embodiment improves the accuracy of memory data transmission by performing verification and / or correction processing on each allocated disk data.
[0080] In addition, the memory data transmission method provided in this embodiment uses a dual-cache architecture to determine whether the same allocated disk data exists in the built-in disk based on the address identifier in any allocated disk data, so as to delete the allocated disk data or output the allocated disk data to the built-in disk. This method can not only reduce the number of data reads from the built-in disk and increase the life of the built-in disk by identifying the address identifier, but also free up sufficient space for the dual-cache architecture when the dual-cache architecture is highly utilized.
[0081] Figure 3 Schematic diagram of the memory data transmission method provided in the embodiment of the present application Figure 2 In the embodiment of the present application, Figure 2 Based on the embodiment provided, another specific implementation method for determining the data size and data type corresponding to each original data segment after step S2036 is described in detail. Figure 3 As shown, the memory data transmission method includes:
[0082] S301: Distinguish a plurality of different data types from the data types corresponding to the original data segments.
[0083] S302: Determine whether the number of different data types is greater than a preset threshold.
[0084] In this embodiment, the preset threshold may be the number of idle positions in the reserved address identification segment, or may be other quantity values.
[0085] S303: If it is determined that the number of the multiple different data types is greater than the preset threshold, the weight of each original data segment is calculated according to a second preset period.
[0086] Specifically, step S303 includes:
[0087] S3031: If it is determined that the number of the multiple different data types is greater than a preset threshold, the data type and data interval corresponding to any original data segment are obtained.
[0088] S3032: Determine one or more first original data segments belonging to the data type from each original data segment.
[0089] S3033: Calculate a first weight value of the original data segment according to the number of one or more first original data segments and the total number of data types.
[0090] In this embodiment, a calculation formula for calculating the first weight value of the original data segment according to the number of one or more first original data segments and the total number of data types includes:
[0091]
[0092] Where, is the first weight value; is the number of the one or more first original data segments; The total number of data types.
[0093] S3034: Determine one or more second original data segments belonging to the data interval from each original data segment.
[0094] S3035: Calculate a second weight value of the original data segment according to the number of one or more second original data segments and the total number of data intervals.
[0095] In this embodiment, the calculation formula for calculating the second weight value of the original data segment according to the number of one or more second original data segments and the total number of data intervals includes:
[0096]
[0097] Where, is the second weight value; is the number of the one or more second original data segments; is the total number of data intervals.
[0098] S3036: Determine the weight of the original data segment according to the first weight value and the second weight value.
[0099] Specifically, the first weight value and the second weight value are summed to determine the weight of the original data segment.
[0100] S3037: Determine the weight corresponding to each original data segment according to the second preset period.
[0101] In this embodiment, the second preset period can be any one of 3 hours, 5 hours and 6 hours, or other time periods.
[0102] S304: Determine one or more target original data segments from the original data segments according to the weights corresponding to the original data segments.
[0103] Specifically, according to the weights corresponding to the original data segments, one or more target original data segments with larger weight values are determined from the original data segments.
[0104] S305: Determine the data size corresponding to each target original data segment.
[0105] S306: Determine the data type corresponding to each target original data segment.
[0106] In summary, the memory data transmission method provided in this embodiment distinguishes multiple different data types from the data types corresponding to each original data segment; determines whether the number of multiple different data types is greater than a preset threshold; if it is determined that the number of multiple different data types is greater than the preset threshold, calculates the weight of each original data segment according to a second preset period; determines one or more target original data segments from each original data segment based on the weight corresponding to each original data segment; determines the data size corresponding to each target original data segment; determines the data type corresponding to each target original data segment, and by calculating the weight corresponding to each original data segment, it is possible to perform address identification on important original data segments when the number of idle reserved address identification position segments is small.
[0107] In addition, the memory data transmission method provided in this embodiment can perform address marking on the remaining original data segments when the address identifiers on one or more reserved address identifier position segments are deleted to ensure the processing integrity of each original data segment.
[0108] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.
[0109] The above is a detailed introduction to an external memory expansion system and memory data transmission method provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only intended to help understand the method and core concept of the present application. It should be noted that, for those skilled in the art, without departing from the principles of the present application, several improvements and modifications may be made to the present application, and such improvements and modifications also fall within the scope of protection of the claims of the present application.
Claims
1. An external memory expansion system, characterized in that: include: A drive adaptation system (10) and an external memory device (20); the external memory device (20) includes a double buffer architecture (201) and a built-in disk (202); The drive adaptation system (10) is respectively connected to the server unit (30) and the dual-buffer architecture (201); the dual-buffer architecture (201) is connected to the built-in disk (202); The external memory device (20) synchronizes the memory data of the server unit (30) through the drive adaptation system (10) and stores the memory data in the double buffer architecture (201); The dual buffer architecture (201) sends the memory data to the built-in disk (202); The built-in disk (202) divides the memory data into multiple segments of disk data; divides each disk data into a reserved address identifier position segment and an original data segment; determines the data size and data type corresponding to each original data segment; determines the address identifier corresponding to each disk data according to each data size and each data type; allocates each address identifier to the corresponding reserved address identifier position segment to obtain each allocated disk data; verifies each allocated disk data; and stores each allocated disk data after each allocated disk data passes the verification. The built-in disk (202), upon receiving a data call request from the server unit (30), sends one or more segments of allocated disk data to the double buffer architecture (201); The dual buffer architecture (201) sends the one or more allocated segments of disk data to the server unit (30) via the drive adaptation system (10).
2. The external memory expansion system according to claim 1, wherein: The drive adaptation system (10) comprises: an intelligent drive adapter (101) and a plurality of interface modules (102); the intelligent drive adapter (101) is communicatively connected to the plurality of interface modules (102); The external memory device (20) synchronizes the memory data of the server unit (30) through the intelligent drive adapter (101) and the corresponding one or more interface modules (102).
3. The external memory expansion system according to claim 1, wherein: The dual cache architecture (201) comprises: a high-speed cache unit (2011) and a large-capacity data cache unit (2012); An external memory device (20) is configured to determine whether the amount of the memory data is greater than the storage capacity of the cache unit (2011); if it is determined that the amount of the memory data is greater than the storage capacity of the cache unit (2011), the memory data is stored in the cache unit (2011) until the cache unit (2011) is full; and the remaining data in the memory data is stored in the large-capacity data cache unit (2012).
4. The external memory expansion system according to claim 1, wherein: Also includes: Power module (203); The power supply module (203) is electrically connected to the dual buffer architecture (201) and the built-in disk (202) respectively, and is used to provide electric energy.
5. A memory data transmission method, characterized in that: The external memory expansion system according to any one of claims 1 to 4 comprises: The external memory device synchronizes the memory data of the server unit through the drive adaptation system and stores the memory data in the double buffer architecture; The dual-buffer architecture sends the memory data to the built-in disk; The built-in disk divides the memory data into multiple segments of disk data; divides each disk data into a reserved address identifier position segment and an original data segment; determines the data size and data type corresponding to each original data segment; determines the address identifier corresponding to each disk data according to each data size and each data type; allocates each address identifier to a corresponding reserved address identifier position segment to obtain each allocated disk data; verifies each allocated disk data; and stores each allocated disk data after each allocated disk data passes verification; The built-in disk sends one or more segments of allocated disk data to the double buffer architecture after receiving a data call request from the server unit; The dual buffer architecture sends the one or more segments of allocated disk data to the server unit through the drive adaptation system.
6. The memory data transmission method according to claim 5, characterized in that: The step of synchronizing the memory data of the server unit through the drive adaptation system includes: Obtaining the memory usage of the server unit in real time through the drive adaptation system; Determining whether the memory usage is greater than a preset usage threshold; If it is determined that the memory usage rate is not greater than the preset usage rate threshold, synchronizing the memory data of the server unit according to a first preset period through the drive adaptation system; If it is determined that the memory usage is greater than the preset usage threshold, the memory data of the server unit is continuously synchronized through the drive adaptation system.
7. The memory data transmission method according to claim 5, characterized in that: The reserved address identifier position segment is to be allocated a corresponding address identifier, the address identifier has four bits of information, the first two bits of the four bits of information represent the data size, and the last two bits of the four bits of information represent the data type; Accordingly, determining the data size and data type corresponding to each original data segment includes: Determine a data interval corresponding to each original data segment from a plurality of preset data intervals corresponding to the first two bits of information, to express the data size of each original data segment; The data type corresponding to each of the original data segments is determined from a plurality of preset data types corresponding to the last two bits of information.
8. The memory data transmission method according to claim 7, characterized in that: After determining the data type corresponding to each original data segment from a plurality of preset data types corresponding to the last two bits of information, the method further includes: distinguishing a plurality of different data types from the data types corresponding to the original data segments; Determining whether the number of the multiple different data types is greater than a preset threshold; If it is determined that the number of the multiple different data types is greater than the preset threshold, calculating the weight of each original data segment according to a second preset period; determining one or more target original data segments from the original data segments according to the weights corresponding to the original data segments; Determine the data size corresponding to each target original data segment; Determine the data type corresponding to each target raw data segment.
9. The memory data transmission method according to claim 8, characterized in that: If it is determined that the number of the multiple different data types is greater than the preset threshold, calculating the weight of each original data segment according to a second preset period includes: If it is determined that the number of the multiple different data types is greater than the preset threshold, obtaining the data type and data interval corresponding to any original data segment; Determining one or more first original data segments belonging to the data type from the original data segments; Calculating a first weight value of the original data segment according to the number of the one or more first original data segments and the total number of data types; Determining one or more second original data segments belonging to the data interval from the original data segments; Calculating a second weight value of the original data segment according to the number of the one or more second original data segments and the total number of data intervals; determining a weight of the original data segment according to the first weight value and the second weight value; The weight corresponding to each original data segment is determined according to the second preset period.
10. The memory data transmission method according to claim 5, characterized in that: After verifying the allocated disk data, the method further includes: If any allocated disk data fails verification, determining whether the allocated disk data can be modified normally; If it is determined that the allocated disk data can be modified normally, the allocated disk data is corrected by using the error correction mechanism and / or the built-in redundancy check algorithm of the built-in disk to obtain corrected disk data; If it is determined that the allocated disk data cannot be modified normally, obtaining a corresponding address identifier from the allocated disk data; Determining a storage location of the corresponding original data segment in the server unit according to the address identifier; When the original data segment at the storage location is transferred to the built-in disk again, the allocated disk data is deleted, and address identification processing is performed on the original data segment to obtain identified disk data.
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