Packaging structure and packaging method of vehicle-mounted CIS chip
By adopting a combined design of glass, cofferdam structure and flexible UV adhesive layer in the on-board CIS chip package, warpage and stress problems are solved, packaging costs are reduced, the reliability and durability of the chip are improved, and the zero-failure operation is adapted to harsh environmental conditions.
Patent Information
- Application Number
- CN202510642219.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-19
- Publication Date
- 2025-08-15
AI Technical Summary
The prior art has warpage and stress problems in vehicle-mounted CIS chip packaging, and the packaging cost is high, making it difficult to meet zero failure operation under harsh environmental conditions.
The combination design of glass, cofferdam structure and wafer is adopted, and the flexible UV glue layer is used to replace the traditional silicon nitride material. The "core-shell" structure is formed through photolithography and silicon through-hole etching, which enhances the binding force of the dielectric layer and reduces internal stress. Combining the characteristics of flexible UV glue and silicon dioxide, a dual dielectric layer insulating structure is formed.
It solves the warpage and stress problems, reduces packaging costs, improves the reliability and durability of the chip, adapts to the combination of materials with different thermal expansion coefficients, and enhances the resistance to ion penetration and product reliability.
Smart Images

Figure CN120497210A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor chip packaging, and in particular to a packaging structure of an on-board CIS chip. The present invention also provides a corresponding packaging method. Background Art
[0002] With the rapid evolution of semiconductor packaging technology toward advanced processes such as 3D heterogeneous integration, wafer-level fan-out (WLFO), and high-density interconnect (HDI), chip reliability requirements in end-use scenarios have leapt from single-function assurance to full-lifecycle dynamic stability verification. This trend is particularly pronounced in automotive electronics. Autonomous driving systems demand real-time response accuracy of onboard vision processing units (VPUs) in the microsecond range, while maintaining zero-failure operation under extreme temperature swings from -40°C to 150°C, continuous mechanical vibration, and electromagnetic radiation. To meet these demanding conditions, the industry generally employs a dual-layer insulation system consisting of low-k dielectric materials (such as SiCOH-based porous dielectrics) and an organic passivation layer (polyimide / BCB). However, this technical approach has exposed three major structural contradictions during the engineering phase: warpage failure caused by material coefficient of thermal expansion (CTE) mismatch; the paradox between interfacial adhesion strength and stress release; and performance degradation due to process compatibility.
[0003] In the TSV industry process flow, especially for automotive CIS chips, Low-k materials usually use silicon dioxide (SiO2) + silicon nitride (Si3N4) to insulate heat, electricity and prevent water vapor. Silicon nitride has good density and high hardness, but it can cause product warping; the organic passivation glue commonly used on the market does not have good adhesion to the Low-k layer. In order to improve the interfacial bonding strength, plasma activation treatment needs to be introduced on the surface of the Low-k layer, but this process will simultaneously cause carbon loss, resulting in an increase in porosity (from 15% to 25%), and the dielectric constant degrades to k>3.0; the surface roughness Ra>5nm causes poor wetting when the organic passivation layer is coated.
[0004] Therefore, it is urgent to develop a CIS chip packaging structure that can reliably solve product warping and stress problems and reduce packaging costs. Summary of the Invention
[0005] In response to the above problems, the present invention provides a packaging structure for an in-vehicle CIS chip, which not only solves the problems of product warping and stress, but also reduces the packaging cost.
[0006] A packaging structure for an in-vehicle CIS chip, characterized in that it comprises:
[0007] Glass;
[0008] cofferdam structure;
[0009] and a wafer having chips arranged on its lower surface;
[0010] The cofferdam structure is arranged on the upper surface of the glass, and the cofferdam area corresponds to the chip setting on the lower surface of the wafer. The lower surface of the wafer is bonded to the convex part of the cofferdam structure. The chip is arranged correspondingly in the cofferdam area of the cofferdam structure. The upper surface of the wafer is formed into a set shape by thinning and through-silicon via etching. The silicon surface of the wafer with the set shape is prepared with a silicon dioxide layer, and the silicon dioxide layer is coated with a flexible UV adhesive layer. The flexible UV adhesive layer at the bottom of the through-silicon via is removed to expose the PAD, and an RDL is prepared in the convex area of the silicon surface of the wafer, and the RDL is connected to the PAD at the bottom of the through-silicon via. After the silicon surface of the wafer is covered with a solder mask layer, the surface pads are opened and the balls are planted by exposure and development.
[0011] It is further characterized by:
[0012] A plurality of groups of chips are arranged on the lower surface of the wafer. Before being cut into independent packaging structures, each group of chips is arranged correspondingly in the cofferdam area of the cofferdam structure.
[0013] After the surface of the glass is coated with negative photoresist, a cofferdam structure corresponding to the shape of the chip arrangement on the lower layer of the wafer is formed through a photolithography process. After the wafer and the glass are bonded, the chips are arranged correspondingly in the cofferdam area of the cofferdam layer.
[0014] A packaging method for a vehicle-mounted CIS chip packaging structure, characterized by:
[0015] First, prepare the glass and wafer, and complete the wafer bonding, thinning, and through-silicon via processes;
[0016] Secondly, a layer of silicon dioxide is sputtered on the silicon surface of the product. Then, a flexible UV adhesive is coated on the silicon dioxide layer and quickly cured through a photolithography mask. Only the UV adhesive at the bottom of the hole is removed to form a double dielectric layer insulation structure.
[0017] Finally, after the RDL, solder mask, ball planting and final cutting processes, TSV packaging is completed.
[0018] It is further characterized in that it comprises the steps of:
[0019] A1. Apply a layer of negative photoresist on the glass surface, form a cofferdam structure through a photolithography process, and apply a bonding adhesive layer on the convex part of the cofferdam structure. Bond the lower surface of the wafer with the chip to the bonding adhesive layer to complete the bonding.
[0020] A2. After grinding, photolithography, and dry etching processes, the silicon layer of the wafer is thinned and the through-silicon via is etched;
[0021] A3. Prepare a silicon dioxide layer on the surface of the silicon layer and apply a flexible UV adhesive layer. Use a photolithography mask to remove excess UV adhesive at the bottom of the through-silicon via. The UV adhesive replaces silicon nitride to isolate moisture and resist ion penetration. Its fast curing properties ensure that the adhesive is applied to the hole wall.
[0022] A4. Open the bottom of the TSV to expose the PAD, and then process the RDL on the upper convex area of the silicon layer. The process is performed so that the RDL in the same package structure is connected to the PAD at the bottom of the TSV. Then, cover the entire upper surface of the silicon layer with solder mask, and pre-cut the groove and half-cut to the upper convex part of the cofferdam structure.
[0023] A5. Open the pad located on the upper convex area of the silicon layer by exposure and development and plant the ball;
[0024] A6. Cut into final products.
[0025] It is further characterized by:
[0026] In step A4, a solder resist layer is placed on the entire upper surface of the silicon layer by spin coating, spraying, or printing.
[0027] After adopting the present invention, the organic matrix in the flexible UV adhesive layer can interact with silica to form a "core-shell" structure. This structure perfectly combines the rigidity of inorganic materials with the flexibility of organic long chains, which helps to improve the performance of hybrid materials. Specifically, the hydroxyl groups on the surface of silica can undergo condensation reaction with double-bond coupling agents (such as KH-550), thereby grafting polymer long chains on the surface of silica. This chemical modification enhances the dispersibility and compatibility of silica in UV-curable adhesives, thereby improving the bonding strength with the adhesive. The combination of flexible UV adhesive and silica increases density and resistance to ion penetration, replacing traditional Si3N4 to isolate water vapor and improving reliability. At the same time, the curing shrinkage of the flexible UV adhesive is significantly reduced, reducing internal stress accumulation and reducing warping; it not only solves the problems of product warping and stress, but also reduces packaging costs. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 is a schematic cross-sectional view of the final package structure of the present invention;
[0029] Figure 2 The steps of the packaging method of the present invention are as follows Figure 1 ;
[0030] Figure 3 The steps of the packaging method of the present invention are as follows Figure 2 ;
[0031] Figure 4 The steps of the packaging method of the present invention are as follows Figure 3 ;
[0032] Figure 5 The steps of the packaging method of the present invention are as follows Figure 4 ;
[0033] Figure 6 The steps of the packaging method of the present invention are as follows Figure 5 ;
[0034] Figure 7 The steps of the packaging method of the present invention are as follows Figure 6 ;
[0035] The names corresponding to the serial numbers in the figure are as follows:
[0036] Glass 10 , cofferdam structure 11 , bonding adhesive layer 12 , wafer 13 , silicon dioxide layer 14 , flexible UV adhesive layer 15 , RDL 16 , solder mask layer 17 , pre-cut groove 201 , and ball implant 202 . DETAILED DESCRIPTION
[0037] A packaging structure of a vehicle-mounted CIS chip, see Figure 1 , which includes glass 10, a cofferdam structure 11, and a wafer 13; the lower surface of the wafer 13 is arranged with chips;
[0038] The cofferdam structure 11 is arranged on the upper surface of the glass 10, and the cofferdam area corresponds to the chip setting on the lower surface of the wafer 13. The lower surface of the wafer 13 and the convex part of the cofferdam structure 11 are bonded by a bonding adhesive layer 12. The chip is arranged correspondingly in the cofferdam area of the cofferdam structure 11. The upper surface of the wafer 13 is formed into a set shape by thinning and through-silicon hole etching. The silicon surface of the set shape of the wafer 13 is prepared with a silicon dioxide layer 14, and the silicon dioxide layer 14 is coated with a flexible UV adhesive layer 15. The flexible UV adhesive layer 15 at the bottom of the through-silicon hole is removed to expose the PAD, and an RDL 16 is prepared in the convex area of the silicon surface of the wafer 13, and the RDL 16 is connected to the PAD at the bottom of the through-silicon hole. After the silicon surface of the wafer 13 is covered with a solder mask layer 17, the surface pad is opened by exposure and development and the ball 202 is planted.
[0039] In a specific embodiment, a plurality of groups of chips are arranged on the lower surface of the wafer 13. Before being cut into independent packaging structures, each group of chips is arranged correspondingly in the cofferdam area of the cofferdam structure 11.
[0040] After negative photoresist is coated on the surface of the glass 10, a cofferdam structure 11 having a shape corresponding to the arrangement of chips on the lower layer of the wafer is formed through a photolithography process. After the wafer 13 and the glass 10 are bonded, the chips are arranged correspondingly in the cofferdam area of the cofferdam structure 11.
[0041] A packaging method for a vehicle-mounted CIS chip packaging structure, characterized by:
[0042] First, prepare the glass and wafer, and complete the wafer bonding, thinning, and through-silicon via processes;
[0043] Secondly, a layer of silicon dioxide is sputtered on the silicon surface of the product. Then, a flexible UV adhesive is coated on the silicon dioxide layer and quickly cured through a photolithography mask. Only the UV adhesive at the bottom of the hole is removed to form a double dielectric layer insulation structure.
[0044] Finally, after the RDL, solder mask, ball planting and final cutting processes, TSV packaging is completed.
[0045] When it is implemented specifically, it includes the following steps: Figure 2-Figure 7 :
[0046] A1. A layer of negative photoresist is coated on the surface of the glass 10. A cofferdam structure 11 is formed by photolithography process. A bonding adhesive layer 12 is coated on the upper convex part of the cofferdam structure 11. The lower surface of the wafer 13 with the chip is bonded to the bonding adhesive layer 12 (see FIG. Figure 2 );
[0047] A2, through grinding, photolithography, dry etching process, the silicon layer of wafer 13 is thinned and silicon via etching is completed (see Figure 3 );
[0048] A3. Prepare a silicon dioxide layer 14 on the surface of the silicon layer and apply a flexible UV adhesive layer 15. Remove the excess UV adhesive at the bottom of the through-silicon via through a photolithography mask. The UV adhesive replaces silicon nitride to isolate moisture and resist ion penetration. The fast curing property ensures the amount of adhesive on the hole wall (see Figure 4 );
[0049] A4. Open the bottom of the through-silicon via to expose the PAD, and prepare RDL16 on the upper convex area of the silicon layer through a process, and process so that the RDL16 in the same package structure is connected to the PAD at the bottom of the through-silicon via. Then, cover the entire upper surface of the silicon layer with a solder mask layer 17. The solder mask layer 17 is placed on the entire upper surface of the residual silicon layer of the wafer 13 by spin coating, spraying, or printing. At the same time, pre-cut grooves 201 and half-cut to the upper convex part of the cofferdam structure 11 (see FIG. Figure 5 );
[0050] A5, by means of exposure and development, the pad located on the upper convex area of the silicon layer is opened and the ball is implanted 202 (see Figure 6 );
[0051] A6, cutting into final products (see Figure 7 ).
[0052] After adopting the present invention, the organic matrix in the flexible UV adhesive layer can interact with silica to form a "core-shell" structure. This structure perfectly combines the rigidity of inorganic materials with the flexibility of organic long chains, which helps to improve the performance of hybrid materials. Specifically, the hydroxyl groups on the surface of silica can undergo condensation reaction with double-bond coupling agents (such as KH-550), thereby grafting polymer long chains on the surface of silica. This chemical modification enhances the dispersibility and compatibility of silica in UV-curable adhesives, thereby improving the bonding strength with the adhesive. The combination of flexible UV adhesive and silica increases density and resistance to ion penetration, replacing traditional Si3N4 to isolate water vapor and improve reliability. At the same time, the curing shrinkage of the flexible UV adhesive is significantly reduced, reducing internal stress accumulation and reducing warping. Its beneficial effects are as follows;
[0053] 1. The organic matrix in the flexible UV adhesive of the flexible UV adhesive layer can interact with silica to form a "core-shell" structure, thereby enhancing the bonding strength of the two dielectric layers and reducing the internal stress of the UV adhesive to prevent excessive stress from causing warping of the product.
[0054] 2. The silicon nitride step is eliminated and the traditional organic passivation layer is replaced. The whole process is shortened, the packaging cost is greatly reduced, and the production capacity is improved;
[0055] 3. The fast curing characteristics of flexible UV adhesive ensure the side wall glue hanging morphology of deep hole structure, reduce the influence of leakage and moisture, and improve product reliability;
[0056] 4. Flexible UV adhesives have strong adhesion to metals, high peel strength, and can adapt to material combinations with different coefficients of thermal expansion (CTE).
[0057] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above and that the invention can be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered in all respects as illustrative and non-restrictive, and the scope of the invention is defined by the appended claims, not the foregoing description, and all variations within the meaning and range of equivalents of the claims are intended to be included therein. Any reference sign in a claim should not be construed as limiting the claim to which it relates.
[0058] In addition, it should be understood that although this specification is described in terms of implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.
Claims
1. A packaging structure of an in-vehicle CIS chip, characterized in that: It includes: Glass; cofferdam structure; and a wafer having chips arranged on its lower surface; The cofferdam structure is arranged on the upper surface of the glass, and the cofferdam area corresponds to the chip setting on the lower surface of the wafer. The lower surface of the wafer is bonded to the convex part of the cofferdam structure. The chip is arranged correspondingly in the cofferdam area of the cofferdam structure. The upper surface of the wafer is formed into a set shape by thinning and through-silicon via etching. The silicon surface of the wafer with the set shape is prepared with a silicon dioxide layer, and the silicon dioxide layer is coated with a flexible UV adhesive layer. The flexible UV adhesive layer at the bottom of the through-silicon via is removed to expose the PAD, and an RDL is prepared in the convex area of the silicon surface of the wafer, and the RDL is connected to the PAD at the bottom of the through-silicon via. After the silicon surface of the wafer is covered with a solder mask layer, the surface pads are opened and the balls are planted by exposure and development.
2. The packaging structure of an in-vehicle CIS chip according to claim 1, characterized in that: A plurality of groups of chips are arranged on the lower surface of the wafer. Before being cut into independent packaging structures, each group of chips is arranged correspondingly in the cofferdam area of the cofferdam structure.
3. The packaging structure of an in-vehicle CIS chip according to claim 1, wherein: After the surface of the glass is coated with negative photoresist, a cofferdam structure corresponding to the shape of the chip arrangement on the lower layer of the wafer is formed through a photolithography process. After the wafer and the glass are bonded, the chips are arranged correspondingly in the cofferdam area of the cofferdam layer.
4. A method for packaging the vehicle-mounted CIS chip packaging structure according to any one of claims 1 to 3, characterized in that: First, prepare the glass and wafer, and complete the wafer bonding, thinning, and through-silicon via processes; Secondly, a layer of silicon dioxide is sputtered on the silicon surface of the product. Then, a flexible UV adhesive is coated on the silicon dioxide layer and quickly cured through a photolithography mask. Only the UV adhesive at the bottom of the hole is removed to form a double dielectric layer insulation structure. Finally, after the RDL, solder mask, ball planting and final cutting processes, TSV packaging is completed.
5. The packaging method of a vehicle-mounted CIS chip packaging structure according to claim 4, characterized in that: It includes the following steps: A1. Apply a layer of negative photoresist on the glass surface, form a cofferdam structure through a photolithography process, and apply a bonding adhesive layer on the convex part of the cofferdam structure. Bond the lower surface of the wafer with the chip to the bonding adhesive layer to complete the bonding. A2. After grinding, photolithography, and dry etching processes, the silicon layer of the wafer is thinned and the through-silicon via is etched; A3. Prepare a silicon dioxide layer on the surface of the silicon layer and apply a flexible UV adhesive layer. Use a photolithography mask to remove excess UV adhesive at the bottom of the through-silicon via. The UV adhesive replaces silicon nitride to isolate moisture and resist ion penetration. Its fast curing properties ensure that the adhesive is applied to the hole wall. A4. Open the bottom of the TSV to expose the PAD, and then process the RDL on the upper convex area of the silicon layer. The process is performed so that the RDL in the same package structure is connected to the PAD at the bottom of the TSV. Then, cover the entire upper surface of the silicon layer with solder mask, and pre-cut the groove and half-cut to the upper convex part of the cofferdam structure. A5. Open the pad located on the upper convex area of the silicon layer by exposure and development and plant the ball; A6. Cut into final products.
6. The packaging method of a vehicle-mounted CIS chip packaging structure according to claim 5, characterized in that: In step A4, a solder resist layer is placed on the entire upper surface of the silicon layer by spin coating, spraying, or printing.