Application migration method, device, equipment and medium based on processor performance prediction

Abstract

The present invention discloses an application migration method, apparatus, device, and medium based on processor performance prediction, relating to the field of cloud data technology. The method comprises: encoding parameter information of a target processor corresponding to an application migration operation, and separating the encoded feature vectors using a multi-layer perceptron to obtain a general feature vector and an architecture feature vector; the general feature vector is a feature vector of information corresponding to a specification parameter type, and the architecture feature vector is a feature vector of information corresponding to an architecture parameter type; processing the general feature vector and the architecture feature vector separately using a multi-layer perceptron, and merging the obtained first and second feature vectors; using the multi-layer perceptron to predict the merged feature vector to obtain a performance score of the target processor, and executing the application migration operation based on the performance score. Thus, cross-architecture processor performance prediction can be achieved, ensuring performance and service quality after application migration.

Description

Technical Field

[0001] The present invention relates to the field of cloud data technology, and in particular to an application migration method, apparatus, device and medium based on processor performance prediction. Background Art

[0002] In cloud operating system environments, applications often need to be migrated between different CPU (Central Processing Unit) architectures. The CPU performance before and after application migration can affect application performance and service quality. Therefore, accurate CPU performance prediction is essential during application migration. Currently, commonly used CPU performance prediction methods are often based on a single architecture, and the accuracy of the prediction results cannot be guaranteed when migrating applications between different architectures.

[0003] Therefore, how to accurately predict CPU performance during application migration is a problem that those skilled in the art need to solve. Summary of the Invention

[0004] The purpose of the embodiments of the present invention is to provide an application migration method, apparatus, device and medium based on processor performance prediction, which can predict processor performance across architectures and solve the problem of accurately predicting processor performance during application migration.

[0005] To solve the above technical problems, in a first aspect, an embodiment of the present invention provides an application migration method based on processor performance prediction, comprising:

[0006] Encode the parameter information of the target processor corresponding to the application migration operation, and separate the encoded feature vectors using a multi-layer perceptron to obtain corresponding general feature vectors and architectural feature vectors; the general feature vector is the feature vector corresponding to the specification parameter type in the parameter information, and the architectural feature vector is the feature vector corresponding to the architectural parameter type in the parameter information;

[0007] The general feature vector and the architecture feature vector are processed separately by a multi-layer perceptron, and the obtained first feature vector and second feature vector are merged;

[0008] A multi-layer perceptron is used to predict the merged feature vector to obtain the performance score of the target processor, and the application migration operation is performed based on the performance score.

[0009] In some embodiments, encoding parameter information of a target processor corresponding to an application migration operation includes:

[0010] Determine the target processor corresponding to the current application migration operation;

[0011] Obtaining first parameter information of a target processor published by a processor manufacturer corresponding to the target processor, and obtaining second parameter information corresponding to the target processor obtained by performing a performance test on a preset processor benchmark test suite;

[0012] Processing the first parameter information and the second parameter information based on a preset derived data calculation rule to obtain third parameter information that has a derivative relationship with the first parameter information and the second parameter information;

[0013] The first parameter information, the second parameter information, and the third parameter information are encoded.

[0014] In some embodiments, encoding parameter information of a target processor corresponding to an application migration operation includes:

[0015] Encoding numerical data in parameter information of a target processor corresponding to an application migration operation using a preset data standardization tool to obtain a first encoded feature vector;

[0016] Encode the non-numeric data in the parameter information using the one-hot encoding technique to obtain a second encoded feature vector;

[0017] The first encoded feature vector and the second encoded feature vector are merged to obtain a target encoded feature vector.

[0018] In some embodiments, a multi-layer perceptron is used to perform a separation operation on the encoded feature vector to obtain corresponding general feature vectors and architecture feature vectors, including:

[0019] Input the encoded feature vector into a pre-set multi-layer perceptron to perform a separation operation on the encoded feature vector based on the specification parameter type and the architecture parameter type to obtain corresponding general feature vectors and architecture feature vectors;

[0020] Among them, the information of specification parameter type includes frequency information, core number information, memory information, and cache information; the information of architecture parameter type includes architecture information, cache organization information, and information with a derivative relationship obtained by processing the architecture information based on preset derived data calculation rules.

[0021] In some embodiments, using a multilayer perceptron to predict the merged feature vector to obtain a performance score of the target processor includes:

[0022] Determine the merged feature vector, and process the merged feature vector through the fully connected layer of the multi-layer perceptron to obtain the corresponding processed feature vector;

[0023] The output layer of the multi-layer perceptron is used to output the processed feature vector to predict the performance score of the target processor.

[0024] In some embodiments, the present invention further comprises:

[0025] Determine old parameter information corresponding to the original processor in the cloud operating system and new parameter information corresponding to the newly added processor;

[0026] The old parameter information and the new parameter information are detected based on a preset data difference detection rule to obtain a corresponding detection result; the preset data difference detection rule is a detection rule constructed based on relative entropy and data volume;

[0027] If the detection result characterizes that a preset incremental update condition is satisfied, the new parameter information is used to optimize the parameters of the multilayer perceptron to obtain a new multilayer perceptron, so as to perform the relevant application migration operation based on the new multilayer perceptron; the preset incremental update condition is that the data volume of the new parameter information is less than a first preset threshold of the data volume of the total parameter information, and the relative entropy between the new parameter information and the old parameter information is less than a second preset threshold;

[0028] If the detection result representation meets the preset retraining conditions, a new multi-layer perceptron is retrained based on the new parameter information and the old parameter information, so as to perform relevant application migration operations based on the new multi-layer perceptron; the preset retraining conditions are that the data amount of the new parameter information is not less than a first preset threshold, or the relative entropy between the new parameter information and the old parameter information is not less than a second preset threshold.

[0029] In some embodiments, after obtaining the new multi-layer perceptron, the method further includes:

[0030] Perform performance tests on the new multi-layer perceptron and obtain corresponding test results;

[0031] Compare the test results with the preset performance conditions to obtain corresponding comparison results;

[0032] Based on whether the comparison result indicates that the performance of the new multi-layer perceptron meets the preset performance conditions, it is determined whether the new multi-layer perceptron is determined as the target multi-layer perceptron, so as to use the target multi-layer perceptron to perform related application migration operations; the preset performance conditions are conditions constructed based on the mean absolute error and goodness of fit.

[0033] In some embodiments, determining whether to use the new multi-layer perceptron as a target multi-layer perceptron based on whether the comparison result indicates that the performance of the new multi-layer perceptron meets a preset performance condition includes:

[0034] If the comparison result indicates that the incremental percentage of the mean absolute error of the new multilayer perceptron is not greater than the third preset threshold, and the decrement percentage of the goodness of fit of the new multilayer perceptron is not greater than the fourth preset threshold, then it is determined that the performance of the new multilayer perceptron meets the preset performance conditions, and the new multilayer perceptron is determined as the target multilayer perceptron.

[0035] In some embodiments, determining whether to use the new multi-layer perceptron as a target multi-layer perceptron based on whether the comparison result indicates that the performance of the new multi-layer perceptron meets a preset performance condition includes:

[0036] If the comparison result indicates that the incremental percentage of the mean absolute error of the new multilayer perceptron is greater than a third preset threshold, and / or the decrement percentage of the goodness of fit of the new multilayer perceptron is greater than a fourth preset threshold, then the model parameter values ​​of the new multilayer perceptron are rolled back to the model parameter values ​​of the multilayer perceptron corresponding to the historical checkpoint, and the rolled-back multilayer perceptron is determined as the target multilayer perceptron;

[0037] The model parameter values ​​of the multilayer perceptron corresponding to the historical checkpoints are pre-checked model parameter values ​​of the multilayer perceptron that meet preset performance conditions.

[0038] In some embodiments, rolling back the model parameter values ​​of the new multi-layer perceptron to the model parameter values ​​of the multi-layer perceptron corresponding to the historical checkpoint includes:

[0039] Determine the preset number of historical checkpoints closest to the current time point;

[0040] According to the performance of the multi-layer perceptron corresponding to each historical checkpoint, the target model parameter value corresponding to the multi-layer perceptron with the best performance is determined;

[0041] The model parameter values ​​of the new multilayer perceptron are rolled back to the target model parameter values ​​to obtain the corresponding rolled-back multilayer perceptron.

[0042] In some embodiments, a performance test of the new multilayer perceptron is performed, including:

[0043] Determining corresponding target parameter information from old parameter information according to a preset ratio;

[0044] Determine the target parameter information and the new parameter information as a test set;

[0045] The test set is used to perform performance tests on the new multi-layer perceptron and obtain corresponding test results.

[0046] In some embodiments, after the performance test of the new multilayer perceptron is performed, the method further includes:

[0047] Determining whether an error ratio represented by the test result is less than a fifth preset threshold; the error ratio is a ratio of error data between test data related to the architectural parameter type of the newly added processor and corresponding actual data in the test result;

[0048] If the error ratio is less than the fifth preset threshold, it is determined that the new multilayer perceptron meets the preset stability expectation, so as to compare the test result with the preset performance condition.

[0049] In a second aspect, the present invention provides an application migration device based on processor performance prediction, comprising:

[0050] An encoding processing module is used to encode the parameter information of the target processor corresponding to the application migration operation and perform a separation operation on the encoded feature vector through a multi-layer perceptron to obtain corresponding general feature vectors and architectural feature vectors; the general feature vector is the feature vector corresponding to the specification parameter type in the parameter information, and the architectural feature vector is the feature vector corresponding to the architectural parameter type in the parameter information;

[0051] A feature vector processing module, configured to process the general feature vector and the architecture feature vector respectively through a multi-layer perceptron, and merge the obtained first feature vector and second feature vector;

[0052] The application migration module is used to use a multi-layer perceptron to predict the merged feature vector to obtain a performance score of the target processor and perform an application migration operation based on the performance score.

[0053] In a third aspect, the present invention provides an electronic device, comprising:

[0054] memory for storing computer programs;

[0055] The processor is configured to execute a computer program to implement the steps of the above-mentioned application migration method based on processor performance prediction.

[0056] In a fourth aspect, the present invention provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the above-mentioned application migration method based on processor performance prediction.

[0057] It can be seen from the above technical solution that the present application first encodes the parameter information of the target processor corresponding to the application migration operation, and performs a separation operation on the encoded feature vector through a multi-layer perceptron to obtain the corresponding general feature vector and architecture feature vector; the general feature vector is the feature vector of the information corresponding to the specification parameter type in the parameter information, and the architecture feature vector is the feature vector of the information corresponding to the architecture parameter type in the parameter information; then the general feature vector and the architecture feature vector are processed separately by a multi-layer perceptron, and the obtained first feature vector and second feature vector are merged; then the multi-layer perceptron is used to predict the merged feature vector to obtain the performance score of the target processor, and the application migration operation is performed based on the performance score. In this way, the present application can process the general features and architecture features of the processor separately, and can realize cross-architecture processor performance prediction; and the two features are finally merged to improve the accuracy of cross-architecture performance prediction; in this way, the performance of the processor can be accurately predicted, providing a migration decision basis for the application migration operation, and ensuring the performance and service quality of the application after migration. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] In order to more clearly illustrate the embodiments of the present invention, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0059] Figure 1 This is a flow chart of an application migration method based on processor performance prediction disclosed in this application;

[0060] Figure 2 This is a flowchart of a specific application migration method based on processor performance prediction disclosed in this application;

[0061] Figure 3 This is a flowchart of another specific application migration method based on processor performance prediction disclosed in this application;

[0062] Figure 4 A specific processor performance prediction flow chart disclosed in this application;

[0063] Figure 5 This is a schematic diagram of the structure of an application migration device based on processor performance prediction disclosed in this application;

[0064] Figure 6 This is a structural diagram of an electronic device disclosed in this application. DETAILED DESCRIPTION

[0065] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0066] The terms "including" and "having," as used in the present description and accompanying drawings, and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements and may include steps or elements that are not listed.

[0067] In order to enable those skilled in the art to better understand the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0068] like Figure 1 As shown, this embodiment discloses an application migration method based on processor performance prediction, including:

[0069] Step S11, encode the parameter information of the target processor corresponding to the application migration operation, and separate the encoded feature vector through a multi-layer perceptron to obtain the corresponding general feature vector and architecture feature vector; the general feature vector is the feature vector of the information corresponding to the specification parameter type in the parameter information, and the architecture feature vector is the feature vector of the information corresponding to the architecture parameter type in the parameter information.

[0070] In this embodiment, it is first necessary to encode the parameter information of the target processor corresponding to the application migration operation, where the parameter information includes information on the specification parameter type and information on the architecture parameter type; the encoded feature vector can be subjected to a feature separation operation through a multi-layer perceptron, and the feature vectors corresponding to the information on the specification parameter type and the information on the architecture parameter type are separated and processed to obtain corresponding general feature vectors and architecture feature vectors; it is understandable that the parameter information of the target processor can be obtained from a variety of channels, such as official releases, actual measurements in production environments, and benchmark databases.

[0071] In a specific embodiment, encoding the parameter information of the target processor corresponding to the application migration operation may include: determining the target processor corresponding to the current application migration operation; obtaining first parameter information of the target processor published by the processor manufacturer corresponding to the target processor, and obtaining second parameter information corresponding to the target processor obtained by a performance test using a preset processor benchmark test suite; processing the first parameter information and the second parameter information based on a preset derivative data calculation rule to obtain third parameter information that has a derivative relationship with the first parameter information and the second parameter information; encoding the first parameter information, the second parameter information, and the third parameter information. Specifically, first, it is necessary to determine the target processor corresponding to the current application migration operation, and migrate the application from the original processor architecture to the target processor architecture in a heterogeneous environment; the target processor may be obtained by obtaining the first parameter information of the target processor published by the processor manufacturer corresponding to the target processor; and the second parameter information may be obtained by performing a performance test on the target processor using the processor benchmark test suite; further, in order to fully characterize the architectural features of the processor, the first parameter information and the second parameter information may be derived and calculated to obtain corresponding third parameter information, such as derivative information such as difference, range, and change ratio. Thereafter, the first parameter information, the second parameter information, and the third parameter information may be encoded to obtain an encoded feature vector corresponding to the parameter information of the target processor.

[0072] Accordingly, in another specific embodiment, encoding the parameter information of the target processor corresponding to the application migration operation may include: encoding the numerical data in the parameter information of the target processor corresponding to the application migration operation through a preset data standardization tool to obtain a first encoded feature vector; encoding the non-numerical data in the parameter information through a one-hot encoding technique to obtain a second encoded feature vector; merging the first encoded feature vector and the second encoded feature vector to obtain a target encoded feature vector. Specifically, the parameter information corresponding to the target processor can be divided into numerical data, such as the number of cores, frequency, etc., and non-numerical data, such as the architecture type; then the corresponding numerical data can be encoded through a data standardization tool, and the non-numerical data can be processed using a one-hot encoding technique; in this way, the corresponding first encoded feature and the second encoded feature can be obtained, and then these features are merged to ensure the consistency of the feature order to produce the final target encoded feature vector.

[0073] In a specific embodiment, a separation operation is performed on the encoded feature vector through a multi-layer perceptron to obtain corresponding general feature vectors and architectural feature vectors, which can include: inputting the encoded feature vector into a preset multi-layer perceptron to perform a separation operation on the encoded feature vector based on the specification parameter type and the architecture parameter type to obtain corresponding general feature vectors and architectural feature vectors; wherein the information of the specification parameter type includes frequency information, core number information, memory information, and cache information, and the information of the architecture parameter type includes architecture information, cache organization information, and information with a derivative relationship obtained by processing the architecture information based on preset derivative data calculation rules. Specifically, the above steps can obtain the encoded feature vector of the parameter information corresponding to the target processor, and then the encoded feature vector can be input into a pre-set multi-layer perceptron. The feature separator of the multi-layer perceptron performs a feature separation operation on the encoded feature vector based on the specification parameter type and the architecture parameter type, and a general feature vector corresponding to the specification parameter type and an architecture feature vector corresponding to the architecture parameter type can be obtained; it can be understood that the general features may include features of the basic information corresponding to the target processor, such as frequency-related features, core number-related features, memory-related features, and basic cache-related features; architectural features may include processor architecture type, cache organization method, architecture optimization parameters, and architecture-related derived features; and the derived features are features of the derived information obtained by processing the architecture-related information of the target processor based on the derived data calculation rules.

[0074] Step S12: Process the general feature vector and the architecture feature vector respectively through a multi-layer perceptron, and merge the obtained first feature vector and second feature vector.

[0075] In this embodiment, the above steps can be used to obtain an encoded feature vector corresponding to the parameter information of the target processor, and the encoded feature vector can be separated into a general feature vector and an architectural feature vector through a multi-layer perceptron. Furthermore, the multi-layer perceptron can be used to perform feature processing on the corresponding general feature vector and architectural feature vector respectively. Specifically, the two feature vectors can be processed separately through two independent feature branches corresponding to different dense layers to explore deeper features. Furthermore, the first feature vector and the second feature vector processed by different feature branches can be merged to ensure the accuracy of the final prediction.

[0076] Step S13: Use a multi-layer perceptron to predict the merged feature vector to obtain a performance score of the target processor, and perform an application migration operation based on the performance score.

[0077] In this embodiment, through the above steps, a multi-layer perceptron can be used to separate the encoded feature vectors corresponding to the parameter information of the target processor, and feature processing can be performed on the separated general feature vector and architecture feature vector respectively through different feature branches, and the processed first feature vector and second feature vector are merged to obtain the corresponding merged feature vector; further, the merged feature vector can be predicted by the multi-layer perceptron, specifically, a single numerical value can be output linearly through a single node to identify the predicted processor performance score; then, based on the performance score, the performance difference of the processor before and after application migration can be considered to perform the corresponding application migration operation.

[0078] In a specific embodiment, using a multilayer perceptron to predict a merged feature vector to obtain a performance score of a target processor can include: determining the merged feature vector, processing the merged feature vector through a fully connected layer of the multilayer perceptron to obtain a corresponding processed feature vector; and outputting the processed feature vector through an output layer of the multilayer perceptron to predict the performance score of the target processor. Specifically, in the process of predicting the performance score of the target processor using the multilayer perceptron, the merged feature vector can be processed through a fully connected layer of the multilayer perceptron and then linearly output through the output layer to obtain a more accurate prediction result, i.e., the performance score of the target processor.

[0079] In another specific embodiment, a multi-layer perceptron can be used to perform performance prediction on processors corresponding to several environments in a heterogeneous cloud operating system. Combined with corresponding application migration operations or other resource scheduling decisions, several more suitable environments can be screened out from the heterogeneous environments corresponding to the several processors based on the performance prediction results, so that corresponding application migration operations or other resource scheduling decisions can be executed based on the screened environments; accordingly, different environments can be screened directly based on performance scores, or they can be screened based on specific operational difficulties and actual needs.

[0080] It can be seen that this application can process the general features and architectural features of the processor separately, and can realize cross-architecture processor performance prediction; and the two features are finally merged to improve the accuracy of cross-architecture performance prediction; the predictive ability of the model can be maintained through the continuous learning mechanism; the prediction results of the final model can be used to guide application migration and resource scheduling decisions in heterogeneous environments, and ensure the performance and service quality of the application after migration.

[0081] The above embodiment introduces the specific content of the performance prediction of the target processor. According to the data type, different feature branches in the multi-layer perceptron can be used to perform feature processing respectively, which can further mine effective features and improve the accuracy of the final performance score prediction. The following embodiment will introduce the process of continuous learning of the multi-layer perceptron in detail. Figure 2 As shown in Figure 1, when a new processor is added, the multilayer perceptron can be updated or retrained, including:

[0082] Step S21: Determine old parameter information corresponding to the original processor and new parameter information corresponding to the newly added processor in the cloud operating system.

[0083] It is understandable that if a new processor is added to the cloud operating system, in order to ensure the performance prediction effect of the multi-layer perceptron for different processors, the multi-layer perceptron needs to be updated or retrained in combination with the new parameter information of the new processor; specifically, it is first necessary to determine the old parameter information corresponding to the original processor in the cloud operating system and the new parameter information of the new processor; and the old parameter information must match the current multi-layer perceptron.

[0084] Step S22: Detect the old parameter information and the new parameter information based on a preset data difference detection rule to obtain a corresponding detection result; the preset data difference detection rule is a detection rule constructed based on relative entropy and data volume.

[0085] Furthermore, the old parameter information and the new parameter information can be detected according to the data difference detection rules. Specifically, the data difference can be detected by calculating the KL divergence (relative entropy) between the new parameter information and the old parameter information, the data amount, etc., to obtain the corresponding detection results; in a specific embodiment, the data differences such as the feature mean and variance between the new and old parameter information can also be considered.

[0086] Step S23: If the detection result indicates that the preset incremental update condition is met, the new parameter information is used to optimize the parameters of the multilayer perceptron to obtain a new multilayer perceptron, so as to perform related application migration operations based on the new multilayer perceptron; the preset incremental update condition is that the data volume of the new parameter information is less than a first preset threshold of the data volume of the total parameter information, and the relative entropy between the new parameter information and the old parameter information is less than a second preset threshold.

[0087] Through the above steps, the new parameter information and the old parameter information can be tested for data differences to obtain corresponding test results; if the test results indicate that the preset incremental update conditions are met, the ratio between the data volume of the newly added parameter information and the data volume of the total parameter information (the sum of the data volume of the new and old parameter information) is less than a first preset threshold (for example, 10%), and the KL divergence between the new parameter information and the old parameter information is less than a second preset threshold (for example, 0.3), then the new parameter information can be used to directly perform supplementary training on the current multi-layer perceptron to optimize the parameters and obtain a new multi-layer perceptron; then, related application migration operations can be performed based on the new multi-layer perceptron. In a specific embodiment, the relationship between the number of architectures corresponding to the new parameter information and the number of architectures of the total parameter information can also be considered, such as a proportion of less than 5%.

[0088] Step S24: If the detection result indicates that a preset retraining condition is met, a new multilayer perceptron is retrained based on the new parameter information and the old parameter information, so as to perform related application migration operations based on the new multilayer perceptron; the preset retraining condition is that the data volume of the new parameter information is not less than a first preset threshold, or the relative entropy between the new parameter information and the old parameter information is not less than a second preset threshold.

[0089] Accordingly, if the detection result indicates that the preset retraining conditions are met, the ratio between the data volume of the new parameter information and the data volume of the total parameter information is not less than a first preset threshold, or the KL divergence between the new parameter information and the old parameter information is not less than a second preset threshold; that is, if at least one of the two conditions is not met, it can be determined that the current multi-layer perceptron needs to be completely retrained; specifically, a multi-layer perceptron needs to be retrained using the new parameter information and the old parameter information, which is recorded as a new multi-layer perceptron; the new multi-layer perceptron can subsequently be used to perform related application migration operations. In a specific embodiment, if the architecture series corresponding to the new parameter information is a completely new architecture, the multi-layer perceptron can also be retrained.

[0090] Furthermore, in a specific embodiment, after obtaining a new multi-layer perceptron, the following may be included: performing a performance test on the new multi-layer perceptron to obtain corresponding test results; comparing the test results with preset performance conditions to obtain corresponding comparison results; based on whether the comparison results indicate that the performance of the new multi-layer perceptron meets the preset performance conditions, determining whether to determine the new multi-layer perceptron as the target multi-layer perceptron, so as to use the target multi-layer perceptron to perform related application migration operations; the preset performance conditions are conditions constructed based on mean absolute error and goodness of fit. Specifically, after obtaining a new multi-layer perceptron through parameter optimization or retraining, a performance test may be performed on the new multi-layer perceptron to determine whether to retain the new multi-layer perceptron based on the performance test results; it is understandable that if the performance test results indicate that the corresponding performance conditions are met, such as if the accuracy of the test set reaches a corresponding threshold, the new multi-layer perceptron may be retained and recorded as the target multi-layer perceptron, so that the target multi-layer perceptron can be used to perform related application migration operations later.

[0091] In a specific embodiment, determining whether to determine the new multilayer perceptron as the target multilayer perceptron based on whether the comparison result indicates that the performance of the new multilayer perceptron meets the preset performance conditions may include: if the comparison result indicates that the incremental percentage of the mean absolute error of the new multilayer perceptron is not greater than a third preset threshold, and the decrement percentage of the goodness of fit of the new multilayer perceptron is not greater than a fourth preset threshold, then determining that the performance of the new multilayer perceptron meets the preset performance conditions, and determining the new multilayer perceptron as the target multilayer perceptron. Specifically, if the comparison result of the performance test result and the performance condition indicates that the incremental percentage of the mean absolute error of the new multilayer perceptron is not greater than a third preset threshold (e.g., 5%), and the decrement percentage of the goodness of fit of the new multilayer perceptron is not greater than a fourth preset threshold (e.g., 3%), then the new multilayer perceptron may be determined as the target multilayer perceptron; this can ensure the performance level of the final multilayer perceptron.

[0092] In another specific embodiment, determining whether to determine the new multilayer perceptron as the target multilayer perceptron based on whether the comparison result indicates that the performance of the new multilayer perceptron meets the preset performance conditions can include: if the comparison result indicates that the incremental percentage of the mean absolute error of the new multilayer perceptron is greater than a third preset threshold, and / or the decrement percentage of the goodness of fit of the new multilayer perceptron is greater than a fourth preset threshold, then rolling back the model parameter values ​​of the new multilayer perceptron to the model parameter values ​​of the multilayer perceptron corresponding to the historical checkpoint, and determining the rolled-back multilayer perceptron as the target multilayer perceptron; wherein the model parameter values ​​of the multilayer perceptron corresponding to the historical checkpoint are the model parameter values ​​of the multilayer perceptron that have been pre-checked and meet the preset performance conditions. Furthermore, if the comparison result characterizes that at least one of the incremental percentage of the mean absolute error of the new multilayer perceptron and the decrement percentage of the goodness of fit does not meet the corresponding conditions, the current new multilayer perceptron needs to be discarded; specifically, the model parameter values ​​of the current new multilayer perceptron can be rolled back to the parameter values ​​of a previously recorded time point; it can be understood that during the continuous learning process of the multilayer perceptron, the performance of the multilayer perceptron can be checked at different time points, and when the model performance is checked to meet the preset performance conditions, the model performance and model parameter values ​​corresponding to the corresponding inspection time points are recorded; in this way, the model performance and related model parameter values ​​of the most recent several checkpoints can be recorded. Then, when the performance of the new multilayer perceptron does not meet the corresponding conditions, the model parameter values ​​of the multilayer perceptron can be rolled back to the model parameter values ​​corresponding to a recorded checkpoint to ensure that the performance meets the corresponding conditions.

[0093] In another specific embodiment, rolling back the model parameter values ​​of the new multilayer perceptron to the model parameter values ​​of the multilayer perceptron corresponding to the historical checkpoints may include: determining a preset number of historical checkpoints closest to the current time point; determining the target model parameter values ​​corresponding to the multilayer perceptron with the best performance based on the performance of the multilayer perceptrons corresponding to each historical checkpoint; rolling back the model parameter values ​​of the new multilayer perceptron to the target model parameter values ​​to obtain the corresponding rolled-back multilayer perceptron. Specifically, in the process of rolling back the model parameter values, it is necessary to consider the time difference between different checkpoints and the current time point, as well as the performance of the multilayer perceptrons corresponding to each checkpoint; several historical checkpoints within a certain period of time before the current time point may be selected, and based on the performance of the multilayer perceptrons corresponding to the corresponding historical checkpoints, the target model parameter values ​​corresponding to the multilayer perceptron with the best performance may be determined; then the target model parameter values ​​may be used to set the current new multilayer perceptron to achieve rolling back the model parameter values ​​of the new multilayer perceptron to the state of the corresponding checkpoint, ensuring that the performance of the multilayer perceptron meets the corresponding conditions.

[0094] Furthermore, in a specific embodiment, performance testing of a new multilayer perceptron may include: determining corresponding target parameter information from old parameter information according to a preset ratio; determining the target parameter information and the new parameter information as a test set; and using the test set to perform a performance test on the new multilayer perceptron to obtain corresponding test results. Specifically, during the performance test of the new multilayer perceptron, it is first necessary to construct a test set for performance testing; here, it is possible to select part of the parameter information from the old parameter information according to a certain ratio and record it as the target parameter information; then the target parameter information and the new parameter information are used together as a test set; and then the test set is used to perform a performance test on the corresponding new multilayer perceptron to obtain corresponding test results. In this way, by using part of the historical data and combining it with the new data, the multilayer perceptron can be comprehensively evaluated to obtain more accurate performance test results.

[0095] In a specific embodiment, after the performance test of the new multilayer perceptron is performed, the following may be included: determining whether the error ratio represented by the test result is less than a fifth preset threshold; the error ratio is the ratio of the error data between the test data related to the architecture parameter type of the newly added processor and the corresponding actual data in the test result; if the error ratio is less than the fifth preset threshold, then the new multilayer perceptron is determined to meet the preset stability expectations, so as to compare the test results with the preset performance conditions. Specifically, after the performance test of the new multilayer perceptron is performed, the relationship between the ratio of the amount of error data between the test data related to the processor architecture parameter type and the corresponding actual data represented by the test result and the corresponding fifth preset threshold (for example, the new architecture data prediction error threshold of 15%) can be determined; if the error ratio is less than the fifth preset threshold, then the performance of the new multilayer perceptron can be determined to meet the preset stability expectations, and then the test results of the new multilayer perceptron are compared with the corresponding preset performance conditions. This verification and evaluation method can ensure the prediction ability of the multilayer perceptron.

[0096] It can be seen that in the process of continuous learning of the model, changes in the distribution of new data can be detected through indicators such as KL divergence, and incremental updates or complete retraining can be automatically selected according to the degree of data change. A performance guarantee mechanism is used to ensure the prediction stability of the model after the update; at the same time, the model performance and parameters are recorded, so that the model has the ability to roll back and prevent performance degradation; in this way, the predictive ability of the model is maintained through the continuous learning mechanism, and the reliability of the prediction structure is guaranteed.

[0097] like Figure 3 As shown, this embodiment discloses an application migration method based on processor performance prediction, involving a data collection module, a feature processing module, an MLP (Multilayer Perceptron) model module, and a continuous learning module, specifically including:

[0098] In this embodiment, the data collection module mainly collects parameter information of the processor and performs preprocessing. Specifically, the data collection module can obtain data from three channels: the SPEC CPU (a processor performance test suite) benchmark database, official specification parameters released by CPU manufacturers, and actual performance data collected in the production environment. Furthermore, the information obtained may include: basic processor information, which is used to describe the basic specifications of the CPU, such as architecture type Zen3, SkyLake, ARMv8, etc., nominal frequency 2.5GHz, maximum frequency 4.5GHz, total number of processor cores 64 cores, number of processor chips 2, and number of hardware threads per core 2 threads / core; cache configuration information can reflect the multi-level cache structure of the CPU, such as L1 cache 32KB instruction cache per core, 32KB data cache, L2 cache 512KB per core, exclusive mode (per core), L3 cache 32MB per chip, shared mode (per chip); memory configuration information is used to describe the characteristics of the memory subsystem, such as memory size 256GB, memory type DDR4-3200.

[0099] Furthermore, the feature processing module can normalize processor-related parameter information. For numeric parameter information, StandardScaler (a data normalization tool) can be used for normalization. For example, for the number of cores, the original data is [16, 32, 64, 128], with a calculated mean μ=60 and a standard deviation σ=42.43, the normalized results are [-1.037, -0.660, 0.094, 1.603]. For encoding non-numeric architectural features, one-hot encoding can be used. For example, the original data is ["Zen2", "Zen3", "SkyLake"], and the encoded results are [1,0,0], [0,1,0], [0,0,1]. Using normalization and one-hot encoding allows the model to handle parameters of different dimensions and types. Accordingly, derived features can be generated by combining parameter information. For example, frequency-related features include: dynamic frequency range = maximum frequency - nominal frequency; for example, 4.5 GHz - 2.5 GHz = 2.0 GHz; frequency boost ratio = maximum frequency / nominal frequency; for example, 4.5 GHz / 2.5 GHz = 1.8. Cache-related features include: total cache per core = (L1 + L2 + L3 cache size) / number of cores; for example, (64 KB + 512 KB + 32 MB) / 64 cores = 531 KB / core. Cache level ratio = L2 cache size / L1 cache size, L3 cache size / L2 cache size; for example, 512 KB / 64 KB = 8, 32 MB / 512 KB = 64. Parallelism-related features include: total number of threads = number of cores × number of threads per core; for example, 64 cores × 2 threads = 128 threads. Chip density = number of cores / number of chips; for example, 64 cores / 2 chips = 32 cores / chip. All processed features are then merged, ensuring feature order consistency, to generate an encoded feature vector; for example, [frequency features..., core features..., cache features..., architectural features..., derived features...], with a dimension of 1 x N (N is the total number of features). This effectively reflects the internal structural characteristics of the processor.

[0100] Furthermore, the encoded feature vector is input into the MLP model module (multi-layer perceptron) to separate the encoded feature vector through the input layer, and two feature branches (general feature branch and architectural feature branch) perform feature processing respectively, and the two types of processed feature vectors are merged through the feature merging layer, and the performance of the merged feature vector is predicted through the output layer to obtain the final performance score.

[0101] It should be noted that during the process of predicting or training processor performance using the MLP model module, the model performance can be evaluated through the continuous learning module; and the model strategy can be updated based on the evaluation results, such as using new parameter information to optimize the model parameters, or directly retraining the model; this can update the model to better meet actual needs and maintain the model's predictive ability through the continuous learning mechanism. In a specific embodiment, the continuous learning module can detect changes in data distribution, specifically feature distribution monitoring, calculate the KL divergence of new and old data, set the threshold to 0.5, and monitor changes in feature mean and variance; and architectural change monitoring can detect the introduction of new architectures and evaluate the degree of change in architectural features. The update strategy selection specifically involves incremental update conditions (which must be met simultaneously) and full retraining conditions (either of which must be met). Incremental update conditions may include: new data volume < 10% of total data, feature distribution KL divergence < 0.3, number of new architectures < 5% of total architectures, and validation set performance degradation < 5%; while full retraining conditions may include: new data volume > 10% of total data, feature distribution KL divergence > 0.5, the presence of a completely new architecture family, and validation set performance degradation > 5%. Furthermore, to ensure model performance, performance thresholds can be set, such as a maximum increase in MAE of 5% and a maximum decrease in R² of 3%. Model performance can also be evaluated using a validation set. This validation set can be extracted from a certain percentage of historical data and validated against the new architecture data, ensuring that the prediction error threshold for the new architecture data does not exceed a certain percentage. In specific embodiments, RMSE can be used to assign a higher penalty weight to larger prediction errors to ensure the reliability of the prediction results. Accordingly, several optimal model checkpoints can be recorded during the process, allowing for rollback to the optimal checkpoint if subsequent model performance falls short of the target.

[0102] In a specific embodiment, Figure 4The figure shows the process of using the model to predict processor performance. The MLP model module adopts a two-branch network structure. The feature separator separates the input encoded feature vector into common features and architectural features, each containing features corresponding to relevant parameter information. Furthermore, in the common feature branch, the first layer is a 64-node dense layer with a ReLU activation function, an L2 regularization coefficient of 0.01, and a dropout rate of 0.2. The second layer is a 32-node dense layer. In the architectural feature branch, the first layer is a 32-node dense layer with a ReLU activation function, an L2 regularization coefficient of 0.01, and a dropout rate of 0.2. The second layer is a 16-node dense layer. This enhances the model's ability to handle complex features. In the subsequent merging and output stages, the merging layer is a 16-node dense layer, and the output layer is a single-node linear output. The final output is a single numerical value representing the predicted CPU performance score. During model training, the training configuration can be: loss function MSE (Mean Squared Error); optimizer Adam (Adaptive Moment Estimation, adaptive learning rate optimization algorithm), learning rate 0.001; batch size 32; number of training epochs 100 (using early stopping mechanism).

[0103] As can be seen, this solution, through the coordinated operation of the four modules described above, can accurately predict the performance of processors with different architectures. The general feature branch effectively captures the impact of universal processor laws on performance, while the architectural feature branch focuses on the unique characteristics of different architectures. Combining the features of the two branches and comprehensively considering them improves the accuracy of cross-architecture processor performance prediction. Furthermore, a continuous learning mechanism maintains the model's predictive power. The final model's prediction results can be used to guide application migration and resource scheduling decisions in heterogeneous environments.

[0104] like Figure 5 As shown, this embodiment discloses an application migration device based on processor performance prediction, comprising:

[0105] The encoding processing module 11 is used to encode the parameter information of the target processor corresponding to the application migration operation and perform a separation operation on the encoded feature vector through a multi-layer perceptron to obtain corresponding general feature vectors and architectural feature vectors; the general feature vector is the feature vector corresponding to the specification parameter type in the parameter information, and the architectural feature vector is the feature vector corresponding to the architectural parameter type in the parameter information;

[0106] A feature vector processing module 12 is configured to process the general feature vector and the architecture feature vector respectively through a multi-layer perceptron, and merge the obtained first feature vector and second feature vector;

[0107] The application migration module 13 is configured to use a multi-layer perceptron to predict the merged feature vectors to obtain a performance score of the target processor, and perform an application migration operation based on the performance score.

[0108] It can be seen from this that the present application can process the general features and architectural features of the processor separately, and can realize cross-architecture processor performance prediction; and the two features are finally merged to improve the accuracy of cross-architecture performance prediction; in this way, the performance of the processor can be accurately predicted, and a migration decision basis can be provided for application migration operations, thereby ensuring the performance and service quality of the application after migration.

[0109] Furthermore, the embodiment of the present application also discloses an electronic device, Figure 6 This is a structural diagram of an electronic device according to an exemplary embodiment. The content in the diagram should not be considered as any limitation on the scope of use of this application. The electronic device may specifically include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 is used to store a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the application migration method based on processor performance prediction disclosed in any of the aforementioned embodiments. In addition, the electronic device in this embodiment may specifically be an electronic computer.

[0110] In this embodiment, the power supply 23 is used to provide operating voltage for various hardware devices on the electronic device; the communication interface 24 can create a data transmission channel between the electronic device and external devices. The communication protocol it follows is any communication protocol that can be applied to the technical solution of this application and is not specifically limited here; the input and output interface 25 is used to obtain external input data or output data to the outside world. Its specific interface type can be selected according to specific application needs and is not specifically limited here.

[0111] In addition, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk or CD, etc. The resources stored thereon can include an operating system 221, a computer program 222, etc., and the storage method can be temporary storage or permanent storage.

[0112] The operating system 221 is used to manage and control various hardware devices on the electronic device, as well as the computer program 222, which can be Windows Server, NetWare, Unix, Linux, etc. In addition to including a computer program capable of implementing the application migration method based on processor performance prediction performed by the electronic device disclosed in any of the aforementioned embodiments, the computer program 222 can further include computer programs capable of performing other specific tasks.

[0113] Furthermore, this application also discloses a computer-readable storage medium for storing a computer program; wherein, when executed by a processor, the computer program implements the aforementioned disclosed method for application migration based on processor performance prediction. The specific steps of this method can be found in the corresponding contents disclosed in the aforementioned embodiments and will not be further described here.

[0114] Furthermore, the present application also discloses a computer program product, including a computer program / instruction, which, when executed by a processor, implements the aforementioned disclosed application migration method based on processor performance prediction.

[0115] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from the other embodiments. Reference can be made to the descriptions of the identical or similar parts between the various embodiments. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and the relevant parts can be referred to the descriptions of the methods.

[0116] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0117] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0118] Finally, it should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or device comprising the element.

[0119] The above is a detailed introduction to the technical solution provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for those skilled in the art, according to the ideas of the present application, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. An application migration method based on processor performance prediction, characterized in that: include: Encoding parameter information of a target processor corresponding to an application migration operation, and performing a separation operation on the encoded feature vector using a multi-layer perceptron to obtain corresponding general feature vectors and architectural feature vectors; the general feature vector is a feature vector corresponding to information on a specification parameter type in the parameter information, and the architectural feature vector is a feature vector corresponding to information on an architectural parameter type in the parameter information; Processing the general eigenvector and the architecture eigenvector respectively by the multi-layer perceptron, and merging the obtained first eigenvector and second eigenvector; The merged feature vector is predicted using the multi-layer perceptron to obtain a performance score of the target processor, and the application migration operation is performed based on the performance score.

2. The application migration method based on processor performance prediction according to claim 1, characterized in that: The encoding of parameter information of the target processor corresponding to the application migration operation includes: Determine the target processor corresponding to the current application migration operation; Obtaining first parameter information of the target processor published by a processor manufacturer corresponding to the target processor, and obtaining second parameter information corresponding to the target processor obtained by performing a performance test on a preset processor benchmark test suite; Processing the first parameter information and the second parameter information based on a preset derived data calculation rule to obtain third parameter information that has a derivative relationship with the first parameter information and the second parameter information; The first parameter information, the second parameter information, and the third parameter information are encoded.

3. The application migration method based on processor performance prediction according to claim 1, characterized in that: The encoding of parameter information of the target processor corresponding to the application migration operation includes: Encoding numerical data in parameter information of a target processor corresponding to an application migration operation using a preset data standardization tool to obtain a first encoded feature vector; Encoding the non-numeric data in the parameter information using a one-hot encoding technique to obtain a second encoded feature vector; The first encoded feature vector and the second encoded feature vector are merged to obtain a target encoded feature vector.

4. The application migration method based on processor performance prediction according to claim 1, characterized in that: The method of performing separation operation on the encoded feature vector by a multi-layer perceptron to obtain corresponding general feature vectors and architecture feature vectors includes: Inputting the encoded feature vector into a pre-set multi-layer perceptron to perform a separation operation on the encoded feature vector based on the specification parameter type and the architecture parameter type to obtain corresponding general feature vectors and architecture feature vectors; Among them, the information of the specification parameter type includes frequency information, core number information, memory information, and cache information; the information of the architecture parameter type includes architecture information, cache organization information, and information with a derivative relationship obtained by processing the architecture information based on preset derived data calculation rules.

5. The application migration method based on processor performance prediction according to claim 1, characterized in that: The using the multi-layer perceptron to predict the merged feature vector to obtain the performance score of the target processor includes: Determining a merged feature vector, and processing the merged feature vector through a fully connected layer of the multi-layer perceptron to obtain a corresponding processed feature vector; The processed feature vector is outputted using the output layer of the multilayer perceptron to predict the performance score of the target processor.

6. The application migration method based on processor performance prediction according to any one of claims 1 to 5, characterized in that: Also includes: Determine old parameter information corresponding to the original processor in the cloud operating system and new parameter information corresponding to the newly added processor; Detecting the old parameter information and the new parameter information based on a preset data difference detection rule to obtain a corresponding detection result; The preset data difference detection rule is a detection rule constructed based on relative entropy and data volume; If the detection result indicates that a preset incremental update condition is satisfied, the multi-layer perceptron is optimized using the new parameter information to obtain a new multi-layer perceptron, so as to perform the relevant application migration operation based on the new multi-layer perceptron; the preset incremental update condition is that the data volume of the new parameter information is less than a first preset threshold of the data volume of the total parameter information, and the relative entropy between the new parameter information and the old parameter information is less than a second preset threshold; If the detection result indicates that a preset retraining condition is satisfied, retraining a new multilayer perceptron based on the new parameter information and the old parameter information to perform a related application migration operation based on the new multilayer perceptron; The preset retraining condition is that the data amount of the new parameter information is not less than the first preset threshold, or the relative entropy between the new parameter information and the old parameter information is not less than the second preset threshold.

7. The application migration method based on processor performance prediction according to claim 6, characterized in that: After obtaining the new multi-layer perceptron, the method further includes: Performing a performance test on the new multilayer perceptron to obtain corresponding test results; Comparing the test results with the preset performance conditions to obtain corresponding comparison results; Based on whether the comparison result indicates that the performance of the new multi-layer perceptron meets a preset performance condition, it is determined whether to determine the new multi-layer perceptron as a target multi-layer perceptron so as to use the target multi-layer perceptron to perform related application migration operations; the preset performance condition is a condition constructed based on mean absolute error and goodness of fit.

8. The application migration method based on processor performance prediction according to claim 7, characterized in that: The determining whether to determine the new multi-layer perceptron as a target multi-layer perceptron based on whether the comparison result indicates that the performance of the new multi-layer perceptron meets a preset performance condition includes: If the comparison result indicates that the incremental percentage of the mean absolute error of the new multilayer perceptron is not greater than a third preset threshold, and the decrement percentage of the goodness of fit of the new multilayer perceptron is not greater than a fourth preset threshold, then it is determined that the performance of the new multilayer perceptron meets the preset performance conditions, and the new multilayer perceptron is determined as the target multilayer perceptron.

9. The application migration method based on processor performance prediction according to claim 7, characterized in that: The determining whether to determine the new multi-layer perceptron as a target multi-layer perceptron based on whether the comparison result indicates that the performance of the new multi-layer perceptron meets a preset performance condition includes: If the comparison result indicates that the incremental percentage of the mean absolute error of the new multilayer perceptron is greater than a third preset threshold, and / or the decrement percentage of the goodness of fit of the new multilayer perceptron is greater than a fourth preset threshold, then rolling back the model parameter values ​​of the new multilayer perceptron to the model parameter values ​​of the multilayer perceptron corresponding to the historical checkpoint, and determining the rolled-back multilayer perceptron as the target multilayer perceptron; The model parameter values ​​of the multilayer perceptron corresponding to the historical checkpoints are pre-checked model parameter values ​​of the multilayer perceptron that meet preset performance conditions.

10. The application migration method based on processor performance prediction according to claim 9, characterized in that: The step of rolling back the model parameter values ​​of the new multi-layer perceptron to the model parameter values ​​of the multi-layer perceptron corresponding to the historical checkpoint includes: Determine the preset number of historical checkpoints closest to the current time point; Determining target model parameter values ​​corresponding to the multilayer perceptron with the best performance according to the performance of the multilayer perceptron corresponding to each of the historical checkpoints; The model parameter values ​​of the new multilayer perceptron are rolled back to the target model parameter values ​​to obtain a corresponding rolled-back multilayer perceptron.

11. The application migration method based on processor performance prediction according to claim 7, characterized in that: The performance test of the new multi-layer perceptron includes: Determining corresponding target parameter information from the old parameter information according to a preset ratio; Determining the target parameter information and the new parameter information as a test set; The new multilayer perceptron is subjected to a performance test using the test set to obtain corresponding test results.

12. The application migration method based on processor performance prediction according to claim 7, characterized in that: After the performance test of the new multi-layer perceptron is performed, the method further includes: Determining whether an error ratio represented by the test result is less than a fifth preset threshold; the error ratio being a ratio of error data between test data related to the architectural parameter type of the newly added processor and corresponding actual data in the test result; If the error ratio is less than the fifth preset threshold, it is determined that the new multilayer perceptron meets the preset stability expectation, so as to compare the test result with the preset performance condition.

13. An application migration device based on processor performance prediction, characterized in that: include: an encoding processing module, configured to encode parameter information of a target processor corresponding to an application migration operation, and perform a separation operation on the encoded feature vector using a multi-layer perceptron to obtain corresponding general feature vectors and architectural feature vectors; the general feature vector is a feature vector corresponding to information of a specification parameter type in the parameter information, and the architectural feature vector is a feature vector corresponding to information of an architectural parameter type in the parameter information; a feature vector processing module, configured to process the general feature vector and the architecture feature vector respectively through the multi-layer perceptron, and merge the obtained first feature vector and second feature vector; The application migration module is configured to use the multi-layer perceptron to predict the merged feature vector to obtain a performance score of the target processor, and to perform the application migration operation based on the performance score.

14. An electronic device, characterized in that: include: memory for storing computer programs; A processor, configured to execute the computer program to implement the steps of the application migration method based on processor performance prediction as described in any one of claims 1 to 12.

15. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the application migration method based on processor performance prediction according to any one of claims 1 to 12.

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