File format conversion method and computer readable storage medium

Abstract

The invention discloses a file format conversion method and a computer readable storage medium, the file format conversion method is used for converting a GDSII format file into a file with a data format recognizable by PCB software, and the method comprises the following steps: obtaining GDSII format layout data in the GDSII format file; reading and analyzing the layout data in the GDSII format, and converting the layout data in the GDSII format into a plurality of corresponding PCB (Printed Circuit Board) graphic designs; carrying out layering processing on the PCB graphic design; determining a via hole position and a via hole type in the PCB graphic design; placing a corresponding via hole in the PCB graphic design according to the determined via hole position and via hole type; designing and combining the plurality of PCB patterns to obtain a complete pattern; network names are given to via holes in the complete graph and PCB graph design, and a converted PCB format file is obtained. Through the design, the convenience and accuracy of converting the GDSII format file into the PCB format file can be improved.

Description

Technical Field

[0001] The present application relates to the technical field of PCB design, and in particular to a file format conversion method and a computer-readable storage medium. Background Art

[0002] PCB (Printed Circuit Board) is an important electronic component. It is the support body of electronic components and the carrier of electrical connection of electronic components. There are many PCB design and development software on the market, including Mentor, Cadence, Altium, Zuken, etc. Each design software uses a different PCB file format. Some files are incompatible with each other, resulting in the files being unable to be directly opened by different software. In general PCB design, the reference PCB design data may involve multiple PCB design software. Therefore, there is a need to convert PCB design data in other formats into one of the formats. However, there are also cases where the file structure of individual PCB design software is relatively special, and the file cannot be directly converted into a PCB file of another format. Other PCB design software cannot obtain PCB data in this format. In this case, it is impossible to convert this type of PCB file and obtain PCB reference data in this format.

[0003] Currently, interface data in the GDSII format can be exported by design software as geometric shapes and imported into other design software. The imported GDSII file is a file that converts all the vias, circuits, planes, etc. in the original design data into geometric shapes. After importing, the names of all elements containing names, such as circuits and packages in the design data, are also reflected in the PCB file as characters. Because the converted PCB file contains many data types and structures, manual processing of multiple data types will result in a large workload and low accuracy. Summary of the Invention

[0004] The purpose of this application is to provide a file format conversion method and a computer-readable storage medium to improve the convenience and accuracy of converting GDSII format files into PCB format files.

[0005] The present application discloses a file format conversion method for converting a GDSII format file into a file in a data format recognizable by PCB software. The file format conversion method comprises the following steps:

[0006] Get GDSII format layout data from GDSII format file;

[0007] Reading and parsing the GDSII format layout data, and converting the GDSII format layout data into corresponding multiple PCB graphic designs;

[0008] Performing layered processing on the PCB graphic design;

[0009] Determining via locations and via types in the PCB graphic design;

[0010] Placing corresponding vias in the PCB graphic design according to the determined via positions and via types;

[0011] Merging the plurality of PCB graphic designs to obtain a complete graphic; and

[0012] Assign network names to the vias and PCB graphic design in the complete graphic to obtain a converted PCB format file.

[0013] Optionally, after the step of layering the PCB graphic design, the text in the PCB graphic design is deleted.

[0014] Optionally, the step of determining the via positions and via types in the PCB graphic design includes:

[0015] Identify all circular features in the PCB graphic design;

[0016] Determine the design of the via hole according to the circular feature and obtain the via hole position; and

[0017] Determine that each via is connected to a corresponding film layer in the PCB graphic design, and obtain the via type.

[0018] Optionally, the step of determining the design of the via hole according to the circular feature and obtaining the position of the via hole includes:

[0019] Setting the first circular feature size;

[0020] Capturing all circular features in the PCB graphic design that meet the first circular feature size and defining them as first circular features;

[0021] identifying a circular feature having the same center as the first circular feature, defining the feature as a second circular feature;

[0022] Determining whether the size of the first circular feature and the size of the second circular feature meet a preset condition;

[0023] When a preset condition is met, determining a via hole position according to the first circular feature and the second circular feature; and

[0024] Repeat the above steps until all vias in the PCB graphic design are determined.

[0025] Optionally, the step of determining that each via is connected to a corresponding film layer in the PCB graphic design and obtaining the via type includes:

[0026] Obtaining overlapping via locations in the PCB graphic design; and

[0027] The overlapping via positions are determined to be located at film layer positions in the PCB graphic design to obtain the via types.

[0028] Optionally, after the step of placing corresponding vias in the PCB graphic design according to the determined via positions and via types, the circular features at the original via positions are deleted.

[0029] Optionally, the step of merging the plurality of PCB graphic designs to obtain a complete graphic includes:

[0030] Confirm the borders of all the PCB graphic designs;

[0031] Recording all endpoint coordinates of the PCB graphic design;

[0032] Checking whether the same endpoint coordinates exist in different PCB graphic designs; and

[0033] The borders with the same endpoint coordinates in different PCB graphic designs are merged to obtain a complete graphic.

[0034] Optionally, the step of assigning network names to the vias and PCB graphic design in the complete graphic to obtain a converted PCB format file includes:

[0035] Import network attribute information and PCB package structure;

[0036] Identifying a pad position in the PCB package structure, and if a via position in the complete graphic coincides with the pad position, assigning a net name corresponding to the pad to the via;

[0037] Check whether the via is covered by the PCB graphic design;

[0038] Assigning a network name of the via to a PCB graphic design covering the via; and

[0039] Convert vias and PCB graphic designs with network names into PCB format files.

[0040] Optionally, the step of assigning a network name to the via in a PCB graphic design covering the via includes:

[0041] Obtaining coordinates of all endpoints and all vias of the PCB graphic design;

[0042] Calculating whether an area formed by all endpoint coordinates of the PCB graphic design includes the coordinates of the via hole; and

[0043] If the coordinates of the via hole are located within the area formed by all endpoint coordinates corresponding to the PCB graphic design, it is determined that the via hole is covered by the PCB graphic design.

[0044] The present application also discloses a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the file format conversion method described above is implemented.

[0045] The beneficial effects of the present application are as follows: the embodiment of the present application obtains a PCB graphic design by parsing the GDSII format layout data opened by the GDSII format file, and then performs layering processing on the PCB graphic design, determines the via position and type, places the vias, merges the PCB graphic designs, and assigns network names, and finally obtains a converted PCB format file. In this process, the vias in the PCB graphic design are placed according to the via position and via type, and there is no need to place them one by one manually. Other steps also do not require manual processing, so that after the GDSII format file is imported into the PCB software, the converted PCB format file can be used, which is more convenient and timely when doing projects, and greatly increases the convenience and accuracy of file conversion. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] The included drawings are used to provide a further understanding of the embodiments of the present application, which constitute a part of the specification, are used to illustrate the implementation methods of the present application, and together with the text description, explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without inventive work. In the drawings:

[0047] Figure 1 This is a flowchart of a file format conversion method provided by an embodiment of the present application;

[0048] Figure 2 is based on Figure 1 Specific flow chart;

[0049] Figure 3 This is a flow chart of a method for obtaining via positions provided in an embodiment of the present application;

[0050] Figure 4This is a flow chart of a method for obtaining a via type provided in an embodiment of the present application;

[0051] Figure 5 This is a flow chart of a method for merging PCB graphic designs provided in an embodiment of the present application;

[0052] Figure 6 This is a flow chart of a method for assigning network names to PCB graphic designs and vias provided by an embodiment of the present application;

[0053] Figure 7 is based on Figure 6 Specific flow chart. DETAILED DESCRIPTION

[0054] It should be understood that the terms used herein, the specific structures and functional details disclosed are only for describing specific embodiments and are representative. However, the present application can be implemented in many alternative forms and should not be construed as being limited to the embodiments described herein. The present invention will be described in detail below with reference to the accompanying drawings and through specific embodiments.

[0055] Currently, when converting a GDSII format file to a PCB format file, you first need to delete irrelevant data in the PCB graphics, such as text, names, etc.; then analyze the vias and plane shapes, you need to open the multi-layer data of the PCB graphics at the same time, and then manually place a PCB designed via at the via geometry position. In PCB graphics containing blind and buried vias, you also need to place the designed via for the blind via. After placement, you need to check whether the multi-layer geometric shapes interfere. At the same time, the original large plane will be converted and divided into multiple small planes. After conversion, the divided planes also need to be merged into one and assigned network attributes.

[0056] Since the processing of the converted PCB graphics requires manual operation to delete irrelevant data such as text and names, manually place vias and blind buried vias, and manually merge the divided planes, although the processing method is feasible in operation, in practice, every part of the PCB graphics must be manually processed, which is very time-consuming and labor-intensive, and the accuracy is not high. There is a high degree of repetitive work, which takes a lot of time and directly affects the design progress of the project.

[0057] Based on this, this application provides a file format conversion method to improve the convenience and accuracy of converting GDSII format files into PCB format files, such as Figure 1 As shown, the embodiment of the present application discloses a file format conversion method for converting a GDSII format file into a file in a data format recognizable by PCB software. The file format conversion method includes the steps of:

[0058] S1: Obtain GDSII format layout data in a GDSII format file;

[0059] S2: Read and parse the GDSII format layout data, and convert the GDSII format layout data into corresponding multiple PCB graphic designs;

[0060] S3: performing layered processing on the PCB graphic design;

[0061] S4: Determine the via position and via type in the PCB graphic design;

[0062] S5: placing corresponding vias in the PCB graphic design according to the determined via positions and via types;

[0063] S6: merging the plurality of PCB graphic designs to obtain a complete graphic;

[0064] S7: Assigning network names to the vias and PCB graphic design in the complete graphic to obtain a converted PCB format file.

[0065] The embodiment of the present application parses GDSII format layout data opened from a GDSII format file to obtain a PCB graphic design, then performs layering processing on the PCB graphic design, determines via positions and types, places vias, merges the PCB graphic designs, and assigns network names, ultimately obtaining a converted PCB format file. During this process, vias in the PCB graphic design are placed according to via positions and via types, without the need for manual placement one by one, and other steps also do not require manual processing. This allows the converted PCB format file to be used after the GDSII format file is imported into the PCB software, which is more convenient and timely when doing projects, and greatly increases the convenience and accuracy of file conversion.

[0066] Specifically, in steps S1 and S2, the design file to be converted can be first output as a GDSII format file, and then the GDSII file can be imported through the PCB software. For example, the GDSII file can be imported using the Allegro PCB software. After the import, it is found that various types of data are accumulated in the PCB graphic design, affecting the viewing and classification processing. At the same time, the various elements in the imported PCB graphic design have been converted into a graphic and cannot be used directly. The embodiment of the present application aims to process these data so that the converted PCB format file can meet the requirements of use.

[0067] The layering of the PCB graphic design in step S3 can also be understood as setting the number of layers of the PCB. This step is to match the type of vias and the corresponding vias to be used in the settings to prevent problems during conversion.

[0068] Moreover, after step S3, irrelevant data in the PCB graphic design is cleaned up, specifically the text in the PCB graphic design is deleted. The text that needs to be deleted can be network names, such as the network names of the PCB graphic design (shape) and traces, the network names of vias, the network names of pads, etc. These network names are all displayed in the file as text. However, these texts are not needed when processing the PCB file and cannot help with the PCB file conversion. Therefore, it is necessary to delete this part of the text to avoid affecting the file viewing effect.

[0069] like Figure 2 As shown, in step S4, it specifically includes:

[0070] S41: Identify all circular features in the PCB graphic design;

[0071] S42: Determine the design of the via hole according to the circular feature and obtain the via hole position;

[0072] S43: Determine whether each of the vias is connected to a corresponding film layer in the PCB graphic design, and obtain the via type.

[0073] In GDSII files, vias are also displayed as graphics within the PCB design. Vias in PCB design have a distinct circular shape. A circular shape containing a circle is considered a location for a via. Therefore, during PCB data processing, it's necessary to locate these circular features within the PCB design. Although the circular shape of a via may overlap with other graphics, they are actually independent and not merged, which doesn't affect circular feature recognition.

[0074] Regarding how to obtain the position of the via hole, the embodiment of the present application also provides a specific implementation method, by setting the size of the via hole and the size of the via hole plate, ensuring that the corresponding circular feature can be found according to the set size, specifically, Figure 3 As shown, in step S42, it includes:

[0075] S421: Setting the first circular characteristic size;

[0076] S422: Capture all circular features in the PCB graphic design that meet the first circular feature size and define them as first circular features;

[0077] S423: Identify a circular feature having the same center as the first circular feature and define it as a second circular feature;

[0078] S424: Determine whether the size of the first circular feature and the size of the second circular feature meet a preset condition;

[0079] S425: When a preset condition is met, determining a via hole position according to the first circular feature and the second circular feature;

[0080] S426: Repeat the above steps until all vias in the PCB graphic design are determined.

[0081] As a specific example, taking the circular features screened out with a diameter of 0.2mm for the via and a diameter of 0.4mm for the hole plate, the size of the first circular feature is set to a diameter of 0.2mm, and all circular features with a diameter of 0.2mm are defined as the first circular feature. Then, the second circular feature that is concentric with the first circular feature is identified, and it is determined that the diameter of the second circular feature is twice the diameter of the first circular feature, or the difference between the diameter of the second circular feature and the diameter of the first circular feature is 0.2mm, then the preset conditions are met and it is determined that this is a via design.

[0082] After determining the via position, the next step is to determine which layers the via is connected to. This determination method is to check in the PCB graphic design whether the circular feature also contains the same pattern in the same position on other film layers of the PCB graphic design. By determining which film layers contain this pattern, you can determine which film layers the hole is connected to, and then determine the type of via, so that you can choose the corresponding hole type when placing the via. Since the use of via types in PCB design is generally concentrated, the circular features in PCB graphic design are easier to identify. Specifically, if Figure 4 As shown, in step S43, it includes:

[0083] S431: Obtaining overlapping via positions in the PCB graphic design;

[0084] S432: Determine that the overlapping via positions are located at the film layer positions in the PCB graphic design to obtain the via types.

[0085] After determining the type and position of the via, the via is placed in the PCB graphic design. Since the solution of the embodiment of the present application can be to set the format of the element points of the PCB design and the recognition of the GDSII format layout data through the Allegro-specific SKILL script, the actual required via name can be selected after the hole type in each column under the place via option in the skill. The software will call the via of this type in the database and place it in the PCB graphic design according to the position of the coordinates, and then check the Delet via shapes after place via option, that is, delete the circular features of the original via position after placing the via.

[0086] The next step is to merge the connected fragmented PCB graphic designs. During the GDSII file conversion, the graphical GDSII format layout data is grid-cut according to a fixed size to obtain multiple PCB graphic designs. As a result, the original complete PCB graphic is cut into multiple shapes. In this embodiment of the application, after placing vias, these PCB graphic designs that have been cut into pieces need to be combined into a complete graphic.

[0087] like Figure 5 As shown, in step S6, it includes:

[0088] S61: Confirm the borders of all the PCB graphic designs;

[0089] S62: Recording all endpoint coordinates of the PCB graphic design;

[0090] S63: Check whether there are the same endpoint coordinates in different PCB graphic designs;

[0091] S64: Merging the borders with the same endpoint coordinates in different PCB graphic designs to obtain a complete graphic.

[0092] The embodiment of the present application identifies and merges PCB graphic designs based on the coordinates of the graphic outline points of the PCB graphic design. In the Allegro software, the outline trajectory of the PCB graphic design is confirmed by two points as a line. That is, when the border of the PCB graphic design has a straight line, the software will record the coordinates of the two points at the end of the straight line to confirm the border of the PCB graphic design. If there is an arc in the border of the PCB graphic design, the two points of the arc will be recorded, and the size of the arc will be recorded at the same time. Therefore, to merge the PCB graphic designs, it is necessary to merge the PCB graphic designs that are connected together, that is, to check whether the borders of their PCB graphic designs have the same coordinate points.

[0093] For ease of explanation, the embodiment of the present application also provides a specific example. The coordinates of two points of a border of a first PCB graphic design are segment: xy(94.5690, 14.6620)xy(94.4990, 14.5920)width(0.0000), and the coordinates of two points of a border of a second PCB graphic design are segment: xy(94.4990, 14.5920)xy(94.5690, 14.6620)width(0.0000). Although the order of the two points of the border in the first PCB graphic design and the two points of the border in the second PCB graphic design is inconsistent, the outer shape trajectory of the PCB graphic designs is also determined, indicating that one segment of the two PCB graphic designs has the same outer shape trajectory. Therefore, this outer shape trajectory can be merged, and the two PCB graphic designs can be merged at this position.

[0094] The condition for merging two PCB graphic designs is to find out whether the xy points of the segment exist in the coordinates of the other PCB graphic design in the coordinates of each PCB graphic design. The xy points of the segment must exist at the same time, regardless of the order. If they do, it means that the borders of these PCB graphic designs have overlapping shapes, which can be overlapping, and the borders of this area can be merged. The merging method is to check the merge shape in the program and click Merge to execute the program. The execution of this program is to call the Shape-Merge shape function built into the software. Conversely, if the xy points of the segment do not exist in the coordinates of the other PCB graphic design, it means that there is no overlapping shape with the other PCB graphic design and there is no need to merge. Merging can be done as long as there is a common shape track. In the Allegro software, the merge function can merge other PCB graphic designs with the same shape track as long as there is a common shape track.

[0095] After placing the vias and merging the PCB graphic design, you need to further assign network attributes to the PCB graphic design and the vias, that is, assign network names. Figure 6 As shown, in step S7, it includes:

[0096] S71: Import network attribute information and PCB package structure;

[0097] S72: Identify the pad position in the PCB package structure, and if the via position in the complete graphic coincides with the pad position, assign a network name corresponding to the pad to the via;

[0098] S73: Check whether the via hole is covered by the PCB graphic design;

[0099] S74: assigning a network name to the via by designing a PCB graphic covering the via;

[0100] S75: Convert vias and PCB graphic designs with network names into PCB format files.

[0101] Step S7 requires importing network attribute information in the PCB file, and also importing the PCB package structure, and placing the PCB package structure on the first layer of the PCB graphic design and in a position corresponding to the PCB graphic design and vias. At this time, the PCB package structure already contains the network name, and the pads of the PCB package structure have coincided with the via positions. This method is to identify the position of the via and which pad's position coordinates are consistent. If they are consistent, it means that the via coincides with the pad, and the via can be assigned to the pad's network. At this time, check the via network name and click ASSIGN to assign the pad's network to the via.

[0102] Then you need to give the network name to the PCB graphic design, specifically, Figure 7 As shown, in step S74, it also includes:

[0103] S741: Acquire the coordinates of all endpoints and all vias of the PCB graphic design;

[0104] S742: Calculate whether the area formed by the coordinates of all endpoints of the PCB graphic design includes the coordinates of the via hole;

[0105] S743: If the coordinates of the via hole are located within the area formed by all endpoint coordinates corresponding to the PCB graphic design, it is determined that the via hole is covered by the PCB graphic design.

[0106] In this method, the coordinates of the points of the PCB graphic design outline (i.e., endpoint coordinates) are obtained, and the coordinates of the via are calculated. The horizontal and vertical coordinates of every two points of the outline are compared and calculated with the XY values ​​of the horizontal and vertical coordinates of the via. For example, the horizontal coordinate range of the PCB graphic design outline is X(90.986-92.247), and the horizontal coordinate of the via is X(91.611). The horizontal coordinate of the via falls within the horizontal coordinate range of the PCB graphic design; the vertical coordinate range of the PCB graphic design outline is Y(14.56-15.672), and the vertical coordinate of the via is Y(15.135), which also falls within the vertical range of the PCB graphic design. Therefore, it can be considered that the via is in the area formed by all the endpoint coordinates of the PCB graphic design. At this time, the network names of the via and the PCB graphic design should be consistent, that is, the PCB graphic design can be assigned by the network of the via, that is, the assignment of the PCB graphic design network name is completed, and it has network attributes. If the horizontal and vertical coordinates of the via exceed the horizontal and vertical coordinate range of the PCB graphic design, it is considered that the two elements do not overlap, and the network properties of the via cannot be assigned to the PCB graphic design.

[0107] The embodiment of the present application mainly performs layered processing on the PCB graphic design, captures circular features, and uses the circular feature class as the actual shape of the via. Circular features of different sizes and their layer positions represent different via types. Based on this, the center of the circle is obtained and the via type is called by category. Then, the coordinates of the shape points of multiple PCB graphic designs with a common shape are analyzed, and the PCB graphic designs with the same shape points are merged by calling merge. After obtaining the PCB network table, the actual position of the pad is determined by comparing the pad position with the via position, and the pad network name is called to assign the via network name. In the assignment of the PCB graphic design network name, the correlation between the via and the actual connection of the PCB graphic design is judged. The PCB graphic design covering the via is used as a benchmark, and the shape points are compared with the via position coordinates to check whether it is covered in this area. The implementation of the above steps greatly increases the convenience and accuracy of file conversion.

[0108] An embodiment of the present application further discloses a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the file format conversion method described above is implemented.

[0109] It should be noted that the limitations on the steps involved in this solution do not limit the order of the steps without affecting the implementation of the specific solution. The steps written in front can be executed first, later, or even simultaneously. As long as this solution can be implemented, it should be deemed to fall within the scope of protection of this application.

[0110] The above content is a further detailed description of the present application in conjunction with specific optional implementation methods, and the specific implementation of the present application cannot be considered to be limited to these descriptions. For ordinary technicians in the technical field to which the present application belongs, they can make several simple deductions or substitutions without departing from the concept of the present application, which should be considered to fall within the scope of protection of the present application.

Claims

1. A file format conversion method for converting a GDSII format file into a file in a data format recognizable by PCB software, characterized in that: Including steps: Get GDSII format layout data from GDSII format file; Reading and parsing the GDSII format layout data, and converting the GDSII format layout data into corresponding multiple PCB graphic designs; Performing layered processing on the PCB graphic design; Determining via locations and via types in the PCB graphic design; Placing corresponding vias in the PCB graphic design according to the determined via positions and via types; Merging the plurality of PCB graphic designs to obtain a complete graphic; as well as Assign network names to the vias and PCB graphic design in the complete graphic to obtain a converted PCB format file.

2. The file format conversion method according to claim 1, wherein: After the step of layering the PCB graphic design, the text in the PCB graphic design is deleted.

3. The file format conversion method according to claim 1, wherein: The step of determining the via positions and via types in the PCB graphic design includes: Identify all circular features in the PCB graphic design; Determine the design of the via hole according to the circular feature and obtain the via hole position; and Determine that each via is connected to a corresponding film layer in the PCB graphic design, and obtain the via type.

4. The file format conversion method according to claim 3, wherein: The step of determining the via design according to the circular feature and obtaining the via position includes: Setting the first circular feature size; Capturing all circular features in the PCB graphic design that meet the first circular feature size and defining them as first circular features; identifying a circular feature having the same center as the first circular feature, defining the feature as a second circular feature; Determining whether the size of the first circular feature and the size of the second circular feature meet a preset condition; When a preset condition is met, determining a via hole position according to the first circular feature and the second circular feature; and Repeat the above steps until all vias in the PCB graphic design are determined.

5. The file format conversion method according to claim 4, wherein: The step of determining that each via is connected to a corresponding film layer in the PCB graphic design and obtaining the via type includes: Obtaining overlapping via locations in the PCB graphic design; and The overlapping via positions are determined to be located at film layer positions in the PCB graphic design to obtain the via types.

6. The file format conversion method according to claim 4, wherein: After placing corresponding vias in the PCB graphic design according to the determined via positions and via types, the circular features at the original via positions are deleted.

7. The file format conversion method according to claim 1, wherein: The step of merging the plurality of PCB graphic designs to obtain a complete graphic includes: Confirm the borders of all the PCB graphic designs; Recording all endpoint coordinates of the PCB graphic design; Checking whether the same endpoint coordinates exist in different PCB graphic designs; and The borders with the same endpoint coordinates in different PCB graphic designs are merged to obtain a complete graphic.

8. The file format conversion method according to claim 1, wherein: The step of assigning network names to the vias and PCB graphic design in the complete graphic to obtain the converted PCB format file includes: Import network attribute information and PCB package structure; Identifying a pad position in the PCB package structure, and if a via position in the complete graphic coincides with the pad position, assigning a net name corresponding to the pad to the via; Check whether the via is covered by the PCB graphic design; Assigning a network name of the via to a PCB graphic design covering the via; and Convert vias and PCB graphic designs with network names into PCB format files.

9. The file format conversion method according to claim 8, wherein: The step of assigning the network name of the via to the PCB graphic design covering the via includes: Obtaining coordinates of all endpoints and all vias of the PCB graphic design; Calculating whether an area formed by all endpoint coordinates of the PCB graphic design includes the coordinates of the via hole; and If the coordinates of the via hole are located within the area formed by all endpoint coordinates corresponding to the PCB graphic design, it is determined that the via hole is covered by the PCB graphic design.

10. A computer-readable storage medium having a computer program stored therein, characterized in that: When the computer program is executed by a processor, the file format conversion method according to any one of claims 1 to 9 is implemented.

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