Chip packaging solder ball quality early warning method and system

Abstract

The invention provides a chip packaging solder ball quality early warning method and system, and the method comprises the following steps: 1, collecting the size data of a test fixture HiFix, the function test data of a chip, and the quality data of a packaging solder ball in a chip packaging test process; step 2, performing data fusion on the size data of the test fixture HiFix, the function test data of the chip and the quality data of the packaged solder ball, analyzing and identifying a risk area of the test fixture HiFix according to the fused data, and obtaining corresponding risk information; and then, performing early warning according to the risk information. According to the chip packaging solder ball quality early warning method and system, OpenCV based on image recognition is used for carrying out chip packaging solder ball quality risk area contour recognition, packaging solder ball quality early warning in the production process is achieved, early warning is timely, and visualization is high.

Description

Technical Field

[0001] The present invention relates to the field of industrial data mining, and in particular to a chip packaging solder ball quality early warning method and system. Background Art

[0002] During the chip packaging and testing process, the chip functional test requires the chip package solder balls to form a contact connection with the pins of the test fixture HiFix test unit. A certain amount of pressure will be applied to ensure a reliable connection. Because the pins of the test fixture HiFix test unit may be contaminated or lose elasticity during long-term testing, they may scratch the solder balls. This will cause the subsequent solder ball appearance inspection to fail and require rework, affecting product shipments. In order to reduce the rework rate, it is necessary to quickly monitor the quality distribution of chip package solder balls in real time and warn of risks.

[0003] However, the currently commonly used chip package solder ball quality warning methods are mostly manual or general information technology processing, and do not use OpenCV based on image recognition to identify the contours of chip package solder ball quality risk areas. Summary of the Invention

[0004] The purpose of the present invention is to address the above-mentioned problems and to propose a chip packaging solder ball quality early warning method and system.

[0005] The present invention proposes the following technical solutions:

[0006] The present invention proposes a chip packaging solder ball quality early warning method, comprising the following steps:

[0007] Step 1: During the chip packaging test process, collect the dimensional data of the test fixture HiFix, the functional test data of the chip, and the quality data of the package solder balls;

[0008] Step 2: Fuse the HiFix dimensional data of the test fixture, the functional test data of the chip, and the package solder ball quality data. Then, based on the fused data analysis, identify the HiFix risk area of ​​the test fixture and obtain the corresponding risk information. Then, issue an early warning based on the risk information.

[0009] In the chip package solder ball quality early warning method of the present invention, the test fixture HiFix is ​​rectangular and has a plurality of test units distributed in rows and columns; each test unit is used to clamp a chip.

[0010] In the chip package solder ball quality early warning method of the present invention, in step 2, the step of fusing the size data of the test fixture HiFix, the functional test data of the chip, and the package solder ball quality data includes:

[0011] According to the size data of the test fixture HiFix, the functional test data of the chip and the package solder ball quality data, a distribution diagram of the chip package solder ball quality data on the test fixture HiFix is ​​formed.

[0012] In the chip package solder ball quality early warning method of the present invention, step 2 includes:

[0013] Step a2.1, obtaining the serial numbers of all test units of the test fixture HiFix and the physical position information of each test unit of the test fixture HiFix on the test fixture HiFix according to the size data of the test fixture HiFix;

[0014] Step a2.2, based on the serial numbers of all test units of the test fixture HiFix and the physical location information of each test unit of the test fixture HiFix on the test fixture HiFix, and combined with the functional test data of the chip, obtain the test fixture HiFix number and the serial number of the specific test unit of the test fixture HiFix used for the functional test of each chip during the chip packaging test process;

[0015] Step a2.3, based on the chip packaging solder ball quality data and the test fixture HiFix number and the serial number of the test fixture HiFix specific test unit used for the functional test of each chip during the chip packaging test process, obtain the test fixture HiFix number and the serial number of the test fixture HiFix specific test unit corresponding to the problematic packaging solder ball quality data during the functional test.

[0016] In the chip package solder ball quality early warning method of the present invention, in step 2, the step of forming a distribution map of the chip package solder ball quality data on the test fixture HiFix based on the size data of the test fixture HiFix, the functional test data of the chip, and the package solder ball quality data includes:

[0017] Step b2.1, sorting the chip functional test data and package solder ball quality data according to the serial number of the corresponding test unit of the test fixture HiFix;

[0018] Step b2.2, retaining the functional test data corresponding to the package solder ball quality data of the chip with problems;

[0019] Step b2.3, counting the number of chips with package solder ball quality problems;

[0020] Step b2.4: reorder the chip package solder ball quality data according to the physical position information of the test unit of the test fixture HiFix to form a distribution diagram of the chip package solder ball quality data on the test fixture HiFix.

[0021] In the chip package solder ball quality early warning method of the present invention, in step 2, the HiFix risk area of ​​the test fixture is identified based on the fused data analysis and the corresponding risk information is obtained; and finally, the step of issuing an early warning based on the risk information includes:

[0022] Step c2.1. While keeping the physical position information of the test unit of the test fixture HiFix unchanged, binarize the chip's package solder ball quality data according to a preset package solder ball quality threshold, thereby converting a distribution map of the chip's package solder ball quality data on the test fixture HiFix into a binary grayscale map; wherein, if the chip's package solder ball quality data is greater than or equal to the preset package solder ball quality threshold, convert the chip's package solder ball quality data into a first function value; if the chip's package solder ball quality data is less than the preset package solder ball quality threshold, convert the chip's package solder ball quality data into a second function value;

[0023] Step c2.2: Use the connectedComponents module of OpenCV software to obtain the attribute information of all connected areas in the binary grayscale image; filter the connected areas based on the attribute information of all connected areas in the binary grayscale image, and retain the areas where the number of corresponding test units in the connected areas is greater than or equal to the preset test unit number threshold as the test fixture HiFix risk areas;

[0024] Step c2.3: Obtain the physical location information of the test units at the starting point and end point of the HiFix risk area of ​​all test fixtures;

[0025] Step c2.4: Send the physical location information of the test units at the starting and ending points of the risk areas of all test fixtures HiFix and the distribution map of the chip package solder ball quality data on the test fixture HiFix to the relevant responsible persons.

[0026] The present invention also proposes a chip packaging solder ball quality early warning system, comprising:

[0027] The data acquisition module is used to collect the dimensional data of the test fixture HiFix, the functional test data of the chip, and the quality data of the package solder balls during the chip packaging test process;

[0028] A data storage module is used to store the size data of the test fixture HiFix, the functional test data of the chip, and the quality data of the package solder balls collected by the data acquisition module;

[0029] The data preprocessing module is used to fuse the dimensional data of the test fixture HiFix, the functional test data of the chip, and the quality data of the package solder balls;

[0030] The data analysis module is used to identify the HiFix risk areas of the test fixture based on the fused data analysis and obtain the corresponding risk information; then, it issues an early warning based on the risk information.

[0031] In the chip package solder ball quality early warning system of the present invention, the data preprocessing module is used to form a distribution map of the chip package solder ball quality data on the test fixture HiFix based on the size data of the test fixture HiFix, the functional test data of the chip and the package solder ball quality data.

[0032] In the chip package solder ball quality early warning system of the present invention, the data preprocessing module 300 is used to obtain the serial numbers of all test units of the test fixture HiFix and the physical position information of each test unit of the test fixture HiFix on the test fixture HiFix according to the size data of the test fixture HiFix;

[0033] Based on the serial numbers of all test units of the test fixture HiFix and the physical location information of each test unit of the test fixture HiFix on the test fixture HiFix, and combined with the functional test data of the chip, the test fixture HiFix number and the serial number of the specific test unit of the test fixture HiFix used for the functional test of each chip during the chip packaging test process are obtained;

[0034] According to the chip's packaging solder ball quality data and the test fixture HiFix number and the serial number of the test fixture HiFix specific test unit used for the functional test of each chip during the chip packaging test process, the test fixture HiFix number and the serial number of the test fixture HiFix specific test unit corresponding to the problematic packaging solder ball quality data during the functional test are obtained.

[0035] In the chip package solder ball quality early warning system of the present invention, the data preprocessing module is used to sort the chip functional test data and package solder ball quality data according to the serial number of the test unit corresponding to the test fixture HiFix;

[0036] Retain the functional test data corresponding to the package solder ball quality data of the chip with problems;

[0037] Count the number of chips with package solder ball quality problems;

[0038] Rearrange the chip package solder ball quality data according to the physical position information of the test unit of the test fixture HiFix to form a distribution map of the chip package solder ball quality data on the test fixture HiFix;

[0039] Data analysis module for:

[0040] While keeping the physical position information of the test unit of the test fixture HiFix unchanged, the package solder ball quality data of the chip is binarized according to a preset package solder ball quality threshold, thereby converting a distribution map of the chip's package solder ball quality data on the test fixture HiFix into a binary grayscale map; wherein, if the package solder ball quality data of the chip is greater than or equal to the preset package solder ball quality threshold, the package solder ball quality data of the chip is converted into a first function value; if the package solder ball quality data of the chip is less than the preset package solder ball quality threshold, the package solder ball quality data of the chip is converted into a second function value;

[0041] Use the connectedComponents module of OpenCV software to obtain the attribute information of all connected areas in the binary grayscale image; filter the connected areas based on the attribute information of all connected areas in the binary grayscale image, and retain the areas where the number of corresponding test units in the connected areas is greater than or equal to the preset test unit number threshold as the test fixture HiFix risk areas;

[0042] Obtain the physical location information of the test units at the start and end points of the HiFix risk area of ​​all test fixtures;

[0043] The physical location information of the test units at the starting and ending points of the risk areas of all test fixtures HiFix and the distribution map of the chip packaging solder ball quality data on the test fixture HiFix are sent to the relevant responsible persons.

[0044] The chip package solder ball quality early warning method and system of the present invention use OpenCV based on image recognition to perform chip package solder ball quality risk area contour recognition, thereby realizing package solder ball quality early warning in the production process, with timely warning and strong visualization. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The present invention will be further described below in conjunction with the accompanying drawings:

[0046] Figure 1 A schematic diagram showing the chip package solder ball quality early warning method of the present invention is shown;

[0047] Figure 2 The following is a functional module block diagram of the chip package solder ball quality early warning system of the present invention;

[0048] Figure 3 A schematic diagram showing a serial number table of a HiFix test unit of a test fixture;

[0049] Figure 4 The chip package solder ball quality data is shown in Figure 3 The distribution diagram of the test fixture HiFix test unit shown;

[0050] Figure 5 Shown from Figure 4 The distribution diagram shown is a schematic diagram identifying the HiFix risk areas of the test fixture. DETAILED DESCRIPTION

[0051] The technical problem to be solved by this application is that currently, the commonly used chip package solder ball quality warning methods are mostly manual or processed by general information technology. To solve this technical problem, the present invention proposes a technical approach to construct a chip package solder ball quality warning method and system, using OpenCV-based image recognition to identify the contours of chip package solder ball quality risk areas, thereby achieving packaging solder ball quality warning during the production process.

[0052] In order to make the technical solution, technical purpose and technical effect of the invention clearer and enable those skilled in the art to understand and implement the invention, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0053] like Figure 1 As shown, Figure 1 The principle diagram of the chip package solder ball quality early warning method of the present invention is shown. The present invention proposes a chip package solder ball quality early warning method, comprising the following steps:

[0054] Step 1: During the chip packaging test process, collect the dimensional data of the test fixture HiFix, the functional test data of the chip, and the quality data of the package solder balls;

[0055] In this step, the chip's functional test data and the chip's package solder ball quality data are generated in different production processes, with the former being an upstream process.

[0056] Step 2: Fuse the HiFix dimensional data of the test fixture, the functional test data of the chip, and the package solder ball quality data. Then, based on the fused data analysis, identify the HiFix risk area of ​​the test fixture and obtain the corresponding risk information. Then, issue an early warning based on the risk information.

[0057] In this step, the test fixture, HiFix, is a high-fidelity tester access fixture (HiFix), used for chip functional testing. The HiFix is ​​rectangular and contains multiple test cells arranged in rows and columns. Each test cell holds a chip and electrically interconnects with the test system. Each test cell is numbered sequentially as a positive integer. The numbered test cells are arranged differently within the HiFix depending on the product.

[0058] In step 2, the steps of fusing the dimensional data of the test fixture HiFix, the functional test data of the chip, and the package solder ball quality data include:

[0059] According to the size data of the test fixture HiFix, the functional test data of the chip and the package solder ball quality data, a distribution diagram of the chip package solder ball quality data on the test fixture HiFix is ​​formed.

[0060] Furthermore, the distribution map of the chip's package solder ball quality data on the test fixture HiFix can be associated with the corresponding package solder ball quality data, the corresponding functional test data, and the size data of the test fixture HiFix based on the chip ID, and can be quickly and adaptively generated for different test unit arrangements of the test fixture HiFix.

[0061] Specifically, step 2 includes:

[0062] Step a2.1, obtaining the serial numbers of all test units of the test fixture HiFix and the physical position information of each test unit of the test fixture HiFix on the test fixture HiFix according to the size data of the test fixture HiFix;

[0063] Step a2.2, based on the serial numbers of all test units of the test fixture HiFix and the physical location information of each test unit of the test fixture HiFix on the test fixture HiFix, and combined with the functional test data of the chip, obtain the test fixture HiFix number and the serial number of the specific test unit of the test fixture HiFix used for the functional test of each chip during the chip packaging test process;

[0064] Step a2.3, based on the chip packaging solder ball quality data and the test fixture HiFix number and the serial number of the test fixture HiFix specific test unit used for the functional test of each chip during the chip packaging test process, obtain the test fixture HiFix number and the serial number of the test fixture HiFix specific test unit corresponding to the problematic packaging solder ball quality data during the functional test.

[0065] Furthermore, in step 2, the step of forming a distribution diagram of the chip package solder ball quality data on the test fixture HiFix according to the size data of the test fixture HiFix and the functional test data and package solder ball quality data of the chip includes:

[0066] Step b2.1, sorting the chip functional test data and package solder ball quality data according to the serial number of the corresponding test unit of the test fixture HiFix;

[0067] Step b2.2, retaining the functional test data corresponding to the package solder ball quality data of the chip with problems;

[0068] Step b2.3, counting the number of chips with package solder ball quality problems;

[0069] Step b2.4: reorder the chip package solder ball quality data according to the physical position information of the test unit of the test fixture HiFix to form a distribution diagram of the chip package solder ball quality data on the test fixture HiFix.

[0070] The physical position information of the test fixture HiFix test unit includes X-axis coordinates and Y-axis coordinates.

[0071] Furthermore, in step 2, the HiFix risk area of ​​the test fixture is identified based on the fused data analysis and the corresponding risk information is obtained; finally, the steps of making an early warning based on the risk information include:

[0072] Step c2.1. While keeping the physical position information of the test unit of the test fixture HiFix unchanged, binarize the chip's package solder ball quality data according to a preset package solder ball quality threshold, thereby converting a distribution map of the chip's package solder ball quality data on the test fixture HiFix into a binary grayscale map; wherein, if the chip's package solder ball quality data is greater than or equal to the preset package solder ball quality threshold, convert the chip's package solder ball quality data into a first function value; if the chip's package solder ball quality data is less than the preset package solder ball quality threshold, convert the chip's package solder ball quality data into a second function value;

[0073] Specifically, the first function value is 255; the second function value is 0;

[0074] Step c2.2: Use the connectedComponents module of OpenCV software to obtain the attribute information of all connected areas in the binary grayscale image; filter the connected areas based on the attribute information of all connected areas in the binary grayscale image, and retain the areas where the number of corresponding test units in the connected areas is greater than or equal to the preset test unit number threshold as the test fixture HiFix risk areas;

[0075] Step c2.3: Obtain the physical location information of the test units at the starting point and end point of the HiFix risk area of ​​all test fixtures;

[0076] In this step, the physical location information of the test unit at the starting point of the HiFix risk area of ​​the test fixture is the X-axis coordinate and Y-axis coordinate of the first test unit from left to right and from top to bottom in the HiFix risk area of ​​the test fixture; the physical location information of the test unit at the end point of the HiFix risk area of ​​the test fixture is the X-axis coordinate and Y-axis coordinate of the first test unit from right to left and from bottom to top.

[0077] Step c2.4: Send the physical location information of the test units at the starting and ending points of the risk areas of all test fixtures HiFix and the distribution map of the chip package solder ball quality data on the test fixture HiFix to the relevant responsible persons.

[0078] like Figure 2 As shown, Figure 2 The present invention provides a chip package solder ball quality early warning system, comprising:

[0079] The data acquisition module 100 is used to collect the dimensional data of the test fixture HiFix, the functional test data of the chip, and the quality data of the package solder balls during the chip packaging test process;

[0080] Among them, the chip's functional test data and the chip's packaging solder ball quality data are generated in different production processes, with the former being an upstream process.

[0081] The data storage module 200 is used to store the size data of the test fixture HiFix, the functional test data of the chip, and the package solder ball quality data collected by the data collection module 100;

[0082] The data preprocessing module 300 is used to fuse the dimensional data of the test fixture HiFix, the functional test data of the chip, and the quality data of the package solder balls;

[0083] The data analysis module 400 is used to identify the HiFix risk area of ​​the test fixture based on the fused data analysis and obtain corresponding risk information; then, make an early warning based on the risk information.

[0084] The HiFix test fixture is a high-fidelity tester access fixture used for chip functional testing. The HiFix is ​​rectangular and contains multiple test cells arranged in rows and columns. Each test cell holds a chip and electrically interconnects with the test system. Each test cell is numbered sequentially as a positive integer. The numbered test cells are arranged differently within the HiFix depending on the product.

[0085] The data preprocessing module 300 is used to form a distribution diagram of the chip package solder ball quality data on the test fixture HiFix according to the size data of the test fixture HiFix, the functional test data of the chip, and the package solder ball quality data.

[0086] Furthermore, the distribution map of the chip's package solder ball quality data on the test fixture HiFix can be associated with the corresponding package solder ball quality data, the corresponding functional test data, and the size data of the test fixture HiFix based on the chip ID, and can be quickly and adaptively generated for different test unit arrangements of the test fixture HiFix.

[0087] Specifically, the data preprocessing module 300 is configured to obtain the serial numbers of all test units of the test fixture HiFix and the physical position information of each test unit of the test fixture HiFix on the test fixture HiFix according to the size data of the test fixture HiFix;

[0088] Based on the serial numbers of all test units of the test fixture HiFix and the physical location information of each test unit of the test fixture HiFix on the test fixture HiFix, and combined with the functional test data of the chip, the test fixture HiFix number and the serial number of the specific test unit of the test fixture HiFix used for the functional test of each chip during the chip packaging test process are obtained;

[0089] According to the chip's packaging solder ball quality data and the test fixture HiFix number and the serial number of the test fixture HiFix specific test unit used for the functional test of each chip during the chip packaging test process, the test fixture HiFix number and the serial number of the test fixture HiFix specific test unit corresponding to the problematic packaging solder ball quality data during the functional test are obtained.

[0090] For example, Figure 3 As shown, Figure 3 A schematic diagram of a serial number table for a HiFix test unit in a test fixture is shown. Here, X for test unit 87 is 3 and Y is 2. Based on the chip functional test data collected by the data acquisition module, the HiFix test fixture number and the serial number of the specific test unit in the HiFix test fixture used for functional testing of each chip during the chip packaging test process can be obtained.

[0091] Furthermore, the data preprocessing module 300 is used to sort the chip functional test data and package solder ball quality data according to the serial number of the test unit corresponding to the test fixture HiFix;

[0092] Retain the functional test data corresponding to the package solder ball quality data of the chip with problems;

[0093] Count the number of chips with package solder ball quality problems;

[0094] The chip package solder ball quality data is reordered according to the physical position information of the test unit of the test fixture HiFix to form a distribution map of the chip package solder ball quality data on the test fixture HiFix.

[0095] The physical position information of the test fixture HiFix test unit includes X-axis coordinates and Y-axis coordinates.

[0096] Specifically, if Figure 4 As shown, Figure 4 The chip package solder ball quality data is shown in Figure 3 The distribution diagram of the test fixture HiFix test unit is shown. Further, the data analysis module 400 is used to:

[0097] While keeping the physical position information of the test unit of the test fixture HiFix unchanged, the package solder ball quality data of the chip is binarized according to a preset package solder ball quality threshold, thereby converting a distribution map of the chip's package solder ball quality data on the test fixture HiFix into a binary grayscale map; wherein, if the package solder ball quality data of the chip is greater than or equal to the preset package solder ball quality threshold, the package solder ball quality data of the chip is converted into a first function value; if the package solder ball quality data of the chip is less than the preset package solder ball quality threshold, the package solder ball quality data of the chip is converted into a second function value;

[0098] Specifically, the first function value is 255; the second function value is 0;

[0099] Use the connectedComponents module of OpenCV software to obtain the attribute information of all connected areas in the binary grayscale image; filter the connected areas based on the attribute information of all connected areas in the binary grayscale image, and retain the areas where the number of corresponding test units in the connected areas is greater than or equal to the preset test unit number threshold as the test fixture HiFix risk areas;

[0100] Here, as Figure 5 As shown, Figure 5 Shown from Figure 4 The distribution diagram shown is a schematic diagram of the test fixture HiFix risk areas. The gray areas are the test fixture HiFix risk areas. In this example, two test fixture HiFix risk areas are identified.

[0101] Obtain the physical location information of the test units at the start and end points of the HiFix risk area of ​​all test fixtures;

[0102] Among them, the physical location information of the test unit at the starting point of the HiFix risk area of ​​the test fixture is the X-axis coordinate and Y-axis coordinate of the first test unit from left to right and from top to bottom in the HiFix risk area of ​​the test fixture; the physical location information of the test unit at the end point of the HiFix risk area of ​​the test fixture is the X-axis coordinate and Y-axis coordinate of the first test unit from right to left and from bottom to top.

[0103] The physical location information of the test units at the starting and ending points of the risk areas of all test fixtures HiFix and the distribution map of the chip packaging solder ball quality data on the test fixture HiFix are sent to the relevant responsible persons.

[0104] exist Figure 5 The risk information of the HiFix risk area of ​​the test fixture is as follows:

[0105] Serial number Test fixture HiFix number The area of ​​the risk zone Starting point X Starting point Y End X End point Y 1 123 4 7 2 7 4 2 123 4 3 6 6 6

[0106] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the present invention and the claims, all of which are protected by the present invention.

Claims

1. A chip packaging solder ball quality early warning method, characterized in that: The following steps are involved: Step 1: During the chip packaging test process, collect the dimensional data of the test fixture HiFix, the functional test data of the chip, and the quality data of the package solder balls; Step 2: Perform data fusion on the HiFix dimensional data of the test fixture, the functional test data of the chip, and the package solder ball quality data. Then, based on the fused data analysis, identify the HiFix risk area of ​​the test fixture and obtain the corresponding risk information. Then, make early warnings based on the risk information.

2. The chip package solder ball quality early warning method according to claim 1, characterized in that: The test fixture HiFix is ​​rectangular and has multiple test units distributed in rows and columns; each test unit is used to clamp a chip.

3. The chip package solder ball quality early warning method according to claim 2, characterized in that: In step 2, the steps of fusing the dimensional data of the test fixture HiFix, the functional test data of the chip, and the package solder ball quality data include: According to the size data of the test fixture HiFix, the functional test data of the chip and the package solder ball quality data, a distribution diagram of the chip package solder ball quality data on the test fixture HiFix is ​​formed.

4. The chip package solder ball quality early warning method according to claim 3, characterized in that: Step 2 includes: Step a2.1, obtaining the serial numbers of all test units of the test fixture HiFix and the physical position information of each test unit of the test fixture HiFix on the test fixture HiFix according to the size data of the test fixture HiFix; Step a2.2, based on the serial numbers of all test units of the test fixture HiFix and the physical location information of each test unit of the test fixture HiFix on the test fixture HiFix, and combined with the functional test data of the chip, obtain the test fixture HiFix number and the serial number of the specific test unit of the test fixture HiFix used for the functional test of each chip during the chip packaging test process; Step a2.3, based on the chip packaging solder ball quality data and the test fixture HiFix number and the serial number of the test fixture HiFix specific test unit used for the functional test of each chip during the chip packaging test process, obtain the test fixture HiFix number and the serial number of the test fixture HiFix specific test unit corresponding to the problematic packaging solder ball quality data during the functional test.

5. The chip package solder ball quality early warning method according to claim 4, characterized in that: In step 2, the step of forming a distribution diagram of the chip package solder ball quality data on the test fixture HiFix according to the size data of the test fixture HiFix, the functional test data of the chip, and the package solder ball quality data includes: Step b2.1, sorting the chip functional test data and package solder ball quality data according to the serial number of the corresponding test unit of the test fixture HiFix; Step b2.2, retaining the functional test data corresponding to the package solder ball quality data of the chip with problems; Step b2.3, counting the number of chips with package solder ball quality problems; Step b2.4: reorder the chip package solder ball quality data according to the physical position information of the test unit of the test fixture HiFix to form a distribution diagram of the chip package solder ball quality data on the test fixture HiFix.

6. The chip package solder ball quality early warning method according to claim 5, characterized in that: In step 2, the HiFix risk areas of the test fixture are identified based on the fused data analysis and the corresponding risk information is obtained; Finally, the steps for making early warnings based on risk information include: Step c2.

1. While keeping the physical position information of the test unit of the test fixture HiFix unchanged, binarize the chip's package solder ball quality data according to a preset package solder ball quality threshold, thereby converting a distribution map of the chip's package solder ball quality data on the test fixture HiFix into a binary grayscale map; wherein, if the chip's package solder ball quality data is greater than or equal to the preset package solder ball quality threshold, convert the chip's package solder ball quality data into a first function value; if the chip's package solder ball quality data is less than the preset package solder ball quality threshold, convert the chip's package solder ball quality data into a second function value; Step c2.2: Use the connectedComponents module of OpenCV software to obtain the attribute information of all connected areas in the binary grayscale image; filter the connected areas based on the attribute information of all connected areas in the binary grayscale image, and retain the areas where the number of corresponding test units in the connected areas is greater than or equal to the preset test unit number threshold as the test fixture HiFix risk areas; Step c2.3: Obtain the physical location information of the test units at the starting point and end point of the HiFix risk area of ​​all test fixtures; Step c2.4: Send the physical location information of the test units at the starting and ending points of the risk areas of all test fixtures HiFix and the distribution map of the chip package solder ball quality data on the test fixture HiFix to the relevant responsible persons.

7. A chip packaging solder ball quality early warning system, characterized in that: include: A data acquisition module (100) is used to collect dimensional data of the test fixture HiFix, functional test data of the chip, and quality data of the package solder balls during the chip packaging test process; A data storage module (200) is used to store the dimensional data of the test fixture HiFix, the functional test data of the chip, and the quality data of the package solder balls collected by the data collection module (100); A data preprocessing module (300) is used to fuse the size data of the test fixture HiFix, the functional test data of the chip, and the quality data of the package solder balls; A data analysis module (400) is used to identify the HiFix risk area of ​​the test fixture based on the fused data analysis and obtain corresponding risk information; Then, make early warnings based on the risk information.

8. The chip package solder ball quality early warning system according to claim 7, characterized in that: The data preprocessing module (300) is used to form a distribution diagram of the chip package solder ball quality data on the test fixture HiFix based on the size data of the test fixture HiFix, the functional test data of the chip, and the package solder ball quality data.

9. The chip package solder ball quality early warning system according to claim 8, characterized in that: The data preprocessing module 300 is used to obtain the serial numbers of all test units of the test fixture HiFix and the physical position information of each test unit of the test fixture HiFix on the test fixture HiFix according to the size data of the test fixture HiFix; Based on the serial numbers of all test units of the test fixture HiFix and the physical location information of each test unit of the test fixture HiFix on the test fixture HiFix, and combined with the functional test data of the chip, the test fixture HiFix number and the serial number of the specific test unit of the test fixture HiFix used for the functional test of each chip during the chip packaging test process are obtained; According to the chip's packaging solder ball quality data and the test fixture HiFix number and the serial number of the test fixture HiFix specific test unit used for the functional test of each chip during the chip packaging test process, the test fixture HiFix number and the serial number of the test fixture HiFix specific test unit corresponding to the problematic packaging solder ball quality data during the functional test are obtained.

10. The chip package solder ball quality early warning system according to claim 9, characterized in that: A data preprocessing module (300) is used to sort the chip functional test data and package solder ball quality data according to the serial numbers of the test units corresponding to the test fixture HiFix; Retain the functional test data corresponding to the package solder ball quality data of the chip with problems; Count the number of chips with package solder ball quality problems; Rearrange the chip package solder ball quality data according to the physical position information of the test unit of the test fixture HiFix to form a distribution map of the chip package solder ball quality data on the test fixture HiFix; The data analysis module (400) is used to: While keeping the physical position information of the test unit of the test fixture HiFix unchanged, the package solder ball quality data of the chip is binarized according to a preset package solder ball quality threshold, thereby converting a distribution map of the chip's package solder ball quality data on the test fixture HiFix into a binary grayscale map; wherein, if the package solder ball quality data of the chip is greater than or equal to the preset package solder ball quality threshold, the package solder ball quality data of the chip is converted into a first function value; if the package solder ball quality data of the chip is less than the preset package solder ball quality threshold, the package solder ball quality data of the chip is converted into a second function value; Use the connectedComponents module of OpenCV software to obtain the attribute information of all connected areas in the binary grayscale image; filter the connected areas based on the attribute information of all connected areas in the binary grayscale image, and retain the areas where the number of corresponding test units in the connected areas is greater than or equal to the preset test unit number threshold as the test fixture HiFix risk areas; Obtain the physical location information of the test units at the start and end points of the HiFix risk area of ​​all test fixtures; The physical location information of the test units at the starting and ending points of the risk areas of all test fixtures HiFix and the distribution map of the chip packaging solder ball quality data on the test fixture HiFix are sent to the relevant responsible persons.

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