Power supply optimization system, method and power supply system for a server

Abstract

The disclosure provides a power supply optimization system, method and power supply system of a server, and relates to the technical field of server power supply optimization. The system is configured in a server power supply unit and comprises a local power determination module, a maximum power determination module and a control module. The output ends of the maximum power determination modules in multiple power supply units are connected through a voltage bus. The local power determination module is used for determining a first voltage value. The maximum power determination module determines a maximum voltage value among the first voltage values of the multiple power supply units based on the voltage bus. The control module adjusts the output power of the corresponding power supply unit according to the maximum voltage value, so that the output power of the multiple power supply units follows the maximum voltage value, and the equal power output of the multiple power supply units is realized. The disclosure can reduce the situation that the over-current protection mechanism is triggered due to the overload of part of the power supply units under the heavy load condition, guarantee the effectiveness of the redundant power supply, and improve the operation reliability of the server system.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of server power supply optimization, and particularly relates to a server power supply optimization system, a method and a power supply system. BACKGROUND

[0002] In a rack server, generally, multiple power supply units (PSUs) are included, and outputs of the multiple power supply units are connected in parallel to supply power to the system. The multiple power supply units are used to meet the power demand of the system and to realize redundant power supply. When one or more of the multiple power supply units fail, the power supply of the entire machine will not be affected, and the reliability is improved. A heavy load condition refers to a state in which the server is in a high-power and high-load running state, and at this time, the power demand of the power supply unit (PSU) is close to or reaches the maximum output capacity. In this case, when multiple power supply units are connected in parallel and simultaneously output, the output power of some power supply units may be too large to cause overcurrent protection, and other power supply units have not reached full load. Therefore, how to balance the power output between multiple power supply units is one of the problems to be solved in the field. SUMMARY

[0003] The present disclosure aims to at least solve one of the technical problems in the related art to some extent.

[0004] To this end, the first aspect of the present disclosure provides a server power supply optimization system, which is configured in a first target power supply unit, and the first target power supply unit and at least one second target power supply unit are configured in the server. The server power supply optimization system comprises a local power determination module, a maximum power determination module, and a control module. The output end of the maximum power determination module is communicatively connected to the output end of a first maximum power determination module corresponding to each second target power supply unit through a voltage bus.

[0005] The local power determination module is configured to determine a first voltage value according to an output voltage of the first target power supply unit, and use the first voltage value as an input of the maximum power determination module.

[0006] The maximum power determination module is configured to determine a maximum voltage value from the first voltage value and a voltage obtained through the voltage bus.

[0007] The control module is configured to control an output power of the first target power supply unit according to the first voltage value and the maximum voltage value, so that the first voltage value is equal to the maximum voltage value.

[0008] In some embodiments of the present disclosure, the current sampling resistor is connected in series to an output line of the first target power supply unit, for current sampling of an output terminal of the first target power supply unit, and a differential voltage across the current sampling resistor represents an output current of the first target power supply unit; the voltage dividing circuit is configured to divide an output voltage of the first target power supply unit by using a voltage dividing resistor, and output a voltage dividing value of the output voltage of the first target power supply unit; the analog multiplier is configured to multiply the voltage dividing value and the differential voltage to obtain a differential voltage signal; and the differential amplifier circuit is configured to convert the differential voltage signal into a single-ended signal and perform signal amplification processing to obtain the first voltage value.

[0009] In some embodiments of the present disclosure, the voltage dividing circuit includes the voltage dividing resistor and a first operational amplifier; the voltage dividing resistor is configured to divide the output voltage of the first target power supply unit to obtain a first voltage dividing value, and the first voltage dividing value is input to a non-inverting input terminal of the first operational amplifier; an inverting input terminal of the first operational amplifier is connected to an output terminal of the first operational amplifier; and the output terminal of the first operational amplifier outputs the voltage dividing value.

[0010] In some embodiments of the present disclosure, the analog multiplier includes a first resistor, a second resistor, a third resistor, a first transistor, a second transistor and a third transistor; a base of the third transistor is connected to an output terminal of the voltage dividing circuit, an emitter of the third transistor is connected to ground through the third resistor, and a collector of the third transistor is connected to emitters of the first transistor and the second transistor; a base of the first transistor is connected to an output terminal of the current sampling resistor, a collector of the first transistor is connected to a power supply of the analog multiplier through the first resistor, the power supply is configured to provide a working voltage for the analog multiplier, and the collector of the first transistor outputs a positive pole of the differential voltage signal; a base of the second transistor is connected to an input terminal of the current sampling resistor, and a collector of the second transistor is connected to the power supply through the second resistor, and the collector of the second transistor outputs a negative pole of the differential voltage signal.

[0011] In some embodiments of the present disclosure, the differential amplification circuit comprises a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor and a second operational amplifier; wherein the positive output end of the differential voltage signal of the analog multiplier is connected to the inverting input end of the second operational amplifier through the sixth resistor; the negative output end of the differential voltage signal of the analog multiplier is connected to the non-inverting input end of the second operational amplifier after being divided by the fourth resistor and the fifth resistor; the output end of the second operational amplifier is connected to the inverting input end of the second operational amplifier through the seventh resistor, and the output end of the second operational amplifier outputs the first voltage value.

[0012] In some embodiments of the present disclosure, the fourth resistor and the sixth resistor have the same resistance value, and the fifth resistor and the seventh resistor have the same resistance value.

[0013] In some embodiments of the present disclosure, the maximum power determination module comprises an eighth resistor and a negative feedback network, and the negative feedback network comprises a ninth resistor, a third operational amplifier and a diode; wherein the output end of the local power determination module is connected to the non-inverting input end of the third operational amplifier through the eighth resistor, the output end of the third operational amplifier is connected to the anode of the diode, and the cathode of the diode is connected to the inverting input end of the third operational amplifier through the ninth resistor; and the cathode output end of the diode is connected to the voltage bus as the output end of the maximum power determination module.

[0014] In some embodiments of the present disclosure, the control module is specifically configured to increase the output power of the first target power supply unit until the first voltage value is equal to the maximum voltage value when the first voltage value is less than the maximum voltage value.

[0015] In some embodiments of the present disclosure, the control module comprises a PWM power driving unit configured to provide a driving signal for a power unit in the first target power supply unit, and the control module is specifically configured to increase the output power of the first target power supply unit by adjusting the duty ratio and switching frequency of the driving waveform output by the PWM power driving unit until the first voltage value is equal to the maximum voltage value when the first voltage value is less than the maximum voltage value.

[0016] In some embodiments of the present disclosure, the control module is further configured to keep the output power of the first target power supply unit unchanged when the first voltage value is equal to the maximum voltage value.

[0017] In some embodiments of the present disclosure, the control module comprises a first analog-to-digital converter and a second analog-to-digital converter; the first analog-to-digital converter is configured to obtain the first voltage value; and the second analog-to-digital converter is configured to obtain the maximum voltage value.

[0018] In a second aspect of the present disclosure, a power supply system of a server is provided, comprising: a plurality of power supply units; a voltage bus; and a power supply optimization system as described in the first aspect above corresponding to each of the power supply units.

[0019] In a third aspect of the present disclosure, a power supply optimization method of a server is provided, which is applied to a first target power supply unit, the first target power supply unit and at least one second target power supply unit are configured in the server, and the first target power supply unit and the at least one second target power supply unit are communicatively connected through a voltage bus; the method comprises:

[0020] determining a first voltage value according to an output voltage of the first target power supply unit, the first voltage value being used to represent an output power of the first target power supply unit;

[0021] determining a maximum voltage value from the first voltage value and a voltage obtained through the voltage bus;

[0022] controlling the output power of the first target power supply unit according to the first voltage value and the maximum voltage value, so that the first voltage value is equal to the maximum voltage value.

[0023] In some embodiments of the present disclosure, the determining of the first voltage value according to the output voltage of the first target power supply unit comprises: sampling a current of an output line of the first target power supply unit through a current sampling resistor connected in series to the output line of the first target power supply unit, to obtain a differential voltage across the current sampling resistor; dividing the output voltage of the first target power supply unit through a voltage dividing resistor to obtain a voltage dividing value of the output voltage of the first target power supply unit; and determining the first voltage value according to the differential voltage and the voltage dividing value.

[0024] In some embodiments of the present disclosure, the determining of the first voltage value according to the differential voltage and the voltage dividing value comprises: multiplying the differential voltage and the voltage dividing value to obtain a differential voltage signal; converting the differential voltage signal into a single-ended signal and performing signal amplification processing to obtain the first voltage value.

[0025] In some embodiments of the present disclosure, the controlling the output power of the first target power supply unit according to the first voltage value and the maximum voltage value, so that the first voltage value is equal to the maximum voltage value, comprises: if the first voltage value is less than the maximum voltage value, increasing the output power of the first target power supply unit until the first voltage value is equal to the maximum voltage value; or if the first voltage value is equal to the maximum voltage value, keeping the output power of the first target power supply unit unchanged.

[0026] In some embodiments of the present disclosure, the increasing the output power of the first target power supply unit until the first voltage value is equal to the maximum voltage value comprises: increasing the output power of the first target power supply unit by adjusting the duty cycle and the switching frequency of the driving waveform output by the PWM power driving unit in the first target power supply unit until the first voltage value is equal to the maximum voltage value.

[0027] The fourth aspect of the present disclosure provides a power supply optimization apparatus of a server, the power supply optimization apparatus is configured in a first target power supply unit, the first target power supply unit and at least one second target power supply unit are configured in the server, and the first target power supply unit and the at least one second target power supply unit are connected through a voltage bus; the power supply optimization apparatus comprises:

[0028] a first determination module configured to determine a first voltage value according to the output voltage of the first target power supply unit, the first voltage value being used to represent the output power of the first target power supply unit;

[0029] a second determination module configured to determine a maximum voltage value from the first voltage value and the voltage obtained through the voltage bus;

[0030] a control module configured to control the output power of the first target power supply unit according to the first voltage value and the maximum voltage value, so that the first voltage value is equal to the maximum voltage value.

[0031] The fifth aspect of the present disclosure provides an electronic device, comprising: at least one processor, and a memory connected with the at least one processor in communication; wherein,

[0032] The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the method of the third aspect.

[0033] The sixth aspect of the present disclosure provides a non-transitory computer-readable storage medium storing computer instructions, and the computer instructions are used to make a computer execute the method in the third aspect.

[0034] The seventh aspect of the present disclosure provides a non-transitory computer-readable storage medium storing computer instructions, and the computer instructions are used to make a computer execute the method in the third aspect.

[0035] The power supply optimization system of the server provided by the present disclosure establishes a communication connection among the plurality of power supply units in the server through a voltage bus, and a maximum power determination module in the power supply unit determines a maximum voltage value among the first voltage values corresponding to the plurality of power supply units based on the voltage bus, so as to adjust the output power of the power supply unit according to the maximum voltage value. Since the power supply optimization system is configured in each power supply unit in the server, the output power of the power supply unit connected to the voltage bus all follows the maximum voltage value, thereby realizing the equal power output of the plurality of power supply units. The present disclosure can realize the equal power output of the plurality of power supply units under the heavy load condition, reduce the situation that the over-current protection mechanism is triggered due to the overload of part of the power supply units, ensure the effectiveness of the redundant power supply, and improve the operation reliability of the server system.

[0036] The additional aspects and advantages of the present disclosure will be partially given in the following description, partially become obvious from the following description, or be understood through the practice of the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0037] In order to more clearly illustrate the embodiments of the present application, the drawings needed in the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0038] Figure 1 A structural schematic diagram of a power supply system of a server provided by an embodiment of the present disclosure;

[0039] Figure 2 A circuit schematic diagram of a local power determination module and a maximum power determination module in a power supply optimization system provided by an embodiment of the present disclosure;

[0040] Figure 3 A schematic diagram of a control module provided by an embodiment of the present disclosure;

[0041] Figure 4 A flowchart of a power supply optimization method of a server provided by an embodiment of the present disclosure;

[0042] Figure 5 A schematic diagram of a power supply optimization device of a server provided by an embodiment of the present disclosure;

[0043] Figure 6 A structural schematic diagram of an electronic device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0044] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0045] It should be noted that, in the description of the present application, the terms "comprise", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. The terms "first", "second" and the like in the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0046] In order for those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the drawings and specific embodiments.

[0047] Figure 1 A structural schematic diagram of a power supply system of a server provided by an embodiment of the present disclosure. As shown in the figure, the power supply system of the server includes a plurality of power supply units 100 in the server, a power supply optimization system 101 configured in each power supply unit 100, and a voltage bus 102 (i.e. Vbus bus). Figure 1

[0048] For the power supply optimization system 101 in each power supply unit 100, in an embodiment, taking the power supply optimization system corresponding to the first target power supply unit among the plurality of power supply units of the server as an example, the power supply optimization system 101 in the first target power supply unit includes a local power determination module 103, a maximum power determination module 104 and a control module 105. The output end of the maximum power determination module corresponding to the first target power supply unit is communicatively connected to the output end of the first maximum power determination module corresponding to each second target power supply unit through the voltage bus.

[0049] ​It should be noted that the second target power supply unit is a power supply unit other than the first target power supply unit among the plurality of power supply units of the server, and the power supply optimization system configured in the second target power supply unit has the same structure and function as the power supply optimization system in the first target power supply unit, including a local power determination module, a maximum power determination module, and a control module.

[0050] The local power determination module 103 is configured to determine a first voltage value Vlocal representing the output power of the first target power supply unit according to the output voltage Vout of the first target power supply unit, and take the first voltage value Vlocal as the input of the maximum power determination module 104.

[0051] The maximum power determination module 104 is configured to determine a maximum voltage value Vbus from the first voltage value Vlocal and the voltage obtained through the voltage bus.

[0052] The control module 105 is configured to control the output power of the first target power supply unit according to the first voltage value Vlocal and the maximum voltage value Vbus, so that the first voltage value Vlocal of the first target power supply unit is equal to the maximum voltage value Vbus.

[0053] Figure 2 A circuit schematic diagram of a local power determination module and a maximum power determination module in a power supply optimization system provided by the embodiment of the present disclosure is shown in FIG. 3. Figure 2 As shown in FIG. 3, the local power determination module 103 includes a current sampling resistor R1, a voltage dividing circuit 111, an analog multiplier 112, and a differential amplification circuit 113.

[0054] The current sampling resistor R1 is connected in series to the output line of the first target power supply unit, and VOUT is the output voltage of the target power supply unit, for current sampling of the output end of the first target power supply unit, and the differential voltage across the current sampling resistor R1 represents the output current of the target power supply unit.

[0055] The voltage dividing circuit 111 is configured to divide the output voltage of the first target power supply unit by using a first voltage dividing resistor R2 and a second voltage dividing resistor R3, and output the divided voltage value of the output voltage of the first target power supply unit. Figure 2

[0056] The analog multiplier 112 is configured to multiply the divided voltage value output by the voltage dividing circuit 111 and the differential voltage across the current sampling resistor R1 to obtain a differential voltage signal.

[0057] The differential amplification circuit 113 is configured to convert the differential voltage signal into a single-ended signal and perform signal amplification processing to obtain the first voltage value Vlocal.

[0058] ​To improve the voltage-dividing accuracy of the voltage-dividing resistors in voltage-dividing circuit 111, in some embodiments of the present disclosure, voltage-dividing circuit 111 may include voltage-dividing resistors and a first operational amplifier, opa1. The voltage-dividing resistors are used to divide the output voltage of the first target power supply unit to obtain a first voltage-dividing value, which is then input to the non-inverting input of the first operational amplifier, opa1. The inverting input of the first operational amplifier, opa1, is connected to the output of the first operational amplifier, opa1, to form a voltage-follower circuit. This improves the input impedance and avoids affecting the voltage-dividing accuracy of the voltage-dividing resistors R2 and R3. The output of the first operational amplifier, opa1, outputs the voltage-dividing value.

[0059] like Figure 2 As shown, the analog multiplier 112 may include a first resistor R4 , a second resistor R5 , a third resistor R6 , a first transistor Q1 , a second transistor Q2 , and a third transistor Q3 .

[0060] The base of the third transistor Q3 is connected to the output end (i.e., the divided voltage value) of the voltage divider circuit 111, the emitter of the third transistor Q3 is grounded via the third resistor R6, and the collector of the third transistor Q3 is connected to the emitters of the first transistor Q1 and the second transistor Q2 respectively.

[0061] The base of the first transistor Q1 is connected to the output end (i.e., Vout) of the current sampling resistor R1. The collector of the first transistor Q1 is connected to the power supply VCC of the analog multiplier 112 through the first resistor R4. The power supply VCC is used to provide an operating voltage for the analog multiplier 112. The collector of the first transistor Q1 outputs the positive electrode MULT+ of the differential voltage signal.

[0062] The base of the second transistor Q2 and the input end of the current sampling resistor R1 ( Figure 2 The collector of the second transistor Q2 is connected to the power supply VCC through the second resistor R5, and the collector output of the second transistor Q2 is the negative electrode MULT- of the differential voltage signal.

[0063] The analog multiplier 112 multiplies the Vout voltage divider value output by the voltage divider circuit 111 by the differential voltage across the current sampling resistor R1. The Vout voltage divider value represents the output current, and the Vout voltage divider value represents the output voltage. The resulting differential voltage signal (positive electrode MULT+, negative electrode MULT-) represents the product of the output voltage and output current of the first target power supply unit, that is, the output power.

[0064] like Figure 2As shown, the differential amplification circuit 113 can include a fourth resistor R7, a fifth resistor R8, a sixth resistor R9, a seventh resistor R10, and a second operational amplifier opa2. The differential voltage signal positive output end MULT+ of the analog multiplier 112 is connected to the inverting input end of the second operational amplifier opa2 through the sixth resistor R9, and the differential voltage signal negative output end MULT- of the analog multiplier 112 is connected to the non-inverting input end of the second operational amplifier opa2 after being divided by the fourth resistor R7 and the fifth resistor R8. The output end of the second operational amplifier opa2 is connected to the inverting input end of the second operational amplifier opa2 through the seventh resistor R10, and the output end of the second operational amplifier opa2 outputs the first voltage value Vlocal.

[0065] The differential amplification circuit 113 converts the differential voltage signal (positive MULT+, negative MULT-) into a single-ended signal for output, and performs signal amplification processing to obtain the first voltage value Vlocal. In an implementation manner, the resistance values of the fourth resistor R7 and the sixth resistor R9 can be equal, R7 = R9 = Rx, and the resistance values of the fifth resistor R8 and the seventh resistor R10 can be equal, R8 = R10 = Ry. In this implementation manner, the amplification multiple of the differential amplification circuit 113 is Ry / Rx.

[0066] As shown, Figure 2 The maximum power determination module 104 can include an eighth resistor R11 and a negative feedback network, and the negative feedback network includes a ninth resistor R12, a third operational amplifier opa3, and a diode D1.

[0067] The output end of the local power determination module 103 is connected to the non-inverting input end of the third operational amplifier opa3 through the eighth resistor R11, the output end of the third operational amplifier opa3 is connected to the anode of the diode D1, and the cathode of the diode D1 is connected to the inverting input end of the third operational amplifier opa3 through the ninth resistor R12. The cathode output end of the diode D1 is connected to the voltage bus as the output end of the maximum power determination module 104.

[0068] In the negative feedback network, when the first voltage value Vlocal_x of another power supply unit (i.e., the second target power supply unit) connected to the voltage bus 102 is lower than the first voltage value Vlocal of the first target power supply unit, the Vbus output by the maximum power determination module 104 of the first target power supply unit is equal to the first voltage value Vlocal of the first target power supply unit. When the first voltage value Vlocal_x of another power supply unit connected to the voltage bus 102 is higher than the first voltage value Vlocal of the first target power supply unit, the reverse blocking effect of the diode D1 in the negative feedback network renders the negative feedback ineffective, and the Vbus output by the maximum power determination module 104 of the first target power supply unit is equal to the first voltage value Vlocal_x. Therefore, the Vbus output by the maximum power determination module 104 of each power supply unit represents the maximum first voltage value among all power supply units connected to the voltage bus 102.

[0069] In some embodiments of the present disclosure, the control module 105 compares the first voltage value Vlocal of the first target power supply unit with the maximum voltage value Vbus. When the first voltage value Vlocal is less than the maximum voltage value Vbus, the output power of the first target power supply unit is increased until the first voltage value Vlocal of the first target power supply unit is equal to the maximum voltage value Vbus.

[0070] In one implementation, the control module 105 may control the output power of the first target power supply unit through a PWM (Pulse Width Modulation) power driving unit. Figure 3 This is a schematic diagram of a control module provided by an embodiment of the present disclosure. Figure 3 As shown, the control module 105 may include a PWM power drive unit, which is used to provide a drive signal to the power unit in the first target power supply unit. Optionally, the control module 105 is a digital signal processor (DSP).

[0071] When the first voltage value Vlocal is less than the maximum voltage value Vbus, the control module 105 increases the output power of the first target power supply unit by adjusting the duty cycle and switching frequency of the drive waveform output by the PWM power drive unit until the first voltage value Vlocal equals the maximum voltage value Vbus. When the first voltage value Vlocal equals the maximum voltage value Vbus, it indicates that the output power of the first target power supply unit has reached the maximum output power of the multiple power supply units in the server. Therefore, the duty cycle and switching frequency of the drive waveform output by the PWM power drive unit do not need to be adjusted, and the output power of the first target power supply unit remains unchanged.

[0072] The control module 105 makes the output power of all power supply units connected to the voltage bus 102 follow the maximum voltage value Vbus, so as to achieve the effect of equal power output.

[0073] Optionally, as shown in Figure 3 The control module 105 can further include a first analog-to-digital converter ADC1 and a second analog-to-digital converter ADC2. The first analog-to-digital converter ADC1 is configured to obtain the first voltage value of the first target power supply unit, and the second analog-to-digital converter ADC2 is configured to obtain the maximum voltage value of the first target power supply unit.

[0074] By implementing the embodiments of the present disclosure, the communication connection of the plurality of power supply units in the server is established through the voltage bus, the maximum power determination module in the power supply unit determines the maximum voltage value among the first voltage values corresponding to the plurality of power supply units based on the voltage bus, and adjusts the output power of the power supply unit according to the maximum voltage value. Since the power supply optimization system is configured in each power supply unit in the server, the output power of the power supply unit connected to the voltage bus follows the maximum voltage value, so as to achieve the equal power output of the plurality of power supply units. The present disclosure can achieve the equal power output of the plurality of power supply units under the heavy load condition, reduce the situation that the over-current protection mechanism is triggered due to the overload of part of the power supply units, ensure the effectiveness of the redundant power supply, and improve the operation reliability of the server system.

[0075] Figure 4 A flowchart of a power supply optimization method of a server provided by the embodiments of the present disclosure is shown. The power supply optimization method of the server is applied to a first target power supply unit, the first target power supply unit and at least one second target power supply unit are configured in the same server, and the communication connection between the first target power supply unit and the at least one second target power supply unit is established through a voltage bus. As shown in Figure 4 The power supply optimization method of the server can include the following steps:

[0076] Step 401, determining a first voltage value according to the output voltage of the first target power supply unit, the first voltage value being used to represent the output power of the first target power supply unit.

[0077] In some embodiments of the present disclosure, the output end of the first target power supply unit can be current sampled by connecting a current sampling resistor in series on the output line of the first target power supply unit, so as to obtain the differential voltage across the current sampling resistor; the output voltage of the first target power supply unit is divided by a voltage dividing resistor, so as to obtain the voltage dividing value of the output voltage of the first target power supply unit; and the first voltage value is determined according to the differential voltage and the voltage dividing value.

[0078] In some embodiments of the present disclosure, the differential voltage and the divided voltage value are multiplied to obtain a differential voltage signal; the differential voltage signal is converted into a single-ended signal and amplified to obtain a first voltage value.

[0079] At step 402, a maximum voltage value is determined from the first voltage value and the voltage obtained through the voltage bus.

[0080] At step 403, the output power of the first target power supply unit is controlled according to the first voltage value and the maximum voltage value, so that the first voltage value is equal to the maximum voltage value.

[0081] In some embodiments of the present disclosure, if the first voltage value is less than the maximum voltage value, the output power of the first target power supply unit is increased until the first voltage value is equal to the maximum voltage value. If the first voltage value is equal to the maximum voltage value, the output power of the first target power supply unit is kept unchanged.

[0082] In one implementation, the output power of the first target power supply unit is increased by adjusting the duty cycle and switching frequency of the drive waveform output by the PWM power driving unit in the first target power supply unit until the first voltage value is equal to the maximum voltage value.

[0083] As to the method in the above embodiments, the specific implementation of each step has been described in detail in the embodiments of the system, and will not be described in detail here.

[0084] By implementing the embodiments of the present disclosure, the output power of all power supply units connected to the voltage bus follows the maximum voltage value Vbus, thereby achieving equal power output of multiple power supply units. The present disclosure can achieve equal power output of multiple power supply units under heavy load conditions, reduce the situation that the over-current protection mechanism is triggered due to overload of part of the power supply units, ensure the effectiveness of redundant power supply, and improve the operation reliability of the server system.

[0085] Figure 5 A schematic diagram of a power supply optimization device of a server provided by an embodiment of the present disclosure is shown. The power supply optimization device of the server is configured in a first target power supply unit. The first target power supply unit and at least one second target power supply unit are configured in the same server, and the first target power supply unit and the at least one second target power supply unit are communicatively connected through a voltage bus. As shown in the figure, the power supply optimization device of the server power supply unit can include a first determination module 501, a second determination module 502, and a control module 503. Figure 5 The first determination module 501 is configured to determine a first voltage value according to the output voltage of the first target power supply unit. The first voltage value is used to represent the output power of the first target power supply unit.

[0086] The first determination module 501 is configured to determine a first voltage value according to the output voltage of the first target power supply unit. The first voltage value is used to represent the output power of the first target power supply unit.

[0087] In some embodiments of the present disclosure, the first determining module 501 is specifically configured to: sample the output end of the first target power supply unit by connecting the current sampling resistor in series on the output line of the first target power supply unit, to obtain a differential voltage across the current sampling resistor; divide the output voltage of the first target power supply unit by using the voltage dividing resistor, to obtain a voltage dividing value of the output voltage of the first target power supply unit; and determine the first voltage value according to the differential voltage and the voltage dividing value.

[0088] In some embodiments of the present disclosure, the first determining module 501 is specifically configured to: multiply the differential voltage and the voltage dividing value to obtain a differential voltage signal; convert the differential voltage signal into a single-ended signal, and perform signal amplification processing to obtain the first voltage value.

[0089] The second determining module 502 is configured to determine a maximum voltage value from the first voltage value and a voltage obtained through the voltage bus.

[0090] The control module 503 is configured to control the output power of the first target power supply unit according to the first voltage value and the maximum voltage value, so that the first voltage value is equal to the maximum voltage value.

[0091] In some embodiments of the present disclosure, the control module 503 is specifically configured to: if the first voltage value is less than the maximum voltage value, increase the output power of the first target power supply unit until the first voltage value is equal to the maximum voltage value; and if the first voltage value is equal to the maximum voltage value, keep the output power of the first target power supply unit unchanged.

[0092] In some embodiments of the present disclosure, the control module 503 is specifically configured to: increase the output power of the first target power supply unit by adjusting the duty ratio and the switching frequency of the drive waveform output by the PWM power driving unit in the first target power supply unit, until the first voltage value is equal to the maximum voltage value.

[0093] As to the apparatus in the above-mentioned embodiments, the specific manners in which various modules perform operations have been described in detail in the embodiments of the method, and will not be described here in detail.

[0094] In order to achieve the above-mentioned embodiments, the present disclosure further provides an electronic device. Please refer to Figure 6 , Figure 6 The structure schematic diagram of the electronic device provided by the embodiments of the present disclosure. As shown in Figure 6 , the electronic device 600 includes a processor 601 and a memory 602 connected with the processor 601; the memory 602 stores computer execution instructions; the processor 601 executes the computer execution instructions stored in the memory to realize the power supply optimization method of the server provided by the foregoing embodiments.

[0095] To achieve the above-mentioned embodiments, the present disclosure further provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are executed by a processor to implement the power supply optimization method of the server provided by the above-mentioned embodiments.

[0096] To achieve the above-mentioned embodiments, the present disclosure further provides a computer program product, comprising a computer program, wherein the computer program is executed by a processor to implement the power supply optimization method of the server provided by the above-mentioned embodiments.

[0097] In the foregoing embodiment description, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present disclosure. In the present description, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any suitable manner in any one or more embodiments or examples. In addition, the person skilled in the art can combine and combine the different embodiments or examples described in the present description and the features of the different embodiments or examples without contradiction.

[0098] In addition, the terms "first", "second" are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present disclosure, the meaning of "multiple" is at least two, for example, two, three, etc., unless otherwise specifically limited.

[0099] In the description of the present disclosure, unless otherwise specified, " / " means or, for example, A / B can mean A or B; "and / or" in this document only describes the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which means that there are three cases of A alone, A and B together, and B alone.

[0100] Any process or method descriptions in the flow charts or otherwise described herein can be understood as representing code modules, segments, or portions of code that include one or more executable instructions for implementing the specified logical functions or processes, and the preferred embodiments of the present disclosure include additional implementation involving other processes or methods as will occur to those skilled in the art. The order in which the processes are described is not necessarily the order in which the processes are performed, as can be inferred by one skilled in the art, and the described processes might be executed in different order, in substantially simultaneous fashion, or in reverse order, depending on the functionality involved.

[0101] The logic and / or steps represented in the flowcharts and / or described herein, for example, can be considered as a sequence of instructions to implement logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, apparatus, or device, such as a computer-based system, processor- based system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For purposes of this specification, a "computer-readable medium" can be any apparatus that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. The computer-readable medium can be a computer- readable storage medium or a computer-readable signal medium. The computer-readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer-readable storage medium include the following: an electrical connection having one or more wires (electronic), a portable computer diskette (magnetic), a RAM (random access memory), a ROM (read-only memory), an EPROM (erasable programmable ROM), an EEPROM (electrically erasable programmable ROM), and a portable compact disc read-only memory (CD-ROM). In addition, the computer-readable storage medium can even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, for example, via optical scanning of the paper or other medium, then compiled, interpreted, or otherwise processed in a suitable manner, if necessary, and stored in a computer memory.

[0102] It should be understood that various aspects of the disclosure can be implemented in hardware, software, firmware or a combination thereof. In the above embodiments, various steps or methods can be implemented in software or firmware that is stored in memory and executed by a suitable instruction execution system. As such, if desired, the various steps or methods can be implemented in hardware, as in another embodiment, using any or a combination of the following technologies, which are all well-known in the art: a discrete logic circuit(s) having logic gates for implementing logic functions upon an application of data signals, an application specific integrated circuit having appropriate combinational logic gates, a programmable gate array(s) (PGA), a field programmable gate array (FPGA), etc.

[0103] Those of skill in the art would understand that information and signals can be represented using any of a variety of technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that can be referenced throughout the above description can be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0104] In addition, each functional unit in each embodiment of the present disclosure can be integrated in one processing module, or each unit can exist physically separately, or two or more units can be integrated in one module. The integrated module can be realized in the form of hardware or in the form of a software functional module. When the integrated module is realized in the form of a software functional module and sold or used as an independent product, it can also be stored in a computer readable storage medium.

[0105] The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc. Although the embodiments of the present disclosure have been shown and described above, it should be understood that the above embodiments are exemplary and should not be construed as limiting the present disclosure, and those skilled in the art can make changes, modifications, replacements and variations to the above embodiments within the scope of the present disclosure.

Claims

1. A server power supply optimization system, characterized in that: The power supply optimization system is configured in a first target power supply unit, and the first target power supply unit and at least one second target power supply unit are configured in the server; The power supply optimization system includes: a local power determination module, a maximum power determination module and a control module, wherein an output terminal of the maximum power determination module is connected to an output terminal of a first maximum power determination module corresponding to each second target power supply unit via a voltage bus; The local power determination module is configured to determine a first voltage value according to the output voltage of the first target power supply unit, and use the first voltage value as an input of the maximum power determination module; The maximum power determination module is configured to determine a maximum voltage value between the first voltage value and a voltage obtained through the voltage bus; The control module is configured to control the output power of the first target power supply unit according to the first voltage value and the maximum voltage value, so that the first voltage value is equal to the maximum voltage value.

2. The power supply optimization system according to claim 1, characterized in that: The local power determination module includes a current sampling resistor, a voltage divider circuit, an analog multiplier and a differential amplifier circuit; wherein, The current sampling resistor is connected in series to the output line of the first target power supply unit, and is used to sample the current at the output end of the first target power supply unit, and the output current of the first target power supply unit is represented by the differential voltage across the current sampling resistor; The voltage divider circuit is configured to divide the output voltage of the first target power supply unit using a voltage divider resistor, and output a voltage divider value of the output voltage of the first target power supply unit; The analog multiplier is used to perform product processing on the voltage division value and the differential voltage to obtain a differential voltage signal; The differential amplifier circuit is used to convert the differential voltage signal into a single-ended signal and perform signal amplification processing to obtain the first voltage value.

3. The power supply optimization system according to claim 2, characterized in that: The voltage divider circuit includes the voltage divider resistor and a first operational amplifier; The voltage-dividing resistor is used to divide the output voltage of the first target power supply unit to obtain a first divided voltage value, and use the first divided voltage value as an input to the non-inverting input terminal of the first operational amplifier; The inverting input terminal of the first operational amplifier is connected to the output terminal of the first operational amplifier; The output terminal of the first operational amplifier outputs the divided voltage value.

4. The power supply optimization system according to claim 2, characterized in that: The analog multiplier includes a first resistor, a second resistor, a third resistor, a first transistor, a second transistor and a third transistor; wherein, The base of the third transistor is connected to the output end of the voltage divider circuit, the emitter of the third transistor is grounded via the third resistor, and the collector of the third transistor is connected to the emitters of the first transistor and the second transistor respectively; The base of the first transistor is connected to the output end of the current sampling resistor, and the collector of the first transistor is connected to the power supply of the analog multiplier through the first resistor, and the power supply is used to provide an operating voltage for the analog multiplier; the collector output of the first transistor is the positive electrode of the differential voltage signal; The base of the second transistor is connected to the input end of the current sampling resistor, the collector of the second transistor is connected to the power supply through the second resistor, and the collector output of the second transistor is the negative electrode of the differential voltage signal.

5. The power supply optimization system according to claim 2, characterized in that: The differential amplifier circuit includes: a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor and a second operational amplifier; The differential voltage signal positive output terminal of the analog multiplier is connected to the inverting input terminal of the second operational amplifier through the sixth resistor; The negative output terminal of the differential voltage signal of the analog multiplier is connected to the non-inverting input terminal of the second operational amplifier after being divided by the fourth resistor and the fifth resistor; The output terminal of the second operational amplifier is connected to the inverting input terminal of the second operational amplifier through the seventh resistor, and the output terminal of the second operational amplifier outputs the first voltage value.

6. The power supply optimization system according to claim 5, characterized in that: The fourth resistor and the sixth resistor have the same resistance value, and the fifth resistor and the seventh resistor have the same resistance value.

7. The power supply optimization system according to claim 1, characterized in that: The maximum power determination module includes an eighth resistor and a negative feedback network, and the negative feedback network includes a ninth resistor, a third operational amplifier, and a diode; The output end of the local power determination module is connected to the non-inverting input end of the third operational amplifier through the eighth resistor, the output end of the third operational amplifier is connected to the anode of the diode, and the cathode of the diode is connected to the inverting input end of the third operational amplifier through the ninth resistor; The cathode output terminal of the diode is connected to the voltage bus as the output terminal of the maximum power determination module.

8. The power supply optimization system according to claim 1, characterized in that: The control module is specifically used for: When the first voltage value is less than the maximum voltage value, the output power of the first target power supply unit is increased until the first voltage value is equal to the maximum voltage value.

9. The power supply optimization system according to claim 8, characterized in that: The control module includes a PWM power drive unit, which is used to provide a drive signal for the power unit in the first target power supply unit. The control module is specifically used to: When the first voltage value is less than the maximum voltage value, the output power of the first target power supply unit is increased by adjusting the duty cycle and switching frequency of the driving waveform output by the PWM power driving unit until the first voltage value is equal to the maximum voltage value.

10. The power supply optimization system according to claim 8, characterized in that: The control module is further configured to: When the first voltage value is equal to the maximum voltage value, the output power of the first target power supply unit is kept unchanged.

11. The power supply optimization system according to claim 1, characterized in that: The control module includes a first analog-to-digital converter and a second analog-to-digital converter; Wherein, the first analog-to-digital converter is used to obtain the first voltage value; The second analog-to-digital converter is used to obtain the maximum voltage value.

12. A power supply system for a server, characterized in that: include: Multiple power supply units; voltage bus; Each of the power supply units corresponds to the power supply optimization system according to any one of claims 1 to 11.

13. A method for optimizing power supply of a server, characterized in that: The power supply optimization method is applied to a first target power supply unit, wherein the first target power supply unit and at least one second target power supply unit are configured in the server, and a communication connection is established between the first target power supply unit and the at least one second target power supply unit via a voltage bus; the method includes: determining a first voltage value according to the output voltage of the first target power supply unit, where the first voltage value is used to represent the output power of the first target power supply unit; determining a maximum voltage value between the first voltage value and a voltage obtained through the voltage bus; The output power of the first target power supply unit is controlled according to the first voltage value and the maximum voltage value so that the first voltage value is equal to the maximum voltage value.

14. The power supply optimization method according to claim 13, characterized in that: The determining a first voltage value according to the output voltage of the first target power supply unit includes: sampling the current at the output end of the first target power supply unit by connecting a current sampling resistor in series to the output line of the first target power supply unit, thereby obtaining a differential voltage across the current sampling resistor; Using a voltage-dividing resistor to divide the output voltage of the first target power supply unit to obtain a voltage-dividing value of the output voltage of the first target power supply unit; The first voltage value is determined according to the differential voltage and the voltage division value.

15. The power supply optimization method according to claim 14, characterized in that: The determining the first voltage value according to the differential voltage and the voltage division value includes: performing product processing on the differential voltage and the voltage division value to obtain a differential voltage signal; The differential voltage signal is converted into a single-ended signal, and signal amplification is performed to obtain the first voltage value.

16. The power supply optimization method according to claim 13, characterized in that: The controlling the output power of the first target power supply unit according to the first voltage value and the maximum voltage value so that the first voltage value is equal to the maximum voltage value includes: If the first voltage value is less than the maximum voltage value, increasing the output power of the first target power supply unit until the first voltage value is equal to the maximum voltage value; or, If the first voltage value is equal to the maximum voltage value, the output power of the first target power supply unit is kept unchanged.

17. The power supply optimization method according to claim 16, characterized in that: Increasing the output power of the first target power supply unit until the first voltage value is equal to the maximum voltage value includes: The output power of the first target power supply unit is increased by adjusting the duty cycle and switching frequency of the driving waveform output by the PWM power driving unit in the first target power supply unit until the first voltage value is equal to the maximum voltage value.

18. A power supply optimization device for a server, characterized in that: The power supply optimization device is configured in a first target power supply unit, the first target power supply unit and at least one second target power supply unit are configured in the server, and a communication connection is established between the first target power supply unit and the at least one second target power supply unit via a voltage bus; The power supply optimization device comprises: a first determining module, configured to determine a first voltage value according to the output voltage of the first target power supply unit, where the first voltage value is used to represent the output power of the first target power supply unit; a second determining module, configured to determine a maximum voltage value between the first voltage value and a voltage obtained through the voltage bus; A control module is configured to control the output power of the first target power supply unit according to the first voltage value and the maximum voltage value, so that the first voltage value is equal to the maximum voltage value.

19. An electronic device, characterized in that: include: at least one processor, and a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 13 to 17.

20. A non-transitory computer-readable storage medium storing computer instructions, characterized in that: Computer instructions are stored; wherein, the computer instructions are used to make a computer execute the method according to any one of claims 13 to 17.

21. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 13 to 17 are implemented.

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