Display device

Abstract

According to one aspect of the present specification, a display device includes: a substrate on which a plurality of sub-pixels including a red sub-pixel, a green sub-pixel, and a blue sub-pixel are defined; a red light emitting element disposed in the red sub-pixel; a plurality of green light-emitting elements disposed in the green sub-pixel and including a first green light-emitting element and a second green light-emitting element connected in parallel to the first green light-emitting element; and a plurality of blue light-emitting elements disposed in the blue sub-pixel and including a first blue light-emitting element and a second blue light-emitting element connected in parallel to the first blue light-emitting element, in which the red light-emitting element is structurally different from the plurality of green light-emitting elements and the plurality of blue light-emitting elements, and the second blue light-emitting element is connected in parallel to the first blue light-emitting element. And the plurality of green light-emitting elements and the plurality of blue light-emitting elements have the same structure. Accordingly, the display device improves the luminous efficiency of each of the sub-pixels, and thus may provide a high-resolution display device.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority from Korean Patent Application No. 10-2024-0027404 filed on February 26, 2024, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference. Technical Field

[0003] The present specification relates to a display device, and more particularly, to a display device using a light emitting diode (LED) and a method of manufacturing the display device. Background Art

[0004] As display devices used for monitors of computers, televisions, mobile phones, and the like, there are organic light emitting displays (OLEDs) configured for autonomous emission and liquid crystal displays (LCDs) requiring a separate light source.

[0005] Application ranges of display devices are diversified from monitors of computers and televisions to personal mobile devices, and research on display devices having a wide display area and having reduced volume and weight is being conducted.

[0006] Furthermore, display devices including light-emitting diodes (LEDs) have recently attracted attention as next-generation display devices. Because LEDs are made of inorganic materials rather than organic materials, they are more reliable and have a longer lifespan than liquid crystal display devices or organic light-emitting display devices. Furthermore, LEDs can be turned on and off quickly, have excellent luminous efficiency, high impact resistance, and good stability, and can display high-brightness images. Summary of the Invention

[0007] An object to be achieved by the present specification is to provide a high-resolution display device in which a light-emitting element having a different shape is provided in each sub-pixel.

[0008] Another object to be achieved by the present specification is to provide a display device in which a light-emitting element having a different shape is provided in each sub-pixel to thereby improve light-emitting efficiency.

[0009] The technical problems of the present specification are not limited to the above-mentioned technical problems, and other technical problems not mentioned above can be clearly understood by those skilled in the art from the following description.

[0010] According to one aspect of the present specification, a display device includes: a substrate on which a plurality of sub-pixels including red, green, and blue sub-pixels are defined; a red light-emitting element disposed in the red sub-pixel; a plurality of green light-emitting elements disposed in the green sub-pixel and including a first green light-emitting element and a second green light-emitting element connected in parallel to the first green light-emitting element; and a plurality of blue light-emitting elements disposed in the blue sub-pixel and including a first blue light-emitting element and a second blue light-emitting element connected in parallel to the first blue light-emitting element, wherein the red light-emitting element is structurally different from the plurality of green light-emitting elements and the plurality of blue light-emitting elements, and the plurality of green light-emitting elements and the plurality of blue light-emitting elements are structurally the same. Therefore, the display device improves the luminous efficiency of each of the sub-pixels and can provide a high-resolution display device.

[0011] Additional details of exemplary embodiments are included in the detailed description and accompanying drawings.

[0012] According to the present specification, a light emitting element having a different structure is provided in each of a plurality of sub-pixels, which can maximize the light emitting efficiency of the sub-pixel.

[0013] According to the present specification, a light-emitting element having a different size is provided in each of a plurality of sub-pixels, which can provide a high-resolution display device.

[0014] According to the present specification, multiple light-emitting elements are arranged in some sub-pixels so that even if any one light-emitting element is defective, another light-emitting element can replace the function of the defective light-emitting element, which can minimize the reduction in the yield of the display panel caused by defective pixels.

[0015] Effects according to the present specification are not limited to the above-mentioned effects, and more various effects are included in the present specification.

[0016] The effects of the present specification are not limited to the above-mentioned effects, and other effects not mentioned above will be apparently understood by those having ordinary skill in the art from the following description.

[0017] The above-described objects to be achieved by the present specification, means for achieving the objects, and effects of the present specification do not specify essential features of the claims, and therefore, the scope of the claims is not limited to the disclosure of the present specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The above and other aspects, features and other advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0019] Figure 1is a schematic configuration diagram of a display device according to an embodiment of this specification;

[0020] Figure 2A is a partial cross-sectional view of a display device according to an embodiment of the present specification;

[0021] Figure 2B is a perspective view of a tiled display device according to an embodiment of the present specification;

[0022] Figure 3A is a circuit diagram of a red sub-pixel of a display device according to an embodiment of this specification;

[0023] Figure 3B is a circuit diagram of a green sub-pixel of a display device according to an embodiment of this specification;

[0024] Figure 3C is a circuit diagram of a blue sub-pixel of a display device according to an embodiment of this specification;

[0025] Figure 4 is a schematic top plan view of a display device according to an embodiment of the present specification;

[0026] Figure 5 It is along Figure 4 A cross-sectional view taken along line IV-IV';

[0027] Figure 6 It is along Figure 4 A cross-sectional view taken along line V-V' in FIG.

[0028] Figure 7 It is along Figure 4 A cross-sectional view taken along line VI-VI'. DETAILED DESCRIPTION

[0029] The advantages and features of this specification and methods for achieving these advantages and features will be apparent by referring to the exemplary embodiments described in detail below in conjunction with the accompanying drawings. However, this specification is not limited to the exemplary embodiments disclosed herein, but rather may be implemented in various forms. The exemplary embodiments are provided only by way of example so that those skilled in the art can fully understand the description and scope of this specification.

[0030] The shapes, sizes, ratios, angles, numbers, etc. shown in the accompanying drawings for describing the exemplary embodiments of this specification are merely examples, and this specification is not limited thereto. Throughout the specification, similar reference numerals generally represent similar elements. In addition, in the following description of this specification, detailed descriptions of known related arts may be omitted to avoid unnecessarily obscuring the subject matter of this specification. Terms such as "including," "having," and "consisting of..." used herein are generally intended to allow the addition of other components, unless these terms are used together with the term "only." Unless otherwise expressly stated, any reference to the singular may include the plural.

[0031] Even if not explicitly stated, the components are interpreted as including the ordinary error range.

[0032] When terms such as "on," "above," "below," and "immediately adjacent" are used to describe a positional relationship between two parts, one or more parts may be positioned between the two parts unless the terms are used with the terms "immediately" or "directly."

[0033] When an element or layer is referred to as being “on” another element or layer, the other layer or element can be directly on or interposed between the other elements.

[0034] Although the terms "first," "second," and the like are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from other components. Therefore, the first component mentioned below may be the second component in the technical concept of this specification.

[0035] Like reference numerals generally refer to like elements throughout the specification.

[0036] The size and thickness of each component shown in the drawings are illustrated for convenience of description, and the present specification is not limited to the sizes and thicknesses of the components shown.

[0037] The features of the various embodiments of this specification may be partially or completely dependent on or combined with each other, and may be interlocked and operated in various technical ways, and the embodiments may be performed independently of each other or in association with each other.

[0038] Hereinafter, a display device according to an exemplary embodiment of the present specification will be described in detail with reference to the accompanying drawings.

[0039] Figure 1 : is a schematic configuration diagram of a display device according to an embodiment of the present specification. For ease of description, Figure 1 Only the display panel PN, the gate driver GD, the data driver DD, and the timing controller TC among various constituent elements of the display device 100 are shown.

[0040] Reference Figure 1 The display device 100 includes: a display panel PN, which includes a plurality of sub-pixels SP; a gate driver GD, which is configured to supply various types of signals to the display panel PN; a data driver DD, which is configured to supply various data voltages to the display panel PN; and a timing controller TC, which is configured to control the gate driver GD and the data driver DD.

[0041] The gate driver GD supplies a plurality of scan signals to the plurality of scan lines SL in response to a plurality of gate control signals provided from the timing controller TC. Figure 1 It is shown that a single gate driver GD is disposed to be spaced apart from one side of the display panel PN. However, the number and arrangement of the gate drivers GD are not limited thereto.

[0042] The data driver DD supplies data voltages to the data lines DL in response to data control signals and image data provided from the timing controller TC. The data driver DD may convert the image data into data voltages using reference gamma voltages and supply the converted data voltages to the data lines DL.

[0043] The timing controller TC aligns image data input from the outside and supplies the image data to the data driver DD. The timing controller TC can generate gate control signals and data control signals by using synchronization signals, namely, a dot clock signal, a data enable signal, and horizontal / vertical synchronization signals input from the outside. Furthermore, the timing controller TC can control the gate driver GD and the data driver DD by supplying the generated gate control signals and data control signals to the gate driver GD and the data driver DD.

[0044] The display panel PN is configured to display an image to a user and includes a plurality of sub-pixels SP. In the display panel PN, a plurality of scan lines SL and a plurality of data lines DL may cross each other, and a plurality of sub-pixels SP may be formed at intersections of the scan lines SL and the data lines DL.

[0045] A display area AA and a non-display area NA may be defined on the display panel PN.

[0046] The display area AA is an area of ​​the display device 100 that displays an image. The display area AA may include a plurality of sub-pixels SP constituting a plurality of pixels PX, and a pixel circuit configured to operate the plurality of sub-pixels SP. The plurality of sub-pixels SP is the smallest unit constituting the display area AA. N sub-pixels SP may constitute a single pixel PX. A thin film transistor or the like for operating the plurality of light-emitting elements R_LED, G_LED, and B_LED may be provided in each of the plurality of sub-pixels SP. The plurality of light-emitting elements R_LED, G_LED, and B_LED may be defined differently depending on the type of the display panel PN. For example, in the case where the display panel PN is an inorganic light-emitting display panel PN, the light-emitting elements R_LED, G_LED, and B_LED may each be a light-emitting diode (LED) or a micro light-emitting diode (micro-LED).

[0047] A plurality of signal lines are provided in the display area AA for transmitting various types of signals to the plurality of sub-pixels SP. For example, the plurality of signal lines may include a plurality of data lines DL for supplying data voltages to the plurality of sub-pixels SP, and a plurality of scan lines SL for supplying scan signals to the plurality of sub-pixels SP. The plurality of scan lines SL may extend in a single direction in the display area AA and may be connected to the plurality of sub-pixels SP. The plurality of data lines DL may extend in a direction different from the single direction in the display area AA and may be connected to the plurality of sub-pixels SP. In addition, a low-potential power line EVSS, a high-potential power line EVDD, and the like may also be provided in the display area AA. However, this specification is not limited thereto.

[0048] The non-display area NA may be defined as an area where no image is displayed, that is, an area extending from the display area AA. The non-display area NA may include link lines and pad electrodes for transmitting signals to the sub-pixels SP in the display area AA. Alternatively, the non-display area NA may include driver ICs, such as a gate driver IC and a data driver IC.

[0049] Meanwhile, the non-display area NA may be positioned on the rear surface of the display panel PN, ie, on a surface on which the sub-pixels SP do not exist. Alternatively, the non-display area NA may not be included. However, the present specification is not limited to the configuration shown in the drawings.

[0050] Meanwhile, drivers such as a gate driver GD, a data driver DD, and a timing controller TC may be connected to the display panel PN in various ways. For example, the gate driver GD may be installed in the non-display area NA using a gate-in-panel (GIP) method, or may be installed between a plurality of sub-pixels SP in the display area AA using a gate-in-active-area (GIA) method.

[0051] For example, the data driver DD and the timing controller TC may be formed on separate flexible films and printed circuit boards, and the display panel PN, the data driver DD, and the timing controller TC may be electrically connected by bonding the flexible film and the printed circuit board to pad electrodes formed in the non-display area NA of the display panel PN.

[0052] As another example, when the gate driver GD is installed in the display area AA by the GIA method, and the side lines SRL connecting the signal lines on the front surface of the display panel PN to the pad electrodes on the rear surface of the display panel PN are formed to bond the flexible film and the printed circuit board to the rear surface of the display panel PN, the non-display area NA on the front surface of the display panel PN can be minimized. Therefore, when the gate driver GD, the data driver DD, and the timing controller TC are connected to the display panel PN by the above-mentioned method, a zero border in which a border is substantially non-existent can be achieved. Figure 2A and Figure 2B Description A more detailed description.

[0053] Figure 2A is a partial cross-sectional view of a display device according to an embodiment of this specification. Figure 2B is a perspective view of a tiled display device according to an embodiment of the present specification.

[0054] A plurality of pad electrodes for transmitting various types of signals to the plurality of sub-pixels SP are provided in the non-display area NA of the display panel PN. For example, a first pad electrode PAD1 configured to transmit signals to the plurality of sub-pixels SP is provided in the non-display area NA on the front surface of the display panel PN. A second pad electrode PAD2 electrically connected to driving components such as a flexible film and a printed circuit board is provided in the non-display area NA on the rear surface of the display panel PN.

[0055] In this case, although not shown in the drawing, various types of signal lines such as scan lines SL, data lines DL, etc. connected to the plurality of sub-pixels SP may extend from the display area AA to the non-display area NA and may be electrically connected to the first pad electrode PAD1.

[0056] Furthermore, side lines SRL are provided along the side surfaces of the display panel PN. The side lines SRL can electrically connect the first pad electrode PAD1 on the front surface of the display panel PN with the second pad electrode PAD2 on the rear surface of the display panel PN. Therefore, signals received from the driving components on the rear surface of the display panel PN can be transmitted to the plurality of sub-pixels SP via the second pad electrode PAD2, the side lines SRL, and the first pad electrode PAD1. Consequently, a signal transmission route is defined from the front surface to the side and rear surfaces of the display panel PN, minimizing the area of ​​the non-display area NA on the front surface of the display panel PN.

[0057] In addition, refer to Figure 2B , a tiled display device TD with a large screen can be realized by connecting a plurality of display devices 100. In this case, as Figure 2A As shown, in the case of realizing the tiled display device TD by using the display device 100 with a minimized bezel, a seam area between the display devices 100 where no image is displayed may be minimized, thereby improving display quality.

[0058] For example, a plurality of sub-pixels SP may constitute a single pixel PX. The interval D1 between the outermost pixels PX of one display device 100 and the outermost pixels PX of another display device 100 adjacent to the one display device 100 may be equal to the interval D1 between the pixels PX in the one display device 100. Therefore, since a constant pixel PX interval is achieved between the display devices 100, the seam area can be minimized.

[0059] However, if Figure 2A and Figure 2B As shown, the display device 100 according to the embodiment of the present specification may be a general display device having a frame. However, the present specification is not limited thereto.

[0060] Figure 3A is a circuit diagram of a red sub-pixel of a display device according to an embodiment of this specification.

[0061] The red sub-pixel SP_R of the display device 100 according to the embodiment of this specification has a red light emitting element R_LED and a pixel circuit configured to operate the red light emitting element R_LED.

[0062] In this case, the pixel circuit may include first to third switching transistors SW1 , SW2 , and SW3 , a storage capacitor Cst, and a driving transistor DT.

[0063] The first switching transistor SW1 charges the storage capacitor Cst with the data voltage DATA in response to the first scan signal SCAN1 .

[0064] The driving transistor DT adjusts the light emission amount of the red light emitting element R_LED by controlling the amount of current to be supplied to the red light emitting element R_LED based on the data voltage with which the storage capacitor Cst is charged.

[0065] The second switching transistor SW2 initializes the driving transistor DT and the storage capacitor Cst to a reference voltage REF in response to the second scan signal SCAN2.

[0066] The third switching transistor SW3 senses and compensates for the threshold voltage of the driving transistor DT, while initializing the driving transistor DT and the storage capacitor Cst together with the second switching transistor SW2 to an initialization voltage INIT in response to a third scan signal SCAN3 .

[0067] The storage capacitor Cst may be electrically connected between the gate electrode GE and the source electrode SE of the driving transistor DT and maintain a data voltage DATA (which corresponds to an image signal voltage) or a voltage (which corresponds to the data voltage DATA) for one frame time.

[0068] Figure 3B is a circuit diagram of a green sub-pixel of a display device according to an embodiment of this specification, and Figure 3C is a circuit diagram of a blue sub-pixel of a display device according to an embodiment of the present specification. In addition to the light-emitting elements G_LED and B_LED, Figure 3B and Figure 3C The sub-pixels SP_G and SP_B in the Figure 3A The red sub-pixel SP_R in FIG. 1 is substantially the same as that in FIG. 1 . Therefore, repeated description of the same components will be omitted.

[0069] Reference Figure 3B and Figure 3C In the green sub-pixel SP_G and the blue sub-pixel SP_B of the display device 100 according to the embodiment of this specification, the first light emitting elements G_LED1 and B_LED1 and the second light emitting elements G_LED2 and B_LED2 are respectively connected in parallel.

[0070] Therefore, even if any one of the first light emitting elements G_LED1 and B_LED1 and the second light emitting elements G_LED2 and B_LED2 is defective, current is supplied to the other light emitting element without defect, so that the non-defective light emitting element can replace the function of the defective light emitting element.

[0071] Figure 4 1 is a schematic top plan view of a display device according to an embodiment of the present specification. Figure 4Only the plurality of first connection electrodes CE1, the plurality of second connection electrodes CE2, the plurality of first contact holes CH1, the plurality of second contact holes CH2, the red light emitting element R_LED, the first green light emitting element G_LED1 and the second green light emitting element G_LED2, and the first blue light emitting element B_LED1 and the second blue light emitting element B_LED2 are shown. Figure 4 Only the planar features of the sub-pixel SP are described. Figures 5 to 7 Describe the components in detail.

[0072] Reference Figure 4 The display device 100 according to the embodiment of this specification includes a plurality of sub-pixels SP, and the plurality of sub-pixels SP include a red sub-pixel SP_R, a green sub-pixel SP_G, and a blue sub-pixel SP_B.

[0073] A first-first connection electrode CE1-1 and a second-first connection electrode CE2-1 may be provided in the red subpixel SP_R. The first-first connection electrode CE1-1 is provided in the first-first contact hole CH1-1, and the second-first connection electrode CE2-1 is provided in the second-first contact hole CH2-1. In this case, the first-first connection electrode CE1-1 and the second-first connection electrode CE2-1 may be spaced apart from each other. The red light-emitting element R_LED may be provided on the first-first connection electrode CE1-1 and the second-first connection electrode CE2-1, and overlap with at least a portion of the first-first connection electrode CE1-1 and at least a portion of the second-first connection electrode CE2-1. In other words, the red light-emitting element R_LED may be provided to cover both one side of the first-first connection electrode CE1-1 and one side of the second-first connection electrode CE2-1. In this case, the red light-emitting element R_LED may not overlap with the first-first contact hole CH1-1 and the second-first contact hole CH2-1.

[0074] A first-second connection electrode CE1-2 and a second-second connection electrode CE2-2 may be provided in the green subpixel SP_G. The first-second connection electrode CE1-2 is provided in the first-second contact hole CH1-2, and the second-second connection electrode CE2-2 is provided in the second-second contact hole CH2-2. In this case, the first-second connection electrode CE1-2 and the second-second connection electrode CE2-2 may be spaced apart from each other. The first green light-emitting element G_LED1 may be provided on one side of the first-second connection electrode CE1-2. Furthermore, the other side of the first-second connection electrode CE1-2 may be provided in the first-second contact hole CH1-2. Similarly, the second green light-emitting element G_LED2 may be provided on one side of the second-second connection electrode CE2-2. Furthermore, the other side of the second-second connection electrode CE2-2 may be provided in the second-second contact hole CH2-2. In this case, the first green light-emitting element G_LED1 and the first-second contact hole CH1-2 do not overlap. In addition, the second green light emitting element G_LED2 and the second-second contact hole CH2-2 may not overlap with each other.

[0075] A first-third link electrode CE1-3 and a second-third link electrode CE2-3 may be provided in the blue subpixel SP_B. The first-third link electrode CE1-3 is provided in the first-third contact hole CH1-3, and the second-third link electrode CE2-3 is provided in the second-third contact hole CH2-3. In this case, the first-third link electrode CE1-3 and the second-third link electrode CE2-3 may be spaced apart from each other. The first blue light-emitting element B_LED1 may be provided on one side of the first-third link electrode CE1-3. Furthermore, the other side of the first-third link electrode CE1-3 may be provided in the first-third contact hole CH1-3. Similarly, the second blue light-emitting element B_LED2 may be provided on one side of the second-third link electrode CE2-3. Furthermore, the other side of the second-third link electrode CE2-3 may be provided in the second-third contact hole CH2-3. In this case, the first blue light-emitting element B_LED1 and the first-third contact hole CH1-3 do not overlap. In addition, the second blue light emitting element B_LED2 and the second-third contact holes CH2-3 cannot overlap with each other.

[0076] Reference Figure 4The planar area of ​​the red light-emitting element R_LED can be larger than the planar areas of the first green light-emitting element G_LED1, the second green light-emitting element G_LED2, the first blue light-emitting element B_LED1, and the second blue light-emitting element B_LED2. As described below, the red light-emitting element R_LED can be a flip-chip light-emitting element, while the first green light-emitting element G_LED1, the second green light-emitting element G_LED2, the first blue light-emitting element B_LED1, and the second blue light-emitting element B_LED2 are vertical light-emitting elements, so that the red light-emitting element R_LED can have the largest planar area.

[0077] The first-first link electrode CE1-1 may have a larger planar area than the first-second link electrode CE1-2 and the first-third link electrode CE1-3. In addition, the second-first link electrode CE2-1 may have a larger planar area than the second-second link electrode CE2-2 and the second-third link electrode CE2-3. As described above, since the planar area of ​​the red light-emitting element R_LED is larger than the planar area of ​​the first green light-emitting element G_LED1, the planar area of ​​the second green light-emitting element G_LED2, the planar area of ​​the first blue light-emitting element B_LED1, and the planar area of ​​the second blue light-emitting element B_LED2, the planar area of ​​each of the first-first connection electrode CE1-1 and the second-first connection electrode CE2-1 connected to the red light-emitting element R_LED can be larger than the planar area of ​​each of the first-second connection electrode CE1-2, the second-second connection electrode CE2-2, the first-third connection electrode CE1-3, and the second-third connection electrode CE2-3 connected to the first green light-emitting element G_LED1, the second green light-emitting element G_LED2, the first blue light-emitting element B_LED1, and the second blue light-emitting element B_LED2.

[0078] Therefore, the planar area of ​​each of the green sub-pixel SP_G and the blue sub-pixel SP_B can be smaller than the planar area of ​​the red sub-pixel SP_R. Specifically, since the planar area of ​​each of the first green light emitting element G_LED1, the second green light emitting element G_LED2, the first-second connection electrode CE1-2, and the second-second connection electrode CE2-2 included in the green sub-pixel SP_G is smaller than the planar area of ​​each of the red light emitting element R_LED, the first-first connection electrode CE1-1, and the second-first connection electrode CE2-1 included in the red sub-pixel SP_R, the planar area of ​​the green sub-pixel SP_G can also be smaller than the planar area of ​​the red sub-pixel SP_R. Similarly, since the planar area of ​​each of the first blue light emitting element B_LED1, the second blue light emitting element B_LED2, the first-third connection electrode CE1-3, and the second-third connection electrode CE2-3 included in the blue subpixel SP_B can be smaller than the planar area of ​​each of the red light emitting element R_LED, the first-first connection electrode CE1-1, and the second-first connection electrode CE2-1 included in the red subpixel SP_R, the planar area of ​​the blue subpixel SP_B can be smaller than the planar area of ​​the red subpixel SP_R. Even though the planar area of ​​each of the green subpixel SP_G and the blue subpixel SP_B is smaller than the planar area of ​​the red subpixel SP_R as described above, the green subpixel SP_G and the blue subpixel SP_B can each include light emitting elements G_LED1, G_LED2, B_LED1, and B_LED2, which are greater in number than the light emitting elements of the red subpixel SP_R.

[0079] In the following, reference will be made to Figures 5 to 7 The sub-pixels SP_R, SP_G, and SP_B according to an embodiment of the present specification are described in more detail.

[0080] Figure 5 is a cross-sectional view of a red sub-pixel among sub-pixels of a display device according to an embodiment of the present specification, that is, Figure 4 A cross-sectional view taken along line IV-IV' in FIG.

[0081] Reference Figure 5 The substrate 110 may be a substrate, i.e., an insulating substrate that supports components disposed above the substrate 110. For example, the substrate 110 may be made of glass, resin, or the like. Furthermore, the substrate 110 may include a polymer or plastic. In some embodiments, the substrate 110 may be made of a flexible plastic material. A plurality of pixels may be formed on the substrate 110 so that an image can be displayed.

[0082] A light blocking layer BSM may be provided on the substrate 110. The light blocking layer BSM may block light from entering the active layer ACT of the plurality of transistors, thereby minimizing leakage current. For example, the light blocking layer BSM may be provided below the active layer ACT of the driving transistor DT and block light from entering the active layer ACT. If light is emitted to the active layer ACT, leakage current occurs, which may deteriorate the reliability of the transistor. Therefore, a light blocking layer BSM for blocking light may be provided on the substrate 110, thereby improving the reliability of the driving transistor DT. The light blocking layer BSM may be made of an opaque conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof. However, the present specification is not limited thereto.

[0083] A buffer layer 111 may be provided on the light blocking layer BSM. The buffer layer 111 may reduce the penetration of moisture or impurities through the substrate 110. For example, the buffer layer 111 may be configured as a single layer or a multilayer made of silicon oxide (SiOx) or silicon nitride (SiNx). However, the present invention is not limited thereto. However, depending on the type of substrate 110 or the type of transistor, the buffer layer 111 may not be included. However, the present invention is not limited thereto.

[0084] A driving transistor DT including an active layer ACT, a gate electrode GE, a source electrode SE, and a drain electrode DE may be disposed on the buffer layer 111 .

[0085] At the same time, despite Figure 5 Although not shown, an additional buffer layer may be provided between the substrate 110 and the light blocking layer BSM. For example, like the buffer layer 111, the additional buffer layer may be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx) in order to reduce the penetration of moisture or impurities through the substrate 110. However, the present specification is not limited thereto.

[0086] First, the active layer ACT of the driving transistor DT can be arranged on the buffer layer 111. The active layer ACT can be made of a semiconductor material such as an oxide semiconductor, amorphous silicon or polycrystalline silicon. However, the present specification is not limited to this. In addition, although not shown in the drawings, other transistors such as a switching transistor, a sensing transistor and a light-emitting control transistor can be additionally provided in addition to the driving transistor DT. The active layers of these transistors can be made of a semiconductor material such as an oxide semiconductor, amorphous silicon or polycrystalline silicon. However, the present specification is not limited to this. In addition, the active layers of transistors such as the driving transistor DT, the switching transistor, the sensing transistor and the light-emitting control transistor included in the pixel circuit can be made of the same material or different materials.

[0087] A gate insulating layer 112 may be provided on the active layer ACT. The gate insulating layer 112 may be an insulating layer for electrically insulating the active layer ACT from the gate electrode GE. The gate insulating layer 112 may be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx). However, the present invention is not limited thereto.

[0088] A gate electrode GE may be provided on the gate insulating layer 112. The gate electrode GE may be made of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof. However, the present invention is not limited thereto.

[0089] In addition, an intermediate electrode CNT may be provided on the gate insulating layer 112. The intermediate electrode CNT may be made of the same material as the gate electrode GE and electrically connected to the light blocking layer BSM.

[0090] A first interlayer insulating layer 113 may be provided on the gate electrode GE. Contact holes may be formed in the first interlayer insulating layer 113, through which the source electrode SE and the drain electrode DE are connected to the active layer ACT. The first interlayer insulating layer 113 may be an insulating layer for protecting components provided below the first interlayer insulating layer 113. The first interlayer insulating layer 113 may be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx). However, the present specification is not limited thereto.

[0091] A conductive layer TM may be provided on the first interlayer insulating layer 113. The conductive layer TM may be provided on the gate electrode GE. The conductive layer TM together with the gate electrode GE may constitute a storage capacitor Cst. However, according to embodiments, the conductive layer TM may not be included.

[0092] A second interlayer insulating layer 114 may be provided on the conductive layer TM. Contact holes may be formed in the second interlayer insulating layer 114, through which the source electrode SE and the drain electrode DE are connected to the active layer ACT. The second interlayer insulating layer 114 may be an insulating layer for protecting components provided below the second interlayer insulating layer 114. The second interlayer insulating layer 114 may be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx). However, the present specification is not limited thereto.

[0093] A source electrode SE and a drain electrode DE electrically connected to the active layer ACT may be provided on the second interlayer insulating layer 114. The drain electrode DE is electrically connected to the storage capacitor Cst and the second electrode 122 of the red light-emitting element R_LED, and the source electrode SE is connected to another component of the pixel circuit. The source electrode SE and the drain electrode DE may each be made of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof. However, the present invention is not limited thereto.

[0094] A power line VL may be provided on the second interlayer insulating layer 114. Specifically, like the source electrode SE and the drain electrode DE, the power line VL is provided on the second interlayer insulating layer 114 and spaced apart from the source electrode SE and the drain electrode DE. The power line VL may be made of the same material as the source electrode SE and the drain electrode DE. However, this specification is not limited thereto. The power line VL may be a low-potential power line. In this case, a low-potential voltage may be supplied to the power line VL. However, this specification is not limited thereto. The power line VL may be a high-potential power line.

[0095] The power line VL may be connected to the first-first connection electrode CE1-1. The power line VL may be connected to the first electrode 121 of the red light emitting element R_LED through the first-first connection electrode CE1-1. Thus, the power line VL may transmit a high potential voltage or a low potential voltage to the first-first connection electrode CE1-1 and the first electrode 121 of the red light emitting element R_LED.

[0096] An overcoat layer 115 may be disposed on the source electrode SE, the drain electrode DE, and the power line VL. The overcoat layer 115 may be disposed to cover the source electrode SE, the drain electrode DE, and the power line VL. Thus, the overcoat layer 115 may planarize the top surfaces of components disposed below the overcoat layer 115, such as the source electrode SE, the drain electrode DE, and the power line VL. Furthermore, the overcoat layer 115 may include one or more contact holes CH1 and CH2. For example, the overcoat layer 115 may be made of a benzocyclobutene or acrylic-based organic material. However, the present disclosure is not limited thereto.

[0097] A first-first connection electrode CE1-1 and a second-first connection electrode CE2-1 may be provided on the overcoat layer 115. The first-first connection electrode CE1-1 may be connected to the power line VL. Specifically, the first-first connection electrode CE1-1 may be connected to the power line VL through a first-first contact hole CH1-1 formed in the overcoat layer 115. The second-first connection electrode CE2-1 may be connected to the drain electrode DE of the driving transistor DT through a second-first contact hole CH2-1 formed in the overcoat layer 115.

[0098] At the same time, the first-first connection electrode CE1-1 and the second-first connection electrode CE2-1 can also be used as a reflective plate. The first-first connection electrode CE1-1 and the second-first connection electrode CE2-1 can be arranged below the red light-emitting element R_LED and reflect the light emitted from the red light-emitting element R_LED toward the upper part of the substrate 110. Therefore, considering the light reflection efficiency and resistance, the first-first connection electrode CE1-1 and the second-first connection electrode CE2-1 may include various conductive layers. For example, the first-first connection electrode CE1-1 and the second-first connection electrode CE2-1 can each be made by using an opaque conductive layer made of silver (Ag), aluminum (Al), molybdenum (Mo), titanium (Ti) or an alloy thereof together with a transparent conductive layer made of indium tin oxide (ITO). However, the present specification is not limited to this.

[0099] A plurality of red light emitting elements R_LED may be provided on the first-first connection electrode CE1-1 and the second-first connection electrode CE2-1. According to an embodiment of the present specification, the red light emitting element R_LED may be a flip-chip type light emitting element in which a first electrode 121 and a second electrode 122 to be described below are provided on the same plane below the light emitting element. Figure 5 In the embodiment, the red light-emitting element R_LED is a flip-chip light-emitting element with a relatively simple structure. However, the present invention is not limited thereto. The red light-emitting element R_LED may be a lateral light-emitting element. Specifically, the first electrode 121 of the red light-emitting element R_LED may be arranged to face the first-first connection electrode CE1-1, and the second electrode 122 may be arranged to face the second-first connection electrode CE2-1.

[0100] Although not shown in the figure, a bonding layer may be further provided between the first-first connection electrode CE1-1 and the first electrode 121, and between the second-first connection electrode CE2-1 and the second electrode 122. In this case, the bonding layer may secure the red light-emitting element R_LED to the first-first connection electrode CE1-1 and the second-first connection electrode CE2-1. The bonding layer may include a conductive material to electrically connect the first-first connection electrode CE1-1 and the first electrode 121, and to electrically connect the second-first connection electrode CE2-1 and the second electrode 122. However, the present specification is not limited thereto. Depending on the present embodiment, a bonding layer may not be included.

[0101] The red light emitting element R_LED includes a first electrode 121 , a first semiconductor layer 125 , a second electrode 122 , a second semiconductor layer 123 and a light emitting layer 124 .

[0102] The first electrode 121 of the red light emitting element R_LED can be electrically connected to the power line VL through the first-first connection electrode CE1-1. Therefore, the first electrode 121 can transmit the voltage transmitted through the power line VL to the first semiconductor layer 125. For example, the first electrode 121 can be an N-type electrode configured to inject electrons into the light emitting layer 124 through the first semiconductor layer 125. The first electrode 121 can be made of a conductive material, for example, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), or an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), or an alloy thereof. However, the present specification is not limited thereto.

[0103] The second electrode 122 can be electrically connected to the drain electrode DE of the driving transistor DT through the second-first connection electrode CE2-1. Therefore, the second electrode 122 can transmit the voltage transmitted from the drain electrode DE to the second semiconductor layer 123. For example, the second electrode 122 can be a P-type electrode for injecting positive holes into the light-emitting layer 124 through the second semiconductor layer 123. The second electrode 122 can be made of a conductive material, for example, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), or an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), or an alloy thereof. However, the present invention is not limited thereto.

[0104] The first semiconductor layer 125 may be disposed on the first electrode 121, and the second semiconductor layer 123 may be disposed on the second electrode 122. The first semiconductor layer 125 and the second semiconductor layer 123 may each be a layer formed by injecting N-type or P-type impurities into a material such as indium aluminum phosphide (InAlP) or gallium arsenide (GaAs). For example, the first semiconductor layer 125 may be an N-type semiconductor layer formed by injecting N-type impurities into gallium arsenide (GaAs), and the second semiconductor layer 123 may be a P-type semiconductor layer formed by injecting P-type impurities into gallium arsenide (GaAs). However, the present invention is not limited thereto. In this case, the N-type impurity may be silicon (Si), germanium (GE), tin (Sn), etc. The P-type impurity may be magnesium (Mg), zinc (Zn), beryllium (Be), etc. However, the present invention is not limited thereto.

[0105] The light emitting layer 124 may be disposed between the first semiconductor layer 125 and the second semiconductor layer 123. The light emitting layer 124 may emit light by receiving positive holes and electrons from the first semiconductor layer 125 and the second semiconductor layer 123. The light emitting layer 124 may be configured as a single layer or a multiple quantum well (MQW) structure.

[0106] The red light emitting element R_LED may be larger in size than the green light emitting element G_LED and the blue light emitting element B_LED described below. In this case, the size may be interpreted as a concept including the plane size, cross-sectional width, and volume of all light emitting elements.

[0107] Next, a first planarization layer PAC1 may be disposed around the plurality of red light-emitting elements R_LED. The first planarization layer PAC1 may overlap the top and side surfaces of the plurality of red light-emitting elements R_LED, thereby securing and protecting the plurality of red light-emitting elements R_LED. For example, the first planarization layer PAC1 may be made of a benzocyclobutene or acrylic-based organic material. However, this specification is not limited thereto.

[0108] A second planarization layer PAC2 may be provided on the first planarization layer PAC1. The second planarization layer PAC2 may be provided to surround the red light-emitting element R_LED and to expose the top surface of the red light-emitting element R_LED. In this case, the top surface of the second planarization layer PAC2 may coincide with the top surface of the red light-emitting element R_LED. For example, the second planarization layer PAC2 may be made of a benzocyclobutene or acrylic-based organic material. However, this specification is not limited thereto.

[0109] A third planarization layer PAC3 may be provided on the second planarization layer PAC2. The third planarization layer PAC3 may completely cover the top surface of the red light-emitting element R_LED, thereby protecting the red light-emitting element R_LED. The third planarization layer PAC3 may be configured as a single layer or multiple layers. For example, the third planarization layer PAC3 may be made of a benzocyclobutene or acrylic-based organic material. However, this specification is not limited thereto.

[0110] As described above, the first planarization layer PAC1 , the second planarization layer PAC2 , and the third planarization layer PAC3 may be sequentially stacked in the red sub-pixel SP_R.

[0111] Figure 6 is a cross-sectional view of a green sub-pixel among sub-pixels of a display device according to an embodiment of the present specification, that is, along Figure 4 , which is a cross-sectional view taken along line V-V' in FIG. In the green subpixel SP_G of the display device 100 according to an embodiment of the present specification, all components disposed below the first-second connection electrode CE1-2 and the second-second connection electrode CE2-2 are identical to those of the red subpixel SP_R. Therefore, a repeated description thereof will be omitted.

[0112] Reference Figure 6, the first-second connection electrode CE1-2 and the second-second connection electrode CE2-2 may be provided on the overcoat layer 115 in the green sub-pixel SP_G. In this case, the first-second connection electrode CE1-2 and the second-second connection electrode CE2-2 are substantially identical in configuration, arrangement, and function to the first-first connection electrode CE1-1 and the second-first connection electrode CE2-1 of the red sub-pixel SP_R. Therefore, a repeated description thereof will be omitted.

[0113] The first green light emitting element G_LED1 may be disposed on the first-second connection electrode CE1-2. Specifically, the first green light emitting element G_LED1 may be disposed on one side of the first-second connection electrode CE1-2 and may not overlap the first-second contact hole CH1-2.

[0114] The first and second green light emitting elements G_LED1 and G_LED2 may each include a first electrode 621 , a first semiconductor layer 625 , a second electrode 622 , a second semiconductor layer 623 , and a light emitting layer 624 .

[0115] The first electrode 621 of the first green light emitting element G_LED1 may be arranged to face the first-second connection electrode CE1-2. The first electrode 621 may be electrically connected to the power line VL through the first-second connection electrode CE1-2. Thus, the first electrode 621 may transmit the voltage transmitted through the power line VL to the first semiconductor layer 625. For example, the first electrode 621 may be an N-type electrode arranged to inject electrons into the light emitting layer 624 through the first semiconductor layer 625. The first electrode 621 may be made of a conductive material, for example, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), or an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), or an alloy thereof. However, the present specification is not limited thereto.

[0116] The first semiconductor layer 625 may be provided on the first electrode 621. For example, the first semiconductor layer 625 may be an N-type layer for supplying electrons to the light emitting layer 624. In this case, the first semiconductor layer 625 may be formed by doping a gallium nitride (GaN) semiconductor layer with N-type impurities such as silicon (Si), germanium (Ge), or tin (Sn), and the gallium nitride (GaN) semiconductor layer is formed by growing a gallium nitride (GaN) layer. However, the present invention is not limited thereto.

[0117] The light-emitting layer 624 may be provided on the first semiconductor layer 625. The light-emitting layer 624 may emit light by receiving positive holes and electrons from the first semiconductor layer 625 and the second semiconductor layer 623 to be described below. The light-emitting layer 624 may be configured as a single layer or a multiple quantum well (MQW) structure. For example, the light-emitting layer 624 may be made of indium gallium nitride (InGaN), gallium nitride (GaN), or the like. However, the present invention is not limited thereto.

[0118] The second semiconductor layer 623 may be provided on the light emitting layer 624. For example, the second semiconductor layer 623 may be a P-type layer for injecting positive holes into the light emitting layer 624. The second semiconductor layer 623 may be formed by doping a gallium nitride (GaN) semiconductor layer with P-type impurities such as magnesium (Mg), zinc (Zn), and beryllium (Be), and the gallium nitride (GaN) semiconductor layer is formed by growing a gallium nitride (GaN) layer. However, the present invention is not limited thereto.

[0119] The second electrode 622 may be disposed on the second semiconductor layer 623. For example, the second electrode 622 may be a P-type electrode for injecting positive holes into the light-emitting layer 624 through the second semiconductor layer 623. The second electrode 622 may be made of a conductive material, for example, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), or an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), or an alloy thereof. However, the present specification is not limited thereto. However, since the second electrode 622 is disposed above the light-emitting layer 624 in the first green light-emitting element G_LED1, the second electrode 622 may be made of a conductive material having transparency so that light emitted from the light-emitting layer 624 can propagate upward while passing through the second electrode 622. However, the present specification is not limited thereto.

[0120] The second green light-emitting element G_LED2 may be disposed on the second-second connection electrode CE2-2. In this case, the second green light-emitting element G_LED2 may be disposed in a state where the first green light-emitting element G_LED1 is inverted. Specifically, the second green light-emitting element G_LED2 may be disposed such that the second electrode 622 faces the second-second connection electrode CE2-2. For example, the second green light-emitting element G_LED2 may have a shape in which the second electrode 622, the second semiconductor layer 623, the light-emitting layer 624, the first semiconductor layer 625, and the first electrode 621 are sequentially disposed on the second-second connection electrode CE2-2.

[0121] In addition to the arrangement shape, the first green light-emitting element G_LED1 and the second green light-emitting element G_LED2 can be substantially identical to each other in specific configuration. However, since the second green light-emitting element G_LED2 has a shape achieved by inverting the shape of the first green light-emitting element G_LED1, the first electrode 621 can be arranged at the upper side compared to the first green light-emitting element G_LED1 in which the first electrode 621 is arranged at the lower side. Therefore, in the second green light-emitting element G_LED2, the first electrode 621 can be made of a conductive material having transparency so that the light emitted from the light-emitting layer 624 propagates upward while passing through the first electrode 621. For example, the first electrode 621 can be made of a material such as indium tin oxide (ITO) or indium zinc oxide (IZO). However, the present specification is not limited thereto.

[0122] As described above, the first and second green light emitting elements G_LED1 and G_LED2 may each be a vertical light emitting element having a structure different from that of the red light emitting element R_LED.

[0123] Although not shown in the figure, a bonding layer may be further provided between the first-second connection electrode CE1-2 and the first green light-emitting element G_LED1, and between the second-second connection electrode CE2-2 and the second green light-emitting element G_LED2. In this case, the bonding layer may secure the first green light-emitting element G_LED1 and the second green light-emitting element G_LED2 to the first-second connection electrode CE1-2 and the second-second connection electrode CE2-2. The bonding layer may include a conductive material to electrically connect the first-second connection electrode CE1-2 and the first electrode 621 of the first green light-emitting element G_LED1, and to electrically connect the second-second connection electrode CE2-2 and the second electrode 622 of the second green light-emitting element G_LED2. However, this specification is not limited to this.

[0124] In the green sub-pixel SP_G, the first planarization layer PAC1 may be provided to surround the side surface of the first green light-emitting element G_LED1. Thus, the first planarization layer PAC1 may secure and protect the first green light-emitting element G_LED1. Furthermore, the first planarization layer PAC1 may expose the second electrode 622 of the first green light-emitting element G_LED1. The first planarization layer PAC1 may be provided to cover one end of the first-second connection electrode CE1-2. Furthermore, one end of the first planarization layer PAC1 may be spaced apart from the second-second connection electrode CE2-2. The other end of the first planarization layer PAC1 may not overlap with the first-second contact hole CH1-2. For example, the first planarization layer PAC1 may be made of, for example, a benzocyclobutene or acrylic-based organic material. However, the present specification is not limited thereto.

[0125] A third connection electrode CE3 may be disposed on at least a portion of the first planarization layer PAC1 and the second electrode 622 of the first green light-emitting element G_LED1. In this case, the third connection electrode CE3 may be disposed so as to cover the second electrode 622, extend along one side surface of the first planarization layer PAC1, and be connected to the second-second connection electrode CE2-2. Therefore, the third connection electrode CE3 may be disposed so as to cover one side surface of the first planarization layer PAC1. Thus, the third connection electrode CE3 may electrically connect the second electrode 622 of the first green light-emitting element G_LED1 and the second-second connection electrode CE2-2. Furthermore, the third connection electrode CE3 may cover one end of the second-second connection electrode CE2-2 and be disposed on at least one side portion of the second-second connection electrode CE2-2. The third connection electrode CE3 may not extend to the other side surface of the first planarization layer PAC1.

[0126] A second planarization layer PAC2 may be provided on the third connection electrode CE3. In the green sub-pixel SP_G, the second planarization layer PAC2 may be provided to completely cover the first planarization layer PAC1 and the third connection electrode CE3, and to protect the first green light-emitting element G_LED1 and the third connection electrode CE3. In addition, the second planarization layer PAC2 may be provided to surround the side surfaces of the second green light-emitting element G_LED2 and to cover at least a portion of the top surface of the second green light-emitting element G_LED2. Thus, the second planarization layer PAC2 may secure and cover the second green light-emitting element G_LED2. The top surface of the second planarization layer PAC2 may be provided to be higher than the top surface of the first electrode 621 of the second green light-emitting element G_LED2. However, the second planarization layer PAC2 may expose at least a portion of the first electrode 621 of the second green light-emitting element G_LED2. For example, the second planarization layer PAC2 may be made of, for example, a benzocyclobutene or acrylic-based organic material. However, the present specification is not limited thereto.

[0127] A fourth connection electrode CE4 may be provided on the second planarization layer PAC2. The fourth connection electrode CE4 may be provided on the first electrode 621 of the second green light-emitting element G_LED2 exposed by the second planarization layer PAC2. The fourth connection electrode CE4 may extend along one side surface of the second planarization layer PAC2 and be connected to the first-second connection electrodes CE1-2. Thus, the first electrode 621 of the second green light-emitting element G_LED2 and the first-second connection electrodes CE1-2 may be electrically connected via the fourth connection electrode CE4. As described above, the first green light-emitting element G_LED1 and the second green light-emitting element G_LED2 are connected in parallel to the green sub-pixel SP_G, so that a plurality of green light-emitting elements G_LED1 and G_LED2 may be provided in one green sub-pixel SP_G. Furthermore, the fourth connection electrode CE4 may overlap with the first green light-emitting element G_LED1, the first planarization layer PAC1, and the third connection electrode CE3, and overlap with at least a portion of the second green light-emitting element G_LED2.

[0128] A third planarization layer PAC3 may be provided on the second planarization layer PAC2. The third planarization layer PAC3 may be provided to cover all of the second planarization layer PAC2, the fourth connection electrode CE4, the first-second connection electrodes CE1-2, and the overcoat layer 115. Thus, the third planarization layer PAC3 may protect all components provided below the third planarization layer PAC3. For example, the third planarization layer PAC3 may be made of a benzocyclobutene or acrylic-based organic material. However, the present invention is not limited thereto.

[0129] Figure 7 is a cross-sectional view of a blue sub-pixel among the sub-pixels of a display device according to an embodiment of the present specification, that is, along Figure 4 1-3 and 2-3. In the blue subpixel SP_B of the display device 100 according to an embodiment of the present specification, all components disposed below the first to third link electrodes CE1-3 and the second to third link electrodes CE2-3 are identical to those of the red subpixel SP_R. Therefore, a repeated description thereof will be omitted.

[0130] Reference Figure 7 , the first-third link electrodes CE1-3 and the second-third link electrodes CE2-3 may be provided on the overcoat layer 115 in the blue sub-pixel SP_B. In this case, the first-third link electrodes CE1-3 and the second-third link electrodes CE2-3 are substantially identical in configuration, arrangement, and function to the first-first link electrodes CE1-1 and the second-first link electrodes CE2-1 of the red sub-pixel SP_R. Therefore, a repeated description thereof will be omitted.

[0131] The first blue light emitting element B_LED1 may be disposed on the first to third connection electrodes CE1-3. Specifically, the first blue light emitting element B_LED1 may be disposed on one side of the first to third connection electrodes CE1-3 and may not overlap with the first to third contact holes CH1-3.

[0132] The first and second blue light emitting elements B_LED1 and B_LED2 may each include a first electrode 721 , a first semiconductor layer 725 , a second electrode 722 , a second semiconductor layer 723 , and a light emitting layer 724 .

[0133] The first electrode 721 of the first blue light emitting element B_LED1 may be arranged to face the first-third connection electrodes CE1-3. The first electrode 721 may be electrically connected to the power line VL through the first-third connection electrodes CE1-3. Thus, the first electrode 721 may transmit the voltage transmitted through the power line VL to the first semiconductor layer 725. For example, the first electrode 721 may be an N-type electrode arranged to inject electrons into the light emitting layer 724 through the first semiconductor layer 725. The first electrode 721 may be made of a conductive material, for example, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), or an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), or an alloy thereof. However, the present specification is not limited thereto.

[0134] The first semiconductor layer 725 may be provided on the first electrode 721. For example, the first semiconductor layer 725 may be an N-type layer for supplying electrons to the light emitting layer 724. In this case, the first semiconductor layer 725 may be formed by doping a gallium nitride (GaN) semiconductor layer with N-type impurities such as silicon (Si), germanium (Ge), or tin (Sn), and the gallium nitride (GaN) semiconductor layer is formed by growing a gallium nitride (GaN) layer. However, the present invention is not limited thereto.

[0135] The light-emitting layer 724 may be provided on the first semiconductor layer 725. The light-emitting layer 724 may emit light by receiving positive holes and electrons from the first semiconductor layer 725 and the second semiconductor layer 723 to be described below. The light-emitting layer 724 may be configured as a single layer or a multi-quantum well (MQW) structure. For example, the light-emitting layer 724 may be made of indium gallium nitride (InGaN), gallium nitride (GaN), or the like. However, the present invention is not limited thereto.

[0136] The second semiconductor layer 723 may be provided on the light emitting layer 724. For example, the second semiconductor layer 723 may be a P-type layer for injecting positive holes into the light emitting layer 724. The second semiconductor layer 723 may be formed by doping a gallium nitride (GaN) semiconductor layer with P-type impurities such as magnesium (Mg), zinc (Zn), and beryllium (Be), and the gallium nitride (GaN) semiconductor layer is formed by growing a gallium nitride (GaN) layer. However, the present invention is not limited thereto.

[0137] The second electrode 722 may be disposed on the second semiconductor layer 723. For example, the second electrode 722 may be a P-type electrode for injecting positive holes into the light-emitting layer 724 through the second semiconductor layer 723. The second electrode 722 may be made of a conductive material, for example, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), or an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), or an alloy thereof. However, the present specification is not limited thereto. However, since the second electrode 722 is disposed above the light-emitting layer 724 in the first blue light-emitting element B_LED1, the second electrode 722 may be made of a conductive material having transparency so that light emitted from the light-emitting layer 724 can propagate upward while passing through the second electrode 722. However, the present specification is not limited thereto.

[0138] The second blue light-emitting element B_LED2 may be disposed on the second-third connection electrode CE2-3. In this case, the second blue light-emitting element B_LED2 may be disposed in a state in which the first blue light-emitting element B_LED1 is inverted. Specifically, the second blue light-emitting element B_LED2 may be disposed so that the second electrode 722 faces the second-third connection electrode CE2-3. For example, the second blue light-emitting element B_LED2 may have a shape in which the second electrode 722, the second semiconductor layer 723, the light-emitting layer 724, the first semiconductor layer 725, and the first electrode 721 are sequentially disposed on the second-third connection electrode CE2-3. Aside from the arrangement shape, the first blue light-emitting element B_LED1 and the second blue light-emitting element B_LED2 may be substantially identical in specific configuration. However, since the second blue light-emitting element B_LED2 has a shape achieved by inverting the shape of the first blue light-emitting element B_LED1, the first electrode 721 may be disposed on the upper side compared to the first blue light-emitting element B_LED1 in which the first electrode 721 is disposed on the lower side. Therefore, in the second blue light-emitting element B_LED2, the first electrode 721 may be made of a conductive material having transparency so that light emitted from the light-emitting layer 724 propagates upward while passing through the first electrode 721. For example, the first electrode 721 may be made of a material such as indium tin oxide (ITO) or indium zinc oxide (IZO). However, the present invention is not limited thereto.

[0139] As described above, the first blue light-emitting element B_LED1 and the second blue light-emitting element B_LED2 can each be a vertical light-emitting element that is different in structure from the red light-emitting element R_LED. In contrast, the multiple blue light-emitting elements B_LED1 and B_LED2 provided in the blue sub-pixel SP_B can be structurally the same as the multiple green light-emitting elements G_LED1 and G_LED2 provided in the green sub-pixel SP_G.

[0140] Furthermore, the first blue light-emitting element B_LED1 and the second blue light-emitting element B_LED2 may be smaller in size than the red light-emitting element R_LED. Meanwhile, the plurality of blue light-emitting elements B_LED1 and B_LED2 provided in the blue sub-pixel SP_B may be the same size as the plurality of green light-emitting elements G_LED1 and G_LED2 provided in the green sub-pixel SP_G. However, the present invention is not limited thereto.

[0141] Although not shown in the figure, a bonding layer may be further provided between the first and third connection electrodes CE1-3 and the first blue light-emitting element B_LED1, and between the second and third connection electrodes CE2-3 and the second blue light-emitting element B_LED2. In this case, the bonding layer may secure the first and second blue light-emitting elements B_LED1 and B_LED2 to the first and second third connection electrodes CE1-3 and CE2-3. The bonding layer may include a conductive material to electrically connect the first and third connection electrodes CE1-3 and the first electrode 721 of the first blue light-emitting element B_LED1, and to electrically connect the second and third connection electrodes CE2-3 and the second electrode 722 of the second blue light-emitting element B_LED2. However, this specification is not limited to this.

[0142] In the blue sub-pixel SP_B, the first planarization layer PAC1 may be provided to surround the side surface of the first blue light-emitting element B_LED1. Thus, the first planarization layer PAC1 may secure and protect the first blue light-emitting element B_LED1. In addition, the first planarization layer PAC1 may expose the second electrode 722 of the first blue light-emitting element B_LED1. The first planarization layer PAC1 may be provided to cover one end of the first-third connection electrode CE1-3. In addition, one end of the first planarization layer PAC1 may be spaced apart from the second-third connection electrode CE2-3. The other end of the first planarization layer PAC1 may not overlap with the first-third contact hole CH1-3. For example, the first planarization layer PAC1 may be made of, for example, a benzocyclobutene or acrylic-based organic material. However, the present specification is not limited thereto.

[0143] A fifth connection electrode CE5 may be provided on at least a portion of the first planarization layer PAC1 and the second electrode 722 of the first blue light-emitting element B_LED1. In this case, the fifth connection electrode CE5 may be provided to cover the second electrode 722, extend along one side surface of the first planarization layer PAC1, and be connected to the second-third connection electrodes CE2-3. Therefore, the fifth connection electrode CE5 may be provided to cover one side surface of the first planarization layer PAC1. Therefore, the fifth connection electrode CE5 may electrically connect the second electrode 722 of the first blue light-emitting element B_LED1 and the second-third connection electrodes CE2-3. Furthermore, the fifth connection electrode CE5 may cover one end of the second-third connection electrode CE2-3 and be provided on at least one side portion of the second-third connection electrode CE2-3. The fifth connection electrode CE5 may not extend to the other side surface of the first planarization layer PAC1.

[0144] A second planarization layer PAC2 may be provided on the fifth connection electrode CE5. In the blue sub-pixel SP_B, the second planarization layer PAC2 may be provided to completely cover the first planarization layer PAC1 and the fifth connection electrode CE5, and to protect the first blue light-emitting element B_LED1 and the fifth connection electrode CE5. In addition, the second planarization layer PAC2 may be provided to surround the side surfaces of the second blue light-emitting element B_LED2 and to cover at least a portion of the top surface of the second blue light-emitting element B_LED2. Thus, the second planarization layer PAC2 may secure and protect the second blue light-emitting element B_LED2. The top surface of the second planarization layer PAC2 may be provided to be higher than the top surface of the first electrode 721 of the second blue light-emitting element B_LED2. However, the second planarization layer PAC2 may expose at least a portion of the first electrode 721 of the second blue light-emitting element B_LED2. For example, the second planarization layer PAC2 may be made of, for example, a benzocyclobutene or acrylic-based organic material. However, the present specification is not limited thereto.

[0145] A sixth connection electrode CE6 may be provided on the second planarization layer PAC2. The sixth connection electrode CE6 may be provided on the first electrode 721 of the second blue light-emitting element B_LED2 exposed by the second planarization layer PAC2. The sixth connection electrode CE6 may extend along one side surface of the second planarization layer PAC2 and be connected to the first-third connection electrodes CE1-3. Thus, the first electrode 721 of the second blue light-emitting element B_LED2 and the first-third connection electrodes CE1-3 may be electrically connected via the sixth connection electrode CE6. As described above, the first blue light-emitting element B_LED1 and the second blue light-emitting element B_LED2 are connected in parallel to the blue sub-pixel SP_B, so that multiple blue light-emitting elements B_LED1 and B_LED2 may be provided in one blue sub-pixel SP_B. In addition, the sixth connection electrode CE6 may overlap with the first blue light-emitting element B_LED1, the first planarization layer PAC1, and the fifth connection electrode CE5, and overlap with at least a portion of the second blue light-emitting element G_LED2. A third planarization layer PAC3 may be provided on the second planarization layer PAC2. The third planarization layer PAC3 may be provided to cover all of the second planarization layer PAC2, the sixth connection electrode CE6, the first to third connection electrodes CE1-3, and the overcoat layer 115. Thus, the third planarization layer PAC3 may protect all components disposed below the third planarization layer PAC3. For example, the third planarization layer PAC3 may be made of a benzocyclobutene or acrylic-based organic material. However, the present invention is not limited thereto.

[0146] A light-emitting element configured by a light-emitting diode (LED) refers to a semiconductor light-emitting element that uses luminous properties when an electric current is applied to the semiconductor. The light-emitting element can be made of a compound semiconductor such as gallium arsenide (GaAs) or gallium nitride (GaN). Due to the properties of inorganic materials, high current can be injected into the compound semiconductor, so that the compound semiconductor can achieve high brightness and realize a display device with low power consumption. Therefore, compound semiconductors can be widely used in various display devices. Recently, technology for manufacturing high-resolution display devices by using micro-LEDs has been developed. Micro-LEDs have an excellent display current effect. When current is injected, the current is effectively injected into the active layer in the LED, so that the light output and current density per unit area can be improved compared to large-area LEDs.

[0147] However, in the case of micro-LEDs, the ratio of exposed sidewall area to light-emitting area increases compared to related-art large-area LEDs. This leads to a problem in which surface defect states on the sidewalls cause a rapid increase in non-radiative recombination, where electron-hole pairs cannot properly couple, and leakage current is generated. This problem causes a decrease in efficiency, resulting in a deterioration in external quantum efficiency (EQE), as current density increases.

[0148] At the same time, micro-LEDs can be configured into various types, such as lateral micro-LEDs, vertical micro-LEDs, or flip-chip micro-LEDs. In the case of lateral micro-LEDs and flip-chip micro-LEDs, the n-type electrode and the p-type electrode can be formed on the same plane. In contrast, in the case of vertical micro-LEDs with a vertical structure, the n-type electrode and the p-type electrode can be arranged in a vertical direction, so that the vertical micro-LEDs can be smaller in size than the lateral micro-LEDs and flip-chip micro-LEDs. Therefore, when vertical micro-LEDs occupying a small area are arranged in the same area, a display device with a higher resolution can be realized.

[0149] However, as mentioned above, as the size of micro-LEDs decreases, the ratio of exposed sidewall area to light-emitting area increases. Therefore, there is a problem in that the probability of non-radiative recombination and leakage current occurring on the sidewalls also increases. In particular, due to the differences in the components used for each micro-LED, the above-mentioned problem occurs more frequently in red light-emitting elements than in green and blue light-emitting elements. Specifically, the semiconductor layer of the red light-emitting element mainly includes gallium arsenide (GaAs), and the green and blue light-emitting elements mainly include gallium nitride (GaN). Because gallium arsenide (GaAs) has a larger diffusion constant than gallium nitride (GaN), the probability of non-radiative recombination and leakage current occurring in red light-emitting elements including gallium arsenide (GaAs) as a main component is higher than that in green or blue light-emitting elements including gallium nitride (GaN) as a main component. Therefore, in high-resolution display devices using vertical micro-LEDs, there is a problem in that the efficiency of the red light-emitting element deteriorates compared to the efficiency of the green or blue light-emitting elements.

[0150] Therefore, in the display device 100 according to an embodiment of the present specification, a red light-emitting element R_LED having a structure different from that of the green light-emitting element G_LED and the blue light-emitting element B_LED is provided in the red subpixel SP_R. For example, a flip-chip or lateral red light-emitting element R_LED may be provided in the red subpixel SP_R, and a vertical green light-emitting element G_LED and a blue light-emitting element B_LED may be provided in the green subpixel SP_G and the blue subpixel SP_B. As described above, a flip-chip or lateral red light-emitting element R_LED is provided in the red subpixel SP_R, instead of the vertical red light-emitting element R_LED, in which the probability of non-radiative recombination and leakage current occurring is high. Therefore, degradation of the luminous efficiency of the red subpixel SP_R can be suppressed.

[0151] Furthermore, green light emitting elements G_LED1 and G_LED2 and blue light emitting elements B_LED1 and B_LED2 as vertical types having excellent light emission efficiency are provided in the green sub-pixel SP_G and the blue sub-pixel SP_B, which may implement the display device 100 with high resolution.

[0152] At the same time, in the display device 100 according to the embodiment of the present specification, the green light-emitting element G_LED and the blue light-emitting element B_LED having a vertical structure can be arranged in the green sub-pixel SP_G and the blue sub-pixel SP_B. In this case, a plurality of green light-emitting elements G_LED and a plurality of blue light-emitting elements B_LED are arranged in each sub-pixel in the sub-pixel. Since the green light-emitting element G_LED and the blue light-emitting element B_LED having a vertical structure are smaller in size than the red light-emitting element R_LED, a plurality of light-emitting elements can be arranged in one sub-pixel. In addition, as the size of the light-emitting element decreases, the size of the electrode connected to the light-emitting element also decreases. As described above, as the light-emitting element and the electrode connected to the light-emitting element decrease in size, the area in which the green sub-pixel SP_G and the blue sub-pixel SP_B are arranged may decrease. Therefore, a larger number of sub-pixels can be arranged in the same area of ​​the display device, so that a display device with a higher resolution can be realized.

[0153] In addition, in the display device 100 according to the embodiment of the present specification, a plurality of green light-emitting elements G_LED1 and G_LED2 and a plurality of blue light-emitting elements B_LED1 and B_LED2 are connected in parallel to the green sub-pixel SP_G and the blue sub-pixel SP_B, respectively. The green light-emitting elements G_LED1 and G_LED2 and the blue light-emitting elements B_LED1 and B_LED2 connected in parallel as described above can be operated by a single driving transistor DT. Therefore, even if any one of the light-emitting elements provided in the green sub-pixel SP_G and the blue sub-pixel SP_B is defective, the other light-emitting element connected in parallel can replace the defective light-emitting element. Therefore, the degradation of image quality caused by defects in the green sub-pixel SP_G and the blue sub-pixel SP_B can be minimized.

[0154] Exemplary embodiments of this specification may also be described as follows:

[0155] According to one aspect of the present specification, a display device includes: a substrate on which a plurality of sub-pixels including red sub-pixels, green sub-pixels and blue sub-pixels are defined; a red light-emitting element, which is arranged in the red sub-pixel; a plurality of green light-emitting elements, which are arranged in the green sub-pixels and include a first green light-emitting element and a second green light-emitting element connected in parallel to the first green light-emitting element; and a plurality of blue light-emitting elements, which are arranged in the blue sub-pixels and include a first blue light-emitting element and a second blue light-emitting element connected in parallel to the first blue light-emitting element, wherein the red light-emitting element is structurally different from the plurality of green light-emitting elements and the plurality of blue light-emitting elements, and the plurality of green light-emitting elements and the plurality of blue light-emitting elements are structurally the same.

[0156] The red light emitting element may be larger in size than the plurality of green light emitting elements and the plurality of blue light emitting elements.

[0157] The red light emitting element may be a flip-chip type light emitting element, and the plurality of green light emitting elements and the plurality of blue light emitting elements may be vertical type light emitting elements.

[0158] The display device may further include: a transistor, which is arranged in each of a plurality of sub-pixels on the substrate; a power line, which is arranged in a plurality of sub-pixels on the substrate; a plurality of first connection electrodes, which are arranged on the power line in each of the plurality of sub-pixels and electrically connected to the power line; and a plurality of second connection electrodes, which are arranged on the transistor of each of the plurality of sub-pixels and electrically connected to the transistor, wherein the plurality of first connection electrodes may include: a first-first connection electrode arranged in a red sub-pixel; a first-second connection electrode arranged in a green sub-pixel; and a first-second connection electrode arranged in a blue sub-pixel. Three connecting electrodes, wherein the multiple second connecting electrodes may include: a second-first connecting electrode arranged in a red sub-pixel; a second-second connecting electrode arranged in a green sub-pixel; and a second-third connecting electrode arranged in a blue sub-pixel, wherein the red light-emitting element may be arranged on the first-first connecting electrode and the second-first connecting electrode, wherein the first green light-emitting element may be arranged on the first-second connecting electrode, wherein the second green light-emitting element may be arranged on the second-second connecting electrode, wherein the first blue light-emitting element may be arranged on the first-third connecting electrode, and wherein the second blue light-emitting element may be arranged on the second-third connecting electrode.

[0159] The first electrode of the red light emitting element may be disposed to face the first-first connection electrode, and the second electrode of the red light emitting element may be disposed to face the second-first connection electrode.

[0160] The first electrode of the first green light emitting element may be disposed to face the first-second connecting electrode, and the second electrode of the second green light emitting element may be disposed to face the second-second connecting electrode.

[0161] The display device may also include: a first planarization layer, which is arranged to surround the side surface of the first green light-emitting element and is configured to expose the second electrode of the first green light-emitting element; a third connecting electrode, which is arranged on the first planarization layer and is configured to connect the second-second connecting electrode and the second electrode of the first green light-emitting element; a second planarization layer, which is arranged to cover the first green light-emitting element, the first planarization layer, the third connecting electrode and the second green light-emitting element, and is configured to expose the first electrode of the second green light-emitting element; and a fourth connecting electrode, which is arranged on the second planarization layer and is configured to connect the first-second connecting electrode and the first electrode of the second green light-emitting element.

[0162] The fourth connection electrode may overlap the first green light emitting element, the first planarization layer, and the third connection electrode.

[0163] The first electrode of the first blue light emitting element may be disposed to face the first to third connection electrodes, and the second electrode of the second blue light emitting element may be disposed to face the second to third connection electrodes.

[0164] The display device may also include: a first planarization layer, which is arranged to cover the first blue light-emitting element and is configured to expose the second electrode of the first blue light-emitting element; a fifth connecting electrode, which is arranged on the first planarization layer and is configured to connect the second-third connecting electrodes and the second electrode of the first blue light-emitting element; a second planarization layer, which is arranged to cover the first blue light-emitting element, the first planarization layer, the fifth connecting electrode and the second blue light-emitting element, and is configured to expose the first electrode of the second blue light-emitting element; and a sixth connecting electrode, which is arranged on the second planarization layer and is configured to connect the first-third connecting electrodes and the first electrode of the second blue light-emitting element.

[0165] The sixth connection electrode may overlap the first blue light emitting element, the first planarization layer, and the fifth connection electrode.

[0166] A top surface area of ​​the first-first connection electrode may be greater than that of the first-second connection electrode and the first-third connection electrode, and a top surface area of ​​the second-first connection electrode may be greater than that of the second-second connection electrode and the second-third connection electrode.

[0167] Although the exemplary embodiments of this specification are described in detail with reference to the accompanying drawings, this specification is not limited thereto and can be implemented in many different forms without departing from the technical concept of this specification. Therefore, the exemplary embodiments of this specification are provided for illustrative purposes only and are not intended to limit the technical concept of this specification. The scope of the technical concept of this specification is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are illustrative in all aspects and do not limit this specification. All technical concepts within the equivalent scope of this specification should be interpreted as falling within the scope of this specification.

Claims

1. A display device, comprising: a substrate on which a plurality of sub-pixels including a red sub-pixel, a green sub-pixel, and a blue sub-pixel are defined; a red light-emitting element, the red light-emitting element being disposed in the red sub-pixel; a plurality of green light-emitting elements, the plurality of green light-emitting elements being disposed in the green sub-pixels and including a first green light-emitting element and a second green light-emitting element connected in parallel to the first green light-emitting element; as well as a plurality of blue light-emitting elements, the plurality of blue light-emitting elements being provided in the blue sub-pixels and including a first blue light-emitting element and a second blue light-emitting element connected in parallel to the first blue light-emitting element, The red light emitting element is structurally different from the plurality of green light emitting elements and the plurality of blue light emitting elements, and The plurality of green light emitting elements and the plurality of blue light emitting elements are identical in structure.

2. The display device according to claim 1, wherein The red light emitting element is larger in size than the plurality of green light emitting elements and the plurality of blue light emitting elements.

3. The display device according to claim 1, wherein The red light emitting element is a flip-chip type light emitting element, and the plurality of green light emitting elements and the plurality of blue light emitting elements are vertical type light emitting elements.

4. The display device according to claim 1, further comprising: a transistor in each of the plurality of sub-pixels disposed on the substrate; lines of force in the plurality of sub-pixels disposed on the substrate; a plurality of first connection electrodes disposed on the power line in each of the plurality of sub-pixels and electrically connected to the power line; as well as a plurality of second connection electrodes disposed on the transistor in each of the plurality of sub-pixels and electrically connected to the transistor, Wherein, the plurality of first connection electrodes include: a first-first connecting electrode provided in the red sub-pixel; A first-second connection electrode provided in the green sub-pixel; and First to third connection electrodes are provided in the blue sub-pixel, Wherein, the plurality of second connection electrodes include: a second-first connecting electrode provided in the red sub-pixel; A second-second connection electrode provided in the green sub-pixel; and The second to third connection electrodes are provided in the blue sub-pixel, Wherein, the red light emitting element is arranged on the first-first connecting electrode and the second-first connecting electrode, wherein the first green light emitting element is disposed on the first-second connecting electrode, wherein the second green light emitting element is disposed on the second-second connecting electrode, wherein the first blue light emitting element is disposed on the first-third connecting electrode, and Wherein, the second blue light emitting element is arranged on the second-third connecting electrodes.

5. The display device according to claim 4, wherein The first electrode of the red light emitting element is arranged to face the first-first connecting electrode, and The second electrode of the red light emitting element is arranged to face the second-first connecting electrode. The display device according to claim 4 , wherein: The first electrode of the first green light emitting element is arranged to face the first-second connecting electrode, and The second electrode of the second green light emitting element is arranged to face the second-second connecting electrode.

7. The display device according to claim 6, further comprising: a first planarization layer disposed to surround a side surface of the first green light emitting element and configured to expose the second electrode of the first green light emitting element; a third connecting electrode, the third connecting electrode being provided on the first planarization layer and configured to connect the second-second connecting electrode and the second electrode of the first green light emitting element; a second planarization layer, the second planarization layer being provided to cover the first green light emitting element, the first planarization layer, the third connection electrode, and the second green light emitting element, and being configured to expose the first electrode of the second green light emitting element; as well as A fourth connecting electrode is provided on the second planarization layer and is configured to connect the first-second connecting electrode and the first electrode of the second green light emitting element.

8. The display device according to claim 7, wherein: The fourth connection electrode overlaps the first green light emitting element, the first planarization layer, and the third connection electrode.

9. The display device according to claim 4, wherein: The first electrode of the first blue light emitting element is arranged to face the first to third connecting electrodes, and The second electrode of the second blue light emitting element is disposed to face the second-third connecting electrodes.

10. The display device according to claim 9, further comprising: a first planarization layer, the first planarization layer being provided to cover the first blue light-emitting element and configured to expose the second electrode of the first blue light-emitting element; a fifth connecting electrode, the fifth connecting electrode being provided on the first planarization layer and configured to connect the second-third connecting electrodes and the second electrode of the first blue light-emitting element; a second planarization layer, the second planarization layer being provided to cover the first blue light emitting element, the first planarization layer, the fifth connection electrode, and the second blue light emitting element, and being configured to expose the first electrode of the second blue light emitting element; as well as A sixth connecting electrode is provided on the second planarization layer and is configured to connect the first to third connecting electrodes and the first electrode of the second blue light emitting element. The display device according to claim 10 , wherein: The sixth connection electrode overlaps the first blue light emitting element, the first planarization layer, and the fifth connection electrode.

12. The display device according to claim 4, wherein The area of ​​the top surface of the first-first connection electrode is larger than the area of ​​the top surface of each of the first-second connection electrode and the first-third connection electrode, and An area of ​​a top surface of the second-first connection electrode is larger than an area of ​​a top surface of each of the second-second connection electrode and the second-third connection electrode.

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