A radio frequency front end with low error vector magnitude

Abstract

The application relates to the field of communication technology and discloses a radio frequency front end with low error vector magnitude, which comprises an antenna switch, an FDD signal filter, a TDD signal filter, a phase compensation load, a first antenna and a second antenna connected with the antenna switch respectively, and is used for keeping the FDD signal receiving and transmitting path connected and dynamically switching the receiving path and the transmitting path of the TDD signal in a dual connection scene; when the TDD signal receiving path is switched, the phase compensation load is disconnected with the FDD signal path; when the TDD signal transmitting path is switched, the phase compensation load is connected with the FDD signal path, the impedance characteristics of the TDD signal filter in the FDD signal frequency band are simulated, the load phase of the load driven by the FDD signal path is consistent with the load phase when the TDD signal is in the receiving state, and the error vector magnitude of the transmitted FDD signal is reduced. The application can keep a low error vector magnitude in the ENDC scene and improve the communication quality in the scene.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and more particularly to a radio frequency front end with low error vector amplitude. Background Art

[0002] The development of 5G communication technology, with its large bandwidth, high speed, and low latency, has greatly increased the efficiency of information transmission in wireless communications. However, the core networks and base station equipment of telecommunications operators are currently largely based on the fourth-generation Long Term Evolution (LTE) communication technology. With the 5G network deployment still pending, E-UTRA New Radio Dual-Connection (ENDC) has emerged to fully utilize the network resources of the fourth-generation wireless communication technology. This technology allows wireless terminal devices to access both the fourth-generation and fifth-generation wireless communication networks simultaneously.

[0003] However, in actual applications, when the RF front-end of a wireless terminal device switches between the fourth-generation wireless communication network and the fifth-generation wireless communication network, due to changes in the back-end load environment, a higher error vector amplitude will appear in the frequency band of the fourth-generation wireless communication, which significantly reduces the communication quality and affects the user experience of the wireless terminal in this scenario. Summary of the Invention

[0004] The purpose of the present invention is to propose a radio frequency front end with low error vector magnitude (EVM), so as to maintain a low EVM in an ENDC scenario and improve the communication quality in the scenario.

[0005] To achieve the above objectives, the present invention proposes a low error vector magnitude radio frequency front end, comprising:

[0006] An antenna switch, and an FDD signal filter, a TDD signal filter, a phase compensation load, a first antenna, and a second antenna respectively connected to the antenna switch, wherein a TDD signal transmission path is formed from the TDD signal filter through the antenna switch to the second antenna, a TDD signal reception path is formed from the first antenna through the antenna switch to the TDD signal filter, a FDD signal transmission path is formed from the FDD signal filter through the antenna switch to the first antenna, and a FDD signal reception path is formed from the first antenna through the antenna switch to the FDD signal filter;

[0007] The antenna switch is used to: in a dual-connection scenario of FDD and TDD signals, maintain connectivity of the FDD signal transceiver path and dynamically switch between the TDD signal receiving path and the TDD signal transmitting path; wherein, when switching to the TDD signal receiving path, the phase compensation load is disconnected from the FDD signal path;

[0008] When switching to the TDD signal transmission path, the phase compensation load is connected to the FDD signal path. The phase compensation load simulates the impedance characteristics of the TDD signal filter in the FDD signal frequency band, so that the load driven by the FDD signal path is consistent with the load phase when the TDD signal is in the receiving state, thereby reducing the error vector amplitude of the transmitted FDD signal.

[0009] Optionally, the antenna switch includes a shared node, a first switch, and a second switch;

[0010] The FDD signal filter is connected to the first antenna through the shared node;

[0011] The first switch is configured to: connect the TDD signal filter to the second antenna to switch to the TDD signal transmission path when a TDD signal transmission instruction is detected; and connect the TDD signal filter to the first antenna to switch to the FDD frequency band signal path when a TDD signal reception instruction is detected. In this case, the TDD signal and the FDD signal share the first antenna;

[0012] The second switch is used to: synchronously close when TDD signals are transmitted, connect the phase compensation load to the shared node, and connect the phase compensation load to the FDD signal path; and disconnect the phase compensation load from the shared node when TDD signals are received.

[0013] Optionally, the phase compensation load includes an LC parallel resonant circuit;

[0014] The LC parallel resonant circuit includes a resonant inductor and a resonant capacitor. The first end of the resonant inductor and the first end of the resonant capacitor are connected in parallel to the shared node of the antenna switch through a second switch, and the second end of the resonant inductor and the second end of the resonant capacitor are grounded.

[0015] Optionally, the calculation formula for the resonant inductance value and the resonant capacitance value in the LC parallel resonant circuit is:

[0016] (1)

[0017] (2)

[0018] in, is the starting angular frequency of the FDD signal, is the FDD signal termination angular frequency, L is the resonant inductance value, C is the resonant capacitance value, For TDD signal filters The imaginary part of the impedance at For TDD signal filters The imaginary part of the impedance at , j is the imaginary unit;

[0019] Solve the above equation for the inductance value get:

[0020] (3)

[0021] Substituting formula (3) into (1) yields the capacitance value .

[0022] Optionally, when there is and The value of and When both are 0, the phase compensation load only includes one capacitor;

[0023] When there is and The value of and When both are 0, the phase compensation load only includes one inductor.

[0024] Optionally, when the load phase range of the LC parallel resonant circuit is consistent with the load phase span of the TDD signal filter in the FDD signal channel but the start and end points are inconsistent, the phase compensation load further includes a phase shift network;

[0025] The phase shifting network is used to shift the phase of the LC parallel resonant circuit so that the load phase presented by the phase compensation load is consistent with the load phase presented by the TDD signal filter in the FDD signal channel;

[0026] When the load phase of the LC parallel resonant circuit lags behind the load phase of the TDD signal filter in the FDD signal channel, the phase shift network is a lead compensation type phase shift network;

[0027] When the load phase of the LC parallel resonant circuit is ahead of the load phase of the TDD signal filter in the FDD signal channel, the phase-shifting network is a hysteresis-compensation phase-shifting network.

[0028] Optionally, the leading compensation type phase-shifting network includes: a first phase-shifting capacitor, a first phase-shifting inductor, and a second phase-shifting inductor;

[0029] The first end of the first phase-shifting capacitor is connected to the first end of the resonant capacitor, the first end of the first phase-shifting inductor is connected to the first end of the first phase-shifting capacitor, the first end of the second phase-shifting inductor is connected to the second end of the first phase-shifting capacitor, and the second end of the first phase-shifting inductor and the second end of the second phase-shifting inductor are grounded.

[0030] Optionally, the calculation formulas for the first phase-shifting capacitance value, the first phase-shifting inductance value, and the second phase-shifting inductance value in the lead-compensation phase-shifting network are:

[0031] (4)

[0032] (5)

[0033] in, is the system characteristic impedance, ω is the center angular frequency of the FDD signal, θ is the phase advance value of the phase shift network, , are the first phase-shift inductance value and the second phase-shift inductance value respectively, and C is the first phase-shift capacitance value.

[0034] Optionally, the hysteresis compensation type phase shift network includes: a first phase shift inductor, a first phase shift capacitor and a second phase shift capacitor;

[0035] The first end of the first phase-shifting inductor is connected to the first end of the resonant capacitor, the first end of the first phase-shifting capacitor is connected to the first end of the first phase-shifting inductor, the first end of the second phase-shifting capacitor is connected to the second end of the first phase-shifting inductor, and the second end of the first phase-shifting capacitor and the second end of the second phase-shifting capacitor are grounded.

[0036] Optionally, the calculation formulas for the first phase-shift inductance value, the first phase-shift capacitance value, and the second phase-shift capacitance value in the hysteresis-compensation phase-shift network are:

[0037] (6)

[0038] (7)

[0039] in, is the system characteristic impedance, ω is the center angular frequency of the FDD signal, , are the first phase-shifting capacitance value and the second phase-shifting capacitance value respectively, L is the first phase-shifting inductance value, and θ is the phase lag value of the phase-shifting network.

[0040] Optionally, the leading compensation type phase-shifting network includes: a first phase-shifting capacitor, a second phase-shifting capacitor and a first phase-shifting inductor;

[0041] The first end of the first phase-shifting capacitor is connected to the first end of the resonant capacitor, the first end of the second phase-shifting capacitor is connected to the second end of the first phase-shifting capacitor, the first end of the first phase-shifting inductor is connected to the second end of the first phase-shifting capacitor, and the second end of the first phase-shifting inductor is grounded.

[0042] Optionally, the calculation formulas for the first phase-shifting capacitance value, the second phase-shifting capacitance value, and the first phase-shifting inductance value in the lead-compensation phase-shifting network are as follows:

[0043] (8)

[0044] (9)

[0045] in, is the system characteristic impedance, ω is the center angular frequency of the FDD signal, , are the first phase-shifting capacitance value and the second phase-shifting capacitance value respectively, L is the first phase-shifting inductance value, and θ is the phase lead value of the phase-shifting network.

[0046] Optionally, the hysteresis compensation type phase shift network includes: a first phase shift inductor, a second phase shift inductor and a first phase shift capacitor;

[0047] The first end of the first phase-shift inductor is connected to the first end of the resonant capacitor, the first end of the second phase-shift inductor is connected to the second end of the first phase-shift inductor, the first end of the first phase-shift capacitor is connected to the second end of the first phase-shift inductor, and the second end of the first phase-shift capacitor is grounded.

[0048] Optionally, the calculation formulas for the first phase-shift inductance value, the second phase-shift inductance value, and the first phase-shift capacitance value in the hysteresis-compensation phase-shift network are as follows:

[0049] (10)

[0050] (11)

[0051] in, is the system characteristic impedance, ω is the center angular frequency of the FDD signal, θ is the phase lag value of the phase shift network, , are the first phase-shift inductance value and the second phase-shift inductance value respectively, and C is the first phase-shift capacitance value.

[0052] Optionally, the FDD signal filter is an LTE filter, and the TDD signal filter is an NR filter;

[0053] The FDD signal is an LTE frequency band signal, and the TDD signal is an NR frequency band signal.

[0054] The FDD signal and TDD signal dual connection scenario is an ENDC dual connection scenario.

[0055] Optionally, the first antenna is a middle frequency main set antenna, and the second antenna is a high frequency main set antenna.

[0056] The present application has the following advantages:

[0057] The low error vector magnitude radio frequency front end of the present application, in the FDD signal and TDD signal dual connection mode, when the TDD signal is in the transmitting state, a phase compensation load consistent with the impedance of the TDD signal filter in the FDD signal channel is connected to the FDD signal channel through an antenna switch, and when the TDD signal is in the receiving state and accesses the FDD signal channel, the phase compensation load is disconnected, so that when the TDD signal is in the transmitting state, the impedance characteristics of the TDD signal filter in the FDD signal channel are simulated through the phase compensation load, the phase of the load driven by the FDD signal channel is consistent with the phase of the load when the TDD signal is in the receiving state, so that the phase of the load driven by the FDD signal channel is in a relatively stable state within the transmission and reception timing of the TDD signal, thereby improving the transmission quality of the FDD signal and reducing the error vector magnitude.

[0058] The system of the present application has other characteristics and advantages, which will be apparent or will be described in detail in the accompanying drawings and subsequent detailed description incorporated herein, which together serve to explain the specific principles of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0059] The above and other objects, features and advantages of the present application will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings in which like reference characters refer to like parts throughout the several views.

[0060] Figure 1 It is a schematic diagram of a traditional ENDC radio frequency front end structure.

[0061] Figure 2 It is a schematic diagram of a low error vector magnitude radio frequency front end of embodiment 1 of the present application.

[0062] Figure 3 It is a circuit diagram of the phase compensation load in embodiment 1 of the present application.

[0063] Figure 4 It is a circuit diagram of the phase compensation load in embodiment 2 of the present application.

[0064] Figure 5 This is a circuit diagram of the phase compensation load in Example 3 of the present invention.

[0065] Figure 6 This is a circuit diagram of the phase compensation load in Example 4 of the present invention.

[0066] Figure 7 This is a circuit diagram of the phase compensation load in Example 5 of the present invention.

[0067] Figure 8 and Figure 9 They are respectively the constellation diagrams of the LTE band transmitted signal when the NR band signal is switched to be transmitted and received in the TDD mode in the ENDC dual connection mode using the traditional RF front end and the RF front end of the present invention. DETAILED DESCRIPTION

[0068] The traditional ENDC RF front-end structure is as follows Figure 1 As shown in the figure, in the ENDC scenario, the NR band operates in TDD (time division duplex) mode. Its transmit path is from NR filter 4 through antenna switch 3 to the high-frequency main antenna 2. Its receive path is from the intermediate-frequency main antenna 1 to antenna switch 3, and then to NR filter 4. The LTE band operates in FDD (frequency division duplex) mode. Its transmit path is from LTE filter 5 through antenna switch 3 to the intermediate-frequency main antenna 1. The receive path overlaps with the transmit path but in opposite directions. Because NR band signals operating in TDD mode need to switch between transmit and receive states based on timing, in a traditional RF front-end architecture, when node 7 is transmitting in the NR band, only one path is connected, for the LTE band signal. When the NR band is receiving, both the LTE band and NR band signals are connected. This causes the load on the FDD band path to continuously change with the timing of the NR signal, significantly degrading the error vector magnitude (EVM) of the transmitted signal, affecting the quality of the transmitted signal and the throughput of the wireless terminal in dual connectivity mode.

[0069] To solve the above problems, the present invention proposes an improved low EVM RF front end, which can maintain a low EVM in ENDC scenarios by adopting load phase compensation technology, thereby greatly improving the communication quality in this scenario.

[0070] The core technical point of the application is that, in a FDD and TDD signal dual connection mode (such as an ENDC scenario of LTE frequency band signal and NR frequency band signal dual connection), when the TDD signal is in a transmitting state, a phase compensation load consistent with the impedance of a TDD signal filter (such as an NR filter) in the FDD signal frequency band is connected to the FDD signal channel, and when the TDD signal is in a receiving state and accesses the FDD signal channel, the phase compensation load is disconnected, so that the phase of the load driven by the FDD signal channel is in a relatively stable state within the transmission and reception timing of the TDD signal, thereby improving the transmission quality of the FDD signal and reducing the error vector magnitude.

[0071] The application will be described in more detail with reference to the drawings. Although the preferred embodiments of the application are shown in the drawings, it should be understood that the application can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided so that the application is more thorough and complete, and the scope of the application is fully conveyed to those skilled in the art.

[0072] Example 1

[0073] As shown in Figure 2 , the embodiment provides a radio frequency front end with low error vector magnitude, comprising:

[0074] an antenna switch 103, and an FDD signal filter 105, a TDD signal filter 104, a phase compensation load 106, a first antenna 101 and a second antenna 102 connected with the antenna switch 103 respectively, wherein a transmitting path of the TDD signal is formed by the TDD signal filter 104 through the antenna switch 103 to the second antenna 102, a receiving path of the TDD signal is formed by the first antenna 101 through the antenna switch 103 to the TDD signal filter 104, a transmitting path of the FDD signal is formed by the FDD signal filter 105 through the antenna switch 103 to the first antenna 101, and a receiving path of the FDD signal is formed by the first antenna 101 through the antenna switch 103 to the FDD signal filter 105;

[0075] The antenna switch 103 is used to keep the FDD signal transmitting and receiving path connected and dynamically switch the receiving path and the transmitting path of the TDD signal in a FDD signal and TDD signal dual connection scenario; when switching to the TDD signal receiving path, the phase compensation load 106 is disconnected from the FDD signal path;

[0076] When switching to the TDD signal transmission path, the phase compensation load 106 is connected to the FDD signal path. The phase compensation load 106 simulates the impedance characteristics of the TDD signal filter 104 within the FDD signal frequency band, so that the load driven by the FDD signal path is consistent with the load phase when the TDD signal is in the receiving state, thereby reducing the error vector magnitude of the transmitted FDD signal.

[0077] In this embodiment, the antenna switch 103 includes a shared node, a first switch, and a second switch;

[0078] The FDD signal filter 105 is connected to the first antenna 101 via a shared node 107;

[0079] The first switch is used to connect the TDD signal filter 104 to the second antenna 102 to switch to the TDD signal transmission path when a TDD signal transmission instruction is detected, and to connect the TDD signal filter 104 to the first antenna 101 to switch to the FDD frequency band signal path when a TDD signal reception instruction is detected. In this case, the TDD signal and the FDD signal share the first antenna 101;

[0080] The second switch is used to: synchronously close when TDD signals are transmitted, connect the phase compensation load 106 to the shared node 107, and connect the phase compensation load 106 to the FDD signal path; disconnect the phase compensation load 106 from the shared node 107 when TDD signals are received.

[0081] In this embodiment, the dual-connection scenario of FDD and TDD signals is an ENDC dual-connection scenario. Accordingly, the FDD signal is an LTE frequency band signal, and the TDD signal is an NR frequency band signal; the FDD signal filter 105 is an LTE filter, and the TDD signal filter 104 is an NR filter. Preferably, the first antenna 101 is a mid-frequency main antenna, and the second antenna 102 is a high-frequency main antenna.

[0082] like Figure 3 As shown, in this embodiment, the phase compensation load 106 includes an LC parallel resonant circuit 200;

[0083] The LC parallel resonant circuit 200 includes a resonant inductor 201 and a resonant capacitor 202. The first end of the resonant inductor 201 and the first end of the resonant capacitor 202 are connected and then connected in parallel to the shared node 107 of the antenna switch 103 through a second switch, thereby accessing the FDD signal path (LTE band signal path). The second end of the resonant inductor 201 and the second end of the resonant capacitor 202 are grounded.

[0084] Specifically, resonant inductor 201 and resonant capacitor 202 form an LC parallel resonant circuit 200. When transmitting NR-band signals, this LC parallel resonant circuit 200 is connected to antenna switch 103 via node 203. By controlling the resonant frequency and specific capacitance and inductance values, the impedance presented by this LC parallel resonant circuit 200 within the LTE band can closely match the impedance presented by NR filter 104 within the LTE band. This allows FDD filter 105 (LTE filter) to drive a similar load when transmitting or receiving NR-band signals, thereby improving the quality of the transmitted signal.

[0085] The following mathematically illustrates this principle by calculating the impedance of the phase compensation load 106:

[0086] Assume that the angular frequency range of the LTE band is arrive , the values ​​of the resonant inductor 201 and the resonant capacitor 202 are and ,NR band filter in Chuhe The impedances presented at and , since the impedance of the NR band filter suitable for dual connection in the LTE band is close to total reflection, and is approximately 0. If the impedance of the phase compensation load 106 is to be the same as the impedance presented by the NR band filter in the LTE band, then:

[0087] (1)

[0088] (2)

[0089] in, The TDD signal filter 104 (NR filter) is The imaginary part of the impedance at The TDD signal filter 104 (NR filter) is The imaginary part of the impedance at , j is the imaginary unit;

[0090] Solve the above equation for the inductance value get:

[0091] (3)

[0092] Substituting formula (3) into (1) yields the capacitance value .

[0093] Therefore there is a set of definite and Considering the actual dual-connection application requirements, the impedance of the NR band filter in the LTE band is generally more convergent, so the above-mentioned LC parallel resonant circuit 200 can meet the application requirements in most cases.

[0094] Compared to a traditional RF front-end, also in the ENDC scenario, in the low EVM RF front-end of this embodiment, when the NR band is in the transmitting state, node 107 is no longer connected to a single path for the LTE band signal, but is instead connected to a phase compensation load 106 (i.e., LC parallel resonant circuit 200). When the NR band is in the receiving state, phase compensation load 106 is disconnected, and the NR band signal path is connected to node 106. This configuration ensures that the load driven by the LTE band signal path when the NR band signal is in the transmitting state is in phase with the load when the NR band signal is in the receiving state, thereby significantly reducing the EVM of the LTE band transmit signal and improving the throughput of the wireless terminal in dual connectivity mode.

[0095] In particular, when there is and The value of and When both are 0, the phase compensation load 106 only includes one capacitor, that is, in this case, the phase compensation load 106 structure only needs one capacitor to achieve phase compensation; when there is and The value of and When both are 0, the phase compensation load 106 only includes one inductor, that is, in this case, the phase compensation load 106 only needs one inductor to achieve phase compensation. These two structures have no essential difference from the present invention in principle, and therefore both fall within the scope of protection of the present invention.

[0096] Example 2

[0097] This embodiment provides a radio frequency front end with low error vector amplitude. The difference between this embodiment and embodiment 1 is that the phase compensation load 106 in this embodiment is Figure 3 The LC parallel resonant circuit 200 is additionally provided with a phase shifting network.

[0098] Specifically, when the load phase range of the LC parallel resonant circuit 200 is consistent with the load phase (impedance phase) span of the TDD signal filter 104 (NR filter) within the LTE frequency band but the start and end points are inconsistent, the phase compensation load 106 further includes a phase shifting network; the phase shifting network is used to shift the phase of the LC parallel resonant circuit 200 so that the load phase presented by the phase compensation load 106 is consistent with the load phase presented by the TDD signal filter 104 (NR filter) within the LTE frequency band; wherein, when the load phase of the LC parallel resonant circuit 200 lags behind the load phase of the TDD signal filter 104 (NR filter) within the LTE frequency band, the phase shifting network is a lead-compensation phase shifting network; when the load phase of the LC parallel resonant circuit 200 leads the load phase of the TDD signal filter 104 (NR filter) within the LTE frequency band, the phase shifting network is a lag-compensation phase shifting network.

[0099] In this embodiment, the phase compensation load 106 includes an LC parallel resonant circuit 200 and a lead compensation type phase shift network, such as Figure 4 As shown, the leading compensation type phase shift network 303 includes: a first phase shift capacitor 304, a first phase shift inductor 305 and a second phase shift inductor 306;

[0100] The first end of the first phase-shifting capacitor 304 is connected to the first end of the resonant capacitor 202, the first end of the first phase-shifting inductor 305 is connected to the first end of the first phase-shifting capacitor 304, the first end of the second phase-shifting inductor 306 is connected to the second end of the first phase-shifting capacitor 304, and the second end of the first phase-shifting inductor 305 and the second end of the second phase-shifting inductor 306 are grounded.

[0101] Specifically, if Figure 4 As shown, this embodiment Figure 3 Based on the LC parallel resonant circuit 200 shown, an advance compensation type phase shift network 303 is added, which is composed of a first phase shift inductor 305, a first phase shift capacitor 304, and a second phase shift inductor 306. When the phase range of the LC parallel resonant circuit 200 is consistent with the phase span of the TDD signal filter 104 (NR filter) in the LTE frequency band, but the start and end points are inconsistent (in actual applications, there are multiple groups of phase shifters). and The value of can satisfy this premise), and then the phase of the phase compensation load 106 is shifted by the lead compensation type phase shift network 303, so that the load presented by the phase compensation load 106 is consistent with the load phase presented by the NR filter 104.

[0102] The working principle of the lead compensation type phase shift network 303 in this embodiment will be explained from a mathematical perspective as follows: Assuming that the inductance of the first phase shift inductor 305 is The inductance of the second phase-shift inductor 306 is , the capacitance of the first phase-shifting capacitor 304 is , assuming that the phase lead value of the phase shift network is , the central angular frequency of the LTE band is , then:

[0103] (4)

[0104] (5)

[0105] in, is the system characteristic impedance.

[0106] So there is a set of definite , and The phase advance value of the phase shift network 303 can be made , thereby achieving more flexible adjustment of the phase of the phase compensation load 106, avoiding and The value is beyond the practical application range.

[0107] The network can compensate the phase of the load 106 by an angle of Advance adjustment.

[0108] Example 3

[0109] This embodiment provides another RF front end with low error vector amplitude. The difference between this embodiment and embodiment 2 is that the phase shift network in this embodiment is a hysteresis compensation type phase shift network, such as Figure 5 As shown, the phase compensation load 106 in this embodiment includes an LC parallel resonant circuit 200 and a hysteresis compensation type phase shift network 403 .

[0110] In this embodiment, the hysteresis compensation type phase shift network 403 includes: a first phase shift inductor 404, a first phase shift capacitor 405 and a second phase shift capacitor 406;

[0111] The first end of the first phase-shifting inductor 404 is connected to the first end of the resonant capacitor 202, the first end of the first phase-shifting capacitor 405 is connected to the first end of the first phase-shifting inductor 404, the first end of the second phase-shifting capacitor 406 is connected to the second end of the first phase-shifting inductor 404, and the second end of the first phase-shifting capacitor 405 and the second end of the second phase-shifting capacitor 406 are grounded.

[0112] Specifically, in this embodiment Figure 3Based on the LC parallel resonant circuit 200 shown in FIG, a hysteresis compensation type phase shift network 403 consisting of a first phase shift capacitor 405, a second phase shift capacitor 406 and a first phase shift inductor 404 is added (as shown in FIG. Figure 4 The positions of the inductor and capacitor in the leading compensation phase shift network 303 are swapped to achieve phase lag), and this structure forms the following Figure 5 A lag compensation type phase compensation load circuit, if it is necessary to make the phase lag , assuming that the values ​​of the first phase-shifting capacitor 405, the second phase-shifting capacitor 406 and the first phase-shifting inductor 404 are , and , then:

[0113] (6)

[0114] (7)

[0115] in, is the system characteristic impedance, and ω is the center angular frequency of the LTE band.

[0116] The network can compensate the phase of the load 106 by an angle of hysteresis adjustment.

[0117] Example 4

[0118] This embodiment provides a radio frequency front end with low error vector amplitude. This embodiment and embodiment 2 also use a lead compensation type phase shift network. The difference is that the lead compensation type phase shift network in this embodiment has a different structure from that in embodiment 2. Figure 6 As shown, the phase compensation load 106 in this embodiment includes an LC parallel resonant circuit 200 and a leading compensation type phase shift network 503 .

[0119] In this embodiment, the leading compensation type phase shift network 503 includes: a first phase shift capacitor 505, a second phase shift capacitor 506 and a first phase shift inductor 504;

[0120] The first end of the first phase-shifting capacitor 505 is connected to the first end of the resonant capacitor 202, the first end of the second phase-shifting capacitor 506 is connected to the second end of the first phase-shifting capacitor 505, the first end of the first phase-shifting inductor 504 is connected to the second end of the first phase-shifting capacitor 505, and the second end of the first phase-shifting inductor 504 is grounded.

[0121] Specifically, if Figure 6 As shown, this embodiment Figure 3Based on the shown LC parallel resonant circuit 200, the present embodiment adds a leading compensation type phase shift network 503 composed of a first phase shift inductance 504, a first phase shift capacitance 505 and a second phase shift capacitance 506. In the case that the phase range of the LC parallel resonant circuit 200 is consistent with the phase span of the TDD signal filter 104 (NR filter) in the LTE frequency band but the start and end points are inconsistent (in actual applications, there are multiple groups of With , the value of which can meet the previous premise), the leading compensation type phase shift network 503 is used to phase shift the phase of the phase compensation load 106, so that the load presented by the phase compensation load 106 is consistent with the load phase presented by the TDD signal filter 104 (NR filter).

[0122] The working principle of the leading compensation type phase shift network 503 will be explained from a mathematical point of view below: assuming that the capacitance value of the first phase shift capacitance 505 is , the inductance value of the second phase shift capacitance 506 is , the inductance value of the first phase shift inductance 504 is , assuming that the phase leading value of the phase shift network is , and the center angular frequency of the LTE frequency band is , then:

[0123] (8)

[0124] (9)

[0125] wherein is the system characteristic impedance.

[0126] Therefore, there is a certain , and that can make the phase leading value of the phase shift network 303 be , so as to realize more flexible adjustment of the phase of the phase compensation load 106, and avoid the values of and exceeding the actual application range.

[0127] The network can adjust the phase of the phase compensation load 106 by a leading angle of .

[0128] Example 5

[0129] This embodiment provides another RF front end with low error vector amplitude. This embodiment and embodiment 3 also use a hysteresis compensation type phase shift network. The difference is that the hysteresis compensation type phase shift network in this embodiment has a different structure from that in embodiment 3. Figure 7 As shown, the phase compensation load 106 in this embodiment includes an LC parallel resonant circuit 200 and a hysteresis compensation type phase shift network 603 .

[0130] In this embodiment, the hysteresis compensation type phase shift network 603 includes: a first phase shift inductor 605, a second phase shift inductor 606 and a first phase shift capacitor 604;

[0131] The first end of the first phase-shifting inductor 605 is connected to the first end of the resonant capacitor 202, the first end of the second phase-shifting inductor 606 is connected to the second end of the first phase-shifting inductor 605, the first end of the first phase-shifting capacitor 604 is connected to the second end of the first phase-shifting inductor 605, and the second end of the first phase-shifting capacitor 604 is grounded.

[0132] Specifically, in this embodiment Figure 3 Based on the LC parallel resonant circuit 200 shown in FIG, a hysteresis compensation type phase shift network 603 (which will be shown in FIG. 6 ) consisting of a first phase shift inductor 605, a second phase shift inductor 606 and a first phase shift capacitor 604 is added. Figure 6 The positions of the inductor and capacitor in the leading compensation phase shift network 503 are swapped to achieve phase lag), and this structure forms the following Figure 7 A lag compensation type phase compensation load circuit, if it is necessary to make the phase lag ,, assuming that the values ​​of the first phase-shift inductor 605, the second phase-shift inductor 606 and the first phase-shift capacitor 604 are , and C, then:

[0133] (10)

[0134] (11)

[0135] in, is the system characteristic impedance, and ω is the center angular frequency of the LTE band.

[0136] The network can compensate the phase of the load 106 by an angle of hysteresis adjustment.

[0137] further, Figure 8 and Figure 9 They are the test results before and after the application of the above embodiment of the present invention (such as embodiment 1), Figure 8It can be known that, before the phase compensation load 106 structure of the application is applied, the constellation diagram of the LTE frequency band transmitting signal is obviously distorted when the NR frequency band signal in the ENDC dual connection mode is switched in the TDD mode, and the error vector magnitude is 1.89%. Figure 9 It can be known that, after the phase compensation load 106 structure of the application is applied, the constellation diagram of the LTE frequency band transmitting signal is less distorted in the above-mentioned scenario, and the error vector magnitude is 1.16%, which is improved by 0.73% compared with the original structure error vector magnitude.

[0138] Therefore, the low error vector magnitude radio frequency front end which can be applied to the ENDC dual connection scenario can ensure that the error vector magnitude of the LTE frequency band signal is at a low level when the NR signal in the ENDC dual connection scenario is switched in the TDD mode by accessing the phase compensation load 106. Moreover, the structure is simple and easy to implement, and the transmission quality of the LTE frequency band signal in the ENDC dual connection mode is effectively improved.

[0139] In addition, it should be noted that the technical solutions of the application are also applicable to other FDD signal and TDD signal dual connection application scenarios, such as the LTE-FDD and LTE-TDD dual connection scenario.

[0140] The above has described the embodiments of the application, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes are obvious to those skilled in the art without departing from the scope and spirit of the described embodiments.

Claims

1. A low error vector magnitude radio frequency front end, characterized in that: include: An antenna switch, and an FDD signal filter, a TDD signal filter, a phase compensation load, a first antenna, and a second antenna respectively connected to the antenna switch, wherein a TDD signal transmission path is formed from the TDD signal filter through the antenna switch to the second antenna, a TDD signal reception path is formed from the first antenna through the antenna switch to the TDD signal filter, a FDD signal transmission path is formed from the FDD signal filter through the antenna switch to the first antenna, and a FDD signal reception path is formed from the first antenna through the antenna switch to the FDD signal filter; The antenna switch is used to: in a dual-connection scenario of FDD and TDD signals, maintain connectivity of the FDD signal transceiver path and dynamically switch between the TDD signal receiving path and the TDD signal transmitting path; wherein, when switching to the TDD signal receiving path, the phase compensation load is disconnected from the FDD signal path; When switching to the TDD signal transmission path, a phase compensation load is connected to the FDD signal path. The phase compensation load simulates the impedance characteristics of the TDD signal filter in the FDD signal frequency band, so that the load driven by the FDD signal path is in phase with the load when the TDD signal is in the receiving state, thereby reducing the error vector magnitude of the transmitted FDD signal. The antenna switch includes a shared node, a first switch, and a second switch; the FDD signal filter is connected to the first antenna through the shared node; the first switch is used to: connect the TDD signal filter to the second antenna when a TDD signal transmission instruction is detected to switch to the TDD signal transmission path; and connect the TDD signal filter to the first antenna when a TDD signal reception instruction is detected to switch to the FDD frequency band signal path. At this time, the TDD signal and the FDD signal share the first antenna; the second switch is used to: synchronously close when the TDD signal is transmitted, connect the phase compensation load to the shared node, so that the phase compensation load is connected to the FDD signal path, and disconnect the phase compensation load from the shared node when the TDD signal is received; The phase compensation load includes an LC parallel resonant circuit; the LC parallel resonant circuit includes a resonant inductor and a resonant capacitor, a first end of the resonant inductor and a first end of the resonant capacitor are connected and then connected in parallel to a shared node of the antenna switch through a second switch, and a second end of the resonant inductor and a second end of the resonant capacitor are grounded; The FDD signal filter is an LTE filter, and the TDD signal filter is an NR filter; the FDD signal is an LTE frequency band signal, and the TDD signal is an NR frequency band signal; the dual connection scenario of the FDD signal and the TDD signal is an ENDC dual connection scenario.

2. The low error vector magnitude RF front end according to claim 1, wherein: The calculation formulas for the resonant inductance and capacitance in the LC parallel resonant circuit are as follows: (1) (2) in, is the starting angular frequency of the FDD signal, is the FDD signal termination angular frequency, L is the resonant inductance value, C is the resonant capacitance value, For TDD signal filters The imaginary part of the impedance at For TDD signal filters The imaginary part of the impedance at , j is the imaginary unit; Solve the above equation for the inductance value get: (3) Substituting formula (3) into (1) yields the capacitance value .

3. The low error vector magnitude RF front end according to claim 2, wherein: When there is and The value of and When both are 0, the phase compensation load only includes one capacitor; When there is and The value of and When both are 0, the phase compensation load only includes one inductor.

4. The low error vector magnitude RF front end according to claim 1, wherein: When the load phase range of the LC parallel resonant circuit is consistent with the load phase span of the TDD signal filter in the FDD signal channel but the start and end points are inconsistent, the phase compensation load further includes a phase shift network; The phase shifting network is used to shift the phase of the LC parallel resonant circuit so that the load phase presented by the phase compensation load is consistent with the load phase presented by the TDD signal filter in the FDD signal channel; When the load phase of the LC parallel resonant circuit lags behind the load phase of the TDD signal filter in the FDD signal channel, the phase shift network is a lead compensation type phase shift network; When the load phase of the LC parallel resonant circuit is ahead of the load phase of the TDD signal filter in the FDD signal channel, the phase-shifting network is a hysteresis-compensation phase-shifting network.

5. The low error vector magnitude RF front end according to claim 4, characterized in that The advanced compensation type phase shift network includes: a first phase shift capacitor, a first phase shift inductor and a second phase shift inductor; The first end of the first phase-shifting capacitor is connected to the first end of the resonant capacitor, the first end of the first phase-shifting inductor is connected to the first end of the first phase-shifting capacitor, the first end of the second phase-shifting inductor is connected to the second end of the first phase-shifting capacitor, and the second end of the first phase-shifting inductor and the second end of the second phase-shifting inductor are grounded.

6. The low EVM RF front end according to claim 5, wherein: The calculation formulas for the first phase-shifting capacitance value, the first phase-shifting inductance value, and the second phase-shifting inductance value in the lead-compensation phase-shifting network are as follows: (4) (5) in, is the system characteristic impedance, ω is the center angular frequency of the FDD signal, θ is the phase advance value of the phase shift network, , are the first phase-shift inductance value and the second phase-shift inductance value respectively, and C is the first phase-shift capacitance value.

7. The low EVM RF front end according to claim 4, wherein: The hysteresis compensation type phase shift network includes: a first phase shift inductor, a first phase shift capacitor and a second phase shift capacitor; The first end of the first phase-shifting inductor is connected to the first end of the resonant capacitor, the first end of the first phase-shifting capacitor is connected to the first end of the first phase-shifting inductor, the first end of the second phase-shifting capacitor is connected to the second end of the first phase-shifting inductor, and the second end of the first phase-shifting capacitor and the second end of the second phase-shifting capacitor are grounded.

8. The low EVM RF front end according to claim 7, wherein: The calculation formulas for the first phase-shift inductance value, the first phase-shift capacitance value, and the second phase-shift capacitance value in the hysteresis compensation phase-shift network are as follows: (6) (7) in, is the system characteristic impedance, ω is the center angular frequency of the FDD signal, , are the first phase-shifting capacitance value and the second phase-shifting capacitance value respectively, L is the first phase-shifting inductance value, and θ is the phase lag value of the phase-shifting network.

9. The low EVM RF front end according to claim 4, wherein: The advanced compensation type phase shift network includes: a first phase shift capacitor, a second phase shift capacitor and a first phase shift inductor; The first end of the first phase-shifting capacitor is connected to the first end of the resonant capacitor, the first end of the second phase-shifting capacitor is connected to the second end of the first phase-shifting capacitor, the first end of the first phase-shifting inductor is connected to the second end of the first phase-shifting capacitor, and the second end of the first phase-shifting inductor is grounded.

10. The low EVM RF front end according to claim 9, wherein: The calculation formulas for the first phase-shifting capacitance value, the second phase-shifting capacitance value, and the first phase-shifting inductance value in the lead-compensation phase-shifting network are as follows: (8) (9) in, is the system characteristic impedance, ω is the center angular frequency of the FDD signal, , are the first phase-shifting capacitance value and the second phase-shifting capacitance value respectively, L is the first phase-shifting inductance value, and θ is the phase lead value of the phase-shifting network.

11. The low EVM RF front end according to claim 4, wherein: The hysteresis compensation type phase shift network includes: a first phase shift inductor, a second phase shift inductor and a first phase shift capacitor; The first end of the first phase-shift inductor is connected to the first end of the resonant capacitor, the first end of the second phase-shift inductor is connected to the second end of the first phase-shift inductor, the first end of the first phase-shift capacitor is connected to the second end of the first phase-shift inductor, and the second end of the first phase-shift capacitor is grounded.

12. The low EVM RF front end according to claim 11, wherein: The calculation formulas for the first phase-shift inductance value, the second phase-shift inductance value, and the first phase-shift capacitance value in the hysteresis compensation phase-shift network are as follows: (10) (11) in, is the system characteristic impedance, ω is the center angular frequency of the FDD signal, θ is the phase lag value of the phase shift network, , are the first phase-shift inductance value and the second phase-shift inductance value respectively, and C is the first phase-shift capacitance value.

13. The low EVM RF front end according to claim 1, wherein: The first antenna is a medium frequency main antenna, and the second antenna is a high frequency main antenna.

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