PCB-based single-ended signal crosstalk suppression method, device, equipment, medium and product

Abstract

The application discloses a single-ended signal crosstalk suppression method and device based on a PCB, equipment, a medium and a product, and relates to the technical field of printed circuits. The method comprises determining a first single-ended signal line and a second single-ended signal line in a target PCB; wherein the first single-ended signal line and the second single-ended signal line have a signal crosstalk phenomenon; determining the bit rate and signal propagation speed of the first single-ended signal line and the second single-ended signal line; determining a target length according to the bit rate and the signal propagation speed; adding a first signal extension line with a length of the target length to one end of the first single-ended signal line, and adding a second signal extension line with a length of the target length to the other end of the second single-ended signal line. The application can suppress single-ended signal crosstalk in a PCB, thereby improving the performance and stability of the PCB and ensuring stable operation of the electronic equipment in a complex signal environment.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of printed circuit, in particular to a single-ended signal crosstalk suppression method, device, equipment, medium and product based on PCB (Printed Circuit Board). BACKGROUND

[0002] In the field of electronic devices today, high speed and miniaturization have become an irresistible trend. With the advancement of this trend, the signal transmission rate in PCB has been significantly improved, and the wiring density has also increased dramatically. However, this development, while bringing performance improvement, also poses a serious challenge to signal integrity. Among them, the crosstalk problem between adjacent traces in the PCB is particularly prominent, and has become one of the core problems affecting signal integrity.

[0003] To reduce crosstalk, the traditional method mainly reduces the mutual interference between signal lines by increasing the line spacing in the PCB and adding shielding layers or isolation structures. However, under the demand of high-density wiring of the PCB, the limitation of physical space makes it extremely difficult to expand the spacing, thereby seriously affecting the performance and stability of the PCB. SUMMARY

[0004] The purpose of the present application is to provide a single-ended signal crosstalk suppression method, device, equipment, medium and product based on PCB, which can suppress single-ended signal crosstalk in PCB, thereby improving the performance and stability of the PCB.

[0005] To achieve the above purpose, the present application provides the following solutions:

[0006] In a first aspect, the present application provides a single-ended signal crosstalk suppression method based on PCB, comprising:

[0007] determining a first single-ended signal line and a second single-ended signal line in a target PCB; wherein the first single-ended signal line and the second single-ended signal line have a signal crosstalk phenomenon;

[0008] determining the bit rate and signal propagation speed of the first single-ended signal line and the second single-ended signal line;

[0009] determining a target length according to the bit rate and the signal propagation speed;

[0010] adding a first signal extension line with a length of the target length to one end of the first single-ended signal line, and adding a second signal extension line with a length of the target length to the other end of the second single-ended signal line.

[0011] Optionally, the determining the target length according to the bit rate and the signal propagation speed specifically comprises:

[0012] determining a bit width of a signal transmitted in the first single-ended signal line and the second single-ended signal line according to the bit rate;

[0013] determining the target length according to the bit width and the signal propagation speed.

[0014] Optionally, the calculation formula of the bit width is specifically:

[0015] ;

[0016] wherein, T represents the bit width.

[0017] Optionally, the calculation formula of the target length is specifically:

[0018] W=T×v;

[0019] wherein, W represents the target length, and v represents the signal propagation speed.

[0020] Optionally, one end of the first single-ended signal line connected with the first signal source is a first starting end, and the other end of the first single-ended signal line is a first ending end, one end of the second single-ended signal line connected with the second signal source is a second starting end, and the other end of the second single-ended signal line is a second ending end.

[0021] adding a first signal extension line with a length of the target length to one end of the first single-ended signal line and adding a second signal extension line with a length of the target length to the other end of the second single-ended signal line, specifically comprising:

[0022] adding the first signal extension line with the length of the target length to the first starting end of the first single-ended signal line;

[0023] adding the second signal extension line with the length of the target length to the second ending end of the second single-ended signal line.

[0024] Optionally, adding the first signal extension line with the length of the target length to one end of the first single-ended signal line and adding the second signal extension line with the length of the target length to the other end of the second single-ended signal line, specifically comprises:

[0025] adding the first signal extension line with the length of the target length to the first ending end of the first single-ended signal line;

[0026] adding the second signal extension line with the length of the target length to the second starting end of the second single-ended signal line.

[0027] In a second aspect, the present application provides a PCB-based single-ended signal crosstalk suppression device, comprising:

[0028] A first determining unit is configured to determine a first single-ended signal line and a second single-ended signal line in a target PCB, wherein the first single-ended signal line and the second single-ended signal line have a signal crosstalk phenomenon;

[0029] A second determining unit is configured to determine a bit rate and a signal propagation speed of the first single-ended signal line and the second single-ended signal line;

[0030] A third determining unit is configured to determine a target length according to the bit rate and the signal propagation speed;

[0031] An adding unit is configured to add a first signal extension line with the target length to one end of the first single-ended signal line, and add a second signal extension line with the target length to the other end of the second single-ended signal line.

[0032] In a third aspect, the present application provides a computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the PCB-based single-ended signal crosstalk suppression method according to any one of the above embodiments.

[0033] In a fourth aspect, the present application provides a computer readable storage medium, which stores a computer program, wherein the computer program is executable by a processor to implement the steps of the PCB-based single-ended signal crosstalk suppression method according to any one of the above embodiments.

[0034] In a fifth aspect, the present application provides a computer program product, comprising a computer program, wherein the computer program is executable by a processor to implement the steps of the PCB-based single-ended signal crosstalk suppression method according to any one of the above embodiments.

[0035] In a sixth aspect, the present application provides a chip, comprising a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is configured to run a program or an instruction, and the processor executes the program or the instruction to implement the steps of the PCB-based single-ended signal crosstalk suppression method according to any one of the above embodiments.

[0036] According to the embodiments of the present application, the following technical effects are achieved:

[0037] The application provides a PCB-based single-ended signal crosstalk suppression method, device, equipment, medium and product. The signal line with crosstalk is accurately determined, the target length is determined in combination with the bit rate and signal propagation speed, and a signal extension line with a specific length is added at the end of the corresponding signal line. This targeted processing method can skillfully adjust the signal transmission path and time, effectively balance the mutual interference between signals, thereby suppressing the single-ended signal crosstalk in the PCB, and further improving the performance and stability of the PCB, and ensuring the stable operation of the electronic equipment in a complex signal environment. BRIEF DESCRIPTION OF DRAWINGS

[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0039] Figure 1 The flowchart of a PCB-based single-ended signal crosstalk suppression method in an embodiment of the present application is shown.

[0040] Figure 2 The schematic diagram of the first single-ended signal line and the second single-ended signal line in the target PCB provided by an embodiment of the present application is shown.

[0041] Figure 3 The schematic diagram of the first single-ended signal line and the second single-ended signal line in the target PCB provided by an embodiment of the present application is shown. Figure 2 The schematic diagram of the first single-ended signal line and the second single-ended signal line in the target PCB provided by an embodiment of the present application is shown.

[0042] Figure 4 The schematic diagram of the first single-ended signal line and the second single-ended signal line in the target PCB provided by an embodiment of the present application is shown. Figure 2 The schematic diagram of the first single-ended signal line and the second single-ended signal line in the target PCB provided by an embodiment of the present application is shown.

[0043] Figure 5 The functional module schematic diagram of a PCB-based single-ended signal crosstalk suppression device provided by an embodiment of the present application is shown.

[0044] Figure 6 The structural schematic diagram of a computer device provided by an embodiment of the present application is shown. DETAILED DESCRIPTION

[0045] The technical solutions in the embodiments of the present application will be described in detail below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0046] The above objects, features and advantages of the present application will become more apparent from the following detailed description considered in conjunction with the accompanying drawings and specific embodiments.

[0047] In one exemplary embodiment, as shown in Figure 1 , a PCB-based single-ended signal crosstalk suppression method is provided, which is executed by a computer device, specifically, by a terminal or a server, or by both the terminal and the server, and includes the following steps 101-104. In the present embodiment, the method includes the following steps 101-104.

[0048] Step 101: Determine a first single-ended signal line and a second single-ended signal line in a target PCB.

[0049] In the present embodiment, the first single-ended signal line and the second single-ended signal line have a signal crosstalk phenomenon.

[0050] Please refer to Figure 2 and Figure 3 , Figure 2 for the schematic diagram of the first single-ended signal line and the second single-ended signal line in the target PCB provided by the present embodiment. Figure 3 Figure 2 for the schematic diagram of the signal crosstalk phenomenon between the first single-ended signal line and the second single-ended signal line in the target PCB.

[0051] In the present embodiment, S1 represents a first signal source, S2 represents a second signal source, one end of S1 is grounded, the other end of S1 is connected to a first starting end of a first single-ended signal line L1, a first ending end of the first single-ended signal line L1 is connected to a resistor Z1, the other end of the resistor Z1 is grounded; one end of S2 is grounded, the other end of S2 is connected to a second starting end of a second single-ended signal line L2, a second ending end of the second single-ended signal line L2 is connected to a resistor Z2, the other end of the resistor Z2 is grounded.

[0052] As can be seen from Figure 2 , the first single-ended signal line L1 and the second single-ended signal line L2 correspond to a high-low level state diagram. As can be seen from Figure 3 , the high-level signal and the low-level signal will cause signal crosstalk in adjacent wires L1 and L2, and the signal crosstalk amplitude can be represented by . The signal level difference will cause capacitive coupling signal crosstalk, and the signal crosstalk amplitude is proportional to the signal level difference, as shown in the following formula:

[0053]

[0054]

[0055] In the present embodiment, the signal level difference is represented by .​ represents a signal level of the first single-ended signal line L1 at time t, represents a signal level of the second single-ended signal line L2 at time t.

[0056] It can be seen that the smaller the signal level difference is, the smaller the signal crosstalk amplitude is. Therefore, the suppression of single-ended signal crosstalk can be achieved by adjusting the lengths of the first single-ended signal line and the second single-ended signal line in the target PCB.

[0057] In step 102, the bit rate and the signal propagation speed of the first single-ended signal line and the second single-ended signal line are determined.

[0058] In the embodiments of the present application, the bit rate is the speed of transmitting bits by the system, which is defined by the system operation protocol. In one operation protocol of DDR4 memory, the preset bit rate is 3200 Mbps (3200M bits are transmitted per second).

[0059] The signal propagation speed is related to the propagation material. In the present application, the propagation material is a PCB board, and the material is usually FR-4 material with a dielectric constant in the range of 4.0-4.5. The calculation formula of the signal propagation speed v is:

[0060]

[0061] wherein, represents the dielectric constant, represents the speed of light.

[0062] For example, when the dielectric constant is 4.0, the speed of light is approximately equal to 12 inch / ns (12 inches / nanosecond), and the formula can be calculated to obtain that the signal propagation speed of the PCB board made of FR-4 material is half of the speed of light, i.e., the signal propagation speed on the FR-4 board is approximately 6 inch / ns.

[0063] In step 103, the target length is determined according to the bit rate and the signal propagation speed.

[0064] As an optional implementation, the manner of determining the target length according to the bit rate and the signal propagation speed in step 103 can include:

[0065] determining the bit width of the signal transmitted in the first single-ended signal line and the second single-ended signal line according to the bit rate;

[0066] determining the target length according to the bit width and the signal propagation speed.

[0067] This implementation accurately infers signal width from bit rate, providing a clear understanding of signal characteristics during transmission. By combining this with the signal propagation speed to determine the target length, the added signal extension line is precisely adapted to the actual signal transmission conditions. This effectively adjusts interference relationships between signals and precisely suppresses crosstalk between the first and second single-ended signal lines on the PCB, significantly improving PCB performance and stability and ensuring reliable circuit system operation.

[0068] The calculation formula for bit width is:

[0069] ;

[0070] Wherein, T represents the bit width.

[0071] And the calculation formula of target length is:

[0072] W = T × v;

[0073] Wherein, W represents the target length, and v represents the signal propagation speed.

[0074] For example, the bit rate can be 3200Mbps, bit width = 1 / 3200M = 0.3125ns. The signal propagation speed can be 85ps / in.

[0075] Step 104 : adding a first signal extension line having a target length at one end of the first single-ended signal line, and adding a second signal extension line having a target length at the other end of the second single-ended signal line.

[0076] In an embodiment of the present application, one end of the first single-ended signal line connected to the first signal source is the first starting end, and the other end of the first single-ended signal line is the first ending end. One end of the second single-ended signal line connected to the second signal source is the second starting end, and the other end of the second single-ended signal line is the second ending end.

[0077] As an optional implementation, step 104 of adding a first signal extension line having a target length at one end of the first single-ended signal line and adding a second signal extension line having a target length at the other end of the second single-ended signal line may include:

[0078] Adding a first signal extension line having a target length at the first starting end of the first single-ended signal line;

[0079] A second signal extension line having a target length is added to the second tail end of the second single-ended signal line.

[0080] Wherein, by implementing this embodiment, the propagation path and timing of the signal can be adjusted according to the characteristics of the beginning and end of signal transmission by precisely adding an extension line at a specific end. This adjustment can effectively balance the signal interference between the two signal lines, greatly reducing the mutual influence of signals during transmission, thereby effectively suppressing the crosstalk phenomenon between the first single-ended signal line and the second single-ended signal line in the PCB, significantly improving the performance and stability of the PCB, and ensuring the efficient and reliable operation of the internal circuit system of the electronic device.

[0081] Alternatively, step 104 can also add a first signal extension line with a length of the target length at one end of the first single-ended signal line and a second signal extension line with a length of the target length at the other end of the second single-ended signal line in the following manner:

[0082] adding a first signal extension line with a length of the target length at the first end of the first single-ended signal line;

[0083] adding a second signal extension line with a length of the target length at the second end of the second single-ended signal line.

[0084] Wherein, by implementing this embodiment, the reflection and coupling characteristics of the signal can be cleverly changed by adding extension lines at the end and beginning of signal transmission based on the principle of signal transmission. By setting the extension line at this specific position, the original interfering signal rhythm can be effectively disrupted, and the phase relationship between the signals can be re-adjusted, thereby significantly weakening the crosstalk effect between the first single-ended signal line and the second single-ended signal line. This not only helps to improve the purity of PCB signal transmission, but also significantly enhances the performance and stability of the PCB, ensuring that the electronic device can still operate stably and efficiently in a complex signal environment.

[0085] Please refer to Figure 4 , Figure 4 for Figure 2 a schematic diagram of single-ended signal crosstalk suppression for the first single-ended signal line and the second single-ended signal line.

[0086] S1' represents the first signal source S1 in Figure 2 , S2' represents the second signal source S2 in Figure 2 , L1' represents the first single-ended signal line L1 in Figure 2 , L2' represents the second single-ended signal line L2 in Figure 2 , Z1' represents the resistance Z1 in Figure 2 , and Z2' represents the resistance Z2 in Figure 2 .

[0087] W1 represents a first signal extension line, W2 represents a second signal extension line, and the lengths of W1 and W2 are both target lengths, that is, the lengths of W1 and W2 are equal.

[0088] It can be seen from Figure 4 that W1 is added to the first starting end of the first single-ended signal line L1', and W2 is added to the second ending end of the second single-ended signal line L2', so that the signal logic relationship of the signals emitted by S1' and S2' to the ending ends of the first single-ended signal line L1' and the second single-ended signal line L2' is restored to the original relationship; the line equal length relationship can also be maintained; and the single-ended signal crosstalk between the first single-ended signal line L1' and the second single-ended signal line L2' is inhibited.

[0089] In the embodiments of the present application, the crosstalk can be efficiently inhibited, the crosstalk amplitude between the single-ended signal lines can be reduced through the double mechanisms of timing dislocation and dynamic compensation, and the signal signal-to-noise ratio can be significantly improved. Compatibility and flexibility can also be achieved, the existing single-ended signal system architecture does not need to be changed, the compensation circuit (i.e., the signal extension line) can be directly integrated into the driving end or receiving end circuit, high-density wiring design is supported, and the compensation circuit is suitable for PCB, flexible circuit and chip-level interconnection. In addition, low cost and low power consumption can be achieved, the compensation circuit (i.e., the signal extension line) is implemented by using standard CMOS process, the area overhead is less than 30% of that of a traditional shielding scheme, and the static power consumption is close to zero, and the overall energy efficiency is improved by more than 25%.

[0090] By implementing the above steps 101 to 104, the single-ended signal crosstalk in the PCB can be inhibited, and the performance and stability of the PCB can be improved, thereby ensuring the stable operation of the electronic device in a complex signal environment. In addition, the present application can more effectively adjust the interference relationship between signals, accurately inhibit the crosstalk phenomenon between the first single-ended signal line and the second single-ended signal line in the PCB, significantly improve the performance and stability of the PCB, and ensure the reliable operation of the circuit system. In addition, the present application can effectively balance the signal interference between the two signal lines, so that the mutual influence of the signals in the transmission process is greatly reduced, thereby effectively inhibiting the crosstalk phenomenon between the first single-ended signal line and the second single-ended signal line in the PCB. In addition, the present application can effectively disrupt the original signal rhythm of mutual interference, and readjust the phase relationship between the signals, thereby significantly weakening the crosstalk influence between the first single-ended signal line and the second single-ended signal line. This not only helps to improve the purity of the PCB signal transmission, but also greatly enhances the performance and stability of the PCB, ensuring that the electronic device can still operate stably and efficiently in a complex signal environment.

[0091] Based on the same inventive concept, the embodiments of the present application also provide a PCB-based single-ended signal crosstalk suppression device for implementing the above-mentioned PCB-based single-ended signal crosstalk suppression method. The implementation scheme for solving the problem provided by the device is similar to the implementation scheme described in the above-mentioned method, and therefore the specific limitations in one or more embodiments of the PCB-based single-ended signal crosstalk suppression device provided below can refer to the limitations of the PCB-based single-ended signal crosstalk suppression method described above, which will not be repeated here.

[0092] In one exemplary embodiment, as shown in Figure 5 A PCB-based single-ended signal crosstalk suppression device is provided, including:

[0093] A first determination unit 501 is configured to determine a first single-ended signal line and a second single-ended signal line in a target PCB, wherein the first single-ended signal line and the second single-ended signal line have a signal crosstalk phenomenon;

[0094] A second determination unit 502 is configured to determine a bit rate and a signal propagation speed of the first single-ended signal line and the second single-ended signal line;

[0095] A third determination unit 503 is configured to determine a target length according to the bit rate and the signal propagation speed;

[0096] An adding unit 504 is configured to add a first signal extension line with a length of the target length to one end of the first single-ended signal line, and add a second signal extension line with a length of the target length to the other end of the second single-ended signal line. One end of the first single-ended signal line connected to a first signal source is a first starting end, the other end of the first single-ended signal line is a first ending end, one end of the second single-ended signal line connected to a second signal source is a second starting end, and the other end of the second single-ended signal line is a second ending end.

[0097] As an optional implementation, the third determination unit 503 determines the target length according to the bit rate and the signal propagation speed, and the manner can be specifically as follows:

[0098] According to the bit rate, a bit width of a signal transmitted in the first single-ended signal line and the second single-ended signal line is determined;

[0099] According to the bit width and the signal propagation speed, the target length is determined.

[0100] In this embodiment, the signal bit width is accurately calculated through the bit rate, the characteristics of the signal in the transmission process are clearly grasped, the target length is determined in combination with the signal propagation speed, and the length of the added signal extension line is highly adapted to the actual signal transmission situation. In this way, the interference relationship between signals can be more effectively adjusted, the crosstalk phenomenon between the first single-ended signal line and the second single-ended signal line in the PCB can be accurately suppressed, the performance and stability of the PCB are significantly improved, and the reliable operation of the circuit system is ensured.

[0101] The calculation formula of the bit width is specifically:

[0102] ;

[0103] The bit width is represented by T.

[0104] The calculation formula of the target length is specifically:

[0105] W=T×v;

[0106] The target length is represented by W, and the signal propagation speed is represented by v.

[0107] As an optional embodiment, the adding unit 504 can add a first signal extension line with a length of the target length at one end of the first single-ended signal line and add a second signal extension line with a length of the target length at the other end of the second single-ended signal line in the following manner:

[0108] adding the first signal extension line with the length of the target length at the first starting end of the first single-ended signal line;

[0109] adding the second signal extension line with the length of the target length at the second ending end of the second single-ended signal line.

[0110] In this embodiment, by accurately adding the extension line at a specific end point, the propagation path and timing of the signal can be adjusted in a targeted manner according to the starting and ending characteristics of signal transmission. This adjustment method can effectively balance the signal interference between the two signal lines, greatly reduce the mutual influence of signals in the transmission process, thereby effectively suppressing the crosstalk phenomenon between the first single-ended signal line and the second single-ended signal line in the PCB, significantly improving the performance and stability of the PCB, and ensuring the efficient and reliable operation of the internal circuit system of the electronic device.

[0111] As an optional embodiment, the adding unit 504 can add a first signal extension line with a length of the target length at one end of the first single-ended signal line and add a second signal extension line with a length of the target length at the other end of the second single-ended signal line in the following manner:

[0112] adding a first signal extension line with a length of the target length at the first end of the first single-ended signal line;

[0113] adding a second signal extension line with a length of the target length at the second end of the second single-ended signal line.

[0114] The implementation of this embodiment can ingeniously change the reflection and coupling characteristics of the signals by adding extension lines at the end and the beginning of the signal transmission according to the principle of signal transmission. Through the setting of the extension lines at the specific positions, the original signal rhythm of mutual interference can be effectively disrupted, the phase relationship between the signals is re-adjusted, and then the crosstalk influence between the first single-ended signal line and the second single-ended signal line is significantly weakened. This not only helps to improve the purity of the PCB signal transmission, but also greatly enhances the performance and stability of the PCB, ensuring that the electronic equipment can still operate stably and efficiently in a complex signal environment.

[0115] The implementation of the above-mentioned embodiments can suppress the single-ended signal crosstalk in the PCB, thereby improving the performance and stability of the PCB and ensuring the stable operation of the electronic equipment in a complex signal environment. In addition, the present application can more effectively adjust the interference relationship between the signals, accurately suppress the crosstalk phenomenon between the first single-ended signal line and the second single-ended signal line in the PCB, significantly improve the performance and stability of the PCB, and ensure the reliable operation of the circuit system. In addition, the present application can effectively balance the signal interference between the two signal lines, so that the mutual influence of the signals in the transmission process is greatly reduced, thereby effectively suppressing the crosstalk phenomenon between the first single-ended signal line and the second single-ended signal line in the PCB. In addition, the present application can effectively disrupt the original signal rhythm of mutual interference, re-adjust the phase relationship between the signals, and then significantly weaken the crosstalk influence between the first single-ended signal line and the second single-ended signal line. This not only helps to improve the purity of the PCB signal transmission, but also greatly enhances the performance and stability of the PCB, ensuring that the electronic equipment can still operate stably and efficiently in a complex signal environment.

[0116] In an exemplary embodiment, a computer device, which can be a server or a terminal, is provided, and an internal structure diagram of the computer device can be as shown in FIG. 1. Figure 6As shown in the figure. The computer device includes a processor, a memory, an input / output interface (Input / Output, referred to as I / O) and a communication interface. Among them, the processor, the memory and the input / output interface are connected through the system bus, and the communication interface is connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capability. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store the single-ended signal crosstalk suppression data based on the PCB. The input / output interface of the computer device is used to exchange information between the processor and the external device. The communication interface of the computer device is used to communicate with the terminal outside through the network connection. The computer program is executed by the processor to realize a single-ended signal crosstalk suppression method based on the PCB.

[0117] Those skilled in the art can understand that, Figure 6 The structure shown in the figure is only a block diagram of part of the structure related to the scheme of the present application, and does not constitute a limitation on the computer device to which the scheme of the present application is applied. The specific computer device can include more or fewer components than those shown in the figure, or combine certain components, or have a different component arrangement.

[0118] In an exemplary embodiment, a computer device is also provided, including a memory and a processor, the memory storing a computer program, and the processor executing the computer program to realize the steps in the above method embodiments.

[0119] In an exemplary embodiment, a computer readable storage medium is provided, storing a computer program, which is executed by a processor to realize the steps in the above method embodiments.

[0120] In an exemplary embodiment, a computer program product is provided, including a computer program, which is executed by a processor to realize the steps in the above method embodiments.

[0121] In an exemplary embodiment, a chip is provided, including a processor and a communication interface, the communication interface and the processor are coupled, the processor is used to run a program or instructions to realize the steps in the above method embodiments and achieve the same technical effects. To avoid repetition, it will not be repeated here.

[0122] It should be understood that the chip mentioned in the embodiments of the present application can also be referred to as a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0123] It should be noted that the user information (including but not limited to user equipment information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in the present application are all information and data authorized by the user or authorized by all parties, and the collection, use and processing of related data need to comply with relevant regulations.

[0124] It can be understood by those skilled in the art that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing related hardware through a computer program, and the computer program can be stored in a non-volatile computer readable storage medium. When the computer program is executed, it can include the processes of the above-mentioned embodiments of each method. Among them, any reference to memory, database or other medium used in each embodiment provided by the present application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (Read-Only Memory, ROM), magnetic tape, floppy disk, flash memory, optical storage, high-density embedded non-volatile memory, resistive memory (ReRAM), magnetoresistive random access memory (Magnetoresistive Random Access Memory, MRAM), ferroelectric memory (Ferroelectric Random Access Memory, FRAM), phase change memory (Phase Change Memory, PCM), graphene memory, etc. Volatile memory can include random access memory (Random Access Memory, RAM) or external cache memory, etc. As an illustration but not limitation, RAM can be in various forms, such as static random access memory (Static Random Access Memory, SRAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM), etc.

[0125] The database involved in each embodiment provided by the present application can include at least one of a relational database and a non-relational database. The non-relational database can include a distributed database based on a block chain, etc., without being limited thereto. The processor involved in each embodiment provided by the present application can be a general-purpose processor, a central processing unit, a graphics processing unit, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., without being limited thereto.

[0126] Each technical feature of the above embodiments can be combined arbitrarily. In order to make the description simple, not all possible combinations of each technical feature in the above embodiments are described, but as long as the combination of these technical features does not exist contradictory, it should be considered as the scope of the present application.

[0127] The principles and implementations of the present application are described in detail with specific examples in this paper, and the above examples are only used to help understand the method of the present application and its core idea; at the same time, for those skilled in the art, according to the idea of the present application, the specific implementation and application range will be changed. Therefore, the content of the specification should not be understood as a limitation of the present application.

Claims

1. A method of single-ended signal crosstalk suppression based on PCB, characterized in that, The PCB-based single-ended signal crosstalk suppression method comprises the following steps: determining a first single-ended signal line and a second single-ended signal line in a target PCB; wherein the first single-ended signal line and the second single-ended signal line have a signal crosstalk phenomenon; determining a bit rate and a signal propagation speed of the first single-ended signal line and the second single-ended signal line; determining a target length according to the bit rate and the signal propagation speed; adding a first signal extension line with a length of the target length to one end of the first single-ended signal line and adding a second signal extension line with a length of the target length to the other end of the second single-ended signal line; wherein the calculation formula of the target length is specifically as follows: W = T x v; wherein W represents the target length and v represents the signal propagation speed.

2. The PCB-based single-ended signal crosstalk mitigation method of claim 1, wherein, The determination of the target length according to the bit rate and the signal propagation speed specifically comprises the following steps: determining a bit width of a signal transmitted in the first single-ended signal line and the second single-ended signal line according to the bit rate; determining a target length according to the bit width and the signal propagation speed.

3. The PCB-based single-ended signal crosstalk mitigation method of claim 2, wherein, The calculation formula of the bit width is specifically as follows: ； wherein T represents the bit width.

4. The PCB-based single-ended signal crosstalk mitigation method of claim 1, wherein, The first single-ended signal line and a first signal source are connected at one end of the first single-ended signal line, and the other end of the first single-ended signal line is a first tail end; the second single-ended signal line and a second signal source are connected at one end of the second single-ended signal line, and the other end of the second single-ended signal line is a second tail end; adding a first signal extension line with a length of the target length to one end of the first single-ended signal line and adding a second signal extension line with a length of the target length to the other end of the second single-ended signal line specifically comprises the following steps: adding a first signal extension line with a length of the target length to the first starting end of the first single-ended signal line; adding a second signal extension line with a length of the target length to the second tail end of the second single-ended signal line.

5. The PCB-based single-ended signal crosstalk mitigation method of claim 4, wherein, The adding of the first signal extension line with a length of the target length to one end of the first single-ended signal line and the adding of the second signal extension line with a length of the target length to the other end of the second single-ended signal line specifically comprises the following steps: adding a first signal extension line with a length of the target length to the first tail end of the first single-ended signal line; adding a second signal extension line with a length of the target length to the second starting end of the second single-ended signal line.

6. A PCB-based single-ended signal crosstalk suppression apparatus, the apparatus applying the PCB-based single-ended signal crosstalk suppression method of any one of claims 1-5, characterized by, The PCB-based single-ended signal crosstalk suppression device comprises the following steps: a first determining unit is configured to determine a first single-ended signal line and a second single-ended signal line in a target PCB; wherein the first single-ended signal line and the second single-ended signal line have a signal crosstalk phenomenon; a second determining unit is configured to determine a bit rate and a signal propagation speed of the first single-ended signal line and the second single-ended signal line; a third determining unit is configured to determine a target length according to the bit rate and the signal propagation speed; an adding unit is configured to add a first signal extension line with a length of the target length to one end of the first single-ended signal line and add a second signal extension line with a length of the target length to the other end of the second single-ended signal line; The calculation formula of the target length is specifically as follows: W=T×v; W represents the target length, and v represents the signal propagation speed.

7. A computer device comprising: The memory, the processor, and the computer program stored on the memory and executable on the processor, characterized in that the processor executes the computer program to implement the steps of the PCB-based single-ended signal crosstalk suppression method in any one of claims 1-5.

8. A computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to implement the steps of the PCB-based single-ended signal crosstalk suppression method in any one of claims 1-5.

9. A computer program product comprising a computer program, characterized in that, The computer program is executed by the processor to implement the steps of the PCB-based single-ended signal crosstalk suppression method in any one of claims 1-5.

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