Display panel, preparation method thereof and display device

By setting grooves and isolation structures on the array substrate of the OLED display panel, combined with patterned photolithography, the problem of low yield in traditional FMM technology has been solved, and stable connection and efficient fabrication of light-emitting devices have been achieved.

CN120569042BActive Publication Date: 2025-11-28HEFEI VISIONOX TECH CO LTD
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Patent Information

Application Number
CN202511065292.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-07-30
Publication Date
2025-11-28
Estimated Expiration
2045-07-30

AI Technical Summary

Technical Problem

In existing OLED display panel manufacturing processes, the yield of finished products is low, and traditional FMM technology suffers from problems such as limited precision and high cost.

Method used

The first pixel defining layer and isolation structure are set on the array substrate to form multiple grooves and isolation openings. The auxiliary electrode is connected to the light-emitting device through the electrode overlap part. The light-emitting device is fabricated using patterned photolithography process to avoid leakage.

Benefits of technology

It improves the yield rate of finished display panels, achieves stable connection of light-emitting devices through directional overlapping, prevents leakage, and enhances the display effect.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to a display panel, a preparation method thereof and a display device. The display panel comprises an array substrate, a first pixel definition layer arranged on one side of the array substrate, a plurality of first grooves formed in the first pixel definition layer, an auxiliary electrode comprising a plurality of electrode overlap portions arranged in the plurality of first grooves, an isolation structure arranged on the side of the first pixel definition layer away from the array substrate and defining a plurality of isolation openings, the plurality of isolation openings being arranged in correspondence with the plurality of electrode overlap portions, a plurality of light emitting devices arranged on one side of the array substrate, the plurality of light emitting devices being arranged in correspondence with the plurality of isolation openings, at least part of the light emitting devices being arranged in the corresponding isolation openings, the light emitting devices comprising a first electrode, a light emitting portion and a second electrode arranged in layers away from the array substrate, and the second electrode being electrically connected with the corresponding electrode overlap portion. The application can improve the yield of the display panel.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel, a preparation method thereof and a display device. BACKGROUND

[0002] Organic Light Emitting Diode (OLED) display technology is considered as the most potential new display technology of the next generation. Compared with liquid crystal display technology, OLED display technology has the advantages of low energy consumption, low cost, self-luminous, wide viewing angle and fast response speed.

[0003] In the preparation process of a traditional OLED display panel, a fine metal mask (FMM) is usually used to realize the patterning of a light-emitting pixel. The FMM technology is mature and has rich mass production experience. However, the FMM technology also has the problems of limited precision and high cost. The fine metal mask-free technology eliminates the limitations of the traditional OLED process on the size, resolution and other performance of the display screen, and has the advantages of high performance, full-size and agile delivery. The patents CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 099419, PCT / CN2024 / 099072, CN117979755A, CN117998900A, CN117062489A, CN117580403A, CN116583155A, CN116669477A, CN117396039A, CN116669480A, CN116600606A, CN117500332A disclose the related content of the fine metal mask-free technology, which is referred to.

[0004] However, the yield of the OLED display panel product prepared by the current preparation process is low. SUMMARY

[0005] In order to overcome the technical problems mentioned in the above technical background, the present application provides a display panel, a preparation method thereof and a display device.

[0006] In a first aspect, the present application provides a display panel, comprising:

[0007] an array substrate;

[0008] a first pixel defining layer disposed on one side of the array substrate, the first pixel defining layer being provided with a plurality of first grooves;

[0009] The auxiliary electrode comprises a plurality of electrode overlap portions, which are arranged correspondingly in the plurality of first grooves;

[0010] The isolation structure is arranged on a side of the first pixel defining layer away from the array substrate and defines a plurality of isolation openings. The plurality of isolation openings are arranged correspondingly to the plurality of electrode overlap portions.

[0011] The plurality of light emitting devices are arranged on a side of the array substrate. The plurality of light emitting devices are arranged correspondingly to the plurality of isolation openings. At least part of the light emitting devices are arranged in the corresponding isolation openings. The light emitting device comprises a first electrode, a light emitting portion and a second electrode arranged in layers away from the array substrate. The second electrode is electrically connected to the corresponding electrode overlap portion.

[0012] In one embodiment, the auxiliary electrode further comprises a main body portion arranged on a side of the plurality of electrode overlap portions close to the array substrate. The main body portion is electrically connected to the plurality of electrode overlap portions.

[0013] Optionally, the main body portion has a grid-shaped orthographic projection on the array substrate.

[0014] In one embodiment, the isolation structure has an orthographic projection on the array substrate covering an orthographic projection of the main body portion on the array substrate.

[0015] Optionally, the orthographic projection of the main body portion on the array substrate overlaps at least part of the orthographic projection of each first electrode on the array substrate.

[0016] In one embodiment, the display panel further comprises a second pixel defining layer arranged on a side of the first pixel defining layer close to the array substrate.

[0017] The second pixel defining layer is provided with a second groove on a side of the second pixel defining layer away from the array substrate, and the main body portion is arranged in the second groove.

[0018] Optionally, the second groove is in communication with the plurality of first grooves.

[0019] Optionally, the second groove has a grid-shaped orthographic projection on the array substrate.

[0020] In one embodiment, the isolation structure comprises a plurality of film layers, and a material of a film layer of the isolation structure close to the array substrate comprises an insulating material.

[0021] Optionally, the isolation structure comprises a first isolation portion and a second isolation portion which are arranged in a stacking manner along a direction away from the array substrate, and a projection of the second isolation portion on the array substrate covers a projection of the first isolation portion on the array substrate.

[0022] Optionally, a material of the second isolation portion comprises titanium or molybdenum; and a material of the first isolation portion comprises an inorganic insulating material.

[0023] In one of the embodiments, a projection of the first isolation portion on the array substrate does not overlap with a projection of the plurality of electrode overlap portions on the array substrate.

[0024] A projection of the second isolation portion on the array substrate covers a projection of the plurality of electrode overlap portions on the array substrate.

[0025] In one of the embodiments, the plurality of meshes of the main body portion are arranged corresponding to the plurality of isolation openings.

[0026] In the first direction, a distance between two opposite sides of the mesh of the main body portion is a first distance L1, and a distance between two opposite sides of the isolation opening is a second distance L2, and the first distance L1 is greater than the second distance L2.

[0027] In one of the embodiments, each of the electrode overlap portions is arranged at one side of the corresponding isolation opening.

[0028] Optionally, each of the electrode overlap portions is arranged at one side of the corresponding isolation opening which is arranged opposite to the other side in a second direction, and the second direction is parallel to an extension direction of the scan lines in the array substrate.

[0029] Optionally, the display panel comprises a display area and a non-display area which is arranged around the display area, and the auxiliary electrode is connected with the power signal line from the display area to the non-display area.

[0030] In one of the embodiments, in the first direction, a length of the electrode overlap portion is a first length H1, and a distance between two opposite sides of the corresponding isolation opening of the electrode overlap portion is a second distance L2, and the first length H1 is greater than or equal to the second distance L2.

[0031] In a second aspect, the application further provides another display panel, which comprises:

[0032] an array substrate;

[0033] a second pixel defining layer which is arranged at one side of the array substrate, and a second recess is arranged at one side of the second pixel defining layer which is away from the array substrate;

[0034] A first pixel defining layer is disposed on a side of the second pixel defining layer away from the array substrate; the first pixel defining layer is provided with a plurality of first recesses;

[0035] An auxiliary electrode includes a main body portion and a plurality of electrode overlapping portions; the main body portion is disposed in the second recess, and the plurality of electrode overlapping portions are disposed in the plurality of first recesses; the main body portion is electrically connected to the plurality of electrode overlapping portions;

[0036] An isolation structure is disposed on a side of the first pixel defining layer away from the array substrate, and defines a plurality of isolation openings; the plurality of isolation openings are disposed in correspondence with the plurality of electrode overlapping portions;

[0037] A plurality of light emitting devices are disposed on a side of the array substrate; the plurality of light emitting devices are disposed in correspondence with the plurality of isolation openings; at least part of the light emitting devices are disposed in the corresponding isolation openings; the light emitting device includes a first electrode, a light emitting portion, and a second electrode, which are disposed in a stack away from the array substrate; the second electrode is electrically connected to the corresponding electrode overlapping portion.

[0038] In one of the embodiments, a normal projection of the main body portion on the array substrate is in a grid shape;

[0039] Optionally, the second recess is in communication with the plurality of first recesses;

[0040] Optionally, a normal projection of the second recess on the array substrate is in a grid shape.

[0041] In one of the embodiments, a normal projection of the isolation structure on the array substrate covers a normal projection of the main body portion on the array substrate;

[0042] Optionally, a normal projection of the main body portion on the array substrate overlaps at least part of a normal projection of each first electrode on the array substrate.

[0043] In one of the embodiments, the isolation structure includes a plurality of film layers; a material of a film layer of the isolation structure close to the array substrate includes an insulating material;

[0044] Optionally, the isolation structure includes a first isolation portion and a second isolation portion disposed in a stack away from the array substrate; a normal projection of the second isolation portion on the array substrate covers a normal projection of the first isolation portion on the array substrate;

[0045] Optionally, a material of the second isolation portion includes titanium or molybdenum; a material of the first isolation portion includes an inorganic insulating material.

[0046] In one of the embodiments, the first isolation portion has a projection on the array substrate which does not overlap with the projection of the plurality of electrode connecting portions on the array substrate.

[0047] The projection of the second isolation portion on the array substrate covers the projection of the plurality of electrode connecting portions on the array substrate.

[0048] In one of the embodiments, the projection of the first isolation portion on the array substrate at least partially overlaps with the projection of the main body portion on the array substrate.

[0049] The projection of the second isolation portion on the array substrate covers the projection of the main body portion on the array substrate.

[0050] In one of the embodiments, the plurality of meshes of the main body portion are arranged corresponding to the plurality of isolation openings; along a first direction, the distance between the opposite sides of the mesh of the main body portion is a first distance L1, and the distance between the opposite sides of the isolation opening is a second distance L2, and the first distance L1 is greater than the second distance L2.

[0051] In one of the embodiments, each of the electrode connecting portions is arranged on one side of the corresponding isolation opening.

[0052] Optionally, each of the electrode connecting portions is arranged on one side of the corresponding isolation opening which is arranged opposite to the other side along a second direction, and the second direction is parallel to the extension direction of the scan lines in the array substrate.

[0053] Optionally, the display panel comprises a display area and a non-display area surrounding the display area, and the main body portion is connected with the power signal line from the display area to the non-display area.

[0054] In one of the embodiments, along a first direction, the length of the electrode connecting portion is a first length H1, and the distance between the opposite sides of the corresponding isolation opening of the electrode connecting portion is a second distance L2, and the first length H1 is greater than or equal to the second distance L2.

[0055] In a third aspect, a preparation method of a display panel is provided, and the preparation method comprises:

[0056] providing an array substrate;

[0057] forming a first pixel defining layer on one side of the array substrate, and opening a plurality of first grooves in the first pixel defining layer;

[0058] A first metal layer is formed on a side of the first pixel defining layer away from the array substrate, and the first metal layer is subjected to a patterning process to obtain a plurality of electrode overlap portions of the auxiliary electrode; the plurality of electrode overlap portions are arranged in the plurality of first grooves correspondingly;

[0059] An isolation structure is formed on a side of the first pixel defining layer away from the array substrate, and the isolation structure is provided with a plurality of isolation openings; the plurality of isolation openings are arranged in the plurality of electrode overlap portions correspondingly;

[0060] A plurality of light emitting devices are formed on a side of the array substrate; the plurality of light emitting devices are arranged in the plurality of isolation openings correspondingly; the light emitting device comprises a first electrode, a light emitting portion and a second electrode which are arranged in a stack on a side away from the array substrate; the second electrode is electrically connected to the corresponding electrode overlap portion.

[0061] In one of the embodiments, before the first pixel defining layer is formed on a side of the array substrate, the preparation method further comprises:

[0062] A second pixel defining layer is formed on a side of the array substrate, and a second groove is formed in the second pixel defining layer;

[0063] A second metal layer is formed on a side of the second pixel defining layer away from the array substrate, and the second metal layer is subjected to a patterning process to obtain a main body portion of the auxiliary electrode; the main body portion is located in the second groove; wherein the main body portion is electrically connected to the plurality of electrode overlap portions;

[0064] Correspondingly, the first pixel defining layer is formed on a side of the array substrate, comprising:

[0065] The first pixel defining layer is formed on a side of the second pixel defining layer away from the array substrate.

[0066] In a fourth aspect, the embodiments of the present application provide a display device, comprising the display panel of any one of the first aspect or the second aspect.

[0067] The first pixel defining layer of the display panel is provided with a plurality of first grooves, and a plurality of electrode overlap portions are arranged in the plurality of first grooves correspondingly; in this way, when the light emitting device is evaporated, the second electrode of the light emitting device is connected to the electrode overlap portion through the control of the evaporation angle, directional overlap is realized, and the display panel can be effectively prevented from leaking electricity, thereby improving the yield of finished products of the display panel. BRIEF DESCRIPTION OF DRAWINGS

[0068] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly introduced as follows. It should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be regarded as a limitation on the scope, and for those of ordinary skill in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0069] Figure 1 Structure diagram of a display panel in an embodiment;

[0070] Figure 2 One of the cross-sectional diagrams of the display panel in a second direction in an embodiment;

[0071] Figure 3 Cross-sectional diagram of an array substrate in an embodiment;

[0072] Figure 4 Schematic diagram of a pixel circuit in an embodiment;

[0073] Figure 5 Top view schematic diagram of an auxiliary electrode in an embodiment;

[0074] Figure 6 Schematic diagram of a light emitting part in an embodiment;

[0075] Figure 7 Second cross-sectional diagram of the display panel in a second direction in an embodiment;

[0076] Figure 8 First cross-sectional diagram of the display panel in a first direction in an embodiment;

[0077] Figure 9 Perspective view of the display panel in an embodiment;

[0078] Figure 10A Position and size relationship diagram of the grid of the isolation opening and the main body part in an embodiment;

[0079] Figure 10B Position and size relationship diagram of the isolation opening and the electrode overlap part in an embodiment;

[0080] Figure 11 Third cross-sectional diagram of the display panel in a second direction in an embodiment;

[0081] Figure 12 Second cross-sectional diagram of the display panel in a first direction in an embodiment;

[0082] Figure 13 Schematic diagram of the preparation method of the display panel in an embodiment;

[0083] Figure 14A process flow diagram for preparing in a second direction for one embodiment;

[0084] Figure 15 A process flow diagram for preparing in a first direction for one embodiment.

[0085] Reference Signs List:

[0086] AA, display area; NA, non-display area; PX, pixel; SPX1, first sub-pixel; SPX2, second sub-pixel; SPX3, third sub-pixel;

[0087] 1, display panel; 10, array substrate 10; 11, first pixel defining layer; 12, auxiliary electrode; 13, isolation structure; 14, light emitting device; 15, second pixel defining layer; 16, encapsulation part; 17, planarization layer; 18, transistor;

[0088] 111, first groove; 121, electrode overlap part; 122, main body part; 131, first isolation part; 132, second isolation part; 141, first electrode; 142, light emitting part; 143, second electrode; 151, second groove;

[0089] 11a, first pixel opening; 13a, isolation opening; 15a, second pixel opening; 122a, grid; M1, first metal layer; M2, second metal layer; M3, first electrode layer; T1, driving transistor; T2, data transistor; C1, storage capacitor. DETAILED DESCRIPTION

[0090] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the following will be combined with the drawings in the embodiments of the present application to make a clear and complete description of the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. The components of the embodiments of the present application described and shown in the drawings can be arranged and designed in various different configurations.

[0091] Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without making creative efforts fall within the scope of protection of the present application.

[0092] It should be noted that: similar reference numerals and letters represent similar items in the following drawings, therefore, once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings. It should be noted that, in the case of no conflict, the different features in the embodiments of the present application can be combined with each other.

[0093] For easy understanding, the X-axis, Y-axis and Z-axis that are orthogonal to each other are described in the drawings. The direction along the X-axis is referred to as the X direction, the direction along the Y-axis is referred to as the Y direction, and the direction along the Z-axis is referred to as the Z direction. The Z direction is the normal direction with respect to the plane containing the X direction and the Y direction. In addition, the case where various elements are observed in parallel with the plane containing the X direction and the Y direction is referred to as a plan view. Alternatively, the plane of the X direction and the Y direction is a plane parallel to the display surface of the display panel, and the Z direction is a direction parallel to the thickness direction of the display panel.

[0094] For some elements, the terms "upper" or "above" are used when describing the position of an element in the Z direction, and the terms "lower" or "below" are used when describing the position of an element in the opposite direction. In addition, when the terms "upper", "above", "lower", "below", "relative" and the like are used to define the positional relationship between two elements, they not only include the state where the two elements are directly connected, but also include the state where the two elements are separated by a gap or other elements. In addition, the terms "first", "second", "third" and the like are only used for differentiation and cannot be understood as indicating or implying relative importance.

[0095] In the description of the present application, it should be understood that "electrically connected" in the present application can be understood as physical contact and electrical conduction of components; it can also be understood as a form of connection between different components in a circuit structure through a physical circuit such as a copper foil or a wire on a printed circuit board (PCB) that can transmit electrical signals.

[0096] Figure 1 is a schematic structural diagram of a display panel 1 according to an embodiment of the present application. The display panel 1 can be an organic light emitting diode display panel (OLED) or a quantum dot light emitting diodes display panel (QLED). The display panel 1 includes a display area AA having a display function and a non-display area NA surrounding the display area AA.

[0097] The shape of the display area AA of the display panel 1 can be rectangular, or square, circular, or other shapes such as elliptical.

[0098] The display area AA includes a plurality of pixels PX arranged in the X and Y directions. Each pixel PX includes a plurality of sub-pixels SPX displaying different colors. In some embodiments, a pixel PX includes a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3. For example, the first sub-pixel SPX1 is a blue sub-pixel, the second sub-pixel SPX2 is a green sub-pixel SPX2, and the third sub-pixel SPX3 is a red sub-pixel SPX3. In some embodiments, in addition to sub-pixels SPX1, SPX2, and SPX3, a pixel PX also includes sub-pixels SPX that emit white or other colors of light.

[0099] A sub-pixel (SPX) includes a pixel circuit and a light-emitting device driven by the pixel circuit to emit light of the corresponding color. The first sub-pixel (SPX1) includes a first light-emitting device, the second sub-pixel (SPX2) includes a second light-emitting device, and the third sub-pixel (SPX3) includes a third light-emitting device. One pixel circuit drives at least one light-emitting device to emit light. For example, the display area AA includes a normal display area and a light-transmitting display area. The light-transmitting display area is a display area set according to a corresponding sensor and has light-transmitting properties, while the normal display area is a display area not set according to a corresponding sensor. In the normal display area, one pixel circuit drives one light-emitting device to emit light, and in the light-transmitting display area, one pixel circuit drives one or more light-emitting devices to emit light.

[0100] In one implementation, Figure 2 It shows Figure 1 A schematic diagram of a partial cross-sectional structure of the film layer in the BB direction of a local area of ​​the display panel 1. (Reference) Figure 2 The display panel includes an array substrate 10, a first pixel defining layer 11, an auxiliary electrode 12, an isolation structure 13, and multiple light-emitting devices 14.

[0101] refer to Figure 3 The array substrate 10 includes a substrate and a pixel circuit layer and a planarization layer 17 disposed on one side of the substrate. The substrate may include a first PI substrate layer, a first barrier layer, a second PI substrate layer, and a second barrier layer stacked sequentially, wherein the first PI substrate layer and the second PI substrate layer are collectively referred to as substrate layers. Exemplarily, the substrate is a flexible material, allowing the display panel to be bent, thereby enabling the display panel to achieve functions such as curved display, foldable display, or rollable display. For example, the material of the flexible substrate can be any one of PI (Polyimide), PC (polycarbonate), or PVC (polyvinyl chloride). The substrate can also be a rigid material, such as glass or plastic; that is, the display panel in this embodiment can be a rigid display panel that cannot be bent, or a flexible display panel that can be bent.

[0102] The array substrate 10 further comprises a light shielding layer, a third barrier layer and a buffer layer between the substrate and the pixel circuit layer. The light shielding layer is located on the side of the second barrier layer away from the substrate layer, and is used to shield light emitted from the outside towards the substrate, so as to avoid the influence of external light on the active layer in the pixel circuit layer. The light shielding layer can be formed by a black matrix, and the material thereof can block light. The third barrier layer is located on the side of the light shielding layer away from the substrate layer. The first barrier layer, the second barrier layer and the third barrier layer are collectively referred to as barrier layers. The material of the first barrier layer, the second barrier layer and the third barrier layer comprises SiOx (Silicon Oxide). The buffer layer is located on the side of the third barrier layer away from the substrate layer, and comprises an inorganic layer or an organic layer. For example, the buffer layer can be formed by a material selected from inorganic materials such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide or aluminum nitride, or organic materials such as acrylic, polyimide or polyester. The buffer layer can comprise a single layer or multiple layers. The buffer layer is used to block oxygen and moisture, prevent moisture or impurities from diffusing through the substrate, and provide a flat surface on the upper surface of the substrate, thereby facilitating the preparation of the active layer in the pixel circuit layer. For example, the material of the buffer layer in the embodiment comprises SiNx (Silicon Nitride).

[0103] The pixel circuit layer comprises a pixel circuit for driving the light emitting device 14 to emit light, Figure 3 The transistor 18 in the pixel circuit is shown, and a via hole is provided in the planarization layer 17. The first electrode 141 is electrically connected to the transistor 18 in the pixel circuit layer through the via hole. In addition, the pixel circuit layer further comprises at least one insulating layer, which can comprise at least one of an inorganic layer and an organic layer. In addition, the array substrate 10 further comprises a scan line for providing a scan signal Scan and a data line for providing a data signal Data.

[0104] Reference Figure 4 The pixel circuit comprises a drive transistor T1 and a data transistor T2. The source of the data transistor T2 is connected to a data line for providing a data signal Data. The gate of the data transistor T2 is connected to a scan line for providing a scan signal Scan. The drain of the data transistor T2 is connected to the gate of the drive transistor T1. The two ends of a storage capacitor C1 are respectively connected to the gate and the source of the drive transistor T1. The drain of the drive transistor T1 is connected to the light emitting device 14. Figure 4 is one embodiment of the pixel circuit, and the pixel circuit of the present application is not limited to Figure 4 The pixel circuit shown in FIG. 8 is a 2T1C pixel circuit, and other pixel circuits such as 7T1C, 8T1C pixel circuits, etc. can also be used.

[0105] The first pixel defining layer 11 is provided on one side of the array substrate 10, and the first pixel defining layer 11 is provided with a plurality of first recesses 111Figure 2 The position circled by the dotted line is shown in FIG. 1C. Figure 2 and Figure 5 As shown in FIG. 1C, Figure 5 A top view of the auxiliary electrode 12 is provided, which includes a plurality of electrode overlap portions 121 corresponding to the plurality of first grooves 111.

[0106] The first pixel defining layer 11 defines a plurality of first pixel openings 11a, and the sidewall of the first pixel defining layer 11 close to the first pixel opening 11a can be a bevel or an arc. The plurality of first pixel openings 11a are arranged corresponding to the plurality of first electrodes 141, and at least part of the surface of each first electrode 141 is exposed from the corresponding first pixel opening 11a. Here, the arrangement of the plurality of first pixel openings 11a and the plurality of first electrodes 141 means that the plurality of first pixel openings 11a and the plurality of first electrodes 141 are one-to-one corresponding. The material of the first pixel defining layer 11 is inorganic material, for example, the first pixel defining layer 11 is formed by using inorganic insulating material such as at least one of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON). The first pixel defining layer 11 defines the light-emitting area of each sub-pixel, avoiding the diffusion of light-emitting functional materials between sub-pixels and the color mixing phenomenon.

[0107] A plurality of first grooves 111 are formed on the first pixel defining layer 11, and the plurality of first grooves 111 are arranged corresponding to the plurality of first pixel openings 11a, and the first groove 111 is arranged on one side of the corresponding first pixel opening 11a. The first groove 111 can be a groove penetrating the first pixel defining layer 11 along the thickness direction of the array substrate 10, or a groove not penetrating the first pixel defining layer 11 along the thickness direction of the array substrate 10, which is not limited here. The sidewall of the first groove 111 can be a bevel or an arc, so that when the electrode overlap portion 121 is prepared, the electrode overlap portion 121 is not easy to break, ensuring the stability of the power supply of the auxiliary electrode 12, and further improving the yield of the finished product of the display panel; the sidewall of the first groove 111 can also be a vertical surface relative to the plane of the array substrate 11, which is not limited here.

[0108] Along the second direction y, the plurality of first grooves 111 are arranged at intervals, wherein the second direction y is the same as the scanning direction, and the scanning direction refers to the moving direction of the nozzle in the OLED printing process (vapor deposition Scan direction); the second direction y can also be parallel to the extension direction of the scan line (Scan line) in the array substrate 10 which provides the scan signal Scan. It can be understood that the array substrate 10 includes a plurality of scan lines, and the plurality of scan lines are arranged at intervals along the first direction x, and each scan line extends along the second direction y, and the first direction x intersects the second direction y.

[0109] The plurality of electrode overlapping portions 121 of the auxiliary electrode 12 are arranged in correspondence with the plurality of first grooves 111. This means that each electrode overlapping portion 121 is arranged in correspondence with one first groove 111, or that each electrode overlapping portion 121 is arranged in correspondence with two or more first grooves 111. Alternatively, each electrode overlapping portion 121 is arranged in correspondence with one first groove 111.

[0110] The thickness of the electrode overlapping portion 121 can be equal to the depth of the first groove 111 (i.e., the electrode overlapping portion 121 completely fills the first groove 111), greater than the depth of the first groove 111 (i.e., the electrode overlapping portion 121 fills and protrudes from the first groove 111), or less than the depth of the first groove 111 (i.e., the electrode overlapping portion 121 does not fill the first groove 111), without limitation.

[0111] The material of the electrode overlapping portion 121 includes a metal material, such as aluminum, titanium, copper, or a combination thereof. Each electrode overlapping portion 121 is electrically connected to the ELVSS power line, and is configured to provide a negative voltage to the light emitting device 14.

[0112] The isolation structure 13 is arranged on the side of the first pixel defining layer 11 away from the array substrate 10, and defines a plurality of isolation openings 13a. The plurality of isolation openings 13a are arranged in correspondence with the plurality of electrode overlapping portions 121. The plurality of light emitting devices 14 are arranged on one side of the array substrate 10. The plurality of light emitting devices 14 are arranged in correspondence with the plurality of isolation openings 13a. At least part of the light emitting device 14 is arranged in the corresponding isolation opening 13a. The light emitting device 14 includes a first electrode 141, a light emitting portion 142, and a second electrode 143 arranged in layers on the side away from the array substrate 10. The second electrode 143 is electrically connected to the corresponding electrode overlapping portion 121.

[0113] The isolation structure 13 refers to a structure that can isolate the light emitting portions 142 of adjacent light emitting devices 14 when the light emitting functional material of the light emitting device 14 is evaporated. By arranging the isolation structure 13, the light emitting device 14 can be processed by a patterned photolithography process, thereby eliminating the FMM and facilitating the improvement of PPI. Further, because the light emitting device 14 is manufactured by a patterned photolithography process, compared with a display panel in which the light emitting device 14 is evaporated by using the FMM, the isolation structure 13 can make the shape of the light emitting device 14 more abundant and the arrangement more optimized. In the present embodiment, the isolation structure 13 is an undercut structure with a large upper part and a small lower part. When the light emitting portion 142 of the light emitting device 14 is evaporated, the undercut structure can isolate the light emitting portion 142.

[0114] The isolation opening 13a penetrates the isolation structure 13 along the thickness direction of the array substrate 10, and a plurality of isolation openings 13a are in one-to-one correspondence with a plurality of first pixel openings 11a. The plurality of isolation openings 13a include a plurality of first isolation openings, a plurality of second isolation openings, and a plurality of third isolation openings, and the plurality of first pixel openings 11a include pixel openings in communication with the first isolation openings, pixel openings in communication with the second isolation openings, and pixel openings in communication with the third isolation openings. The shape of the orthographic projection of the first pixel opening 11a and the corresponding isolation opening 13a on the array substrate 10 can be the same or different. Generally, the area of the orthographic projection of the isolation opening 13a on the array substrate 10 is greater than the area of the orthographic projection of the first pixel opening 11a in communication with the isolation opening 13a on the array substrate 10. The orthographic projection of the first pixel opening 11a of the light emitting device 14 on the array substrate 10 overlaps the orthographic projection of the isolation opening 13a on the array substrate 10.

[0115] The plurality of isolation openings 13a are arranged in correspondence with the plurality of electrode overlap portions 121, which means that the plurality of isolation openings 13a are arranged in one-to-one correspondence with the plurality of electrode overlap portions 121, and each electrode overlap portion 121 is arranged on one side of the corresponding isolation opening. Specifically, each electrode overlap portion 121 is arranged on one side of the corresponding isolation opening 13a opposite to the other side.

[0116] The positional relationship between each electrode overlap portion 121 and the isolation structure 13 can be that the orthographic projection of the isolation structure 13 on the array substrate 10 covers the orthographic projection of each electrode overlap portion 121 on the array substrate 10.

[0117] The plurality of light emitting devices 14 are located on one side of the array substrate 10, and the plurality of light emitting devices 14 include a plurality of first light emitting devices, a plurality of second light emitting devices, and a plurality of third light emitting devices. The first light emitting devices are arranged in correspondence with the first isolation openings, the second light emitting devices are arranged in correspondence with the second isolation openings, and the third light emitting devices are arranged in correspondence with the third isolation openings. In one embodiment, one light emitting device 14 is arranged in correspondence with one isolation opening 13a, such as one first light emitting device arranged in one-to-one correspondence with one first isolation opening, one second light emitting device arranged in one-to-one correspondence with one second isolation opening, and one third light emitting device arranged in one-to-one correspondence with one third isolation opening. At least part of the first light emitting device is arranged in the corresponding first isolation opening, at least part of the second light emitting device is arranged in the corresponding second isolation opening, and at least part of the third light emitting device is arranged in the corresponding third isolation opening. In another embodiment, a plurality of light emitting devices 14 are arranged in correspondence with one isolation opening 13a, such as a plurality of light emitting devices 14 of the same color arranged in correspondence with one isolation opening 13a.

[0118] The first light emitting device, the second light emitting device, and the third light emitting device respectively emit light of different colors; each of the first light emitting device, the second light emitting device, and the third light emitting device includes a first electrode 141, a light emitting portion 142, and a second electrode 143 which are stacked. The first electrode 141 is provided on the array substrate 10, the end portion of the first electrode 141 is covered with the first pixel defining layer 11, and the first pixel opening 11a is provided in the first pixel defining layer 11, through which the first electrode 141 is exposed. The light emitting portion 142 of each of the first light emitting device, the second light emitting device, and the third light emitting device covers the side wall of the first pixel opening 11a of the first pixel defining layer 11 and the side of the first pixel defining layer 11 which faces away from the array substrate 10. Each light emitting portion 142 is located in the first pixel opening 11a and is in contact with the first electrode 141.

[0119] The second electrode 143 of each of the first light emitting device, the second light emitting device, and the third light emitting device respectively covers the corresponding light emitting portion 142. The second electrode 143 can or can not be connected to the isolation structure 13.

[0120] The first electrode 141 can be an anode, and the second electrode 143 can be a cathode. The first electrode 141 of each light emitting device 14 can be connected to the pixel circuit through a via hole, so that the pixel circuit drives the light emitting device 14 to emit light.

[0121] The first electrode 141 can include a multi-layer structure, such as a reflective layer and a pair of conductive oxide layers which respectively cover the upper surface and the lower surface of the reflective layer. The reflective layer can be formed, for example, using a metal material such as silver which has excellent light reflectivity. Each conductive oxide layer can be formed, for example, from a transparent conductive oxide such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or IGZO (Indium Gallium Zinc Oxide). The second electrode 143 is formed, for example, from a metal material such as an alloy of magnesium and silver (MgAg).

[0122] Figure 6is a schematic view of the light emitting part 142 of an embodiment of the present application. The light emitting part 142 of at least one of the first light emitting device, the second light emitting device and the third light emitting device includes a hole injection layer (HIL), a hole transport layer (HTL), an electron block layer (EBL), an electroluminescent material layer (EML), a hole block layer (HBL), an electron transport layer (ETL) and an electron injection layer (EIL) which are stacked in a direction away from the array substrate 10 (i.e. the Z direction). The light emitting part 142 can include one electroluminescent material layer EML or a stacked light emitting structure including a plurality of electroluminescent material layers EML.

[0123] In order for the light emitting part 142 to emit light, a pixel voltage is provided to the first electrode 141 and a common voltage is provided to the second electrode 143, a potential difference is formed between the first electrode 141 and the second electrode 143, so that the light emitting part 142 disposed between the first electrode 141 and the second electrode 143 emits light. In an embodiment, if a potential difference is formed between the first electrode 141 and the second electrode 143 of the first light emitting device, the electroluminescent material layer EML of the light emitting part 142 emits blue light, if a potential difference is formed between the first electrode 141 and the second electrode 143 of the second light emitting device, the electroluminescent material layer EML of the light emitting part 142 emits green light, and if a potential difference is formed between the first electrode 141 and the second electrode 143 of the third light emitting device, the electroluminescent material layer EML of the light emitting part 142 emits red light.

[0124] The pixel voltage of the first electrode 141 is provided by the pixel circuit, and the common voltage of the second electrode 143 is provided by the isolation structure 13. Specifically, the second electrode 143 is electrically connected to the auxiliary electrode 12, and the common voltage is supplied to the second electrode 143 by providing the common voltage to the auxiliary electrode 12. That is, the auxiliary electrode 12 has the function of supplying the common voltage to the second electrode 143.

[0125] The plurality of light emitting devices 14 are disposed corresponding to the plurality of isolation openings 13a, which can mean that the plurality of light emitting devices 14 are disposed one-to-one corresponding to the plurality of isolation openings 13a. Each pair of the first electrode 141, the light emitting part 142 and the second electrode 143 which are stacked constitutes a sub-pixel. At least part of each sub-pixel is disposed in the isolation opening 13a, and the area to which the isolation opening 13a belongs is also referred to as a light emitting area.

[0126] It can be understood that when the plurality of light emitting devices 14 are arranged corresponding to the plurality of isolation openings 13a, and the plurality of isolation openings 13a are arranged corresponding to the plurality of electrode contact portions 121, then the plurality of light emitting devices 14 are arranged corresponding to the plurality of electrode contact portions 121. Therefore, when the plurality of light emitting devices 14 are arranged one-to-one corresponding to the plurality of isolation openings 13a, and the plurality of isolation openings 13a are arranged one-to-one corresponding to the plurality of electrode contact portions 121, then the plurality of light emitting devices 14 are arranged one-to-one corresponding to the plurality of electrode contact portions 121.

[0127] As described above, along the second direction y, the plurality of first grooves 111 are arranged at intervals, and each first groove 111 is arranged on one side of the corresponding first pixel opening 11a. Therefore, when the plurality of electrode contact portions 121 are arranged one-to-one corresponding to the plurality of first grooves 111, along the second direction y, the plurality of electrode contact portions 121 are also arranged at intervals, and each electrode contact portion 121 is arranged on one side of the corresponding first pixel opening 11a. Since the plurality of isolation openings 13a are arranged one-to-one corresponding to the plurality of electrode contact portions 121, each electrode contact portion 121 is also arranged on one side of the corresponding isolation opening 13a. Therefore, it can be understood that the light emitting device 14 is electrically connected to the corresponding electrode contact portion 121, that is, the directional contact of the light emitting device 14 is achieved.

[0128] In addition, it should be noted that the auxiliary electrode 12 extends from the display area AA to the non-display area NA and is connected to the power signal line. The power signal line can be an ELVSS power line, that is, a power line providing negative voltage, or a power line providing common voltage.

[0129] In this embodiment, the first pixel defining layer 11 of the display panel is provided with a plurality of first grooves 111, and the plurality of electrode contact portions 121 are arranged corresponding to the plurality of first grooves 111. In this way, when the light emitting device 14 is evaporated, by controlling the evaporation angle, the second electrode 143 of the light emitting device 14 is connected to the electrode contact portion 121, directional contact is achieved, and the display panel can be effectively prevented from leaking current, thereby improving the yield of finished products of the display panel.

[0130] In one embodiment, referring to Figure 5 As shown in Figure 7 , wherein, Figure 7 Another cross-sectional view of a display panel is provided, which further comprises a second pixel defining layer 15 arranged on the side of the first pixel defining layer 11 close to the array substrate 10; the second pixel defining layer 15 is provided with a second groove 151 on the side away from the array substrate 10 Figure 7The auxiliary electrode 12 of the display panel further includes a main body portion 122 disposed on the side of the plurality of electrode overlapping portions 121 close to the array substrate 10. Specifically, the main body portion 122 can be disposed in the second groove 151 and electrically connected to the plurality of electrode overlapping portions 121.

[0131] The material of the second pixel defining layer 15 can be the same as or different from the material of the first pixel defining layer 11, which is not limited herein. In an example, the material of the second pixel defining layer 15 is an inorganic material, for example, the first pixel defining layer 11 is formed by using an inorganic insulating material such as at least one of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON). The thickness of the second pixel defining layer 15 can be greater than the thickness of the first pixel defining layer 11.

[0132] The second pixel defining layer 15 defines a plurality of second pixel openings 15a, and the side wall of the second pixel defining layer 15 close to the second pixel opening 15a can be a bevel or an arc. The plurality of second pixel openings 15a are arranged corresponding to the plurality of first electrodes 141, and at least part of the surface of each first electrode 141 is exposed from the corresponding second pixel opening 15a. Here, the plurality of second pixel openings 15a and the plurality of first electrodes 141 should be arranged one-to-one, that is, the plurality of second pixel openings 15a and the plurality of first electrodes 141 are arranged one-to-one.

[0133] It can be understood that the plurality of second pixel openings 15a and the plurality of first pixel openings 11a are in one-to-one communication, and the second pixel defining layer 15 and the first pixel defining layer 11 jointly define the light-emitting area of each sub-pixel, avoiding the diffusion of light-emitting functional materials between sub-pixels and the color mixing phenomenon.

[0134] The plurality of isolation openings 13a and the plurality of second pixel openings 15a are in one-to-one communication, and the shape of the second pixel opening 15a and the corresponding isolation opening 13a in the orthographic projection on the array substrate 10 can be the same or different. Generally, the area of the orthographic projection of the isolation opening 13a on the array substrate 10 is greater than the area of the orthographic projection of the second pixel opening 15a in communication with the isolation opening 13a on the array substrate 10. The orthographic projection of the second pixel opening 15a of the light-emitting device 14 on the array substrate 10 and the orthographic projection of the isolation opening 13a on the array substrate 10 overlap.

[0135] It can be understood that the first pixel opening 11a and the second pixel opening 15a jointly constitute the pixel opening of the light-emitting device 14.

[0136] The second groove 151 formed on the second pixel defining layer 15 has a grid-like orthogonal projection on the array substrate 10. Therefore, the main body portion 122 provided in the second groove 151 also has a grid-like orthogonal projection on the array substrate 10. The main body portion 122 is connected to the electrode overlap portion 121 corresponding to each light-emitting device 14, and then the main body portion 122 is connected to the ELVSS power line, so that the auxiliary electrode 12 becomes a common electrode.

[0137] The sidewall of the second groove 151 can be a slope or an arc surface, so that the main body 122 is less likely to break during the fabrication of the main body 122, ensuring the power supply stability of the auxiliary electrode 12 and thus improving the yield of the finished display panel; it can also be a vertical surface relative to the plane of the array substrate 11, which is not limited here.

[0138] The second groove 151 can be a groove that penetrates the second pixel defining layer 15 along the thickness direction of the array substrate 10, or it can be a groove that does not penetrate the second pixel defining layer 15 along the thickness direction of the array substrate 10. Optionally, the structure in which the second groove 151 does not penetrate the second pixel defining layer 15 can be adopted, so that the main body portion 122 in the second groove can be avoided from being connected to the first electrode 141.

[0139] When the first groove 111 is a groove that penetrates the first pixel defining layer 11 along the thickness direction of the array substrate 10, the second groove 151 can be connected to the multiple electrode overlap portions 121 to achieve electrical connection between the main body 122 and the multiple first grooves 111. When the first groove 111 is a groove that does not penetrate the first pixel defining layer 11 along the thickness direction of the array substrate 10, a via can be provided on the first pixel defining layer 11 between the second groove 151 and each of the first grooves 111 to achieve electrical connection between the main body 122 and the multiple electrode overlap portions 121. Optionally, if the first groove 111 is a groove that penetrates the first pixel defining layer 11 along the thickness direction of the array substrate 10, and the second groove 151 is connected to the multiple first grooves 111, the manufacturing process of the auxiliary electrode 12 can be reduced.

[0140] The main body 122 is disposed in the second groove 151. The thickness of the main body 122 can be equal to the depth of the second groove 151 (i.e., the main body 122 completely fills the second groove 151), the thickness of the main body 122 can be greater than the depth of the second groove 151 (i.e., the main body 122 fills and protrudes from the second groove 151), or the thickness of the main body 122 can be less than the depth of the second groove 151 (i.e., the main body 122 does not fill the second groove 151). No limitation is made here. It can be understood that when the thickness of the main body 122 is less than the depth of the second groove 151, a portion of the electrode overlap portion 121 can be located in the second groove 151 to achieve electrical connection between the electrode overlap portion 121 and the main body 122.

[0141] The material of the main body 122 can be the same as or different from the material of the electrode overlap portion 121, which is not limited herein. The material of the main body 122 includes a metal material, for example, can be aluminum, aluminum alloy, titanium, copper or a combination of metals, etc. The aluminum alloy can include at least one of aluminum neodymium alloy (AlNd), aluminum yttrium alloy (AlY) or aluminum silicon alloy (AlSi).

[0142] The positional relationship between the main body 122 and the isolation structure can be that the orthographic projection of the isolation structure 13 on the array substrate 10 covers the orthographic projection of the main body 122 on the array substrate 10. The positional relationship between the main body 122 and each first electrode 141 can be that the orthographic projection of the main body 122 on the array substrate 10 at least partially overlaps the orthographic projection of each first electrode 141 on the array substrate 10.

[0143] The main body 122 extends from the display area AA to the non-display area NA and is connected with the power signal line to provide the power signal for the plurality of electrode overlap portions 121. The power signal line can be an ELVSS power line, that is, a power line providing negative voltage or a power line providing common voltage. Therefore, by providing the common voltage to the main body 122, the common voltage can be supplied to the second electrode 143.

[0144] In the embodiment, the auxiliary electrode 12 further includes the main body 122 electrically connected with the plurality of electrode overlap portions 121, so that the auxiliary electrode 12 is a common electrode to realize simultaneous control of the second electrodes 143 of the plurality of light emitting devices 14.

[0145] In one of the embodiments, continuing to refer to Figure 7 The isolation structure 13 includes a plurality of film layers, and the material of the film layer close to the array substrate 10 of the isolation structure 13 includes an insulating material. In this way, in addition to controlling the evaporation angle in the second direction y to make the light emitting portion 142 of the light emitting device 14 unable to be connected with the electrode overlap portion 121, in the remaining directions, because the film layer close to the array substrate 10 of the isolation structure 13 includes an insulating material, the evaporation angle can be controlled, thereby simplifying the source design of the evaporation machine, and greatly improving the material utilization rate.

[0146] In one of the embodiments, the isolation structure 13 includes a first isolation portion 131 and a second isolation portion 132 stacked in a direction away from the array substrate 10, and the orthographic projection of the second isolation portion 132 on the array substrate 10 covers the orthographic projection of the first isolation portion 131 on the array substrate 10. In this way, the isolation structure 13 with an undercut structure is realized.

[0147] The material of the second isolation portion 132 may include at least one of titanium, titanium nitride, molybdenum, tungsten, molybdenum-tungsten alloy, or molybdenum-niobium alloy. The material of the first isolation portion 131 includes an inorganic insulating material. For example, the first isolation portion 131 is formed using at least one of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON).

[0148] The positional relationship between the first isolation portion 131 and the auxiliary electrode 12 can be such that the orthographic projection of the first isolation portion 131 on the array substrate 10 does not overlap with the orthographic projection of the plurality of electrode overlapping portions 121 on the array substrate 10; and at least a portion of the orthographic projection of the first isolation portion 131 on the array substrate 10 overlaps with the orthographic projection of the main body portion 122 on the array substrate 10.

[0149] The positional relationship between the second isolation portion 132 and the auxiliary electrode 12 can be such that the orthographic projection of the second isolation portion 132 on the array substrate 10 covers the orthographic projection of the plurality of electrode overlap portions 121 on the array substrate 10. The orthographic projection of the second isolation portion 132 on the array substrate 10 covers the orthographic projection of the main body portion 122 on the array substrate 10.

[0150] The above Figure 7 A cross-sectional view of the display panel in the second direction y is provided, and a cross-sectional view of the display panel in the first direction x is provided as follows. Figure 8 As shown, the first direction x is the direction intersecting with the second direction y, for example, the first direction x is the direction in which the nozzles are arranged (nozzle direction). It should be noted that, in the first direction x, the second electrode 143 of each light-emitting device 14 may or may not cover at least a portion of the sidewall of the first isolation portion 131; in the second direction y, the second electrode 143 of each light-emitting device 14 may or may not cover at least a portion of the sidewall of the first isolation portion 131.

[0151] based on Figure 7 and Figure 8 The perspective view of the above display panel is as follows Figure 9 As shown, it should be noted that Figure 9 The arrangement of neutron pixels is just one example.

[0152] In one of the embodiments, as mentioned above, the main body 122 has a grid shape in the orthographic projection on the array substrate 10, and the main body 122 has a plurality of grids 122a. Since the orthographic projection of the isolation structure 13 on the array substrate 10 covers the orthographic projection of the main body 122 on the array substrate 10, the plurality of grids 122a of the main body 122 are arranged in correspondence with the plurality of isolation openings 13a of the isolation structure 13. In order to ensure the overlap of each second electrode 143 and the corresponding electrode overlap portion 121 in the second direction y, the distance between the two opposite sides of the grid 122a is greater than the distance between the two opposite sides of the isolation opening 13a in the first direction x. The first distance L1 refers to the distance between the two opposite sides of the grid 122a in the first direction, and the second distance L2 refers to the distance between the two opposite sides of the isolation opening 13a in the first direction.

[0153] In the first direction x, the length of the electrode overlap portion 121 is the first length H1, and the distance between the two opposite sides of the isolation opening 13a corresponding to the electrode overlap portion 121 is the second distance L2. The first length H1 is greater than or equal to the second distance L2. In this way, the electrode overlap portion 121 can be better overlapped with the corresponding second electrode 143.

[0154] It should be noted that in the present embodiment, the two opposite sides of the isolation opening 13a refer to the two opposite sides of the isolation opening 13a boundary formed by the first isolation portion 131, or refer to the two opposite sides of the isolation opening 13a boundary formed by the second isolation portion 132. In other words, the second distance L2 can be the distance L21 between the two opposite sides of the isolation opening 13a boundary formed by the first isolation portion 131, or can be the distance L22 between the two opposite sides of the isolation opening 13a boundary formed by the second isolation portion 132.

[0155] The isolation opening 13a boundary formed by the first isolation portion 131 can be the isolation opening 13a boundary formed by the first isolation portion 131 close to the bottom of the array substrate 10. The isolation opening 13a boundary formed by the second isolation portion 132 can be the isolation opening 13a boundary formed by the second isolation portion 132 close to the bottom of the array substrate 10.

[0156] The best way is that, as shown in Figure 10A , the first distance L1 is greater than the distance L21 between the two opposite sides of the isolation opening 13a boundary formed by the first isolation portion 131; as shown in Figure 10B , the first length H1 is greater than or equal to the distance L22 between the two opposite sides of the isolation opening 13a boundary formed by the second isolation portion 132.

[0157] In one of the embodiments, as shown in Figure 11 and Figure 12 , the first distance L1 is greater than the distance L21 between the two opposite sides of the isolation opening 13a boundary formed by the first isolation portion 131; as shown in Figure 11Another cross-sectional view of the display panel in the second direction is provided, Figure 12 Another cross-sectional view of the display panel in the first direction is provided. The display panel 1 further comprises a first encapsulation layer, the first encapsulation layer comprises a plurality of encapsulation portions 16, the encapsulation portions 16 are located on the side of the second electrode 143 away from the array substrate 10 and extend to the side of the isolation structure 13 away from the array substrate 10 through the side wall of the isolation structure 13. The plurality of encapsulation portions 16 comprises a plurality of first encapsulation portions corresponding to the plurality of first light emitting devices, a plurality of second encapsulation portions corresponding to the plurality of second light emitting devices, and a plurality of third encapsulation portions corresponding to the plurality of third light emitting devices, the first encapsulation portion is arranged on the side of the corresponding first light emitting device away from the array substrate 10, the second encapsulation portion is arranged on the side of the corresponding second light emitting device away from the array substrate 10, and the third encapsulation portion is arranged on the side of the corresponding third light emitting device away from the array substrate 10.

[0158] Optionally, the encapsulation portion 16 can be a single-layer inorganic film layer or a multi-layer inorganic film layer, and the inorganic film layer can be a silicon oxide layer, a silicon nitride layer, etc. The encapsulation portion 16 can also be a mixture of an organic film layer and an inorganic film layer. The encapsulation portion 16 can prevent the sub-pixel from being corroded by water vapor.

[0159] The display panel 1 further comprises a second encapsulation layer and a third encapsulation layer, the second encapsulation layer covers the isolation structure 13 and the encapsulation portion 16, and the third encapsulation layer covers the second encapsulation layer. The third encapsulation layer is made of inorganic material, and the material of the first encapsulation layer and the third encapsulation layer comprises at least one of silicon nitride (SiN), silicon oxide (SiO), and silicon oxynitride (SiON). The second encapsulation layer is made of organic insulating material, such as epoxy resin, acrylic resin, and other resin materials. The second encapsulation layer and the third encapsulation layer are continuously arranged at least on the display area AA as a whole, and a part thereof is also arranged in the frame area NA.

[0160] The display panel 1 can further comprise at least one film layer such as a touch layer, a polarizer, a color film substrate, a protective cover plate, etc. The film layer can also be bonded in the display panel through an adhesive layer such as OCA (Optical Clear Adhesive).

[0161] In one embodiment, referring to Figures 1-12 The present application further provides another display panel, which comprises:

[0162] an array substrate 10;

[0163] a second pixel defining layer 15 arranged on one side of the array substrate 10, and a second recess 151 is arranged on the side of the second pixel defining layer 15 away from the array substrate 10;

[0164] The first pixel defining layer 11 is arranged on the side of the second pixel defining layer 15 away from the array substrate 10, and the first pixel defining layer 11 is provided with a plurality of first recesses 111;

[0165] The auxiliary electrode includes a main body part 122 and a plurality of electrode overlapping parts 121, the main body part 122 is arranged in the second recess 151, and the plurality of electrode overlapping parts 121 are arranged in the plurality of first recesses 111 correspondingly; the main body part 122 is electrically connected with the plurality of electrode overlapping parts 121;

[0166] The isolation structure 13 is arranged on the side of the first pixel defining layer 11 away from the array substrate 10, and a plurality of isolation openings 13a are defined by the isolation structure 13; the plurality of isolation openings 13a are arranged in the plurality of electrode overlapping parts 121 correspondingly;

[0167] The plurality of light emitting devices 14 are arranged on the side of the array substrate 10; the plurality of light emitting devices 14 are arranged in the plurality of isolation openings 13a correspondingly; at least part of the light emitting device 14 is arranged in the corresponding isolation opening 13a; the light emitting device 14 includes a first electrode 141, a light emitting part 142 and a second electrode 143 arranged in the direction away from the array substrate 10; the second electrode 143 is electrically connected with the corresponding electrode overlapping part 121.

[0168] In one of the embodiments, the main body part 122 has a grid-shaped orthographic projection on the array substrate 10;

[0169] Optionally, the second recess 151 is in communication with the plurality of first recesses 111;

[0170] Optionally, the second recess 151 has a grid-shaped orthographic projection on the array substrate 10.

[0171] In one of the embodiments, the isolation structure 13 has an orthographic projection on the array substrate 10 covering an orthographic projection of the main body part 122 on the array substrate 10;

[0172] Optionally, the orthographic projection of the main body part 122 on the array substrate 10 overlaps at least part of the orthographic projection of the first electrode 141 on the array substrate 10.

[0173] In one of the embodiments, the isolation structure 13 includes a plurality of film layers, and the material of the film layer close to the array substrate 10 of the isolation structure 13 includes an insulating material;

[0174] Optionally, the isolation structure 13 includes a first isolation part 131 and a second isolation part 132 arranged in the direction away from the array substrate 10, and the second isolation part 132 has an orthographic projection on the array substrate 10 covering an orthographic projection of the first isolation part 131 on the array substrate 10;

[0175] Optionally, the material of the second isolation portion 132 includes titanium or molybdenum; and the material of the first isolation portion 131 includes an inorganic insulating material.

[0176] In one of the embodiments, the orthogonal projection of the first isolation portion 131 on the array substrate 10 does not overlap with the orthogonal projection of the plurality of electrode overlap portions 121 on the array substrate 10.

[0177] The orthogonal projection of the second isolation portion 132 on the array substrate 10 covers the orthogonal projection of the plurality of electrode overlap portions 121 on the array substrate 10.

[0178] In one of the embodiments, the orthogonal projection of the first isolation portion 131 on the array substrate 10 at least partially overlaps with the orthogonal projection of the main body portion 122 on the array substrate 10.

[0179] The orthogonal projection of the second isolation portion 132 on the array substrate 10 covers the orthogonal projection of the main body portion 122 on the array substrate 10.

[0180] In one of the embodiments, the plurality of meshes 122a of the main body portion 122 are arranged corresponding to the plurality of isolation openings 13a; along the first direction, the distance between the opposite sides of the mesh 122a of the main body portion 122 is a first distance L1, and the distance between the opposite sides of the isolation opening 13a is a second distance L2, and the first distance L1 is greater than the second distance L2.

[0181] Optionally, each electrode overlap portion 121 is arranged on one side of the corresponding isolation opening 13a.

[0182] Optionally, each electrode overlap portion 121 is arranged on one side of the corresponding isolation opening 13a, which is opposite to the other side of the isolation opening 13a along the second direction y, the second direction y intersects the first direction x, and the second direction y is parallel to the extension direction of the scan lines in the array substrate 10.

[0183] Optionally, the display panel 1 includes a display area and a non-display area surrounding the display area, and the main body portion 122 extends from the display area to the non-display area to be connected with the power signal line.

[0184] In one of the embodiments, along the first direction, the length of the electrode overlap portion 121 is a first length H1, and the distance between the opposite sides of the isolation opening 13a corresponding to the electrode overlap portion 121 is a second distance L2, and the first length H1 is greater than or equal to the second distance L2.

[0185] The display panel in the embodiment has been described in detail above, and will not be described here again.

[0186] In one of the embodiments, as shown in Figure 13 The application further provides a display panel manufacturing method, which can be used to manufacture the display panel in the above display panel embodiments.

[0187] The preparation method of the display panel comprises:

[0188] Step S801, providing an array substrate 10.

[0189] Step S802, forming a first pixel defining layer 11 on one side of the array substrate 10, and opening a plurality of first grooves 111 in the first pixel defining layer 11.

[0190] Step S803, forming a first metal layer M1 on the side of the first pixel defining layer 11 away from the array substrate 10, and performing a patterning process on the first metal layer M1 to obtain a plurality of electrode lap joints 121 of the auxiliary electrode 12; the plurality of electrode lap joints 121 are correspondingly arranged in the plurality of first grooves 111.

[0191] Step S804, forming an isolation structure 13 on the side of the first pixel defining layer 11 away from the array substrate 10, the isolation structure 13 being provided with a plurality of isolation openings 13a; the plurality of isolation openings 13a are correspondingly arranged with the plurality of electrode lap joints 121.

[0192] Step S805, forming a plurality of light emitting devices 14 on one side of the array substrate 10; the plurality of light emitting devices 14 are correspondingly arranged with the plurality of isolation openings 13a; the light emitting device 14 comprises a first electrode 141, a light emitting part 142 and a second electrode 143 which are stacked on the side away from the array substrate 10; the second electrode 143 is electrically connected with the corresponding electrode lap joint 121.

[0193] Optionally, before forming the first pixel defining layer 11 on one side of the array substrate 10, the preparation method further comprises: forming a second pixel defining layer 15 on one side of the array substrate 10; opening a second groove 151 in the second pixel defining layer 15; forming a second metal layer M2 on the side of the second pixel defining layer 15 away from the array substrate 10, and performing a patterning process on the second metal layer M2 to obtain a main body part 122 of the auxiliary electrode 12; the main body part is located in the second groove 151; wherein the main body part 122 is electrically connected with the plurality of electrode lap joints 121.

[0194] Correspondingly, forming the first pixel defining layer 11 on one side of the array substrate 10 comprises: forming the first pixel defining layer 11 on the side of the second pixel defining layer 15 away from the array substrate 10.

[0195] Optionally, before forming the second pixel defining layer 15 on one side of the array substrate 10, the method further comprises: forming a first electrode layer M3 on one side of the array substrate 10, and performing a patterning process on the first electrode layer M3 to obtain a plurality of first electrodes 141. Wherein, the first electrode layer M3 can be formed on a planarization layer of the array substrate 10.

[0196] Optionally, the isolation structure 13 is formed on the side of the first pixel defining layer 11 away from the array substrate 10, comprising: forming a first isolation portion 131 on the side of the first pixel defining layer 11 away from the array substrate 10; forming a second isolation portion 132 on the side of the first isolation portion 131 away from the array substrate 10; and performing a patterning process on the first isolation portion 131 and the second isolation portion 132 to obtain the isolation structure 13.

[0197] In summary, the schematic diagram of the preparation method is shown in Figure 14 and Figure 15 , Figure 14 is a cross-sectional view of the preparation process in the second direction, Figure 15 is a cross-sectional view of the preparation process in the first direction.

[0198] After forming the isolation structure 13, the first pixel defining layer 11 and the second pixel defining layer 15 are etched to form a plurality of pixel openings, which can be understood as including a first pixel opening 11a and a second pixel opening 15a.

[0199] In one embodiment, the plurality of isolation openings 13a includes a plurality of first isolation openings, a plurality of second isolation openings, and a plurality of third isolation openings, and the plurality of light emitting devices 14 includes a first light emitting device, a second light emitting device, and a third light emitting device; the plurality of light emitting devices 14 is formed on the side of the array substrate 10, comprising:

[0200] Step S8051: manufacturing a film layer of the first light emitting device, which includes a light emitting portion of the first light emitting device and a second electrode layer.

[0201] Step S8052: manufacturing a first encapsulation layer of the first light emitting device. Since the film layer of the first light emitting device and the first encapsulation layer of the first light emitting device are both prepared as a whole layer, the positions of the plurality of first isolation openings, the plurality of second isolation openings, and the plurality of third isolation openings are all provided with the film layer of the first light emitting device and the first encapsulation layer of the first light emitting device.

[0202] Step S8053: etching to remove the film layer of the first light emitting device and the first encapsulation layer of the first light emitting device at the positions of the plurality of second isolation openings and the plurality of third isolation openings, so as to form only the light emitting portion 142 and the second electrode 143 of the first light emitting device, and the first encapsulation portion of the first light emitting device at the positions of the plurality of first isolation openings.

[0203] Step S8054: manufacturing a film layer of the second light emitting device, which includes a light emitting portion of the second light emitting device and a second electrode layer.

[0204] At step S8055, a first encapsulation layer of the second light-emitting device is manufactured. Since the film layer of the second light-emitting device and the first encapsulation layer of the second light-emitting device are both prepared as a whole, the positions of the plurality of first isolation openings, the plurality of second isolation openings, and the plurality of third isolation openings are all provided with the film layer of the second light-emitting device and the first encapsulation layer of the second light-emitting device.

[0205] At step S8056, the film layer of the second light-emitting device and the first encapsulation layer of the second light-emitting device at the positions of the plurality of first isolation openings and the plurality of third isolation openings are etched and removed, so that the light-emitting part 142 and the second electrode 143 of the second light-emitting device and the first encapsulation part of the second light-emitting device are only formed at the positions of the plurality of second isolation openings.

[0206] At step S8057, a film layer of the third light-emitting device is manufactured, which includes the light-emitting part and the second electrode layer of the second light-emitting device.

[0207] At step S8058, a first encapsulation layer of the third light-emitting device is manufactured. Since the film layer of the third light-emitting device and the first encapsulation layer of the third light-emitting device are both prepared as a whole, the positions of the plurality of first isolation openings, the plurality of second isolation openings, and the plurality of third isolation openings are all provided with the film layer of the third light-emitting device and the first encapsulation layer of the third light-emitting device.

[0208] At step S8059, the film layer of the third light-emitting device and the first encapsulation layer of the third light-emitting device at the positions of the plurality of first isolation openings and the plurality of second isolation openings are etched and removed, so that the light-emitting part 142 and the second electrode 143 of the third light-emitting device and the first encapsulation part of the third light-emitting device are only formed at the positions of the plurality of third isolation openings.

[0209] In an embodiment, the display device provided by the embodiments of the present application includes the display panel described in any of the display panel embodiments.

[0210] The display device can be a notebook computer, a mobile phone, a wireless device, a personal data assistant (PDA), a handheld or portable computer, a GPS receiver / navigator, a camera, an MP4 video player, a video camera, a game console, a watch, a clock, a calculator, a television monitor, a flat panel display, a computer monitor, an automobile display (e.g., an odometer display, etc.), a navigator, a cockpit controller and / or display, a display of a camera view (e.g., a display of a rearview camera in a vehicle), an electronic photo, an electronic billboard or sign, a projector, etc. Since the display device includes the display panel in the present application, the reliability of the electronic device is higher.

[0211] In the case of using "include", "have", and "contain" described in this paper, unless the explicit limiting language is used, such as "only", "consisting of", etc., another component can also be added. Unless otherwise mentioned, the singular form of the term can include the plural form and cannot be understood as the number of one.

[0212] In the description of the present application, it should be noted that the terms "center", "vertical", "vertical", "horizontal", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship commonly placed when the product of the application is used, only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.

[0213] The technical features of the above embodiments can be combined in any way. In order to make the description simple, all possible combinations of the technical features in the above embodiments are not described, but as long as the combination of the technical features does not exist contradictory, it should be considered as the scope of the present application.

[0214] The above-described embodiments only express several implementation manners of the present application, and the description is more specific and detailed, but it should not be understood as a limitation on the scope of the patent of the present application. It should be noted that for ordinary skilled in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which are within the scope of protection of the present application. Therefore, the scope of protection of the present application should be subject to the appended claims.

Claims

1. A display panel, characterized in that, The display panel includes: Array substrate; A first pixel defining layer is disposed on one side of the array substrate; the first pixel defining layer has a plurality of first grooves; An auxiliary electrode includes multiple electrode overlap portions, which are correspondingly disposed in the multiple first grooves; An isolation structure is disposed on the side of the first pixel defining layer away from the array substrate, and defines a plurality of isolation openings; the plurality of isolation openings are correspondingly disposed with respect to the plurality of electrode overlap portions; Multiple light-emitting devices are disposed on one side of the array substrate; the multiple light-emitting devices are correspondingly disposed with the multiple isolation openings; at least a portion of the light-emitting devices is disposed within the corresponding isolation openings; each light-emitting device includes a first electrode, a light-emitting portion, and a second electrode stacked along the side away from the array substrate; the second electrode is electrically connected to the corresponding electrode overlap portion.

2. The display panel according to claim 1, characterized in that, The auxiliary electrode also includes a main body portion, which is disposed on the side of the plurality of electrode overlap portions near the array substrate; the main body portion is electrically connected to the plurality of electrode overlap portions.

3. The display panel according to claim 2, characterized in that, The orthographic projection of the main body onto the array substrate is a grid pattern.

4. The display panel according to claim 2, characterized in that, The orthographic projection of the isolation structure on the array substrate covers the orthographic projection of the main body on the array substrate.

5. The display panel according to claim 2, characterized in that, The orthographic projection of the main body on the array substrate overlaps at least partially with the orthographic projection of each of the first electrodes on the array substrate.

6. The display panel according to claim 2, characterized in that, The display panel further includes a second pixel defining layer disposed on the side of the first pixel defining layer near the array substrate; The second pixel defining layer has a second groove on the side away from the array substrate, and the main body is disposed in the second groove.

7. The display panel according to claim 6, characterized in that, The second groove is in communication with the plurality of first grooves.

8. The display panel according to claim 2, characterized in that, The isolation structure includes multiple film layers, and the material of the film layers on the side of the isolation structure near the array substrate includes an insulating material.

9. The display panel according to claim 8, characterized in that, The isolation structure includes a first isolation portion and a second isolation portion stacked along a direction away from the array substrate, wherein the orthographic projection of the second isolation portion on the array substrate covers the orthographic projection of the first isolation portion on the array substrate.

10. The display panel according to claim 9, characterized in that, The material of the second isolation part includes titanium or molybdenum; the material of the first isolation part includes inorganic insulating material.

11. The display panel according to claim 9, characterized in that, The orthographic projection of the first isolation portion on the array substrate does not overlap with the orthographic projection of the plurality of electrode overlapping portions on the array substrate; The orthographic projection of the second isolation portion on the array substrate covers the orthographic projection of the plurality of electrode overlap portions on the array substrate.

12. The display panel according to claim 9, characterized in that, The orthographic projection of the first isolation portion on the array substrate overlaps at least partially with the orthographic projection of the main body portion on the array substrate; The orthographic projection of the second isolation portion on the array substrate covers the orthographic projection of the main body portion on the array substrate.

13. The display panel according to claim 2, characterized in that, The main body has multiple grids corresponding to the multiple isolation openings; Along the first direction, the distance between the two opposite sides of the mesh of the main body is a first distance L1, and the distance between the two opposite sides of the isolation opening is a second distance L2, wherein the first distance L1 is greater than the second distance L2.

14. The display panel according to claim 1, characterized in that, Each of the electrode overlap portions is disposed on one side of the corresponding isolation opening.

15. The display panel according to claim 14, characterized in that, Each of the electrode overlap portions is disposed on one of the two sides of the corresponding isolation opening that are disposed opposite each other along a second direction, the second direction being parallel to the extension direction of the scan line in the array substrate.

16. The display panel according to claim 14, characterized in that, Along the first direction, the length of the electrode overlap portion is a first length H1, and the distance between the two opposite sides of the isolation opening corresponding to the electrode overlap portion is a second distance L2. The first length H1 is greater than or equal to the second distance L2.

17. The display panel according to claim 1, characterized in that, The display panel includes a display area and a non-display area surrounding the display area, and the auxiliary electrode extends from the display area to the non-display area and is connected to a power signal line.

18. A method for manufacturing a display panel, characterized in that, The preparation method includes: Provide array substrate; A first pixel defining layer is formed on one side of the array substrate, and a plurality of first grooves are formed in the first pixel defining layer; A first metal layer is formed on the side of the first pixel defining layer away from the array substrate, and the first metal layer is patterned to obtain multiple electrode overlap portions of the auxiliary electrode; the multiple electrode overlap portions are correspondingly disposed in the multiple first grooves. An isolation structure is formed on the side of the first pixel defining layer away from the array substrate, and the isolation structure is provided with a plurality of isolation openings; the plurality of isolation openings are correspondingly provided with the plurality of electrode overlap portions; Multiple light-emitting devices are formed on one side of the array substrate; the multiple light-emitting devices are correspondingly disposed with the multiple isolation openings; each light-emitting device includes a first electrode, a light-emitting part, and a second electrode stacked along the side away from the array substrate; the second electrode is electrically connected to the corresponding electrode overlap part.

19. The preparation method according to claim 18, characterized in that, Before forming the first pixel defining layer on one side of the array substrate, the fabrication method further includes: A second pixel defining layer is formed on one side of the array substrate; and a second groove is formed in the second pixel defining layer; A second metal layer is formed on the side of the second pixel defining layer away from the array substrate, and the second metal layer is patterned to obtain the main body of the auxiliary electrode; the main body is located in the second groove; wherein the main body is electrically connected to the plurality of electrode overlap portions; Correspondingly, forming a first pixel defining layer on one side of the array substrate includes: The first pixel defining layer is formed on the side of the second pixel defining layer away from the array substrate.

20. A display device, characterized in that, Includes the display panel as described in any one of claims 1-17.

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