Device and equipment capable of upgrading firmware and firmware upgrading method

Abstract

The embodiment of the invention provides a device capable of upgrading firmware, equipment and a firmware upgrading method. The device capable of upgrading the firmware comprises a processor, a receiving module, a switch module, a chip to be upgraded and a microprocessor. The receiving module is respectively connected with the processor and the switch module; the to-be-upgraded chip is connected with the switch module; the microprocessor is connected with the receiving module, and the microprocessor is connected with a chip to be upgraded through the switch module; the working state of the device capable of upgrading the firmware comprises a first state and a second state; when the device based on the upgradable firmware is in a first state, under the control of the switch module, a link between the receiving module and the to-be-upgraded chip is in an on state, and a link between the microprocessor and the to-be-upgraded chip is in an off state; the device based on the upgradable firmware is in the second state, under the control of the switch module, the link between the receiving module and the to-be-upgraded chip is in an open-circuit state, and the link between the microprocessor and the to-be-upgraded chip is in a closed-circuit state.

Description

Technical Field

[0001] The present application relates to the field of touch control, and more particularly to a device and apparatus capable of upgrading firmware, and a method for upgrading firmware. Background Art

[0002] With the development and advancement of science and technology, many electronic devices are equipped with numerous functional modules. However, these numerous modules often require software upgrades to improve their functionality. However, due to management costs, the firmware upgrade addresses of electronic devices are often limited. Upgrade addresses are not configured for every functional module or chip within a functional module, resulting in some modules or chips being unable to be upgraded. This is obviously not conducive to improving functionality. Summary of the Invention

[0003] In view of this, embodiments of the present application provide a device and apparatus capable of upgrading firmware, and a method for upgrading firmware, so as to achieve an upgrade of a touch control system without increasing the firmware upgrade address.

[0004] A device with upgradeable firmware includes: a processor, a receiving module, a switch module, a chip to be upgraded, and a microprocessor. The receiving module is connected to the processor; the switch module is connected to the receiving module; the chip to be upgraded is connected to the switch module; the microprocessor is connected to the receiving module, and the microprocessor is connected to the chip to be upgraded via the switch module. The operating states of the device with upgradeable firmware include a first state and a second state. When the device based on the upgradeable firmware is in the first state, under the control of the switch module, the link between the receiving module and the chip to be upgraded is in an open state, and the link between the microprocessor and the chip to be upgraded is in an open state. When the device based on the upgradeable firmware is in the second state, under the control of the switch module, the link between the receiving module and the chip to be upgraded is in an open state, and the link between the microprocessor and the chip to be upgraded is in an open state.

[0005] In a second aspect, an embodiment of the present application provides a device, which includes the device for upgrading firmware provided in the first aspect.

[0006] In a third aspect, an embodiment of the present application provides a method for upgrading firmware, the method being implemented by a device capable of upgrading firmware, the device capable of upgrading firmware comprising: a processor, a receiving module, a microprocessor, and a chip to be upgraded; Methods include: The processor obtains the upgraded firmware and sends the upgraded firmware to the microprocessor through the receiving module; The processor controls the device capable of upgrading firmware to be in a second state; When the device capable of upgrading firmware is in the second state, the microprocessor sends the upgraded firmware to the chip to be upgraded to implement the firmware upgrade.

[0007] The embodiment of the present application provides a device with upgradeable firmware. Through the control of the switch module, when the device with upgradeable firmware is in different states, the chip to be upgraded can be on different links. For example, when the device with upgradeable firmware is in the first state, the chip to be upgraded is on the link between the receiving module and the chip to be upgraded, thereby realizing data transmission between the processor and the chip to be upgraded; when the device with upgradeable firmware is in the second state, the chip to be upgraded is on the link between the microprocessor and the chip to be upgraded, so that the upgrade firmware can be transmitted to the chip to be upgraded, so as to ultimately realize the upgrade of the chip to be upgraded. That is, the device with upgradeable firmware provided by the embodiment of the present application can realize firmware upgrade with the help of the microprocessor, that is, the upgrade firmware is transferred to the chip to be upgraded via the microprocessor. Since the upgrade firmware does not need to be directly obtained from the processor, there is no need to configure an upgrade address for the chip to be upgraded. That is, in the process of the chip to be upgraded obtaining the upgrade firmware, it can share an upgrade address with the microprocessor, without adding an additional upgrade address, thereby realizing the upgrade of the chip to be upgraded without increasing the upgrade address and the upgrade address management cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0009] Figure 1 A schematic diagram of a device capable of upgrading firmware provided in an embodiment of the present application; Figure 2 A schematic diagram of a device capable of upgrading firmware provided in an embodiment of the present application; Figure 3 A schematic diagram of a device capable of upgrading firmware provided in an embodiment of the present application; Figure 4 A schematic diagram of a device capable of upgrading firmware provided in an embodiment of the present application; Figure 5 A schematic diagram of a device capable of upgrading firmware provided in an embodiment of the present application; Figure 6 A schematic diagram of a device capable of upgrading firmware provided in an embodiment of the present application; Figure 7 A schematic diagram of a device capable of upgrading firmware provided in an embodiment of the present application; Figure 8 A flowchart of a firmware upgrade method provided in an embodiment of the present application; Figure 9A flowchart of a firmware upgrade method provided in an embodiment of the present application.

[0010] Label Description 100. Device capable of upgrading firmware; 110. Processor; 120. Receiving module; 130. Switch module; 131. First controllable switch; 132. Second controllable switch; 140. Microprocessor; 141. First interface; 142. Second interface; 150. Chip to be upgraded. DETAILED DESCRIPTION

[0011] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0012] It should be clear that the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0013] The terms used in the embodiments of the present application are for the purpose of describing specific embodiments only and are not intended to limit the present application. The singular forms "a", "an", "the" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise.

[0014] It should be understood that the term "and / or" as used herein simply describes a relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A alone, A and B together, or B alone. Furthermore, the character " / " in this document generally indicates an "or" relationship between the associated objects.

[0015] In order to more clearly understand the aforementioned problem of the inability to upgrade the chip to be upgraded, a specific explanation is given by taking the touch chip as an example. The control panel of existing electronic devices is operated by a touch panel. The touch chip and the touch system installed inside it are important factors in achieving excellent touch functions. Among them, the touch system can be optimized and improved through software upgrades. However, based on management cost considerations, the firmware upgrade address of electronic devices is often limited, and a separate firmware upgrade address is not configured for the touch chip, resulting in the touch function in the touch chip being unable to be upgraded; and if a separate firmware upgrade address is configured for the touch chip, the management cost will increase significantly.

[0016] In order to improve the chip upgrade problem in electronic devices without increasing the upgrade address and the upgrade address management cost, an embodiment of the present application provides a device for upgrading firmware.

[0017] like Figure 1As shown, a device 100 capable of upgrading firmware includes a processor 110, a receiving module 120, a switch module 130, a chip to be upgraded 150, and a microprocessor 140. Processor 110 is used to perform overall control and information processing for the upgradeable device. In one possible implementation, device 100 capable of upgrading firmware is used in a vehicle, with processor 110 being a domain controller or a center console controller. A domain controller is used to manage and control the various functional modules of a vehicle, while a center console controller is used to control the vehicle's center console.

[0018] like Figure 1 As shown, the receiving module 120 is connected to the processor 110. The receiving module 120 is used to realize information transmission between the processor 110 and the microcontroller and the chip to be upgraded 150.

[0019] In one possible implementation, the processor 110 obtains the upgrade firmware required by the chip to be upgraded 150. The processor 110 may obtain the upgrade firmware required by the chip to be upgraded 150 remotely or through an external device or an external storage device. Specifically, the processor 110 obtaining the upgrade firmware remotely means that the processor 110 remotely obtains the upgrade firmware from the provider of the upgrade firmware (e.g., a server) through a communication network; the processor 110 obtaining the upgrade firmware through an external device or an external storage device means that the processor 110 connects to an external device or storage device and obtains the upgrade firmware from the external device or external storage device. The processor 110 may also transmit the upgrade firmware to the microcontroller via the receiving module 120. The mechanism by which the processor 110 sends the upgrade firmware to the outside may be active sending or sending in response to a request.

[0020] like Figure 1As shown, the switch module 130 is connected to the receiving module 120. The chip to be upgraded 150 is connected to the switch module 130, thereby achieving: the chip to be upgraded 150 is connected to the receiving module 120 via the switch module 130. The microprocessor 140 is connected to the receiving module 120, and the microprocessor 140 is connected to the chip to be upgraded 150 via the switch module 130. The switch module 130 is used to control the links between it and the receiving module 120. For example, the switch module 130 controls the link between the receiving module 120 and the chip to be upgraded 150; the switch module 130 also controls the link between the microprocessor 140 and the chip to be upgraded 150. In one possible implementation, taking the application of the firmware upgradeable device 100 in a vehicle as an example, the microprocessor 140 can be any microprocessor 140 in the link to the chip to be upgraded 150. For example, if the processor 110 is a domain controller, the chip to be upgraded 150 is a touch control chip, and the microprocessor 140 can be the microprocessor 140 (MCU) in the center console controller. It should be noted that the microprocessor 140 being the microprocessor 140 in the center console controller is merely an exemplary description and is not limiting. For example, the microprocessor 140 can also be the microprocessor 140 in the steering controller, the microprocessor 140 in the door controller, the microprocessor 140 in the motor controller, the microprocessor 140 in the brake controller, etc.

[0021] The working state of the device 100 capable of upgrading firmware includes a first state and a second state. The first state includes a working state. In one possible implementation, when the device 100 capable of upgrading firmware is in the first state, data is transmitted normally between the chip to be upgraded 150 and the receiving module 120, and data is transmitted normally between the receiving module 120 and the microprocessor 140. For example, data is transmitted between the processor 110 and the chip to be upgraded 150 using the I2C protocol, and data is transmitted between the processor 110 and the microprocessor 140 using the I2C protocol, wherein the processor 110 is a master device and the microprocessor 140 is a slave device.

[0022] When the firmware-upgradeable device 100 is in the second state, the chip to be upgraded 150 obtains the required upgrade firmware. In one possible implementation, the chip to be upgraded 150 automatically upgrades after obtaining the required upgrade firmware. In another possible implementation, after obtaining the required upgrade firmware, the chip to be upgraded 150 performs the upgrade at a preset time or within a preset time period, or in response to a user upgrade operation. That is, after receiving the upgrade firmware, the chip to be upgraded 150 does not immediately perform the upgrade operation. In this implementation, the upgrade of the chip to be upgraded 150 includes a software upgrade of its internal programs, systems, or functional modules.

[0023] The device 100 based on upgradeable firmware is in a first state. Under the control of the switch module 130, the link between the receiving module 120 and the chip to be upgraded 150 is in an open state, and the link between the microprocessor 140 and the chip to be upgraded 150 is in an open state.

[0024] In this embodiment, when the firmware-upgradeable device 100 is in the first state, the switch module 130 controls the link between the receiving module 120 and the microprocessor 140 to be open, and controls the link between the microprocessor 140 and the chip to be upgraded 150 to be disconnected. Therefore, when the firmware-upgradeable device 100 is in the first state, the upgrade firmware required by the chip to be upgraded 150 can be transmitted. For example, after the processor 110 obtains the upgrade firmware required by the chip to be upgraded 150, it transmits the upgrade firmware to the microprocessor 140 via the switch module 130. After obtaining the upgrade firmware required by the chip to be upgraded 150, the processor 110 can transmit the upgrade firmware to the receiving module 120 within a preset time or time period. The upgrade firmware is then transmitted to the microprocessor 140 via the switch module 130.

[0025] The device 100 based on upgradeable firmware is in the second state. Under the control of the switch module 130, the link between the receiving module 120 and the chip to be upgraded 150 is in the disconnected state, and the link between the microprocessor 140 and the chip to be upgraded 150 is in the connected state.

[0026] In this embodiment, when the firmware-upgradeable device 100 is in the second state, the switch module 130 controls the link between the receiving module 120 and the chip to be upgraded 150 to be disconnected, and controls the link between the microprocessor 140 and the chip to be upgraded 150 to be connected. Therefore, when the firmware-upgradeable device 100 is in the second state, the chip to be upgraded 150 can obtain the upgrade firmware it needs. Specifically, based on the I2C protocol, the upgrade firmware of the chip to be upgraded 150 is transmitted from the microprocessor 140 to the chip to be upgraded 150. During this process, the microprocessor 140 acts as the master device, and the chip to be upgraded 150 acts as the slave device.

[0027] It should be noted that the firmware upgrade transmission process between the processor 110 and the microprocessor 140 can occur when the firmware upgradeable device 100 is in the first state or when the firmware upgradeable device 100 is in the second state.

[0028] In the embodiment of the present application, when the device 100 capable of upgrading firmware is in the first state, normal data transmission can be performed between the chip to be upgraded 150 and the processor 110. When the device 100 capable of upgrading firmware is in the second state, the upgrade firmware required by the chip to be upgraded 150 can be transmitted to the microprocessor 140. In the device 100 capable of upgrading firmware provided in the embodiment of the present application, the upgrade firmware is forwarded to the chip to be upgraded 150 via the microprocessor 140, so that during the transmission process, the upgrade firmware only needs to share an upgrade address with the microprocessor 140, without adding a new upgrade address, thereby reducing the management cost of the upgrade address and enabling the upgrade of the chip to be upgraded 150.

[0029] like Figure 2 As shown, in one embodiment of the present application, the switch module 130 includes: a first controllable switch 131 and a second controllable switch 132. The first controllable switch 131 is electrically connected between the chip to be upgraded 150 and the receiving module 120. The second controllable switch 132 is electrically connected between the chip to be upgraded 150 and the microprocessor 140.

[0030] In this embodiment, the first controllable switch 131 is used to control the link between the chip to be upgraded 150 and the receiving module 120, and the second controllable switch 132 is used to control the link between the chip to be upgraded 150 and the microprocessor 140. When the device 100 capable of upgrading firmware is in a first state, the first controllable switch 131 is in a connected state and the second controllable switch 132 is in a disconnected state, thereby ensuring a connected state between the receiving module 120 and the chip to be upgraded 150 and a disconnected state between the chip to be upgraded 150 and the microprocessor 140. When the device 100 capable of upgrading firmware is in a second state, the first controllable switch 131 is in a disconnected state and the second controllable switch 132 is in a connected state, thereby ensuring a disconnected state between the receiving module 120 and the chip to be upgraded 150 and a connected state between the chip to be upgraded 150 and the microprocessor 140.

[0031] In one possible implementation, control signals for the first controllable switch 131 and the second controllable switch 132 are provided by the processor 110. Therefore, when the apparatus 100 for controlling the upgradeable firmware is in the first state, the first controllable switch 131 is controlled to be in the on state, and the second controllable switch 132 is controlled to be in the off state; when the apparatus 100 for controlling the upgradeable firmware is in the second state, the first controllable switch 131 is controlled to be in the off state, and the second controllable switch 132 is controlled to be in the on state.

[0032] It should be noted that the fact that the control signals of the first controllable switch 131 and the second controllable switch 132 are provided by the processor 110 is merely an exemplary description and not a limitation. In another possible implementation, the control signals of the first controllable switch 131 and the second controllable switch 132 may be provided by the microprocessor 140.

[0033] like Figure 2 As shown, in one possible implementation, the first controllable switch 131 is a transistor switch, and / or the second controllable switch 132 is a transistor switch. A first end of the first controllable switch 131 is electrically connected to the receiving module 120, and a second end of the first controllable switch 131 is electrically connected to the chip to be upgraded 150. A first end of the second controllable switch 132 is electrically connected to the microprocessor 140, and a second end of the second controllable switch 132 is electrically connected to the chip to be upgraded 150.

[0034] In this implementation, the first controllable switch 131 is a transistor switch. The second controllable switch 132 is a transistor switch. Transistor switches are easy to control and facilitate integration. Therefore, using either the first controllable switch 131 or the second controllable switch 132 as a transistor switch can facilitate the integration of the firmware upgradeable device 100.

[0035] like Figure 3 As shown, in a possible implementation, the majority carriers of the first controllable switch 131 and the majority carriers of the second controllable switch 132 are of different types, and the control end of the first controllable switch 131 and the control end of the second controllable switch 132 receive the same control signal.

[0036] In this implementation, for example, the first controllable switch 131 is an NMOS and the second controllable switch 132 is a PMOS. The majority carrier types of the first controllable switch 131 and the second controllable switch 132 are different, meaning that they can both receive the same control signal, thereby reducing the number of control signals and the control difficulty.

[0037] like Figure 2 As shown, in a possible implementation, the majority carriers of the first controllable switch 131 and the majority carriers of the second controllable switch 132 are of the same type.

[0038] In this implementation, for example, if the first controllable switch 131 is a PMOS, then the second controllable switch 132 is also a PMOS. The majority carriers of the first controllable switch 131 and the second controllable switch 132 are the same, so the manufacturing processes of the first controllable switch 131 and the second controllable switch 132 can be consistent, thereby reducing process complexity and production costs.

[0039] In a possible implementation, the first controllable switch 131 may also be a relay switch, and / or the second controllable switch 132 may also be a relay switch.

[0040] like Figure 4 As shown, in one possible implementation, the switch module 130 includes a relay switch, which is used to control the link between the receiving module 120 and the chip to be upgraded 150. The relay switch is also used to control the link between the microprocessor 140 and the chip to be upgraded 150. The processor 110 controls the control circuit to supply power to the coil of the relay switch.

[0041] In this implementation, the switch module 130 includes a relay switch to facilitate isolation of the switch from the control circuit, reducing control difficulty and saving production costs. It should be noted that the processor 110 controlling the control circuit to supply power to the relay switch coil is merely an example and not a limitation. In another possible implementation, the microprocessor 140 can also control the control circuit to supply power to the relay switch coil.

[0042] like Figure 4 As shown, in a possible implementation, the relay switch is a single-pole double-throw relay, and one of the normally open contact b and the normally closed contact a of the single-pole double-throw relay is electrically connected to the receiving module 120 , and the other is electrically connected to the microprocessor 140 .

[0043] In this implementation, the relay switch is a single-pole double-throw relay, which can control two links with one switch, simplifying the structure of the device 100 capable of upgrading firmware and helping to reduce production costs.

[0044] like Figure 5 As shown, in a possible implementation, the normally closed contact a of the single-pole double-throw relay is electrically connected to the receiving module 120 , and the normally open contact b of the single-pole double-throw relay is electrically connected to the microprocessor 140 .

[0045] In this implementation, the normally closed contacts of the single-pole double-throw relay are electrically connected to the receiving module 120, and the normally open contacts of the single-pole double-throw relay are electrically connected to the microprocessor 140. This means that when the relay is not energized, the receiving module 120 and the chip to be upgraded 150 are in a connected state, and the chip to be upgraded 150 and the microprocessor are in an open state; when the relay is energized, the receiving module 120 and the chip to be upgraded 150 are in an open state, and the chip to be upgraded 150 and the microprocessor are in a connected state. Because the second state is not a commonly used state in actual use, this design means that the coil of the relay switch does not generate power consumption when the device 100 with upgradeable firmware is in the first state, and only generates power consumption when the device 100 with upgradeable firmware is in the second state. Therefore, this design can help reduce power consumption.

[0046] In one possible implementation, the microprocessor 140 includes a first interface 141 and a second interface 142. The receiving module 120 is electrically connected to the first interface 141 of the microprocessor 140. The second interface 142 of the microprocessor 140 is electrically connected to the chip to be upgraded 150 via the switch module 130. The first interface 141 and the second interface 142 are of the same type.

[0047] In this implementation, the first interface 141 and the second interface 142 of the microprocessor 140 are of the same type, which means that the communication protocol between the receiving module 120 and the microprocessor 140 is the same as the communication protocol between the microprocessor 140 and the chip to be upgraded 150. This means that the upgraded firmware can be directly transmitted from the microprocessor 140 to the chip to be upgraded 150 without the need for data conversion, which helps reduce the complexity of the process and ultimately helps reduce production costs.

[0048] like Figures 2 to 5 As shown, in a possible implementation, the first interface 141 and the second interface 142 are both I2C interfaces, wherein the first interface 141 is a slave device interface, and the second interface 142 is a master device interface.

[0049] The first interface 141 is a slave device interface, and the second interface 142 is a master device interface, so that the microprocessor 140 can simultaneously serve as a slave device of the processor 110 and as a master device of the chip to be upgraded 150, thereby improving data processing speed and efficiency.

[0050] In a possible implementation, the chip to be upgraded 150 is a touch chip that can upgrade the touch function of a touch panel without increasing upgrade addresses and upgrade address management costs.

[0051] The present application also provides a device comprising the firmware upgradeable device 100 provided in the aforementioned embodiments. The device may be a touch-sensitive device, such as a touch screen. The device may also be a center console or control panel, such as that of a vehicle, ship, aircraft, or similar device. The device is configured to implement touch control.

[0052] The device provided in the embodiment of the present application can implement the firmware upgrade of the chip to be upgraded 150 without increasing the upgrade address, thereby improving the function and performance of the chip to be upgraded 150.

[0053] The embodiment of the present application also provides a method for upgrading firmware, which is implemented by the device 100 capable of upgrading firmware. Figure 6 or Figure 7 As shown, the device 100 capable of upgrading firmware includes a processor 110, a receiving module 120, a microprocessor 140, and a chip to be upgraded 150. The processor 110 is connected to the receiving module 120, the receiving module 120 is connected to the microprocessor 140, and the microprocessor 140 is connected to the chip to be upgraded 150.

[0054] like Figure 8 As shown, the methods for upgrading the firmware include: S100 , the processor 110 obtains the upgrade firmware and sends the upgrade firmware to the microprocessor 140 through the receiving module 120 .

[0055] The upgraded firmware refers to the upgraded firmware required by the chip to be upgraded 150. Based on the upgraded firmware, the chip to be upgraded 150 can implement firmware upgrade. In step S100, the processor 110 can obtain the firmware remotely or through an external device.

[0056] In one possible implementation, the step of the processor 110 sending the upgraded firmware to the microprocessor 140 through the receiving module 120 includes: the processor 110 performs data transmission with the receiving module 120 through the I2C protocol, and the receiving module 120 sends the upgraded firmware to the microprocessor 140 based on the I2C protocol, wherein the processor 110 is the master device and the microprocessor 140 is the slave device.

[0057] S200: The processor 110 controls the device 100 capable of upgrading firmware to be in a second state.

[0058] The processor 110 may place the device 100 capable of upgrading firmware in the second state by controlling the link between the microprocessor 140 and the chip to be upgraded 150 .

[0059] S300 , when the device 100 capable of upgrading firmware is in the second state, the microprocessor 140 sends the upgraded firmware to the chip to be upgraded 150 to implement the firmware upgrade.

[0060] In one possible implementation, in the step of the microprocessor 140 sending the upgraded firmware to the chip 150 to be upgraded, the microprocessor 140 sends the upgraded firmware to the chip 150 to be upgraded based on the I2C protocol, wherein the microprocessor 140 is a master device and the chip 150 to be upgraded is a slave device.

[0061] like Figure 6 As shown, in one embodiment of the present application, the microprocessor 140 includes a first interface 141 , and the first interface 141 of the microprocessor 140 is connected to the receiving module 120 and the chip to be upgraded 150 respectively.

[0062] In one possible implementation, first interface 141 is an I2C interface. When the firmware-upgradeable device 100 is in the second state, microprocessor 140 transmits the upgraded firmware to the chip to be upgraded 150 via first interface 141. During this process, processor 110 prohibits access to microprocessor 140. When the firmware-upgradeable device 100 is in the second state, microprocessor 140 transmits the upgraded firmware to the chip to be upgraded 150 via first interface 141, and microprocessor 140 acts as a master device, while chip to be upgraded 150 acts as a slave device.

[0063] In one possible implementation, the method further includes: the processor 110 controls the device 100 capable of upgrading firmware to be in a first state. When the device 100 capable of upgrading firmware is in the first state, the processor 110 transmits data with the microprocessor 140 and the chip to be upgraded 150 respectively through the receiving module 120. Furthermore, when the device 100 capable of upgrading firmware is in the first state, the processor 110 transmits the upgraded firmware to the microprocessor 140 through the receiving module 120. Specifically, when the device 100 capable of upgrading firmware is in the first state, the processor 110 transmits data with the microprocessor 140 and the chip to be upgraded 150 respectively based on the I2C protocol, wherein the processor 110 is a master device, and the microprocessor 140 and the chip to be upgraded 150 are both slave devices.

[0064] In this implementation, it is possible to implement a firmware upgrade for the chip 150 to be upgraded by only requiring an upgrade address required by the microprocessor 140 .

[0065] like Figure 7 As shown, in one embodiment of the present application, the microprocessor 140 includes a first interface 141 and a second interface 142. The receiving module 120 is electrically connected to the first interface 141 of the microprocessor 140, and the second interface 142 of the microprocessor 140 is electrically connected to the chip to be upgraded 150. The first interface 141 and the second interface 142 are of the same type.

[0066] In one possible implementation, the first interface 141 and the second interface 142 are I2C interfaces. When the firmware-upgradeable device 100 is in the second state, the microprocessor 140 transmits the upgraded firmware to the chip to be upgraded 150 via the second interface 142. When the firmware-upgradeable device 100 is in the second state, the microprocessor 140 transmits the upgraded firmware to the chip to be upgraded 150 via the second interface 142, and the microprocessor 140 acts as a master device, while the chip to be upgraded 150 acts as a slave device.

[0067] In one possible implementation, the method further includes: the processor 110 controlling the firmware-upgradable apparatus 100 to be in a first state. When the firmware-upgradable apparatus 100 is in the first state, the processor 110 transmits data with the microprocessor 140 and the chip to be upgraded 150 respectively through the receiving module 120. Specifically, when the firmware-upgradable apparatus 100 is in the first state, the processor 110 transmits data with the microprocessor 140 and the chip to be upgraded 150 respectively based on the I2C protocol, wherein the processor 110 is a master device, and the microprocessor 140 and the chip to be upgraded 150 are both slave devices.

[0068] like Figures 1 to 5 As shown, in one embodiment of the present application, the device 100 for upgrading firmware further includes a switch module 130 , the switch module 130 , the chip to be upgraded 150 is connected to the microprocessor 140 via the switch module 130 , and the chip to be upgraded is connected to the receiving module 120 via the switch module 130 .

[0069] When the device 100 capable of upgrading firmware is in the second state, the microprocessor 140 sends the upgraded firmware to the chip to be upgraded 150 in the following steps: When the device 100 capable of upgrading firmware is in the second state, the switch module 130 is controlled to make the link between the microprocessor 140 and the chip to be upgraded 150 in the connected state, and the link between the receiving module 120 and the chip to be upgraded 150 in the disconnected state, so that the microprocessor 140 sends the upgraded firmware to the chip to be upgraded 150.

[0070] In a possible implementation, the switch module 130 includes a first controllable switch 131 and a second controllable switch 132. The first controllable switch 131 is electrically connected between the chip to be upgraded 150 and the receiving module 120. The second controllable switch 132 is electrically connected between the chip to be upgraded 150 and the microprocessor 140.

[0071] The specific structure of the switch module 130 can be referred to the aforementioned embodiment and will not be described in detail here.

[0072] In this implementation, when the firmware-upgradeable device 100 is in the second state, controlling the switch module 130 to set the link between the microprocessor 140 and the chip to be upgraded 150 to an open state and setting the link between the receiving module 120 and the chip to be upgraded 150 to an open state, so that the microprocessor 140 sends the upgraded firmware to the chip to be upgraded 150, includes: When the firmware-upgradeable device 100 is in the second state, the first controllable switch 131 is controlled to be in the off state, and the second controllable switch 132 is controlled to be in the on state, thereby making the link between the microprocessor 140 and the chip to be upgraded 150 in the on state and the link between the receiving module 120 and the chip to be upgraded 150 in the off state. Therefore, when the firmware-upgradeable device 100 is in the second state, the microprocessor 140 can send the upgraded firmware to the chip to be upgraded 150.

[0073] In a possible implementation, the method for upgrading firmware further includes: the processor 110 controls the device 100 capable of upgrading firmware to be in a first state.

[0074] The processor 110 controls the firmware upgradeable device 100 to be in the first state, which includes: the processor 110 controls the switch module 130 to disconnect the link between the microprocessor 140 and the chip to be upgraded 150, and to connect the link between the receiving module 120 and the chip to be upgraded 150. For example, the processor 110 controls the first controllable switch 131 to be in the connected state, and controls the second controllable switch 132 to be in the disconnected state.

[0075] It should be noted that there is no particular order between the processor 110 controlling the firmware-upgradeable device 100 to be in the second state and the processor 110 controlling the firmware-upgradeable device 100 to be in the first state, and both are based on actual application scenarios.

[0076] like Figure 9 As shown, in a possible implementation, the method for upgrading firmware further includes: S400, after the firmware upgrade is completed, the processor 110 controls the device 100 capable of upgrading firmware to be in the first state.

[0077] In an embodiment of the present application, when the device 100 with upgradeable firmware is in the first state, the processor 110 transmits data with the microprocessor 140 based on the I2C protocol, and the processor 110 transmits data with the chip to be upgraded 150 based on the I2C protocol, wherein the processor 110 is a master device, and the microprocessor 140 and the chip to be upgraded 150 are both slave devices.

[0078] The embodiment of the present application provides a method for upgrading firmware. By making the upgrade firmware required by the chip 150 to be upgraded and the microprocessor 140 share the same upgrade address, the firmware upgrade of the chip 150 to be upgraded can be completed without increasing the upgrade address.

[0079] The various embodiments or implementations of this specification may be combined with one another as long as no technical conflicts exist. Technical conflicts refer to technical features that contradict or cannot coexist within the same embodiment. In other words, the various embodiments or implementations of this specification may be combined as long as they are technically feasible and logically reasonable.

[0080] The same or similar parts between the various embodiments or implementations in this specification can be referenced to each other.

Claims

1. A device capable of upgrading firmware, characterized in that: include: processor; A receiving module connected to the processor; A switch module connected to the receiving module; The chip to be upgraded is connected to the switch module; a microprocessor connected to the receiving module, and the microprocessor is connected to the chip to be upgraded through the switch module; The working state of the device capable of upgrading firmware includes a first state and a second state; when the device capable of upgrading firmware is in the first state, under the control of the switch module, the link between the receiving module and the chip to be upgraded is in an open state, and the link between the microprocessor and the chip to be upgraded is in an open state; The device based on the upgradeable firmware is in the second state. Under the control of the switch module, the link between the receiving module and the chip to be upgraded is in the disconnected state, and the link between the microprocessor and the chip to be upgraded is in the connected state.

2. The device for upgrading firmware according to claim 1, wherein: The switch module includes: a first controllable switch and a second controllable switch; the first controllable switch is electrically connected between the chip to be upgraded and the receiving module; the second controllable switch is electrically connected between the chip to be upgraded and the microprocessor.

3. The device for upgrading firmware according to claim 2, wherein: The first controllable switch is a transistor switch, and / or the second controllable switch is a transistor switch; a first end of the first controllable switch is electrically connected to the receiving module, and a second end of the first controllable switch is electrically connected to the chip to be upgraded; a first end of the second controllable switch is electrically connected to the microprocessor, and a second end of the second controllable switch is electrically connected to the chip to be upgraded.

4. The device for upgrading firmware according to claim 3, wherein: The majority carriers of the first controllable switch and the majority carriers of the second controllable switch are of different types, and the control end of the first controllable switch and the control end of the second controllable switch receive the same control signal.

5. The device for upgrading firmware according to claim 3, wherein: The majority carriers of the first controllable switch and the majority carriers of the second controllable switch are of the same type.

6. The device for upgrading firmware according to claim 1, wherein: The switch module includes a relay switch, the switching of the relay switch is used to control the link between the receiving module and the chip to be upgraded; and the switching of the relay switch is used to control the link between the microprocessor and the chip to be upgraded.

7. The device for upgrading firmware according to claim 6, wherein: The relay switch is a single-pole double-throw relay. Among the normally open contact and the normally closed contact of the single-pole double-throw relay, one is electrically connected to the receiving module, and the other is electrically connected to the microprocessor.

8. The device for upgrading firmware according to claim 7, wherein: The normally closed contact of the single-pole double-throw relay is electrically connected to the receiving module, and the normally open contact of the single-pole double-throw relay is electrically connected to the microprocessor.

9. The device for upgrading firmware according to claim 1, wherein: The microprocessor includes a first interface and a second interface. The receiving module is electrically connected to the first interface of the microprocessor. The second interface of the microprocessor is electrically connected to the chip to be upgraded through the switch module. The first interface and the second interface are of the same type.

10. The device for upgrading firmware according to claim 9, wherein: The first interface and the second interface are both I2C interfaces, wherein the first interface is a slave device interface and the second interface is a master device interface.

11. The device for upgrading firmware according to claim 1, wherein: The chip to be upgraded is a touch chip.

12. A device, characterized in that The device comprises the apparatus for upgrading firmware according to any one of claims 1 to 11.

13. A method for upgrading firmware, characterized in that: The method is implemented by a device capable of upgrading firmware, the device comprising: a processor, a receiving module, a microprocessor, and a chip to be upgraded; The method comprises: The processor obtains the upgraded firmware and sends the upgraded firmware to the microprocessor through the receiving module; The processor controls the device capable of upgrading firmware to be in a second state; When the device capable of upgrading firmware is in the second state, the microprocessor sends the upgraded firmware to the chip to be upgraded to implement firmware upgrading.

14. The method according to claim 13, characterized in that The device capable of upgrading firmware further comprises a switch module, wherein the chip to be upgraded is connected to the microprocessor via the switch module, and the chip to be upgraded is connected to the receiving module via the switch module; When the device capable of upgrading firmware is in the second state, the step of the microprocessor sending the upgraded firmware to the chip to be upgraded comprises: When the device capable of upgrading firmware is in the second state, the switch module is controlled to make the link between the microprocessor and the chip to be upgraded in a connected state, and the link between the receiving module and the chip to be upgraded in a disconnected state, so that the microprocessor sends the upgraded firmware to the chip to be upgraded.

15. The method according to claim 14, characterized in that In the step of the processor acquiring the upgrade firmware and sending the upgrade firmware to the microprocessor through the receiving module, the receiving module sends the upgrade firmware to the microprocessor based on the I2C protocol, wherein the processor is a master device and the microprocessor is a slave device; In the step of the microprocessor sending the upgrade firmware to the chip to be upgraded, the microprocessor sends the upgrade firmware to the chip to be upgraded based on the I2C protocol, wherein the microprocessor is a master device and the chip to be upgraded is a slave device.

16. The method according to claim 14, characterized in that Also includes: After the firmware upgrade is completed, the processor controls the device capable of upgrading the firmware to be in a first state.

17. The method according to claim 16, characterized in that When the device with upgradeable firmware is in the first state, the processor transmits data with the microprocessor based on the I2C protocol, and the processor transmits data with the chip to be upgraded based on the I2C protocol, wherein the processor is a master device, and the microprocessor and the chip to be upgraded are both slave devices.

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