Low-phase noise MEMS oscillator for wireless transceiver

By introducing a noise cycle low resistance path and active inductor load into the MEMS oscillator, combined with the RC low-pass filtering network, the problems of small loop gain and large phase noise are solved, and the oscillator design with low phase noise characteristics and high quality factor is realized.

CN120582584APending Publication Date: 2025-09-02FUDAN UNIVERSITY
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Patent Information

Application Number
CN202510691050.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-27
Publication Date
2025-09-02

AI Technical Summary

Technical Problem

The existing MEMS oscillators have problems with small loop gain and large phase noise, and cannot reach a low phase noise level at the resonant frequency, and the non-ideal current source of the transistor causes unnecessary phase noise interference in common mode resonance mode.

Method used

The low-resistance path for noise cycle is introduced and the active inductor is used as the drain load, combined with cross-coupled differential pairs to provide gain driving, reducing the difficulty of the oscillator design and ensuring low phase noise characteristics. The RC low-pass filtering network is formed by AC coupling capacitors and resistors to ensure the stability of the DC operating point.

Benefits of technology

It effectively reduces the phase noise of the oscillator, improves the loop gain at the resonant frequency, reduces noise interference at the non-resonant frequency, ensures that the oscillator maintains low phase noise characteristics at the resonant frequency, and improves the overall quality factor of the oscillator.

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Abstract

The invention belongs to the technical field of radio frequency oscillators of integrated circuits, and discloses a low-phase noise MEMS oscillator for a wireless transceiver. The MEMS oscillator provided by the invention comprises a silicon carbide (SiC) substrate surface acoustic wave (SAW) resonator and an oscillating circuit consisting of a metal oxide semiconductor (MOS) tube, a capacitor and a resistor. In the oscillator, a noise circulation path is introduced, so that the phase noise of the oscillator is reduced. Due to the addition of the cross-coupled active inductor, the oscillator has the effect of inhibiting oscillation starting at non-resonant frequency, and the oscillator has good frequency stability.
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Description

Technical Field

[0001] The present invention belongs to the technical field of radio frequency oscillators of integrated circuits, and in particular relates to the design of a local oscillator of an integrated circuit for a wireless transceiver. Background Art

[0002] A MEMS oscillator is a frequency-generating circuit that uses a MEMS resonator as a frequency-selective network. Due to its low power consumption, low phase noise, high output frequency, and ease of integration, MEMS oscillators are widely used in local oscillator designs for wireless transceivers.

[0003] An existing MEMS oscillator, such as Figure 1 As shown, the circuit includes a surface acoustic wave (SAW) resonator and an oscillator circuit. According to the oscillator's start-up conditions, the circuit will oscillate at a certain frequency when the loop gain is greater than 1 (0dB) and the total loop phase shift is equal to 2nπ. In this oscillator, transistors M1 and M2 provide gain for the oscillator, while transistors M3 and M4 serve as their drain loads connected to the power supply VDD. Transistor M5 provides current bias for the oscillator. Capacitors C01 and C02 serve as feedback capacitors, forming a feedback network that also provides gain for the oscillator. The gate of transistor M5 (node ​​1) is independently biased by Vbias, which determines the bias current of transistors M1 and M2. The gates of transistors M1 and M2 (node ​​2) are connected to an external bias circuit (connected to VbiasN) through resistors R01 and R02 to ensure proper operation. The gates of transistors M3 and M4 are connected to R03 and C03, and R04 and C04, respectively.

[0004] The operating principle of this MEMS oscillator is as follows: When the absolute value of the equivalent negative resistance -2 / gm of the cross-coupled transistor pair composed of transistors M1 and M2 is less than the equivalent impedance of the SAW resonator at the corresponding oscillation frequency, the oscillator can start to oscillate. The feedback capacitors C01 and C02 change the conduction period of transistors M1 and M2 through AC coupling, thereby reducing the time that the noise current flows through the resonant cavity within a cycle and thus reducing the phase noise. The oscillation frequency f0 = [fs+1 / Lm(C0+CX)]^(1 / 2), where fs is the series resonant frequency of the MEMS resonator, Lm and C0 are the equivalent inductance and capacitance in the equivalent electrical model of the MEMS resonator. CX is the value of the capacitor Ctune. When the loop gain is greater than 1 at the frequency f0, the oscillator will maintain stable oscillation at the frequency f0.

[0005] The above-mentioned existing MEMS oscillator has the following disadvantages: the transistor M5 with a fixed gate voltage bias provides a DC bias for the cross-coupled transistors M1 and M2. Since it is a non-ideal current source, that is, its internal resistance is not infinite, it is easy for the oscillator to operate in a common-mode resonant mode, thereby causing unnecessary phase noise interference. At the same time, the high phase noise of the oscillator at close frequency deviation is mainly caused by the up-conversion of the flicker noise of the transistor M5, which cannot further reduce the overall phase noise of the oscillator. Secondly, the transistors M3 and M4 are only used as drain loads to determine the drain bias of the cross-coupled transistors. When connected in parallel at both ends of the SAW resonator, the overall quality factor of the oscillator circuit will be reduced and the loop gain will be lowered. By improving the gain driving capability, the loop gain in the mid- and low-frequency bands of the non-resonant frequency will be improved at the same time, causing the oscillator to oscillate at the non-resonant frequency. Therefore, the MEMS oscillator cannot achieve a low phase noise level at the resonant frequency. Summary of the Invention

[0006] To address the problems of low loop gain and high phase noise in existing MEMS, the present invention provides a high-performance MEMS oscillator with ultra-low phase noise for wireless transceivers. This oscillator reduces the noise current flowing through the resonant cavity by introducing a low-resistance path for noise circulation, and uses an active inductor as a drain load to provide gain drive together with a cross-coupled differential pair. This reduces the difficulty of oscillator design while ensuring excellent low phase noise characteristics.

[0007] The MEMS oscillator according to the present invention includes a resonator and an oscillation circuit, wherein the oscillation circuit includes:

[0008] A first loop includes a first MOS transistor, a second MOS transistor, a first capacitor, a second capacitor, a first resistor, and a second resistor, wherein one end of the first capacitor is connected to the gate of the first MOS transistor and one end of the first resistor, the other end of the first capacitor is connected to the drain of the second MOS transistor via an eighth resistor, one end of the second capacitor is connected to the gate of the second MOS transistor and one end of the second resistor, the other end of the second capacitor is connected to the drain of the first MOS transistor via a seventh resistor, and the other end of the first resistor and the other end of the second resistor are connected to a bias voltage;

[0009] a second loop, comprising a third MOS transistor, a fourth MOS transistor, a third capacitor, a fourth capacitor, a third resistor, and a fourth resistor, wherein one end of the third capacitor is connected to the gate of the third MOS transistor and one end of the third resistor, the other end of the third capacitor is connected to the drain of the first MOS transistor in the first loop, one end of the fourth capacitor is connected to the gate of the fourth MOS transistor and one end of the fourth resistor, the other end of the fourth capacitor is connected to the drain of the second MOS transistor in the first loop, the drain of the third MOS transistor and the other end of the third resistor are both connected to ground, and the drain of the fourth MOS transistor and the other end of the fourth resistor are both connected to ground;

[0010] Wherein, the source of the first MOS transistor is connected to the source of the third MOS transistor, and the source of the second MOS transistor is connected to the source of the fourth MOS transistor;

[0011] The resonator adopts a SAW resonator, and the SAW resonator is directly connected to the drain of the first MOS transistor and the second MOS transistor in the first loop, and the two ends of the SAW resonator are connected to the gate of the third MOS transistor and the fourth MOS transistor in the second loop through AC coupling.

[0012] Optionally, the MEMS oscillator also includes a digitally controlled tuning capacitor connected in parallel with the SAW resonator, which is used for frequency adjustment of the MEMS oscillator, wherein the digitally controlled tuning capacitor includes a large-value fixed capacitor and an adjustable switched capacitor array, the large-value fixed capacitor is used for oscillator loop gain control, and the adjustable switched capacitor array is implemented using a four-bit digitally controlled switched capacitor array.

[0013] Optionally, the SAW resonator adopts a stacked structure of SiC, SiO2, and LiTaO3.

[0014] Optionally, the MEMS oscillator further includes a fifth MOS transistor and a sixth MOS transistor, and both ends of the SAW resonator are connected to the sources of the fifth MOS transistor and the sixth MOS transistor, respectively, wherein the drain of the first MOS transistor is connected to the source of the fifth MOS transistor, the drain of the second MOS transistor is connected to the source of the sixth MOS transistor, and the drains of the fifth MOS transistor and the sixth MOS transistor are both connected to a power supply.

[0015] Optionally, the MEMS oscillator further includes a fifth resistor, a sixth resistor, a fifth AC coupling capacitor, and a sixth AC coupling capacitor. The gate and drain of the fifth MOS transistor are connected via the fifth resistor, the gate and drain of the sixth MOS transistor are connected via the sixth resistor, the gate of the fifth MOS transistor is connected to the drain of the second MOS transistor via the fifth AC coupling capacitor, and the gate of the sixth MOS transistor is connected to the drain of the second MOS transistor via the sixth AC coupling capacitor.

[0016] Optionally, the body end of the first MOS transistor is connected to the ground, the body end of the second MOS transistor is connected to the ground, the body end of the third MOS transistor is connected to the ground, and the body end of the fourth MOS transistor is connected to the ground.

[0017] Optionally, the bias voltage applied to the gates of the first MOS transistor and the second MOS transistor is generated by a bias voltage generating circuit controlled by a same five-bit digital signal.

[0018] Optionally, the first resistor and the parasitic capacitance between the gate and source of the first MOS transistor form a first RC low-pass filter network, and the second resistor and the parasitic capacitance between the gate and source of the third MOS transistor form a second RC low-pass filter network.

[0019] Optionally, the first capacitor and the eighth resistor form a third RC low-pass filter network, and the second capacitor and the seventh resistor form a fourth RC low-pass filter network.

[0020] Optionally, the MEMS oscillator is used in a wireless transceiver.

[0021] In the aforementioned MEMS oscillator, the third and fourth MOS transistors, along with the third and fourth capacitors, form a low-impedance noise loop path, reducing noise current flowing through the resonant cavity and lowering the oscillator's phase noise. The active inductor formed by the fifth and sixth MOS transistors, the fifth and sixth AC coupling capacitors, the fifth and sixth AC coupling capacitors, the fifth and sixth resistors increases the loop gain difference between the resonant and non-resonant frequencies. Furthermore, this active inductor provides higher drive capability than a single cross-coupled differential pair of transistors, enabling the oscillator to exhibit excellent bandpass characteristics. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is an existing MEMS oscillator.

[0023] Figure 2 The invention provides a MEMS oscillator circuit having an improved structure.

[0024] Figure 3 This is the circuit diagram of the tuning capacitor.

[0025] Figure 4 It is a stacked structure of a high-Q SiC SAW resonator.

[0026] Figure 5 It is the result of the loop gain of the MEMS oscillator at the oscillation frequency and parasitic resonant frequency changing with the filter resistance under the default control word. DETAILED DESCRIPTION

[0027] Figure 2 It is a MEMS oscillator including the improved structure of the present invention. Among them, the source of the cross-coupled pair of NMOS tubes N1 and N2 for providing negative resistance is connected to the source of the PMOS tubes P1 and P2 with low noise coefficient, and the gate is connected to the drain of the pair of tubes through capacitors C1 and C2 respectively. At the same time, the drain of N1 and N2 is connected to the gate of P1 and P2 through AC coupling capacitors C3 and C4. The first loop is formed by MOS tubes N1 and N2 and capacitors C1 and C2, which is used to control the conduction time of MOS tubes N1 and N2, thereby reducing the time when the noise current is coupled to the resonant cavity. The PMOS tubes P1, P2 and AC coupling capacitors C3 and C4 form the second loop. Since the PMOS tube has a lower noise coefficient, the impact on phase noise is smaller. At the same time, since the PMOS tube constructs a low-resistance path to the ground, more noise current flows to the ground through the noise circulation path, reducing the noise coupled to the resonant cavity. Therefore, by comparison Figure 1 The tail current tube and tail capacitor structure is adopted, which can further reduce the phase noise at close frequency offset caused by the up-conversion of flicker noise of MOS tube, thereby reducing the overall phase noise.

[0028] An active inductive load, formed by connecting the gate of PMOS transistor P3 and the drain of P4 via AC coupling capacitor C5, and the gate of PMOS transistor P4 and the drain of P3 via C6, can be used to increase the loop gain difference between the non-resonant frequency and the resonant frequency in the low- to mid-range. Resistor R5 is connected between the gate and drain of PMOS transistor P3, and resistor R6 is connected between the gate and drain of PMOS transistor P4. By adjusting the values ​​of resistors R5 and R6, capacitors C5 and C6, and PMOS transistors P3 and P4, the loop gain can be increased above 0dB at the oscillation frequency, while the loop gain remains below 0dB at the non-resonant frequency in the low- to mid-range. This ensures that the resonator always operates within the high-Q frequency band during oscillation, without degrading the overall quality factor of the oscillator and thus improving phase noise.

[0029] The MEMS oscillator uses a surface acoustic wave (SAW) resonator on a silicon carbide substrate as a frequency selection network. The stacked structure of the resonator is as follows: Figure 3As shown in Figure 2, the resonator consists of a mechanical electrode, a lithium tantalate (LiTaO3) layer, a silicon dioxide (SiO2) layer, and a silicon carbide (SiC) layer. The thickness of the mechanical electrode (h elec ) is 270nm and is used to generate mechanical vibration. The thickness of the LiTaO3 layer (h LT ) is 800nm. Compared with other piezoelectric materials, the resonator based on LiTaO3 will have a higher Q value. The thickness of the SiO2 layer (h SiO2 ) is 700nm, which has a temperature coefficient opposite to that of LiTaO3, thus eliminating the first-order temperature coefficient (TCF) of the resonator and bringing good temperature performance to the oscillator. SiC ) is 525μm. Compared with the SAW resonator on silicon substrate, the use of silicon carbide substrate can effectively suppress the acoustic loss of horizontal shear acoustic surface waves at the substrate. sub and h PML Refers to the thickness of the resonator's base and the thickness of the perfectly matched layer, both of which are three times the wavelength of the acoustic wave (3λ), that is, 525μm. The SAW resonator is connected in parallel to the drain of the cross-coupled transistors N1 and N2, acting as a frequency selection network to enable the oscillator to operate at the desired frequency. The digitally controlled tuning capacitor Ctune connected in parallel with the SAW resonator is used for frequency tuning of the MEMS oscillator. It is achieved by connecting a large capacitor with a fixed capacitance in parallel with a four-bit digitally controlled switched capacitor array, where the four-bit digitally controlled switched capacitor array is as follows: Figure 4 As shown, Cap_unit represents each capacitor unit, which is used to correct oscillator frequency drift caused by process, voltage, and temperature (PVT) variations. The gate terminals of MOS transistors N1 and N2 are connected to Vbias and biased using the same five-bit digitally controlled bias voltage generation circuit to adjust the MOS transistor's transconductance. This method can adjust the oscillator loop gain to address oscillator failure caused by PVT variations.

[0030] The MEMS oscillator also includes DC coupling resistors R1 and R2, which together with the parasitic capacitance of NMOS transistors N1 and N2 form a low-pass RC filter network to ensure the accuracy and stability of the DC operating point of the cross-coupling transistors. Similarly, DC coupling resistors R3 and R4 together with the parasitic capacitance of PMOS transistors P1 and P2 form a low-pass RC filter network to ensure the accuracy and stability of the oscillator's DC operating point. DC coupling resistors R7 and R8, together with the large fixed-capacitance capacitor in Ctune, form a low-pass filter path to filter out high-frequency parasitics and ensure that the oscillator operates at the correct frequency.

[0031] Figure 5This is the result of the phase noise variation of the improved MEMS oscillator under different capacitance control words. As can be seen from the figure, the oscillator always exhibits good low phase noise characteristics at different resonant frequencies. When the capacitance control word varies in the range of 0-13, the overall phase noise level is always below -161.9dBc / Hz. When the capacitance control word is 14-15, the increased loss of the tuning capacitor worsens the oscillator Q value, causing the oscillator phase noise to deteriorate significantly, but the overall phase noise is still no higher than -161.7dBc / Hz. This phase noise characteristic variation is still within the controllable range, so this oscillator is an oscillator with low phase noise characteristics.

Claims

1. A MEMS oscillator, comprising a resonator and an oscillation circuit, characterized in that: The oscillation circuit comprises: A first loop comprises a first MOS transistor (N1), a second MOS transistor (N2), a first capacitor (C1), a second capacitor (C2), a first resistor (R1), and a second resistor (R2), wherein one end of the first capacitor (C1) is connected to the gate of the first MOS transistor (N1) and one end of the first resistor (R1), the other end of the first capacitor (C1) is connected to the drain of the second MOS transistor (N2) via an eighth resistor (R8), one end of the second capacitor (C2) is connected to the gate of the second MOS transistor (N2) and one end of the second resistor (R2), the other end of the second capacitor (C2) is connected to the drain of the first MOS transistor (N1) via a seventh resistor (R7), and the other end of the first resistor (R1) and the other end of the second resistor (R2) are connected to a bias voltage; a second loop, comprising a third MOS transistor (P1), a fourth MOS transistor (P2), a third capacitor (C3), a fourth capacitor (C4), a third resistor (R3), and a fourth resistor (R4), wherein one end of the third capacitor (C3) is connected to the gate of the third MOS transistor (P1) and one end of the third resistor (R3), the other end of the third capacitor (C3) is connected to the drain of the first MOS transistor (N1) in the first loop, one end of the fourth capacitor (C4) is connected to the gate of the fourth MOS transistor (P2) and one end of the fourth resistor (R4), the other end of the fourth capacitor (C4) is connected to the drain of the second MOS transistor (N2) in the first loop, the drain of the third MOS transistor (P1) and the other end of the third resistor (R3) are both connected to ground (VSS), and the drain of the fourth MOS transistor (P2) and the other end of the fourth resistor (R4) are both connected to ground (VSS); The source of the first MOS transistor (N1) is connected to the source of the third MOS transistor (P1), and the source of the second MOS transistor (N2) is connected to the source of the fourth MOS transistor (P2); The resonator adopts a SAW resonator, and the SAW resonator is respectively connected to the drain of the first MOS transistor (N1) and the second MOS transistor (N2) in the first loop by a direct connection method, and the two ends of the SAW resonator are respectively connected to the gate of the third MOS transistor (P1) and the fourth MOS transistor (P2) in the second loop by an AC coupling method.

2. The MEMS oscillator according to claim 1, wherein: It also includes a digitally controlled tuning capacitor (Ctune) connected in parallel with the SAW resonator, which is used for frequency adjustment of the MEMS oscillator, wherein the digitally controlled tuning capacitor (Ctune) includes a large-value fixed capacitor and an adjustable switched capacitor array, the large-value fixed capacitor is used for oscillator loop gain control, and the adjustable switched capacitor array is implemented using a four-bit digitally controlled switched capacitor array.

3. The MEMS oscillator according to claim 1, wherein: The SAW resonator adopts a stacked structure of SiC, SiO2, and LiTaO3.

4. The MEMS oscillator according to claim 1, wherein: The device further comprises a fifth MOS transistor (P3) and a sixth MOS transistor (P4), wherein both ends of the SAW resonator are connected to the source of the fifth MOS transistor (P3) and the source of the sixth MOS transistor (P4), respectively; wherein the drain of the first MOS transistor (N1) is connected to the source of the fifth MOS transistor (P3), the drain of the second MOS transistor (N2) is connected to the source of the sixth MOS transistor (P4), and the drains of the fifth MOS transistor (P3) and the sixth MOS transistor (P4) are both connected to a power supply (VDD).

5. The MEMS oscillator according to claim 4, wherein: The invention also includes a fifth resistor (R5), a sixth resistor (R6), a fifth AC coupling capacitor (C5) and a sixth AC coupling capacitor (C6); the gate and drain of the fifth MOS transistor (P3) are connected via the fifth resistor (R5); the gate and drain of the sixth MOS transistor (P4) are connected via the sixth resistor (R6); the gate of the fifth MOS transistor (P3) is connected to the drain of the second MOS transistor (N2) via the fifth AC coupling capacitor (C5); and the gate of the sixth MOS transistor (P4) is connected to the drain of the second MOS transistor (N1) via the sixth AC coupling capacitor (C6).

6. The MEMS oscillator according to claim 1, wherein: The body end of the first MOS transistor (N1) is connected to the ground (VSS), the body end of the second MOS transistor (N2) is connected to the ground (VSS), the body end of the third MOS transistor (P1) is connected to the ground (VSS), and the body end of the fourth MOS transistor (P2) is connected to the ground (VSS).

7. The MEMS oscillator according to claim 1, wherein: The bias voltage applied to the gates of the first MOS transistor (N1) and the second MOS transistor (N1) is generated by a bias voltage generating circuit controlled by the same five-bit digital signal.

8. The MEMS oscillator according to claim 1, wherein: The first resistor (R1) and the parasitic capacitance between the gate and source of the first MOS transistor (N1) form a first RC low-pass filter network, and the second resistor (R2) and the parasitic capacitance between the gate and source of the third MOS transistor (P1) form a second RC low-pass filter network.

9. The MEMS oscillator according to claim 1, wherein: The first capacitor (C1) and the eighth resistor (R8) form a third RC low-pass filter network, and the second capacitor (C2) and the seventh resistor (R7) form a fourth RC low-pass filter network.

10. The MEMS oscillator according to any one of claims 1 to 9, wherein: For wireless transceivers.