Graphics processor, index processing method, chip, server and electronic device
By decoupling the resource dependencies between indexing and shading processes in the graphics processor and using indexing units for batch partitioning, the problems of repetitive shading and low pipeline efficiency in triangle indexing are solved, achieving more efficient graphics processing pipeline operation.
Patent Information
- Application Number
- CN202511093574.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-06
- Publication Date
- 2025-11-21
- Estimated Expiration
- 2045-08-06
AI Technical Summary
In existing technologies, graphics processors perform repetitive shading operations when processing triangle indices, and pipeline performance is limited by the allocation of vertex data cache resources, resulting in low efficiency.
By decoupling the resource dependencies between the indexing process and the coloring process, the indexing processing unit is divided into batches based on the available capacity of the storage unit and/or the number of triangles, allowing the next batch of indexing processing to begin before the previous batch of coloring process is completed.
It improves the pipeline efficiency of the graphics processor, reduces the dependence on vertex data cache resources, and enables more efficient indexing and shading operations.
Smart Images

Figure CN120598765B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of processors, and in particular to a graphics processor, an indexing method, a chip, a server, and an electronic device. Background Technology
[0002] The Graphics Processing Unit (GPU) includes a geometry processing pipeline. The front-end hardware of the geometry processing pipeline processes the input vertex index stream. When primitives share vertices, the front-end hardware copies the indices of the shared vertices to generate a triangle index list. The triangle index list includes the vertex indices of each vertex of each triangle in multiple triangles. Then, the front-end hardware inputs the triangle index list into the geometry processing pipeline, where the shader of the geometry processing pipeline shades each vertex of each triangle included in the triangle index list. At this point, some vertices are shaded repeatedly.
[0003] In related technologies, to optimize the aforementioned repetitive coloring operation, after expanding the triangle index list, the front-end hardware will also generate a unique vertex list and a mapping list. The unique vertex list stores the mapping relationship between the updated index and the original index of each vertex, while the mapping list stores a new triangle index list. The new triangle index list contains the updated index of each vertex of each triangle. Therefore, the original index of each triangle vertex in the original triangle index list can be recovered using the unique vertex list and the mapping list, and the shader only needs to color the vertices corresponding to the vertex indices in the unique vertex list.
[0004] In related technologies, there is also a batch splitting operation. The expanded triangle index list is split into different batches to perform the above optimization process in batches. The number of vertices corresponding to each batch depends on the size of the downstream vertex data cache resources (used to store vertex data) allocated. In related technologies, the vertex data buffer area resources are only released after the vertex index of a batch has been processed and shaded, so that the vertex data cache resources corresponding to the next batch can be allocated. That is, related technologies sacrifice pipeline performance to remove duplicate vertex indexes as much as possible. Summary of the Invention
[0005] This application provides a graphics processor, an indexing method, a chip, a server, and an electronic device. This application decouples the resource dependencies during batch splitting and improves the operating efficiency of the pipeline.
[0006] According to one aspect of this application, a graphics processor is provided, the graphics processor including an indexing processing unit;
[0007] An index processing unit is used to obtain a triangle index list, which corresponds to multiple triangles. The triangle index list includes the original index corresponding to each vertex of each triangle in the multiple triangles.
[0008] The index processing unit is used to perform index processing operations on each original index according to the order of arrangement in the triangular index list. The index processing operations include allocating an updated index for the original index when the storage unit does not store the updated index corresponding to the original index, storing the mapping relationship between the original index and the updated index in the storage unit, and querying the updated index from the storage unit according to the original index when the storage unit already stores the updated index corresponding to the original index.
[0009] The index processing unit is used to output the allocated or queried updated indexes as updated indexes in the same batch when the number of mapping relationships currently stored in the storage unit reaches the usable capacity of the storage unit.
[0010] According to one aspect of this application, a graphics processor is provided, the graphics processor including an indexing processing unit;
[0011] An index processing unit is used to obtain a triangle index list, which corresponds to multiple triangles. The triangle index list includes the original index corresponding to each vertex of each triangle in the multiple triangles.
[0012] The index processing unit is used to perform index processing operations on each original index according to the order of arrangement in the triangular index list. The index processing operations include allocating an updated index for the original index when the storage unit does not store the updated index corresponding to the original index, storing the mapping relationship between the original index and the updated index in the storage unit, and querying the updated index from the storage unit according to the original index when the storage unit already stores the updated index corresponding to the original index.
[0013] The index processing unit is used to output the allocated or queried updated indexes as updated indexes in the same batch when the number of triangles corresponding to the mapping relationship currently stored in the storage unit reaches the triangle number threshold.
[0014] According to one aspect of this application, an index processing method is provided, the method comprising:
[0015] Retrieve the list of triangle indices, which corresponds to multiple triangles. The list of triangle indices includes the original index of each vertex of each triangle in the multiple triangles.
[0016] Index processing operations are performed on each original index according to the order of arrangement in the triangular index list. The index processing operations include allocating an updated index to the original index when the updated index corresponding to the original index is not stored in the storage unit, storing the mapping relationship between the original index and the updated index in the storage unit, and querying the updated index from the storage unit based on the original index when the updated index corresponding to the original index is already stored in the storage unit.
[0017] If the number of mapping relationships currently stored in a storage unit reaches the usable capacity of the storage unit, the updated indexes that have been allocated or queried will be output as updated indexes in the same batch.
[0018] According to one aspect of this application, an index processing method is provided, the method comprising the following steps.
[0019] Retrieve the list of triangle indices, which corresponds to multiple triangles. The list of triangle indices includes the original index of each vertex of each triangle in the multiple triangles.
[0020] Index processing operations are performed on each original index according to the order of arrangement in the triangular index list. The index processing operations include allocating an updated index to the original index when the updated index corresponding to the original index is not stored in the storage unit, storing the mapping relationship between the original index and the updated index in the storage unit, and querying the updated index from the storage unit based on the original index when the updated index corresponding to the original index is already stored in the storage unit.
[0021] If the number of triangles corresponding to the mapping relationship currently stored in the storage unit reaches the triangle number threshold, the updated indexes that have been allocated or queried will be output as updated indexes in the same batch.
[0022] According to one aspect of this application, a chip is provided, the chip including the above-described graphics processor.
[0023] According to one aspect of this application, a server is provided, the server including the above-described graphics processor.
[0024] According to one aspect of this application, an electronic device is provided, which includes the aforementioned graphics processor.
[0025] The beneficial effects of the technical solutions provided in this application include at least the following:
[0026] In this embodiment, when the index processing unit splits the original index in the triangle index list and maps out the updated index, it is limited by the usable capacity of the storage unit and / or the threshold of the number of triangles, rather than by the size of the allocated downstream vertex data cache resources in related technologies. That is, this embodiment decouples the resource dependency between the index processing process and the shading process (during the shading process, vertex data is taken out from the vertex data cache resources).
[0027] Compared to related technologies, this application can continue to split the next batch of update indexes after obtaining one batch of update indexes, without waiting for the coloring process corresponding to the previous batch to be completed. Therefore, the index processing unit provided by this application enables the pipeline to run more efficiently and improves the operating efficiency of the hardware.
[0028] Furthermore, in related technologies, batches are divided based on the size of the allocated vertex data cache resources, and the batches divided in related technologies are often large. However, in the embodiments of this application, batches are divided based on the usable capacity of the storage unit and / or the threshold of the number of triangles. The batches divided in this application are smaller. Therefore, the vertex data cache resources corresponding to a batch in this application can be quickly used, released, and put into use in the next batch. Attached Figure Description
[0029] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0030] Figure 1 This is a schematic diagram of an implementation environment provided by an exemplary embodiment of this application.
[0031] Figure 2 This is a schematic diagram illustrating the principle of an index processing method provided in one embodiment of this application.
[0032] Figure 3 This is a schematic diagram illustrating the principle of an index processing method provided in another embodiment of this application.
[0033] Figure 4 This is a schematic diagram of an application scenario corresponding to the index processing unit provided in one embodiment of this application.
[0034] Figure 5 This is a schematic diagram of an application scenario corresponding to the index processing unit provided in another embodiment of this application.
[0035] Figure 6This is a flowchart of an index processing method provided in one embodiment of this application.
[0036] Figure 7 This is a flowchart of an index processing method provided in another embodiment of this application.
[0037] Figure 8 This is a structural block diagram of an electronic device provided in one embodiment of this application.
[0038] Figure 9 This is a schematic diagram of the structure of a server provided in one embodiment of this application. Detailed Implementation
[0039] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.
[0040] First, some terms used in the embodiments of this application will be introduced:
[0041] Vertex Indexing: In a graphics processing unit (GPU), the vertex indices and vertex data of triangles enter the geometry processing pipeline, where vertex shading, tessellation shading, and geometry shading are performed. A vertex index refers to the index of a primitive vertex; it is used to index vertex data. Optionally, primitives include points, lines, and triangles. Optionally, vertex indices are typically stored in a vertex index buffer or generated by hardware during the input assembly stage. Vertex data includes vertex coordinates, vertex attributes, etc. Optionally, vertex data is typically stored in a vertex data buffer area independent of control commands. Based on the vertex index, the hardware can retrieve the corresponding vertex data from the vertex data buffer for shading processing.
[0042] In related technologies, vertex indices need to be processed before entering the geometry processing pipeline. In these technologies, vertex indices are processed by the front-end hardware of the geometry processing pipeline. The primitives described by the vertex index stream input to the front-end hardware may contain multiple primitives sharing vertices. For all input primitive types, the front-end hardware typically first converts them into triangles. Specifically, for point and line primitives, they are converted into triangles with one or two identical vertex indices. For input primitives with shared vertices, the front-end hardware first copies the vertex indices of the shared vertices to generate independent triangle vertex indices, i.e., a triangle index list. Without optimization, these copied vertices will each trigger a shading calculation once. For example, if the input vertex index stream is (0, 10, 2, 32, 24, 65, 26), the converted triangle index list will be:
[0043] Triangle 1: (0, 10, 2);
[0044] Triangle 2: (10, 2, 32);
[0045] Triangle 3: (2, 32, 24);
[0046] Triangle 4: (32, 24, 65);
[0047] Triangle 5: (24, 65, 26);
[0048] As can be seen, without additional optimization, it's equivalent to inputting 7 vertex indices, while the front-end hardware expands this to 15 vertex indices. Subsequently, the vertex data corresponding to these 15 indices will be obtained for coloring. However, several vertices undergo repeated coloring.
[0049] The related technology also provides an optimized processing procedure, preprocessing the vertex indices. Specifically, after the vertex index stream enters the front-end hardware and is expanded into a triangle index list, the front-end hardware processes the vertex indices again. The front-end hardware transforms the triangle index list into a unique vertex list and a mapping list. The unique vertex list stores the mapping relationship between the vertex indices after removing duplicates (called the original index) and the new vertex indices (called the updated index), while the mapping list uses the new vertex indices (updated indexes) from the unique vertex list to map out a new triangle index list, as shown in the table below, further processing the aforementioned example.
[0050] Unique vertex list:
[0051]
[0052] Mapping list:
[0053] Triangle 1: (0, 1, 2);
[0054] Triangle 2: (1, 2, 3);
[0055] Triangle 3: (2, 3, 4);
[0056] Triangle 4: (3, 4, 5);
[0057] Triangle 5: (4, 5, 6);
[0058] By updating the index in the mapping list, the corresponding original index can be found in the unique vertex list, thus reconstructing the triangle index list composed of the original indices. During shading, only the vertices corresponding to the vertex indices in the unique vertex list need to be shading. The front-end hardware inputs the new triangle index list from the mapping list into the geometry processing pipeline for shading.
[0059] In related technologies, a batch splitting operation is also involved. The expanded triangle index list is split into different batches to perform the above optimization process. For example, the original indices of triangles 1, 2, and 3 are used as the vertex indices of the same batch, generating a vertex index list and a mapping list. The original indices of triangles 1, 2, and 3 are mapped to the updated indices of the same batch. Meanwhile, the original indices of triangles 4 and 5 are used as the vertex indices of another batch, generating a vertex index list and a mapping list, which are then mapped to the updated indices of another batch. In related technologies, the number of vertices in each batch depends on the size of the downstream vertex data cache resources allocated to the current batch. Only after the vertex indexes of a batch are processed and shading is completed can the vertex data cache resources occupied by the current batch in the vertex data buffer area be released. Only then can the vertex data cache resources corresponding to the next batch be allocated, and only then can the next batch be split according to the allocated vertex data cache resources. That is, related technologies sacrifice pipeline performance to remove duplicate vertex indices as much as possible.
[0060] like Figure 1 As shown, Figure 1 A schematic diagram of an implementation environment provided by an exemplary embodiment of this application is shown. The graphics processor includes an indexing unit 101, front-end hardware 102 of a geometry processing pipeline, and a geometry processing pipeline 103.
[0061] Front-end hardware 102 receives the input vertex index stream and performs primitive assembly on it to obtain a triangle index list. Optionally, the vertex index stream includes multiple vertex indices used to index vertex data. Optionally, the triangle index list corresponds to multiple triangles and includes the original index corresponding to each vertex of each triangle in the multiple triangles. Front-end hardware 102 sends the triangle index list to index processing unit 101, which processes the triangle index list and sends the resulting new triangle index list to geometry processing pipeline 103.
[0062] Schematic illustration: The vertex index stream received by front-end hardware 102 includes 11 vertex indices: (12, 34, 25, 76, 89, 123, 245, 346, 9, 10, 21). Front-end hardware 102 expands the vertex index stream based on the triangles described in the vertex index stream to obtain a triangle index list, which includes:
[0063] Triangle 1 (12, 34, 25);
[0064] Triangle 2 (34, 25, 76);
[0065] Triangle 3 (24, 76, 89);
[0066] Triangle 4 (76, 89, 123);
[0067] Triangle 5 (89, 123, 245);
[0068] Triangle 6 (123, 245, 346);
[0069] Triangle 7 (245, 346, 9);
[0070] Triangle 8 (346, 9, 10);
[0071] Triangle 9 (9, 10, 21);
[0072] It can be seen that the 11 vertex indices were expanded into 27 original indices.
[0073] The index processing unit 101 provided in this application processes the triangular index list.
[0074] Batch partitioning is performed based on the usable capacity of the storage unit.
[0075] Figure 2 The diagram illustrates the principle of an indexing method provided in an exemplary embodiment of this application. The graphics processor includes an indexing unit 101 and a storage unit 104. The indexing unit 101 controls the storage unit 104 to store, query, and update indexes. The storage unit 104 generates and stores the unique vertex list mentioned above. The indexing unit 101 and the storage unit 104 are logically located before the shading processing steps executed in the geometry processing pipeline.
[0076] The index processing unit 101 obtains the triangle index list. The triangle index list refers to the index list obtained by expanding the vertex index stream based on the triangles described in the vertex index stream.
[0077] The index processing unit 101 performs index processing operations on each original index according to the order of the triangular index list. The index processing operations include: allocating an updated index to the original index when the storage unit 104 does not store the updated index corresponding to the original index, and storing the mapping relationship between the original index and the updated index in the storage unit 104; and retrieving the updated index from the storage unit 104 based on the original index when the storage unit 104 already stores the updated index corresponding to the original index.
[0078] Updating the index refers to the vertex index reassigned by the index processing unit 101.
[0079] The order of the triangular indexes in the triangular index list refers to the order of the original indices in the triangular index list.
[0080] To illustrate, following the triangular index list above, when the index processing operation is performed for the first time, the first original index 12 is retrieved. At this time, the storage unit 104 does not record the updated index corresponding to the original index 12. Therefore, the index processing unit 101 assigns the updated index 0 to the original index 12 and stores the mapping relationship between the original index 12 and the updated index 0 in the storage unit 104.
[0081] Next, the second original index 34 is retrieved. At this time, the storage unit 104 has not recorded the updated index corresponding to the original index 34. Similarly, the index processing unit 101 assigns an updated index 1 to the original index 34 and stores the mapping relationship between the original index 34 and the updated index 1 in the storage unit 104.
[0082] Next, the third original index 25 is retrieved. At this time, the storage unit 104 has not recorded the updated index corresponding to the original index 25. Similarly, the index processing unit 101 assigns an updated index 2 to the original index 25 and stores the mapping relationship between the original index 25 and the updated index 2 in the storage unit 104.
[0083] Next, the fourth original index 34 is retrieved. At this time, the storage unit 104 has stored the updated index 1 corresponding to the original index 34. Then, the index processing unit 101 retrieves the updated index 1 from the storage unit 104.
[0084] This process continues until the number of mapping relationships stored in storage unit 104 reaches the usable capacity of storage unit 104, at which point the allocated or queried update indexes are output as update indexes in the same batch.
[0085] In one embodiment, the usable capacity of storage unit 104 is preset. Optionally, the usable capacity of storage unit 104 is set by software programs, rather than constrained by the hardware capacity of storage unit 104. Optionally, the usable capacity is set by the graphics processor driver.
[0086] Optionally, the available capacity value can be associated with the number of threads that can be started in parallel for a single task. The graphics processor can start multiple threads in parallel, and the available capacity value is used to ensure that the same batch of updated indexes can be processed in parallel by multiple threads without exceeding the load capacity of the multiple threads.
[0087] Optionally, the capacity value can be associated with the size of the downstream vertex data buffer, which stores vertex data. During shading, vertex data is retrieved from the vertex data buffer based on the vertex index. The capacity value can be chosen to ensure that the vertex data corresponding to the updated index in the same batch does not exceed the hardware capacity of the vertex data buffer.
[0088] like Figure 2 As shown, the usable capacity of storage unit 104 is 7. When storage unit 104 stores 7 pairs of mapping relationships, the first batch of updated indices output is as follows:
[0089] Triangle 1 (0, 1, 2);
[0090] Triangle 2 (1, 2, 3);
[0091] Triangle 3 (2, 3, 4);
[0092] Triangle 4 (3, 4, 5);
[0093] Triangle 5 (4, 5, 6);
[0094] Afterwards, the index processing unit 101 will reset the storage unit 104 and perform the mapping processing of the next batch of original indexes. Similar to the processing process above, the resulting second batch of updated indexes is shown below:
[0095] Triangle 6 (0, 1, 2);
[0096] Triangle 7 (1, 2, 3);
[0097] Triangle 8 (2, 3, 4);
[0098] Triangle 9 (3, 4, 5).
[0099] In one embodiment, after forming the same batch of updated indexes, the index processing unit 101 resets the storage unit to prepare for forming the next batch of updated indexes.
[0100] Understandably, this application embodiment divides the triangle index list into batches based on the usable capacity of the storage unit. In related technologies, batch division depends on the size of the allocated downstream vertex data cache resources. However, this application does not divide batches based on this. That is, this application embodiment decouples the upstream and downstream resource dependencies and separates the index processing process. In related technologies, the next batch of index processing can only be performed after the index processing and corresponding shading process of the same batch are completed. However, in this application, when the first batch of updated indexes is generated, the shading process corresponding to the first batch is executed, and the second batch of updated indexes can be generated at this time without waiting for the shading process corresponding to the first batch to be completed. That is, this application embodiment improves the pipeline's operating efficiency.
[0101] Batch division is performed with a threshold for the number of triangles.
[0102] exist Figure 2 The illustrated scheme divides storage units into batches based on their usable capacity. Figure 3 In the process, the index processing unit 101 will divide the data into batches based on a threshold for the number of triangles.
[0103] With the above Figure 2 Similar to the related introductions, in Figure 3 In the process, the index processing unit 101 will perform index processing operations on each original index according to the order of arrangement in the triangular index list. When the number of triangles corresponding to the mapping relationship currently stored in the storage unit 104 reaches the triangle number threshold, the index processing unit 101 will output the updated indexes that have been allocated or queried as the same batch of updated indexes.
[0104] In one embodiment, the triangle count threshold is preset. Optionally, the triangle count threshold is set via the graphics processor driver.
[0105] Optionally, when the graphics processor is used to perform tessellation shading, the value of the triangle number threshold is related to the number of threads that can be launched in parallel by the downstream shell shader. When the graphics processor performs tessellation shading, the tessellation shading expands or adds more triangles. The tessellation shading is performed by the tessellation shader, which includes the shell shader, the tessellation stage, and the domain shader. Therefore, determining the triangle number threshold by the number of threads that can be launched in parallel by the shell shader avoids setting a large triangle number threshold for the upstream indexing unit, preventing a batch from containing too many triangles for index updates, and ensuring that the threads launched in parallel by the downstream shell shader can handle the tasks related to the expanded or added triangles.
[0106] Optionally, when the graphics processor is used to perform geometry shading, the value of the triangle number threshold is related to the size of the storage area used by the output of the downstream geometry shader. Since geometry shading is performed by the geometry shader, the triangle number threshold ensures that the output of the geometry shader does not exceed the size of the storage area, and that the storage area for the output of the downstream geometry shader is sufficiently large.
[0107] Indicative, such as Figure 3 As shown, Figure 3 With a threshold of 6 for the number of triangles, the updated indices for the first batch of partitions are as follows:
[0108] Triangle 1 (0, 1, 2);
[0109] Triangle 2 (1, 2, 3);
[0110] Triangle 3 (2, 3, 4);
[0111] Triangle 4 (3, 4, 5);
[0112] Triangle 5 (4, 5, 6);
[0113] Triangle 6 (5, 6, 7);
[0114] It can be seen that when the number of triangles corresponding to the mapping relationship stored in storage unit 104 reaches 6, the same batch of update indexes will be split out.
[0115] Afterwards, the index processing unit 101 will reset the storage unit 104 and perform the mapping of the next batch of original indexes. Similar to the processing procedure above, the resulting second batch of updated indexes is shown below:
[0116] Triangle 7 (0, 1, 2);
[0117] Triangle 8 (1, 2, 3);
[0118] Triangle 9 (2, 3, 4);
[0119] In one embodiment, after forming the same batch of updated indexes, the index processing unit 101 resets the storage unit to prepare for forming the next batch of updated indexes.
[0120] Understandably, this application embodiment divides the triangle index list into index batches based on a triangle quantity threshold. While related technologies rely on the size of the allocated downstream vertex data cache resources for batch division, this application does not use this method. In other words, this application embodiment decouples the upstream and downstream resource dependencies and isolates the index processing process. In related technologies, the next batch of index processing can only proceed after the index processing and corresponding shading processes of the same batch are completed. However, in this application, after the first batch of updated indexes is generated, the corresponding shading process is executed, and the second batch of updated indexes can be generated immediately without waiting for the first batch's shading process to complete. Therefore, this application embodiment improves the pipeline's operational efficiency.
[0121] Furthermore, by splitting the graph using a triangle quantity threshold, it can be ensured that the update indices of all vertices of the same primitive are in the same batch, thus guaranteeing the orderliness, accuracy, and reliability of the subsequent coloring process.
[0122] It should be noted that the above sections described schemes for batch partitioning based on the usable capacity of storage units and the threshold for the number of triangles. In an optional embodiment, both the usable capacity of storage units and the threshold for the number of triangles are used as constraints. When either constraint is satisfied, the allocated or queried update indexes are output as update indexes of the same batch.
[0123] For example, continuing the example above, assuming the available capacity is 7 and the triangle number threshold is 6, the first batch of updated indices obtained from the partitioning would look like this:
[0124] Triangle 1 (0, 1, 2);
[0125] Triangle 2 (1, 2, 3);
[0126] Triangle 3 (2, 3, 4);
[0127] Triangle 4 (3, 4, 5);
[0128] Triangle 5 (4, 5, 6);
[0129] The updated indexes for the second batch are shown below:
[0130] Triangle 6 (0, 1, 2);
[0131] Triangle 7 (1, 2, 3);
[0132] Triangle 8 (2, 3, 4);
[0133] Triangle 9 (3, 4, 5);
[0134] At this point, the constraint that "the number of mappings currently stored in the storage unit reaches the usable capacity of the storage unit" will be prioritized. That is, if the number of mapping relationships currently stored in the storage unit reaches the usable capacity of the storage unit, and the number of triangles corresponding to the mapping relationships currently stored in the storage unit does not reach the triangle number threshold, the index processing unit will output the allocated or queried updated indexes as updated indexes in the same batch.
[0135] For example, assuming the available capacity is 9 and the triangle count threshold is 6, the first batch of updated indices obtained from the partitioning would look like this:
[0136] Triangle 1 (0, 1, 2);
[0137] Triangle 2 (1, 2, 3);
[0138] Triangle 3 (2, 3, 4);
[0139] Triangle 4 (3, 4, 5);
[0140] Triangle 5 (4, 5, 6);
[0141] Triangle 6 (5, 6, 7);
[0142] The updated indexes for the second batch are shown below:
[0143] Triangle 7 (0, 1, 2);
[0144] Triangle 8 (1, 2, 3);
[0145] Triangle 9 (2, 3, 4);
[0146] At this point, the constraint that "the number of triangles corresponding to the mapping relationship currently stored in the storage unit reaches the triangle number threshold" will be prioritized. That is, if the number of triangles corresponding to the mapping relationship currently stored in the storage unit reaches the triangle number threshold, and the number of mapping relationships currently stored in the storage unit does not reach the usable capacity of the storage unit, the index processing unit will output the allocated or queried updated indexes as updated indexes in the same batch.
[0147] Use cases of index processing unit 101
[0148] In one embodiment, the index processing unit 101 can be used for Figure 1 The implementation environment shown can also be used in other implementation environments. Figure 1 In the implementation environment shown, such as Figure 4As shown, the index processing unit 101 is used to perform processing on the triangle index list between the primitive assembly stage 401 and the vertex shading stage 402; the primitive assembly stage 401 is used to assemble the vertex index stream into a triangle index list. In the vertex shading stage 402, the corresponding vertex data is obtained according to the updated index for vertex shading.
[0149] It is understandable that when the index processing unit 101 is applied between the primitive assembly stage 401 and the vertex shading stage 402, since the mapping relationship within the storage unit is restricted from being replaced (which can be deduced from the fact that the update index is split into the same batch when the usable capacity of the storage unit is reached), the update index, primitive identifier, tessellation information, and geometric primitive information within a batch can be indexed as independent units. Therefore, after the vertex shading corresponding to a batch is completed, the subsequent tessellation shading (the processing operation performed by the tessellation shader is called tessellation shading) and geometry shading can be processed immediately. At this time, the vertex shading, tessellation shading, and geometry shading of different batches can be performed alternately in batches. That is, the index processing unit provided in this application embodiment supports the decoupling of vertex shading, tessellation shading, and geometry shading. For example, the batch that executes vertex shading first can execute tessellation shading later, as long as the vertices in the same batch are executed in the order of vertex shading, tessellation shading, and geometry shading.
[0150] In one embodiment, the index processing unit 101 can be used for Figure 1 Other implementation environments besides these.
[0151] like Figure 5 As shown, the index processing unit 101 is used to process the triangle index list between the tessellation stage 501 and the domain shading stage 502. The tessellation stage 501 performs tessellation based on the tessellation parameters output by the shell shader, generating more vertices and primitives. The domain shading stage 502 processes the vertices generated in the tessellation stage 501. The tessellation stage 501 and the domain shading stage 502 are processing stages executed within the geometry processing pipeline.
[0152] Understandably, in the surface tessellation stage 501, multiple new primitives are generated based on the input primitives, and these newly generated primitives will also have a large number of shared vertices. In the above embodiment, the index processing unit 101 is used between the surface tessellation stage 501 and the domain shading stage 502 to perform deduplication and batching operations on the vertex indices of the newly generated vertices in the surface tessellation stage 501.
[0153] Optionally, when the index processing unit 101 is used between the surface tessellation stage 501 and the domain shading stage 502, the specific form of the original index in the triangle index list depends on the output of the surface tessellation stage 501. If the output of the surface tessellation stage 501 is directly the index value of the vertex, then the original index in the triangle index list is the index value of the vertex. If the output of the surface tessellation stage 501 is the primitive identifier (patch id) and the uv coordinates of the vertex, then the primitive identifier (patch id) and the uv coordinates of the vertex are merged into the vertex index of the vertex, thereby forming the triangle index list, and the index processing unit 101 performs deduplication and batching operations.
[0154] Optionally, the same index processing unit 101 can be used in time-shading between the primitive assembly stage 401 and the vertex shading stage 402, and between the surface subdivision stage 501 and the domain shading stage 502, or each can use its own index processing unit 101. This application does not impose any restrictions on this.
[0155] Understandably, the existing technologies do not take into account the presence of tessellation shaders and geometry shaders in the graphics pipeline. With the introduction of tessellation and geometry shaders, new vertices are generated, and the number of vertices generated is determined in real-time during the shading stage based on calculation results. Therefore, in the existing technologies, the front-end hardware of the geometry processor can only estimate resources based on the maximum limit of generated vertices, allocate vertex data cache resources according to the maximum number of vertices, and then divide batches based on the maximum vertex data cache resources. However, in the above embodiment, an index processing unit is inserted between the tessellation stage and the domain shading stage, which can divide batches based on the actual number of vertices generated during the tessellation stage, resulting in more accurate batch division.
[0156] Index processing unit 101 processes multiple raw indexes at once.
[0157] In one embodiment, the index processing unit 101 is further configured to perform index processing operations on each of at least two original indexes in the order of arrangement in the triangular index list. In this case, performing index processing operations on multiple original indexes at once can improve the throughput of the index processing unit.
[0158] Optionally, the index processing unit 101 is further configured to perform index processing operations on each original index of at least one triangle at a time, according to the arrangement order in the triangle index list and with triangle as the granularity. In this case, performing index processing operations on multiple original indexes at a time with triangle as the granularity ensures that the addition or deletion of the mapping relationship stored in the storage unit 104 is always carried out on a triangle-by-triangle basis, thereby ensuring that all updated indexes of the same triangle are output in the same batch.
[0159] In related technologies, index processing operations can only be performed on one raw index at a time, as shown in the following example.
[0160] Suppose that the relevant technology receives the following raw index during processing:
[0161] Triangle 12: (12, 25, 67);
[0162] Furthermore, the storage unit already stores the mapping relationship between the original index 25 and the updated index 0, and it is stored in the first position; while the storage unit does not store the mapping relationship between the original index 12 and the original index 67.
[0163] Assuming the current storage unit is full, the existing mapping relationships within the storage unit include:
[0164]
[0165] If we query all three original indexes simultaneously, the result will be:
[0166]
[0167] When three original indexes are replaced simultaneously, original index 12 will replace the position of original index 25, original index 67 will replace the position of original index 34, while original index 25 will be considered to be in the storage unit. Therefore, the final result will be:
[0168] Triangle 12: (0, 0, 1);
[0169] However, when the process was restored later, the corresponding vertex index incorrectly became (12, 12, 67).
[0170] Therefore, the relevant technology can only perform lookup operations on a single raw index sequentially.
[0171] This application uses a preset threshold for the usable capacity of storage units and / or the number of triangles to divide batches, prohibiting storage units from being replaced. When handling the above situation, since the storage units are full, the current batch will be divided first, the updated index of the current batch will be sent downstream for processing, and the contents of the storage units will be reset. Therefore, when processing triangle 12, the index processing operation will be performed using the reset storage units. At this time, the search status of triangle 12 will become:
[0172]
[0173] The update index corresponding to triangle 12 is:
[0174] Triangle 12: (0, 1, 2);
[0175] The corresponding list of unique vertices is as follows:
[0176]
[0177] In other words, this application can avoid the limitation of related technologies that can only perform index processing operations on one original index at a time. In theory, this application can support any number of original indexes to perform index processing operations at the same time.
[0178] Optionally, the usable capacity of a storage unit is measured in triangles. When indexing operations are performed on multiple raw indexes simultaneously, and these raw indexes can form at least one triangle, the usable capacity of the storage unit needs to be measured in units of the number of triangles formed by the raw indexes used in a single lookup.
[0179] Figure 6 A flowchart of an index processing method provided in an exemplary embodiment of this application is shown, illustrated by way of example, that the method is executed by the index processing unit 101 described above. The method includes:
[0180] Step 620: Obtain the triangle index list;
[0181] A triangle index list is an index list obtained by expanding the vertex index stream based on the triangles described in the vertex index stream. The triangle index list corresponds to multiple triangles and includes the original index for each vertex of each triangle. The vertex index stream consists of multiple vertex indices, which are used to index vertex data.
[0182] Step 640: Perform index processing operations on each original index according to the order of arrangement in the triangular index list;
[0183] The order of the triangular indexes in the triangular index list refers to the order of the original indices in the triangular index list.
[0184] Index processing operations include allocating an updated index to the original index when the updated index corresponding to the original index is not stored in the storage unit, storing the mapping relationship between the original index and the updated index in the storage unit, and retrieving the updated index from the storage unit based on the original index when the updated index corresponding to the original index is already stored in the storage unit.
[0185] The update index refers to the vertex index obtained from the reassignment.
[0186] In one embodiment, indexing operations are performed on each of at least two original indexes in the order listed in the triangular index list. This allows for improved throughput of the indexing unit by performing indexing operations on multiple original indexes simultaneously.
[0187] Optionally, following the order of the triangular index list, indexing operations are performed on each original index of at least one triangle at a time, using triangles as the granularity. In this case, performing indexing operations on multiple original indexes at a time, using triangles as the granularity, ensures that the addition or removal of mapping relationships stored within a storage unit is always done on a triangle-by-triangle basis, thus guaranteeing that all updated indexes of the same triangle are output in the same batch.
[0188] Step 660: If the number of mapping relationships currently stored in the storage unit reaches the usable capacity of the storage unit, output the allocated or queried update indexes as the same batch of update indexes.
[0189] Optionally, the available capacity can be set via the graphics processor driver; alternatively, the value of the available capacity can be associated with the number of threads that can be started in parallel for a single task. The graphics processor can start multiple threads in parallel, and the value of the available capacity is used to ensure that the same batch of updated indexes can be processed in parallel by multiple threads without exceeding the load capacity of the multiple threads.
[0190] Optionally, the capacity value can be associated with the size of the downstream vertex data buffer, which stores vertex data. During shading, vertex data is retrieved from the vertex data buffer based on the vertex index. The capacity value can be chosen to ensure that the vertex data corresponding to the updated index in the same batch does not exceed the hardware capacity of the vertex data buffer.
[0191] In one embodiment, if the number of mapping relationships currently stored in a storage unit reaches the usable capacity of the storage unit, and the number of triangles corresponding to the mapping relationships currently stored in the storage unit does not reach the triangle number threshold, the allocated or queried updated indexes will be output as updated indexes in the same batch. At this time, the triangle number threshold will also be considered to determine whether the output limit for the same batch has been reached.
[0192] In one embodiment, the method further includes resetting the storage unit after forming the same batch of update indexes to prepare for forming the next batch of update indexes.
[0193] In summary, the above embodiments divide the triangle index list into batches based on the usable capacity of the storage unit. Batch division in related technologies depends on the size of the allocated downstream vertex data cache resources. However, this application does not divide batches based on this. That is, the embodiments of this application decouple the upstream and downstream resource dependencies and separate the index processing process. In related technologies, the next batch of index processing can only be performed after the index processing and corresponding shading process of the same batch are completed. However, in this application, when the first batch of updated indexes is generated, the shading process corresponding to the first batch is executed, and the second batch of updated indexes can be generated at this time without waiting for the shading process corresponding to the first batch to be completed. That is, the embodiments of this application improve the pipeline's operating efficiency.
[0194] In one embodiment, Figure 6 The index processing method shown is applied to the processing of the triangle index list between the primitive assembly stage and the vertex shading stage.
[0195] The primitive assembly stage assembles the vertex index stream into a triangle index list. In the vertex shading stage, the corresponding vertex data is retrieved based on the updated indexes for vertex shading.
[0196] In one embodiment, Figure 6 The indexing method shown is applied to process the list of triangle indices between the surface subdivision stage and the domain coloring stage.
[0197] The tessellation stage is used to perform tessellation based on the tessellation parameters output by the shell shader, generating more vertices and primitives. The domain shading stage is used to process the vertices generated in the tessellation stage.
[0198] Understandably, during the surface tessellation stage, multiple new primitives are generated based on the input primitives, and these newly generated primitives will also have a large number of shared vertices. In the above embodiment, an index processing unit is used between the surface tessellation stage and the domain shading stage to perform deduplication and batching operations on the vertex indices of the newly generated vertices during the surface tessellation stage.
[0199] Figure 7 A flowchart of an index processing method provided in an exemplary embodiment of this application is shown, illustrated by way of example, that the method is executed by the index processing unit 101 described above. The method includes:
[0200] Step 720: Obtain the list of triangle indices;
[0201] A triangle index list is an index list obtained by expanding the vertex index stream based on the triangles described in the vertex index stream. The triangle index list corresponds to multiple triangles and includes the original index for each vertex of each triangle. The vertex index stream consists of multiple vertex indices, which are used to index vertex data.
[0202] Step 740: Perform index processing operations on each original index according to the order of arrangement in the triangular index list;
[0203] The order of the triangular indexes in the triangular index list refers to the order of the original indices in the triangular index list.
[0204] Index processing operations include allocating an updated index to the original index when the updated index corresponding to the original index is not stored in the storage unit, storing the mapping relationship between the original index and the updated index in the storage unit, and retrieving the updated index from the storage unit based on the original index when the updated index corresponding to the original index is already stored in the storage unit.
[0205] The update index refers to the vertex index obtained from the reassignment.
[0206] In one embodiment, indexing operations are performed on each of at least two original indexes in the order listed in the triangular index list. This allows for improved throughput of the indexing unit by performing indexing operations on multiple original indexes simultaneously.
[0207] Optionally, following the order of the triangular index list, indexing operations are performed on each original index of at least one triangle at a time, using triangles as the granularity. In this case, performing indexing operations on multiple original indexes at a time, using triangles as the granularity, ensures that the addition or removal of mapping relationships stored within a storage unit is always done on a triangle-by-triangle basis, thus guaranteeing that all updated indexes of the same triangle are output in the same batch.
[0208] Step 760: If the number of triangles corresponding to the mapping relationship currently stored in the storage unit reaches the triangle number threshold, the updated indexes that have been allocated or queried are output as updated indexes in the same batch.
[0209] In one embodiment, the triangle number threshold is set by the graphics processor driver; alternatively, when the graphics processor is used to perform tessellation shading, the value of the triangle number threshold is associated with the number of threads that can be started in parallel by the downstream shell shader.
[0210] When the graphics processor performs tessellation shading, the tessellation shading expands or adds more triangles. Tessellation shading is performed by the tessellation shader, which includes a shell shader, a tessellation stage, and a domain shader. Therefore, by determining the number of triangles to be added by the number of threads that can be started in parallel by the shell shader, we can avoid setting a large triangle number threshold for the upstream indexing unit, preventing a batch from updating the index with too many triangles, and ensuring that the threads started in parallel by the downstream shell shader can handle the tasks related to the expanded or added triangles.
[0211] Optionally, when the graphics processor is used to perform geometry shading, the value of the triangle number threshold is related to the size of the storage area used by the output of the downstream geometry shader. Since geometry shading is performed by the geometry shader, the triangle number threshold ensures that the output of the geometry shader does not exceed the size of the storage area, and that the storage area for the output of the downstream geometry shader is sufficiently large.
[0212] In one embodiment, if the number of triangles corresponding to the mapping relationships currently stored in the storage unit reaches a triangle number threshold, but the number of mapping relationships currently stored in the storage unit does not reach the usable capacity of the storage unit, the allocated or queried updated indexes will be output as updated indexes in the same batch. At this time, the usable capacity of the storage unit will also be considered to determine whether the output limit for the same batch has been reached.
[0213] In one embodiment, the method further includes resetting the storage unit after forming the same batch of update indexes to prepare for forming the next batch of update indexes.
[0214] In summary, this application embodiment divides the triangle index list into index batches based on a triangle quantity threshold. While related technologies rely on the size of the allocated downstream vertex data cache resources for batch division, this application does not. This means that this application embodiment decouples the upstream and downstream resource dependencies and isolates the index processing process. In related technologies, the next batch of index processing can only proceed after the index processing and corresponding shading processes of the same batch are completed. However, in this application, after the first batch of updated indexes is generated, the corresponding shading process is executed, and the second batch of updated indexes can be generated immediately without waiting for the first batch's shading process to complete. Therefore, this application embodiment improves the pipeline's operational efficiency.
[0215] Furthermore, by splitting the graph using a triangle quantity threshold, it can be ensured that the update indices of all vertices of the same primitive are in the same batch, thus guaranteeing the orderliness, accuracy, and reliability of the subsequent coloring process.
[0216] In one embodiment, Figure 7 The index processing method shown is applied to the processing of the triangle index list between the primitive assembly stage and the vertex shading stage.
[0217] The primitive assembly stage assembles the vertex index stream into a triangle index list. In the vertex shading stage, the corresponding vertex data is retrieved based on the updated indexes for vertex shading.
[0218] In one embodiment, Figure 7 The indexing method shown is applied to process the list of triangle indices between the surface subdivision stage and the domain coloring stage.
[0219] The tessellation stage is used to perform tessellation based on the tessellation parameters output by the shell shader, generating more vertices and primitives. The domain shading stage is used to process the vertices generated in the tessellation stage.
[0220] Understandably, during the surface tessellation stage, multiple new primitives are generated based on the input primitives, and these newly generated primitives will also have a large number of shared vertices. In the above embodiment, an index processing unit is used between the surface tessellation stage and the domain shading stage to perform deduplication and batching operations on the vertex indices of the newly generated vertices during the surface tessellation stage.
[0221] Figure 8 A structural block diagram of an electronic device 800 provided in an exemplary embodiment of this application is shown. Optionally, the electronic device 800 includes a graphics processor provided in an embodiment of this application.
[0222] Optionally, the electronic device can be a portable mobile terminal, such as a smartphone, tablet, MP3 player (Moving Picture Experts Group Audio Layer III), MP4 player (Moving Picture Experts Group Audio Layer IV), laptop, or desktop computer. The electronic device 800 may also be referred to as a user device, portable terminal, laptop terminal, desktop terminal, or other names. Typically, the electronic device 800 includes a processor 801 and a memory 802.
[0223] Processor 801 may include one or more processing cores, such as a quad-core processor, a penta-core processor, etc. Processor 801 may be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). Processor 801 may also include a main processor and a coprocessor. The main processor, also known as a CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, processor 801 may integrate a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content required to be displayed on the screen. In some embodiments, processor 801 may also include an AI (Artificial Intelligence) processor, which is used to handle computational operations related to machine learning.
[0224] The memory 802 may include one or more computer-readable storage media, which may be non-transitory. The memory 802 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices.
[0225] In some embodiments, the electronic device 800 may optionally include: a peripheral device interface 803 and at least one peripheral device. Those skilled in the art will understand that... Figure 8 The structure shown does not constitute a limitation on the electronic device 800, and may include more or fewer components than shown, or combine certain components, or use different component arrangements.
[0226] This application also provides a chip that includes a graphics processor as described in the embodiments above.
[0227] This application also provides a graphics card that includes a graphics processor as described in the embodiments above.
[0228] This application also provides a server that includes a graphics processor as described in the embodiments above.
[0229] Figure 9The diagram illustrates the structure of a server provided in an exemplary embodiment of this application. The server 900 includes a plurality of graphics processors 901, and at least one of the graphics processors 901 includes the graphics processor described in the embodiments of this application above.
[0230] This application also provides a computing cluster, which includes multiple servers, at least one of which includes a graphics processor as described in the above embodiments.
[0231] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.
[0232] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware or by a program instructing related hardware. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk.
[0233] The above description is merely an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.
Claims
1. A graphics processor, characterized in that, The graphics processor includes an index processing unit; The index processing unit is used to obtain a triangle index list, which corresponds to multiple triangles and includes the original index corresponding to each vertex of each triangle in the multiple triangles. The index processing unit is configured to perform index processing operations on each of the original indexes according to the order of arrangement in the triangular index list; the index processing operations include allocating the updated index to the original index when the storage unit does not store the updated index corresponding to the original index, storing the mapping relationship between the original index and the updated index in the storage unit, and querying the updated index from the storage unit according to the original index when the storage unit has stored the updated index corresponding to the original index; The index processing unit is configured to output the allocated or queried updated indexes as updated indexes in the same batch when the number of mapping relationships currently stored in the storage unit reaches the usable capacity of the storage unit.
2. The graphics processor according to claim 1, characterized in that, The available capacity is set via the graphics processor's driver; The value of the usable capacity is related to the number of threads that a single task can start in parallel.
3. The graphics processor according to claim 1, characterized in that, The available capacity is set via the graphics processor's driver; The value of the usable capacity is related to the size of the downstream vertex data buffer area, which is used to store vertex data.
4. The graphics processor according to any one of claims 1 to 3, characterized in that, The index processing unit is further configured to output the allocated or queried updated indexes as updated indexes in the same batch when the number of mapping relationships currently stored in the storage unit reaches the usable capacity of the storage unit and the number of triangles corresponding to the mapping relationships currently stored in the storage unit does not reach the triangle number threshold.
5. The graphics processor according to any one of claims 1 to 3, characterized in that, The index processing unit is further configured to perform the index processing operation on each of at least two original indexes in accordance with the order of arrangement in the triangular index list.
6. The graphics processor according to claim 5, characterized in that, The index processing unit is further configured to perform the index processing operation on each of the original indices of at least one triangle at a time, according to the arrangement order in the triangle index list and with triangle as the granularity.
7. The graphics processor according to any one of claims 1 to 3, characterized in that, The index processing unit is used to perform processing on the triangle index list between the primitive assembly stage and the vertex shading stage; or, The index processing unit is used to perform processing on the triangle index list between the surface subdivision stage and the domain coloring stage; or, The index processing unit is configured to perform processing on the triangle index list between the primitive assembly stage and the vertex shading stage, and to perform processing on the triangle index list between the surface subdivision stage and the domain shading stage.
8. The graphics processor according to any one of claims 1 to 3, characterized in that, The index processing unit is also configured to reset the storage unit after the same batch of updated indexes is formed.
9. A graphics processor, characterized in that, The graphics processor includes an index processing unit; The index processing unit is used to obtain a triangle index list, which corresponds to multiple triangles and includes the original index corresponding to each vertex of each triangle in the multiple triangles. The index processing unit is configured to perform index processing operations on each of the original indexes according to the order of arrangement in the triangular index list; the index processing operations include allocating the updated index to the original index when the storage unit does not store the updated index corresponding to the original index, storing the mapping relationship between the original index and the updated index in the storage unit, and querying the updated index from the storage unit according to the original index when the storage unit has stored the updated index corresponding to the original index; The index processing unit is used to output the allocated or queried updated indexes as updated indexes in the same batch when the number of triangles corresponding to the mapping relationship currently stored in the storage unit reaches the triangle number threshold.
10. The graphics processor according to claim 9, characterized in that, The threshold for the number of triangles is set by the graphics processor's driver. When the graphics processor is used to perform surface tessellation shading, the value of the triangle number threshold is associated with the number of threads that can be started in parallel by the downstream shell shader.
11. The graphics processor according to claim 9, characterized in that, The threshold for the number of triangles is set by the graphics processor's driver. When the graphics processor is used to perform geometry shading, the value of the triangle number threshold is related to the size of the storage area used by the output of the downstream geometry shader.
12. The graphics processor according to any one of claims 9 to 11, characterized in that, The index processing unit is further configured to output the allocated or queried updated indexes as updated indexes in the same batch when the number of triangles corresponding to the mapping relationship currently stored in the storage unit reaches the triangle number threshold and the number of mapping relationships currently stored in the storage unit does not reach the usable capacity of the storage unit.
13. The graphics processor according to any one of claims 9 to 11, characterized in that, The index processing unit is further configured to perform the index processing operation on each of at least two original indexes in accordance with the order of arrangement in the triangular index list.
14. The graphics processor according to claim 13, characterized in that, The index processing unit is further configured to perform the index processing operation on each of the original indices of at least one triangle at a time, according to the arrangement order in the triangle index list and with triangle as the granularity.
15. The graphics processor according to any one of claims 9 to 11, characterized in that, The index processing unit is used to perform processing on the triangle index list between the primitive assembly stage and the vertex shading stage; or, The index processing unit is used to perform processing on the triangle index list between the surface subdivision stage and the domain coloring stage; or, The index processing unit is configured to perform processing on the triangle index list between the primitive assembly stage and the vertex shading stage, and to perform processing on the triangle index list between the surface subdivision stage and the domain shading stage.
16. The graphics processor according to any one of claims 9 to 11, characterized in that, The index processing unit is also configured to reset the storage unit after the same batch of updated indexes is formed.
17. An index processing method, characterized in that, The method includes: Obtain a triangle index list, which corresponds to multiple triangles, and the triangle index list includes the original index corresponding to each vertex of each of the multiple triangles; The index processing operation is performed on each of the original indexes according to the order of arrangement in the triangular index list. The index processing operation includes allocating the updated index to the original index when the storage unit does not store the updated index corresponding to the original index, storing the mapping relationship between the original index and the updated index in the storage unit, and querying the updated index from the storage unit according to the original index when the storage unit has stored the updated index corresponding to the original index. If the number of mapping relationships currently stored in the storage unit reaches the usable capacity of the storage unit, the updated indexes that have been allocated or queried will be output as updated indexes in the same batch.
18. An index processing method, characterized in that, The method includes: Obtain a triangle index list, which corresponds to multiple triangles, and the triangle index list includes the original index corresponding to each vertex of each of the multiple triangles; The index processing operation is performed on each of the original indexes according to the order of arrangement in the triangular index list. The index processing operation includes allocating the updated index to the original index when the storage unit does not store the updated index corresponding to the original index, storing the mapping relationship between the original index and the updated index in the storage unit, and querying the updated index from the storage unit according to the original index when the storage unit has stored the updated index corresponding to the original index. If the number of triangles corresponding to the mapping relationship currently stored in the storage unit reaches the triangle number threshold, the updated indexes that have been allocated or queried will be output as the same batch of updated indexes.
19. A chip, characterized in that, The chip includes a graphics processor as described in any one of claims 1 to 16.
20. A server, characterized in that, The server includes a graphics processor as described in any one of claims 1 to 16.
21. An electronic device, characterized in that, The electronic device includes a graphics processor as described in any one of claims 1 to 16.
Citation Information
Patent Citations
Multi-view image generation device and graphics processor
CN117952816A
GPU primitive preprocessing device, system and method
CN118887071A