Negative voltage charge pump circuit, switching power converter, and electronic device

Abstract

The application belongs to the technical field of electronic circuits, and provides a negative voltage charge pump circuit, a switching power converter and an electronic device. The application adds a reference voltage generation module, a comparison module, a fourth driving module, a fifth power tube, a sixth power tube and a seventh power tube on an existing charge pump. The application generates a third reference voltage, i.e. a threshold voltage when the negative voltage charge pump circuit enters light load, by using the reference voltage generation module, and then compares the third reference voltage and an error voltage output by an error amplifier by using the comparison module to determine whether the negative voltage charge pump circuit enters a light load working condition. When the negative voltage charge pump circuit enters the light load working condition, the large-size power tube and the driving module thereof are closed, and only the small-size power tube is enabled. While ensuring other performances of the negative voltage charge pump circuit, the working current of the negative voltage charge pump circuit in light load is greatly reduced, and the conversion efficiency of the charge pump circuit in light load is improved.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of electronic circuits, and particularly relates to a negative voltage charge pump circuit, a switching power converter and an electronic device. BACKGROUND

[0002] The switching power converter is an indispensable component in the power supply system of electronic products, which can convert different voltage values for each part to use, while trying to reduce additional losses as much as possible. The switching capacitor converter, also known as a charge pump, works by storing energy in a capacitor. Compared with the inductance-based switching power converter, this type of converter has the advantages of smaller size, lower static current, lower noise and lower electromagnetic interference, so it has been widely used in small load scenarios.

[0003] Conversion efficiency is a very important indicator of the switching power converter. The higher the efficiency, the less power is lost in the conversion process. The charge pump mainly uses a switching capacitor as the main structure, and the loss in the conversion process mainly includes the on-resistance loss of the power switch tube, the current loss of the power tube driving circuit, and the current loss of other basic modules that provide voltage and current. In order to achieve a higher output voltage value and improve the conversion efficiency, the power tube usually uses a larger size, which makes the on-resistance of the power tube smaller, and at the same time requires the power tube driving circuit to have stronger driving capability.

[0004] However, when the load current is very small, the current of the charge pump is mainly consumed in the driving of the power tube in each cycle, and the opening and closing of the power tube is necessary to maintain the output voltage. This results in: when the load is small, especially zero load, the charge pump still has a large working current, which greatly reduces its conversion efficiency. In some systems, the input voltage of the charge pump is provided by a boost converter, and when the working current of the charge pump is equivalent to the input side of the boost converter, it will further increase. SUMMARY

[0005] The negative voltage charge pump circuit, the switching power converter and the electronic device provided by the embodiments of the application can solve the problem that the current charge pump still has a large working current when the load is light, which greatly reduces its conversion efficiency.

[0006] In a first aspect, the embodiments of the present application provide a negative voltage charge pump circuit, comprising a first power tube, a second power tube, a third power tube, a fourth power tube, an output capacitor, an output resistor, a first resistor, a second resistor, a flying capacitor, a first switch, an error amplifier, a first driving module, a second driving module, and a third driving module, a source of the first power tube receives an input voltage, a gate of the first power tube is connected with a first end of the first switch, a second end of the first switch is connected with an output end of the error amplifier, a control end of the first switch receives a clock signal, a drain of the first power tube is connected with a drain of the second power tube and a first end of the flying capacitor, a gate of the second power tube is connected with the first driving module, a source of the second power tube and a source of the third power tube are both grounded, a gate of the third power tube is connected with the second driving module, a drain of the third power tube is connected with a drain of the fourth power tube and a second end of the flying capacitor, a gate of the fourth power tube is connected with the third driving module, a source of the fourth power tube is connected with a first end of the output capacitor, a first end of the output resistor, and a first end of the second resistor, a second end of the second resistor is connected with a first end of the first resistor and a first input end of the error amplifier, a second end of the first resistor receives a first reference voltage, a second input end of the error amplifier receives a second reference voltage; the negative voltage charge pump circuit further comprises a reference voltage generation module, a comparison module, a fourth driving module, a fifth power tube, a sixth power tube, and a seventh power tube, a size of the fifth power tube is smaller than a size of the second power tube and the types of the two are the same, a size of the sixth power tube is smaller than a size of the third power tube and the types of the two are the same, a size of the seventh power tube is smaller than a size of the fourth power tube and the types of the two are the same; the comparison module is connected with the reference voltage generation module, the output end of the error amplifier, and the fourth driving module respectively, the fourth driving module is connected with the first driving module, the second driving module, the third driving module, a gate of the fifth power tube, a gate of the sixth power tube, and a gate of the seventh power tube respectively, a drain of the fifth power tube is connected with a drain of the second power tube, a source of the fifth power tube is connected with a source of the second power tube, a drain of the sixth power tube is connected with a source of the third power tube, a source of the sixth power tube is connected with a drain of the third power tube, a drain of the seventh power tube is connected with a drain of the fourth power tube, and a source of the seventh power tube is connected with a source of the fourth power tube;

[0007] The reference voltage generation module is configured to generate a third reference voltage according to a first current, the first current being in proportional relationship with the current flowing through the first power tube; the comparison module is configured to compare the error voltage output by the error amplifier and the third reference voltage, and output a first comparison signal when the error voltage is greater than the third reference voltage; and the fourth driving module is configured to receive a clock signal, output a first driving signal, a second driving signal and a third driving signal according to the clock signal, and output a first control signal, a second control signal and a third control signal according to the clock signal and the first comparison signal, so as to respectively close the first driving module, the second driving module and the third driving module, and further turn off the second power tube, the third power tube and the fourth power tube.

[0008] In a possible implementation manner of the first aspect, the comparison module is further configured to output a second comparison signal when the error voltage is less than the third reference voltage; and the fourth driving module is further configured to output a fourth control signal, a fifth control signal and a sixth control signal according to the second comparison signal and the clock signal, so as to respectively control the first driving module to drive the second power tube, the second driving module to drive the third power tube and the third driving module to drive the fourth power tube.

[0009] In a possible implementation manner of the first aspect, the reference voltage generation module comprises an eighth power tube and a current source, a drain of the eighth power tube receives the input voltage, a gate of the eighth power tube is connected with a source of the eighth power tube, a first end of the current source and the comparison module respectively, and a second end of the current source is grounded; wherein the eighth power tube and the first power tube are power tubes of the same type and have the same size.

[0010] In a possible implementation manner of the first aspect, the comparison module comprises a comparator and an inverter, a first input end of the comparator is connected with the reference voltage generation module, a second input end of the comparator is connected with an output end of the error amplifier, an output end of the comparator is connected with an input end of the inverter, and an output end of the inverter is connected with the fourth driving module.

[0011] In a possible implementation manner of the first aspect, the fourth driving module includes a first driving unit, a second driving unit and a third driving unit, the first driving unit is connected with the comparison module, the second driving unit, the third driving unit, the first driving module and the gate of the fifth power tube respectively, the second driving unit is connected with the second driving module and the gate of the sixth power tube respectively, and the third driving unit is connected with the third driving module and the gate of the seventh power tube respectively.

[0012] The first driving unit is configured to output a first driving signal according to the clock signal, and output a first control signal according to the clock signal and the first comparison signal, so as to close the first driving module and turn off the second power tube.

[0013] The second driving unit is configured to output a second driving signal according to the clock signal, and output a second control signal according to the clock signal and the first comparison signal, so as to close the second driving module and turn off the third power tube.

[0014] The third driving unit is configured to output a third driving signal according to the clock signal, and output a third control signal according to the clock signal and the first comparison signal, so as to close the third driving module and turn off the fourth power tube.

[0015] In a possible implementation manner of the first aspect, the first driving unit includes a first AND gate and a first driving subunit, a first input end of the first AND gate is connected with the comparison module, the second driving unit and the third driving unit respectively, an output end of the first AND gate is connected with the first driving module, an output end of the first driving subunit is connected with the gate of the fifth power tube, and a second input end of the first AND gate and an input end of the first driving subunit receive the clock signal.

[0016] In a possible implementation manner of the first aspect, the second driving unit includes a second AND gate and a second driving subunit, a first input end of the second AND gate is connected with the comparison module, the first driving unit and the third driving unit respectively, an output end of the second AND gate is connected with the second driving module, an output end of the second driving subunit is connected with the gate of the sixth power tube, and a second input end of the second AND gate and an input end of the second driving subunit receive the clock signal.

[0017] In a possible implementation manner of the first aspect, the third driving unit comprises a third AND gate and a third driving subunit, a first input end of the third AND gate is connected with the comparison module, the first driving unit and the second driving unit respectively, an output end of the third AND gate is connected with the third driving module, an output end of the third driving subunit is connected with a gate of the seventh power tube, and a second input end of the third AND gate and an input end of the third driving subunit both receive the clock signal.

[0018] In the second aspect, the embodiments of the present application provide a switching power supply converter comprising the negative voltage charge pump circuit in any of the first aspect.

[0019] In the third aspect, the embodiments of the present application provide an electronic device comprising the switching power supply converter in any of the second aspect.

[0020] Compared with the prior art, the embodiments of the present application have the beneficial effects that:

[0021] The embodiments of the present application provide a negative voltage charge pump circuit, which adds a reference voltage generation module, a comparison module, a fourth driving module, a fifth power tube, a sixth power tube and a seventh power tube on the existing charge pump, the size of the fifth power tube is smaller than that of the second power tube and the types of the two are the same, the size of the sixth power tube is smaller than that of the third power tube and the types of the two are the same, and the size of the seventh power tube is smaller than that of the fourth power tube and the types of the two are the same; the comparison module is connected with the reference voltage generation module, an output end of the error amplifier and the fourth driving module respectively, the fourth driving module is connected with the first driving module, the second driving module, the third driving module, a gate of the fifth power tube, a gate of the sixth power tube and a gate of the seventh power tube respectively, a drain of the fifth power tube is connected with a drain of the second power tube, a source of the fifth power tube is connected with a source of the second power tube, a drain of the sixth power tube is connected with a source of the third power tube, a source of the sixth power tube is connected with a drain of the third power tube, a drain of the seventh power tube is connected with a drain of the fourth power tube, and a source of the seventh power tube is connected with a source of the fourth power tube.

[0022] The reference voltage generation module is configured to generate a third reference voltage according to a first current, the first current being in proportional relationship with a current flowing through the first power tube, the current flowing through the first power tube representing a load current, and thus the first current representing the load current, so that the third reference voltage generated by the reference voltage generation module according to the first current can serve as a threshold voltage when the negative voltage charge pump circuit enters a light load state. The comparison module is configured to compare the error voltage output by the error amplifier with the third reference voltage, and when the error voltage is greater than the third reference voltage, it indicates that the negative voltage charge pump circuit enters a light load state, and at this time, a first comparison signal is output. The fourth driving module is configured to receive a clock signal, and output a first driving signal, a second driving signal and a third driving signal according to the clock signal, which are used to drive the fifth power tube, the sixth power tube and the seventh power tube, respectively. At the same time, the fourth driving module is also configured to output a first control signal, a second control signal and a third control signal according to the clock signal and the first comparison signal, which are used to close the first driving module, the second driving module and the third driving module, respectively, so as to turn off the second power tube, the third power tube and the fourth power tube. Therefore, when the negative voltage charge pump circuit enters a light load state, the large-size power tubes and their driving modules are closed, and only the small-size power tubes are allowed to work, so as to maintain the normal switching period of the negative voltage charge pump circuit and ensure the normal output voltage. At the same time, the performance of the negative voltage charge pump circuit is ensured, and the working current of the negative voltage charge pump circuit in a light load state is greatly reduced, thereby improving the conversion efficiency of the negative voltage charge pump circuit in a light load state.

[0023] In summary, the third reference voltage is generated by the reference voltage generation module, and then the comparison module compares the third reference voltage with the error voltage output by the error amplifier to determine whether the negative voltage charge pump circuit enters a light load state. When the negative voltage charge pump circuit enters a light load state, the large-size power tubes and their driving modules are closed, and only the small-size power tubes are allowed to work. At the same time, the performance of the negative voltage charge pump circuit is ensured, and the working current of the negative voltage charge pump circuit in a light load state is greatly reduced, thereby improving the conversion efficiency of the negative voltage charge pump circuit in a light load state.

[0024] It can be understood that the beneficial effects of the second aspect to the third aspect can be referred to the related description in the first aspect, which will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0026] Figure 1 is a circuit connection schematic diagram of the prior art charge pump;

[0027] Figure 2 is a working timing diagram of an existing charge pump;

[0028] Figure 3 is a principle block diagram of a negative voltage charge pump circuit provided by an embodiment of the present application;

[0029] Figure 4 is a principle block diagram of a negative voltage charge pump circuit provided by another embodiment of the present application;

[0030] Figure 5 is a circuit connection schematic diagram of a negative voltage charge pump circuit provided by an embodiment of the present application;

[0031] Figure 6 is a working timing diagram of a negative voltage charge pump circuit provided by an embodiment of the present application.

[0032] In the figure: 10, reference voltage generation module; 20, comparison module; 30, fourth driving module; 31, first driving unit; 32, second driving unit; 33, third driving unit. DETAILED DESCRIPTION

[0033] In the following description, for the purposes of explanation and not limitation, specific details are set forth, such as particular system configurations, techniques, etc., in order to provide a thorough understanding of the embodiments of the application. However, it will be apparent to those skilled in the art that the application can be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the application with unnecessary detail.

[0034] It should be understood that the term "includes" when used in the specification and the appended claims herein, specifies the presence of stated features, integers, steps, operations, elements, and / or components but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0035] It should also be understood that the term "and / or" when used in the specification and the appended claims herein, means and encompasses any and all possible combinations of one or more of the associated listed items and can be used interchangeably with "or".

[0036] As used in the description and the appended claims herein, the term "if' can be interpreted as meaning "when" or "upon" or "in response to a determination" or "in response to a detection" depending on the context. Similarly, the phrase "if determined" or "if detected [the described condition or event]" can be interpreted as meaning "upon a determination" or "in response to a determination" or "upon a detection of [the described condition or event]" or "in response to a detection of [the described condition or event]" depending on the context.

[0037] In addition, in the description of the present application and the appended claims, the terms "first", "second", "third", etc. are used merely as identifiers, and can not be understood as indicating or implying relative importance.

[0038] The description of "one embodiment", "some embodiments", and the like in the present application description means that the particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Thus, the appearance of the phrases "in one embodiment", "in some embodiments", "in other embodiments", "in additional embodiments", and the like in various places in the specification is not necessarily all referring to the same embodiment, but can mean "one or more but not all embodiments", unless otherwise specifically indicated. The terms "comprising", "including", "having" and their variants mean "including but not limited to", unless otherwise specifically indicated.

[0039] Figure 1 The circuit connection diagram of the existing charge pump is shown as Figure 1As shown, the existing charge pump includes a first power tube M1, a second power tube M2, a third power tube M3, a fourth power tube M4, an output capacitor Cout, an output resistor Rout, a first resistor R1, a second resistor R2, a flying capacitor Cfly, a first switch SW1, an error amplifier EA, a first drive module DRV1, a second drive module DRV2 and a third drive module DRV3, the source of the first power tube M1 receives an input voltage VIN, the gate of the first power tube M1 is connected with the first end of the first switch SW1, the second end of the first switch SW1 is connected with the output end of the error amplifier EA, the control end of the first switch SW1 receives a clock signal clk, the drain of the first power tube M1 is connected with the drain of the second power tube M2 and the first end of the flying capacitor Cfly respectively, the gate of the second power tube M2 is connected with the first drive module DRV1, the source of the second power tube M2 and the source of the third power tube M3 are both grounded, the gate of the third power tube M3 is connected with the second drive module DRV2, the drain of the third power tube M3 is connected with the drain of the fourth power tube M4 and the second end of the flying capacitor Cfly respectively, the gate of the fourth power tube M4 is connected with the third drive module DRV3, the source of the fourth power tube M4 is connected with the first end of the output capacitor Cout, the first end of the output resistor Rout and the first end of the second resistor R2 respectively, the second end of the second resistor R2 is connected with the first end of the first resistor R1 and the first input end of the error amplifier EA respectively, in the present application, the first input end of the error amplifier EA is the inverting input end, the second end of the first resistor R1 receives a first reference voltage VREF1, the second input end of the error amplifier EA receives a second reference voltage VREF2, in the present application, the second input end of the error amplifier EA is the non-inverting input end, the first drive module DRV1, the second drive module DRV2 and the third drive module DRV3 all receive the clock signal clk. Among them, the first power tube M1 and the third power tube M3 are both PMOS power tubes, and the second power tube M2 and the fourth power tube M4 are both NMOS power tubes.

[0040] The first driving module DRV1, the second driving module DRV2 and the third driving module DRV3 are driving modules of the second power tube M2, the third power tube M3 and the fourth power tube M4 respectively, and are used for outputting the driving signal VGMN1, the driving signal VGMP2 and the driving signal VGMN2 respectively. The first power tube M1 is driven by the error amplifier EA, and is connected between the error voltage VC and the signal VGMP1 by a first switch SW1 controlled by a clock signal clk. When the clock signal clk is low, the first switch SW1 is turned on, and the voltage of the signal VGMP1 is equal to the error voltage VC. When the clock signal clk is high, the first switch SW1 is turned off, and the signal VGMP1 is high. The first resistor R1 and the second resistor R2 are connected in series as a voltage dividing resistor string. The feedback voltage generated by the voltage dividing resistor string is compared with the second reference voltage VREF2, so as to adjust the size of the error voltage VC, thereby adjusting the gate-source voltage VGS of the first power tube M1, changing the on-resistance of the first power tube M1, and causing the output voltage VOUT to change, so as to form a feedback system, and make the output voltage VOUT controllable.

[0041] When the clock signal clk is low, the first power tube M1 and the third power tube M3 are turned on, the second power tube M2 and the fourth power tube M4 are turned off, the first end of the flying capacitor Cfly is connected to the input voltage VIN through the first power tube M1, the second end of the flying capacitor Cfly is connected to the ground through the third power tube M3, the input voltage VIN charges the flying capacitor Cfly, and the flying capacitor Cfly stores energy. When the clock signal clk is high, the second power tube M2 and the fourth power tube M4 are turned on, the first power tube M1 and the third power tube M3 are turned off, the first end of the flying capacitor Cfly is connected to the ground through the second power tube M2, the second end of the flying capacitor Cfly is connected to the output capacitor Cout through the fourth power tube M4, the flying capacitor Cfly charges the output capacitor Cout, and energy is transferred to the output capacitor Cout. The direction of the flying capacitor Cfly is exchanged during discharging, so that the output voltage VOUT generated is a negative voltage. Neglecting the on-resistance of the power tube, the existing charge pump can generate an output voltage VOUT of -VIN. The output voltage VOUT can also be set by the first reference voltage VREF1 and the second reference voltage VREF2.

[0042] Figure 2The working timing of the existing charge pump is shown, the load current Iload is constantly decreasing, and the ripple of the output voltage VOUT in each clock cycle is decreasing. When the load current Iload decreases, if the first power tube M1 maintains the previous conduction degree, the charge supplemented by the output capacitor Cout in each clock cycle will be greater than the consumed charge, so that the absolute value of the output voltage VOUT becomes larger. In fact, the first resistor R1 and the second resistor R2 act as a feedback unit. If the output voltage VOUT decreases, that is, the absolute value becomes larger, the feedback voltage to the inverting input terminal of the error amplifier EA makes the error voltage VC generated by the error amplifier EA higher, and the conduction degree of the first power tube M1 decreases when the clock signal clk is low, and the conduction resistance increases, thereby reducing the energy transferred to the flying capacitor Cfly in each clock cycle and the energy transferred to the output capacitor Cout by the flying capacitor Cfly. The feedback mechanism makes the error voltage VC voltage value rise as the load current Iload decreases. When the clock signal clk is at the low level, the first switch SW1 is turned on, and the voltage of the signal VGMP1 is equal to the error voltage VC. The low potential of the signal VGMP1 is the same as the error voltage VC and rises as the load current Iload decreases. The signal VGMP1, the signal VGMN1, the signal VGMP2 and the signal VGMN2 are all in phase with the clock signal clk. Regardless of the change of the load, the conduction and turn-off of the first power tube M1, the second power tube M2, the third power tube M3 and the fourth power tube M4 are controlled in each clock cycle. In actual design, in order to reduce the voltage drop between the absolute value of the output voltage VOUT and the input voltage VIN, and improve the conversion efficiency of the charge pump under heavy load, considering that the conduction resistance of the power tube is the main influencing factor, the power tube usually adopts a larger size, which makes the conduction resistance of the power tube smaller. In fact, driving a large-size power tube consumes a lot of operating current, which leads to a significant decrease in its conversion efficiency.

[0043] To solve the above problems, the embodiment of the present application provides a negative pressure charge pump circuit, as Figure 3As shown, the negative voltage charge pump circuit adds a reference voltage generation module 10, a comparison module 20, a fourth driving module 30, a fifth power tube M5, a sixth power tube M6 and a seventh power tube M7 on the existing charge pump. The size of the fifth power tube M5 is smaller than that of the second power tube M2 and the types of the two are the same. The size of the sixth power tube M6 is smaller than that of the third power tube M3 and the types of the two are the same. The size of the seventh power tube M7 is smaller than that of the fourth power tube M4 and the types of the two are the same. The comparison module 20 is connected with the reference voltage generation module 10, the output end of the error amplifier EA and the fourth driving module 30 respectively. The fourth driving module 30 is connected with the first driving module DRV1, the second driving module DRV2, the third driving module DRV3, the gate of the fifth power tube M5, the gate of the sixth power tube M6 and the gate of the seventh power tube M7 respectively. The drain of the fifth power tube M5 is connected with the drain of the second power tube M2. The source of the fifth power tube M5 is connected with the source of the second power tube M2. The drain of the sixth power tube M6 is connected with the source of the third power tube M3. The source of the sixth power tube M6 is connected with the drain of the third power tube M3. The drain of the seventh power tube M7 is connected with the drain of the fourth power tube M4. The source of the seventh power tube M7 is connected with the source of the fourth power tube M4.

[0044] Specifically, the reference voltage generation module 10 is configured to generate the third reference voltage VREF3 according to the first current, the first current is proportional to the current flowing through the first power tube M1, and the current flowing through the first power tube M1 represents the load current Iload, so the first current represents the load current Iload, and then the third reference voltage VREF3 generated by the reference voltage generation module 10 according to the first current can be used as the threshold voltage when the negative voltage charge pump circuit enters the light load state. The comparison module 20 is configured to compare the error voltage VC output by the error amplifier EA with the third reference voltage VREF3, and when the error voltage VC is greater than the third reference voltage VREF3, it indicates that the negative voltage charge pump circuit enters the light load state, and at this time the first comparison signal is output. The fourth drive module 30 is configured to receive the clock signal clk, and output the first drive signal VGMN1W, the second drive signal VGMP2W and the third drive signal VGMN2W according to the clock signal clk, which are used to drive the fifth power tube M5, the sixth power tube M6 and the seventh power tube M7 respectively; at the same time, the fourth drive module 30 also outputs the first control signal, the second control signal and the third control signal according to the clock signal clk and the first comparison signal, which are used to close the first drive module DRV1, the second drive module DRV2 and the third drive module DRV3 respectively, and then turn off the second power tube M2, the third power tube M3 and the fourth power tube M4. Therefore, when the negative voltage charge pump circuit enters the light load state, the large-size power tube and its drive module are closed, and only the small-size power tube is allowed to work, so as to maintain the normal switching period of the negative voltage charge pump circuit, while ensuring other performances of the negative voltage charge pump circuit, the working current of the negative voltage charge pump circuit in the light load state is greatly reduced, and the conversion efficiency of the negative voltage charge pump circuit in the light load state is improved.

[0045] In summary, the third reference voltage VREF3 is generated by the reference voltage generation module 10, and then the comparison module 20 compares the third reference voltage VREF3 with the error voltage VC output by the error amplifier, to determine whether the negative voltage charge pump circuit enters the light load state. When the negative voltage charge pump circuit enters the light load state, the large-size power tube and its drive module are closed, and only the small-size power tube is allowed to work, so as to maintain the normal switching period of the negative voltage charge pump circuit, while ensuring other performances of the negative voltage charge pump circuit, the working current of the negative voltage charge pump circuit in the light load state is greatly reduced, and the conversion efficiency of the negative voltage charge pump circuit in the light load state is improved.

[0046] It should be noted that the drive power tube mentioned in the present application means to control the conduction and turn-off of the power tube, so that it is periodically turned on and turned off according to the clock period of the clock signal clk.

[0047] In some embodiments, the comparison module 20 is further configured to output a second comparison signal when the error voltage VC is less than the third reference voltage VREF3, indicating that the negative charge pump circuit has entered a heavy-load condition. When this occurs, the fourth driver module 30 is further configured to output a fourth control signal, a fifth control signal, and a sixth control signal based on the second comparison signal and the clock signal clk, respectively controlling the first driver module DRV1 to drive the second power transistor M2, the second driver module DRV2 to drive the third power transistor M3, and the third driver module DRV3 to drive the fourth power transistor M4. It should be noted that the fifth power transistor M5, the sixth power transistor M6, and the seventh power transistor M7 remain in operation, and their drive signals are not affected by the comparison signal. Thus, when the negative charge pump circuit enters a heavy-load condition, the large-sized power transistors and the small-sized power transistors operate together, and the large-sized power transistors can maintain the high conversion efficiency of the negative charge pump circuit under heavy load.

[0048] In some embodiments, as Figure 4 As shown, the fourth driving module 30 includes a first driving unit 31, a second driving unit 32 and a third driving unit 33. The first driving unit 31 is respectively connected to the comparison module 20, the second driving unit 32, the third driving unit 33, the first driving module DRV1 and the gate of the fifth power tube M5. The second driving unit 32 is respectively connected to the gate of the second driving module DRV2 and the sixth power tube M6. The third driving unit 33 is respectively connected to the gate of the third driving module DRV3 and the seventh power tube M7.

[0049] Specifically, the first driving unit 31 is used to output a first driving signal according to the clock signal clk to drive the fifth power tube M5; at the same time, it also outputs a first control signal according to the clock signal clk and the first comparison signal to turn off the first driving module DRV1 and then turn off the second power tube M2.

[0050] The second driving unit 32 is used to output a second driving signal according to the clock signal clk to drive the sixth power tube M6; and also output a second control signal according to the clock signal clk and the first comparison signal to turn off the second driving module DRV2 and further turn off the third power tube M3.

[0051] The third driving unit 33 is used to output a third driving signal according to the clock signal clk to drive the seventh power tube M7; and also output a third control signal according to the clock signal clk and the first comparison signal to turn off the third driving module DRV3 and further turn off the fourth power tube M4.

[0052] From the above, it can be seen that when the negative voltage charge pump circuit enters the light load condition, the large-size power tube and its driving module are turned off, and only the small-size power tube is operated. While ensuring other performances of the negative voltage charge pump circuit, the operating current of the negative voltage charge pump circuit under light load is greatly reduced, thereby improving the conversion efficiency of the negative voltage charge pump circuit under light load.

[0053] The first driver unit 31 is further configured to output a fourth control signal based on the clock signal clk and the second comparison signal, for controlling the first driver module DRV1 to drive the second power transistor M2. The second driver unit 32 is further configured to output a fifth control signal based on the clock signal clk and the second comparison signal, for controlling the second driver module DRV2 to drive the third power transistor M3. The third driver unit 33 is configured to output a sixth control signal based on the clock signal clk and the second comparison signal, for controlling the third driver module DRV3 to drive the fourth power transistor M4. At this time, the fifth power transistor M5, the sixth power transistor M6, and the seventh power transistor M7 are still in operation.

[0054] From the above, it can be seen that when the negative voltage charge pump circuit enters a heavy load condition, the large-size power tube and the small-size power tube work together, and the large-size power tube can maintain the high conversion efficiency of the negative voltage charge pump circuit under heavy load.

[0055] In some embodiments, as Figure 5 As shown, the reference voltage generating module 10 includes an eighth power tube M8 and a current source. The drain of the eighth power tube M8 receives the input voltage VIN, the gate of the eighth power tube M8 is connected to the source of the eighth power tube M8, the first end of the current source and the comparison module 20 respectively, and the second end of the current source is grounded. The eighth power tube M8 and the first power tube M1 are power tubes of the same type and have the same size.

[0056] Specifically, the first current IREF1 generated by the current source generates the third reference voltage VREF3 through the eighth power transistor M8. Since the eighth power transistor M8 and the first power transistor M1 are the same type of power transistor and are matched, the first current IREF1 is in proportional relationship with the current flowing through the first power transistor M1. The current flowing through the first power transistor M1 represents the load current Iload. Therefore, the first current IREF1 represents the load current Iload. The third reference voltage VREF3 generated according to the first current IREF1 can be used as the threshold voltage of the negative voltage charge pump circuit when the negative voltage charge pump circuit enters the light load. When the error voltage VC is greater than the third reference voltage VREF3, it represents that the negative voltage charge pump circuit enters the light load. When the error voltage VC is less than the third reference voltage VREF3, it represents that the negative voltage charge pump circuit enters the heavy load. It should be noted that since the eighth power transistor M8 and the first power transistor M1 are the same type of power transistor and are matched, the third reference voltage VREF3 can adapt to the change of different process angles (i.e. production deviation), so that the range of the load current threshold of the switching power transistor size becomes smaller.

[0057] In some embodiments, as shown in FIG. 2, the comparison module 20 includes a comparator COMP and an inverter INV. The first input terminal of the comparator COMP is connected with the reference voltage generation module 10. The second input terminal of the comparator COMP is connected with the output terminal of the error amplifier EA. The output terminal of the comparator COMP is connected with the input terminal of the inverter INV. The output terminal of the inverter INV is connected with the fourth driving module 30. Figure 5

[0058] Specifically, the comparator COMP compares the error voltage VC output by the error amplifier EA with the third reference voltage VREF3. When the error voltage VC is greater than the third reference voltage VREF3, the output signal SAVE_POWER flips to high level. After being inverted by the inverter INV, the first comparison signal is output. The first comparison signal is low level.

[0059] When the error voltage VC is less than the third reference voltage VREF3, the output signal SAVE_POWER flips to low level. After being inverted by the inverter INV, the second comparison signal is output. The second comparison signal is high level.

[0060] In some embodiments, as shown in FIG. 2, the comparison module 20 includes a comparator COMP and an inverter INV. The first input terminal of the comparator COMP is connected with the reference voltage generation module 10. The second input terminal of the comparator COMP is connected with the output terminal of the error amplifier EA. The output terminal of the comparator COMP is connected with the input terminal of the inverter INV. The output terminal of the inverter INV is connected with the fourth driving module 30. Figure 5 ​As shown, the first driving unit 31 comprises a first AND gate AND1 and a first driving subunit DRV_MN1W, a first input end of the first AND gate AND1 is connected with the comparison module 20, the second driving unit 32 and the third driving unit 33 respectively, an output end of the first AND gate AND1 is connected with the first driving module DRV1, an output end of the first driving subunit DRV_MN1W is connected with a gate of the fifth power tube M5, a second input end of the first AND gate AND1 and an input end of the first driving subunit DRV_MN1W both receive the clock signal clk.

[0061] Specifically, when the error voltage VC is greater than the third reference voltage VREF3, the first comparison signal output by the comparison module 20 is low. Since the first comparison signal is low, the first control signal output by the first AND gate AND1 is low, which is used to close the first driving module DRV1, and further turn off the second power tube M2.

[0062] When the error voltage VC is less than the third reference voltage VREF3, the second comparison signal output by the comparison module 20 is high. Since the second comparison signal is high, the fourth control signal output by the first AND gate AND1 is in phase with the clock signal clk, which is used to control the first driving module DRV1 to drive the second power tube M2.

[0063] The first driving subunit DRV_MN1W is only controlled by the clock signal clk, so no matter what working condition the negative voltage charge pump circuit is in, the first driving subunit DRV_MN1W always outputs the first driving signal according to the clock signal clk, which is used to drive the fifth power tube M5.

[0064] In some embodiments, as Figure 5 As shown, the second driving unit 32 comprises a second AND gate AND2 and a second driving subunit DRV_MP2W, a first input end of the second AND gate AND2 is connected with the comparison module 20, the first driving unit 31 and the third driving unit 33 respectively, an output end of the second AND gate AND2 is connected with the second driving module DRV2, an output end of the second driving subunit DRV_MP2W is connected with a gate of the sixth power tube M6, a second input end of the second AND gate AND2 and an input end of the second driving subunit DRV_MP2W both receive the clock signal clk.

[0065] Specifically, when the error voltage VC is greater than the third reference voltage VREF3, the first comparison signal output by the comparison module 20 is low. Since the first comparison signal is low, the second control signal output by the second AND gate AND2 is low, which is used to close the second driving module DRV2, and further turn off the third power tube M3.

[0066] When the error voltage VC is less than the third reference voltage VREF3, the second comparison signal output by the comparison module 20 is high. Since the second comparison signal is high, the fifth control signal output by the second AND gate AND2 is in phase with the clock signal clk, for controlling the second driving module DRV2 to drive the third power tube M3.

[0067] The second driving subunit DRV_MP2W is controlled only by the clock signal clk, so regardless of the working condition of the negative voltage charge pump circuit, the second driving subunit DRV_MP2W always outputs the second driving signal according to the clock signal clk, for driving the sixth power tube M6.

[0068] In some embodiments, as shown in Figure 5 The third driving unit 33 includes a third AND gate AND3 and a third driving subunit DRV_MN2W, the first input end of the third AND gate AND3 is connected with the comparison module 20, the first driving unit 31 and the second driving unit 32 respectively, the output end of the third AND gate AND3 is connected with the third driving module DRV3, the output end of the third driving subunit DRV_MN2W is connected with the gate of the seventh power tube M7, and the second input end of the third AND gate AND3 and the input end of the third driving subunit DRV_MN2W both receive the clock signal clk.

[0069] Specifically, when the error voltage VC is greater than the third reference voltage VREF3, the first comparison signal output by the comparison module 20 is low. Since the first comparison signal is low, the third control signal output by the third AND gate AND3 is low, for turning off the third driving module DRV3, and thus turning off the fourth power tube M4.

[0070] When the error voltage VC is less than the third reference voltage VREF3, the second comparison signal output by the comparison module 20 is high. Since the second comparison signal is high, the sixth control signal output by the third AND gate AND3 is in phase with the clock signal clk, for controlling the third driving module DRV3 to drive the fourth power tube M4.

[0071] The third driving subunit DRV_MN2W is controlled only by the clock signal clk, so regardless of the working condition of the negative voltage charge pump circuit, the third driving subunit DRV_MN2W always outputs the third driving signal according to the clock signal clk, for driving the seventh power tube M7.

[0072] The working principle of the present application is explained in combination with Figure 5 and Figure 6

[0073] As shown in Figure 5 ​As shown, the first current IREF1 generates the third reference voltage VREF3 through the eighth power transistor M8, the eighth power transistor M8 and the first power transistor M1 are the same type of power transistor and match, the first current IREF1 is proportional to the current flowing through the first power transistor M1, the current flowing through the first power transistor M1 represents the load current Iload, and therefore the first current IREF1 represents the load current Iload. Compare the error voltage VC with the third reference voltage VREF3, when the load current Iload decreases, the error voltage VC becomes high, when the error voltage VC reaches the third reference voltage VREF3, the comparator COMP outputs flip to high, that is, the signal SAVE_POWER flips to high, and the first comparison signal is obtained after the inverter INV. The first comparison signal is low. The first comparison signal passes through three AND gates to turn off three drive modules, thereby turning off the large-size power transistor and only allowing the small-size power transistor to work, maintaining the normal switching period of the negative voltage charge pump circuit and ensuring the normal output voltage VOUT.

[0074] For example, the second power transistor M2 and the fifth power transistor M5 work together when the negative voltage charge pump circuit is under heavy load, the second power transistor M2 with a larger size can maintain high efficiency under heavy load, and only the fifth power transistor M5 works under light load, the second power transistor M2 and the first drive module DRV1 thereof are turned off, so the second power transistor M2 and the first drive module DRV1 thereof do not generate current. Since the fifth power transistor M5 is small in size, the drive current of the first drive subunit DRV_MN1W can also be reduced. The same applies to the third power transistor M3 and the sixth power transistor M6, the fourth power transistor M4 and the seventh power transistor M7. Through the above control mode, the working current under light load can be greatly reduced, the conversion efficiency of the negative voltage charge pump circuit is improved, and other performances of the circuit can be guaranteed.

[0075] As shown in Figure 6 When the output voltage VOUT of the negative voltage charge pump circuit is stable, the load current Iload gradually decreases, the error voltage VC gradually increases, and the low potential of the signal VGMP1 also gradually increases. When the error voltage VC reaches the third reference voltage VREF3, the comparator COMP flips, the signal SAVE_POWER becomes high, the first drive signal VGMN1W, the second drive signal VGMP2W, and the third drive signal VGMN2W are not affected, the drive signal VGMN1S of the second power transistor M2 and the drive signal VGMN2S of the fourth power transistor M4 will be constant low, and the drive signal VGMP2S of the third power transistor M3 will be constant high, thereby turning off the second power transistor M2, the third power transistor M3 and the fourth power transistor M4.

[0076] The application detects the load current Iload, generates a third reference voltage VREF3 by using the current IREF1 and the eighth power tube M8, compares the error voltage VC output by the error amplifier EA, and judges whether the load of the circuit is in light load. The large-size power tube and its driving module are closed in light load, only the small-size power tube is enabled, the working current of the circuit is greatly reduced while keeping other performances of the circuit, thereby improving the conversion efficiency of the circuit in light load. In heavy load, the large-size power tube and the small-size power tube are enabled to work together to maintain high conversion efficiency.

[0077] The application also provides a switching power supply converter comprising the negative voltage charge pump circuit. The switching power supply converter has the advantage of high conversion efficiency in light load.

[0078] The application also provides an electronic device comprising the switching power supply converter. The electronic device has all the advantages of the above-mentioned embodiments.

[0079] In the above embodiments, the description of each embodiment has its own focus, and the parts not described or recorded in a certain embodiment can be referred to the relevant description of other embodiments.

[0080] The above-mentioned embodiments are only used to illustrate the technical solutions of the application, and not to limit them; although the application has been described in detail with reference to the above-mentioned embodiments, those skilled in the art should understand that the technical solutions recorded in the above-mentioned embodiments can still be modified, or some technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the application, and should be included in the protection scope of the application.

Claims

1. A negative voltage charge pump circuit comprising a first power transistor, a second power transistor, a third power transistor, a fourth power transistor, an output capacitor, an output resistor, a first resistor, a second resistor, a flying capacitor, a first switch, an error amplifier, a first driving module, a second driving module and a third driving module, a source of the first power transistor receives an input voltage, a gate of the first power transistor is connected with a first end of the first switch, a second end of the first switch is connected with an output terminal of the error amplifier, a control terminal of the first switch receives a clock signal, a drain of the first power transistor is connected with a drain of the second power transistor and a first terminal of the flying capacitor respectively, a gate of the second power transistor is connected with the first driving module, a source of the second power transistor and a source of the third power transistor are both grounded, a gate of the third power transistor is connected with the second driving module, a drain of the third power transistor is connected with a drain of the fourth power transistor and a second terminal of the flying capacitor respectively, a gate of the fourth power transistor is connected with the third driving module, a source of the fourth power transistor is connected with a first terminal of the output capacitor, a first terminal of the output resistor and a first terminal of the second resistor respectively, a second terminal of the second resistor is connected with a first terminal of the first resistor and a first input terminal of the error amplifier respectively, a second terminal of the first resistor receives a first reference voltage, a second input terminal of the error amplifier receives a second reference voltage; characterized in that, The negative voltage charge pump circuit further comprises a reference voltage generation module, a comparison module, a fourth driving module, a fifth power tube, a sixth power tube and a seventh power tube, the fifth power tube has a size smaller than that of the second power tube and is of the same type as the second power tube, the sixth power tube has a size smaller than that of the third power tube and is of the same type as the third power tube, and the seventh power tube has a size smaller than that of the fourth power tube and is of the same type as the fourth power tube; the comparison module is connected with the reference voltage generation module, the output end of the error amplifier and the fourth driving module respectively, the fourth driving module is connected with the first driving module, the second driving module, the third driving module, the gate of the fifth power tube, the gate of the sixth power tube and the gate of the seventh power tube respectively, the drain of the fifth power tube is connected with the drain of the second power tube, the source of the fifth power tube is connected with the source of the second power tube, the drain of the sixth power tube is connected with the source of the third power tube, the source of the sixth power tube is connected with the drain of the third power tube, the drain of the seventh power tube is connected with the drain of the fourth power tube, and the source of the seventh power tube is connected with the source of the fourth power tube. The reference voltage generation module is configured to generate a third reference voltage according to a first current, the first current being in proportional relationship with a current flowing through the first power tube. The comparison module is configured to compare the error voltage output by the error amplifier with the third reference voltage, and output a first comparison signal when the error voltage is greater than the third reference voltage. The fourth driving module is configured to receive a clock signal, output a first driving signal, a second driving signal and a third driving signal according to the clock signal, and output a first control signal, a second control signal and a third control signal according to the clock signal and the first comparison signal, so as to close the first driving module, the second driving module and the third driving module, and further turn off the second power tube, the third power tube and the fourth power tube.

2. The negative voltage charge pump circuit of claim 1, wherein, The comparison module is further configured to output a second comparison signal when the error voltage is less than the third reference voltage, and the fourth driving module is further configured to output a fourth control signal, a fifth control signal and a sixth control signal according to the second comparison signal and the clock signal, so as to control the first driving module to drive the second power tube, the second driving module to drive the third power tube and the third driving module to drive the fourth power tube.

3. The negative voltage charge pump circuit according to claim 1 or 2, characterized in that, The reference voltage generation module comprises an eighth power tube and a current source, the drain of the eighth power tube receives the input voltage, the gate of the eighth power tube is connected with the source of the eighth power tube, the first end of the current source and the comparison module respectively, and the second end of the current source is grounded; wherein the eighth power tube and the first power tube are power tubes of the same type and have the same size.

4. The negative voltage charge pump circuit according to claim 1 or 2, characterized by, The comparison module comprises a comparator and an inverter, a first input end of the comparator is connected with the reference voltage generation module, a second input end of the comparator is connected with the output end of the error amplifier, an output end of the comparator is connected with an input end of the inverter, and an output end of the inverter is connected with the fourth drive module.

5. The negative voltage charge pump circuit according to claim 1 or 2, characterized in that: The fourth drive module comprises a first drive unit, a second drive unit and a third drive unit, the first drive unit is connected with the comparison module, the second drive unit, the third drive unit, the first drive module and the gate of the fifth power tube respectively, the second drive unit is connected with the second drive module and the gate of the sixth power tube respectively, and the third drive unit is connected with the third drive module and the gate of the seventh power tube respectively. The first drive unit is used for outputting a first drive signal according to the clock signal, for driving the fifth power tube, and is also used for outputting a first control signal according to the clock signal and the first comparison signal, for closing the first drive module, and further turning off the second power tube. The second drive unit is used for outputting a second drive signal according to the clock signal, for driving the sixth power tube, and is also used for outputting a second control signal according to the clock signal and the first comparison signal, for closing the second drive module, and further turning off the third power tube. The third drive unit is used for outputting a third drive signal according to the clock signal, for driving the seventh power tube, and is also used for outputting a third control signal according to the clock signal and the first comparison signal, for closing the third drive module, and further turning off the fourth power tube.

6. The negative voltage charge pump circuit of claim 5, wherein, The first drive unit comprises a first AND gate and a first drive sub-unit, a first input end of the first AND gate is connected with the comparison module, the second drive unit and the third drive unit respectively, an output end of the first AND gate is connected with the first drive module, an output end of the first drive sub-unit is connected with the gate of the fifth power tube, and a second input end of the first AND gate and an input end of the first drive sub-unit all receive the clock signal.

7. The negative voltage charge pump circuit of claim 5, wherein, The second drive unit comprises a second AND gate and a second drive sub-unit, a first input end of the second AND gate is connected with the comparison module, the first drive unit and the third drive unit respectively, an output end of the second AND gate is connected with the second drive module, an output end of the second drive sub-unit is connected with the gate of the sixth power tube, and a second input end of the second AND gate and an input end of the second drive sub-unit all receive the clock signal.

8. The negative voltage charge pump circuit of claim 5, wherein, The third drive unit comprises a third AND gate and a third drive sub-unit, a first input end of the third AND gate is connected with the comparison module, the first drive unit and the second drive unit respectively, an output end of the third AND gate is connected with the third drive module, an output end of the third drive sub-unit is connected with the gate of the seventh power tube, and a second input end of the third AND gate and an input end of the third drive sub-unit all receive the clock signal.

9. A switched-mode power supply converter, characterized in that A negative voltage charge pump circuit comprising the circuit of any one of claims 1-8.

10. An electronic device, comprising: A switched mode power supply converter comprising the circuit of claim 9.

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