A method, apparatus, system, network chip and network interface card for handling aging requests

Abstract

This application provides a method, apparatus, system, network chip, and network interface card for aging request processing. The method includes: allocating available resources to at least two aging requests based on available resource information of an aging queue, and recording the available resource indexes corresponding to the at least two aging requests, wherein the at least two aging requests write aging information into the same aging queue; sending the aging requests to the aging queue according to their order, and recording the order of the aging requests using a FIFO; receiving current response information returned by the aging queue after responding to the aging requests; and updating the write pointer of the aging queue according to the order, the current response information, and the available resource indexes. According to the technical solution of this application, the problem of degraded processing performance caused by prolonged locking / unlocking time can be solved.

Description

Technical Field

[0001] This application relates to the field of chip development technology, specifically to a method, apparatus, system, network chip, and network interface card for aging request processing. Background Technology

[0002] Flow tables are the core functionality of OVS (Open Virtual Switch) for data forwarding. They define the rules for forwarding data packets between ports. A flow table rule consists of two parts: Match and Action. The Match part determines which data packets need to be processed, and the Action part determines how to process the matched packets. Since the flow table space of Smart NICs (Smart Network Interface Cards) or DPUs (Data Processing Units) is limited, flow table aging is required to maximize its utilization. Flow table aging is a method that uses a timestamp mechanism to delete flow tables that have not been used recently.

[0003] Currently, there are two common flow table aging solutions: software and hardware. Software solutions typically use multiple background threads to periodically scan the flow table for aging. Since this involves multiple background threads simultaneously updating the same queue pointer, each thread needs to acquire a lock based on its thread ID before updating the aging queue. The lock is then released after the queue content and pointer are updated. This locking and unlocking process takes a considerable amount of time, leading to a decrease in aging performance. Hardware solutions also have scenarios where multiple aging engines update the same queue pointer simultaneously. The locking and unlocking method is still required to ensure the correctness of the pointer update, and similarly suffers from the problem of long locking and unlocking times leading to performance degradation.

[0004] Therefore, a technical solution is needed to address the problem of degraded processing performance caused by the long unlocking and unlocking time. Summary of the Invention

[0005] This application aims to provide a method, apparatus, system, network chip, and network interface card for aging request processing, thereby solving the problem of degraded processing performance caused by long unlocking / unlocking times.

[0006] According to one aspect of this application, a method for processing aging requests is provided, the method comprising:

[0007] Based on the available resource information of the aging queue, at least two aging requests are allocated available resources, and the available resource indexes corresponding to the at least two aging requests are recorded, wherein the at least two aging requests write aging information into the same aging queue.

[0008] The aging requests are sent to the aging queue according to their order, and the order of the aging requests is recorded using FIFO.

[0009] Receive the current response information returned by the aging queue after responding to the aging request;

[0010] The write pointer of the aging queue is updated according to the order of events, the current response information, and the available resource index.

[0011] According to some embodiments, updating the pointer of the aging queue based on the order, the current response information, and the available resource index includes:

[0012] Read the current thread value of the FIFO cache, and determine whether the current thread value is the same as the thread value in the current response information and the thread value in the response information cache unit. If the current thread value is different from the current response information and different from the thread value in the response information cache unit, then write the thread value of the response information into the response information cache unit.

[0013] If the current thread value is the same as the thread value information in the current response information, then the pointer value of the aging queue is updated using the available resource index corresponding to the current thread value, and the current thread value of the FIFO is read again. The write pointer of the aging queue is updated according to the current thread value read again and the thread value in the response information cache unit.

[0014] If the current thread value read is different from the thread value in the current response information cache unit, it is determined whether it is the same as the thread value in the current response information that is received. If they are different, the thread value of the current response information is written into the response information cache unit, and the current thread value of the FIFO is read again. The write pointer of the aging queue is updated according to the current thread value of the FIFO read again and the thread value in the response information cache unit.

[0015] According to some embodiments, updating the write pointer of the aging queue based on the current thread value being read and the thread value in the response information cache unit includes:

[0016] If the current thread value of the FIFO read again is the same as the thread value in the response information cache unit, then the available resource index corresponding to the current thread value of the FIFO read again will be used to update the aging queue pointer, and the current thread value of the FIFO will continue to be read until the current thread value of the FIFO is different from the thread value in the response information cache unit.

[0017] According to some embodiments, updating the pointer value of the aging queue based on the current thread value read and the thread value in the response information cache unit further includes:

[0018] Based on the current second response information, continue to read the current thread value of the FIFO and the thread value in the response information cache unit to update the aging queue index value, wherein the current second response information is the response information received after the current first response information and before obtaining the current thread value to be read.

[0019] According to another aspect of this application, an aging request processing apparatus is provided, the apparatus comprising: an available resource allocation unit, a sending unit, a FIFO unit, a receiving unit, and a write pointer update unit, wherein,

[0020] An available resource allocation unit is used to allocate available resources to at least two aging requests based on the available resource information of the aging queue, and to record the available resource index corresponding to the at least two aging requests, wherein the at least two aging requests write aging information into the same aging queue.

[0021] A sending unit is used to send the aging requests to the aging queue according to the order of the aging requests;

[0022] A FIFO unit is used to record the order in which the aging requests are made;

[0023] A receiving unit is configured to receive the current response information returned by the aging queue in response to the aging request;

[0024] The pointer update unit is used to update the pointer of the aging queue according to the order, the current response information, and the available resource index.

[0025] According to some embodiments, the pointer update unit is configured as follows:

[0026] Read the current thread value of the FIFO cache, and determine whether the current thread value is the same as the thread value in the current response information and the thread value in the response information cache unit. If the current thread value is different from the current response information and different from the thread value in the response information cache unit, then write the thread value of the response information into the response information cache unit.

[0027] If the current thread value is the same as the thread value information in the current response information, then the pointer value of the aging queue is updated using the available resource index corresponding to the current thread value, and the current thread value of the FIFO is read again. The write pointer of the aging queue is updated according to the current thread value read again and the thread value in the response information cache unit.

[0028] If the current thread value read is different from the thread value in the current response information cache unit, it is determined whether it is the same as the thread value in the current response information that is received. If they are different, the thread value of the current response information is written into the response information cache unit, and the current thread value of the FIFO is read again. The write pointer of the aging queue is updated according to the current thread value of the FIFO read again and the thread value in the response information cache unit.

[0029] According to some embodiments, the pointer update unit is configured as follows:

[0030] If the current thread value of the FIFO read again is the same as the thread value in the response information cache unit, then the available resource index corresponding to the current thread value of the FIFO read again will be used to update the aging queue pointer, and the current thread value of the FIFO will continue to be read until the current thread value of the FIFO is different from the thread value in the response information cache unit.

[0031] According to some embodiments, the pointer update unit is configured as follows:

[0032] Based on the current second response information, continue to read the current thread value of the FIFO and the thread value in the response information cache unit to update the aging queue index value, wherein the current second response information is the response information received after the current first response information and before obtaining the current thread value to be read.

[0033] According to another aspect of this application, an aging request processing system is provided, the system comprising an aging engine module and the apparatus as described in any of the preceding claims.

[0034] The aging engine module is used to perform aging scans. When an aging thread is detected, an aging request is generated and sent.

[0035] According to another aspect of this application, a network chip is provided, including a processor and a memory, wherein a computer program is stored on the memory, and when the processor executes the computer program stored on the memory, it implements the method as described in any of the preceding claims.

[0036] According to another aspect of this application, a network interface card is provided, the network interface card including a network chip as described above and a plurality of interfaces, the network chip performing data communication through the plurality of interfaces.

[0037] According to embodiments of this application, multiple aging requests write aging information to the same aging queue. When an aging request is received, available resources are allocated to the aging request based on the available resource information in the aging queue, and the available resource index corresponding to the aging request is recorded. The aging requests are sent to the aging queue in chronological order, and the aging request order is recorded using a record queue. The current response information returned by the aging queue after responding to the aging request is received. Finally, the write pointer of the aging queue is updated according to the order, response information, and available resource index. This application, by pre-allocating available resources, recording the order of aging requests, and receiving response messages, allows the input port to receive the next aging request even if the received aging request has not been processed, thereby eliminating the need for the encryption / unlocking process used in the prior art, ensuring the correctness of pointer updates, and solving the problem of performance degradation caused by the long encryption / unlocking time.

[0038] According to an embodiment of this application, aging queue resources are allocated to multiple aging threads based on the aging information update requests of multiple aging threads. By allocating aging queue resources, the write pointer is pre-allocated, which can avoid data retrieval errors when updating aging information and accessing the aging queue.

[0039] According to the embodiments of this application, the corresponding allocation relationship between multiple aging threads and aging queue resources is recorded, the correspondence between aging threads and corresponding pre-allocated queue resources is clarified, the correctness of writing pointers during subsequent polling updates is guaranteed, and multiple threads can achieve parallel execution when reporting aging information.

[0040] According to an embodiment of this application, based on the allocated aging queue resources, the reporting order of the aging information reported by the multiple aging threads is recorded. The multiple aging threads report the aging information to the aging queue according to the reporting order, effectively avoiding the problem of data and pointer inconsistency that may occur when the aging queue is updated.

[0041] According to the embodiments of this application, after multiple aging threads obtain the response message returned after reporting aging information, they update the write pointer of the aging queue according to the corresponding allocation relationship, reporting order and response message. This can save the existing technology's encryption and unlocking process while ensuring the correctness of pointer update, and avoid the latency introduced by each thread updating the queue serially.

[0042] According to some embodiments, this application avoids introducing unlock / unlock operations by pre-allocating pointers, thereby shortening processing latency and improving parallel execution. This application can guarantee the correctness of queue pointer updates and ensure the consistency of pointers and data during queue operations.

[0043] It should be understood that the above general description and the following detailed description are merely exemplary and do not limit this application. Attached Figure Description

[0044] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below.

[0045] Figure 1 The diagram illustrates the existing aging scan process and an ideal scenario.

[0046] Figure 2 This diagram illustrates the path a signal travels in the prior art.

[0047] Figure 3 A schematic diagram showing the path of the signal flow in the optimized update aging queue scheme according to an example embodiment.

[0048] Figure 4 A flowchart illustrating a method for handling aging requests according to an example embodiment is shown.

[0049] Figure 5 A schematic diagram illustrating the update process according to an example embodiment is shown.

[0050] Figure 6 A schematic diagram of an aging request processing system according to an example embodiment is shown.

[0051] Figure 7 This diagram illustrates a comparison of the technical effects of the optimized aging queue update scheme according to an example embodiment with existing schemes and ideal scenarios.

[0052] Figure 8 A block diagram of a computing device according to an exemplary embodiment is shown. Detailed Implementation

[0053] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that this application will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted.

[0054] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a thorough understanding of embodiments of this application. However, those skilled in the art will recognize that the technical solutions of this application can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc., can be employed. In other instances, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring various aspects of this application.

[0055] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0056] The flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all content and operations / steps, nor do they necessarily have to be performed in the described order. For example, some operations / steps can be broken down, while others can be combined or partially combined; therefore, the actual execution order may change depending on the specific circumstances.

[0057] It should be understood that although the terms first, second, third, etc., may be used herein to describe various components, these components should not be limited by these terms. These terms are used to distinguish one component from another. Therefore, the first component discussed below may be referred to as the second component without departing from the teachings of this application. As used herein, the term "and / or" includes all combinations of any one and more of the associated listed items.

[0058] Those skilled in the art will understand that the accompanying drawings are merely schematic diagrams of exemplary embodiments, and the modules or processes in the drawings are not necessarily essential for implementing this application, and therefore cannot be used to limit the scope of protection of this application.

[0059] In cloud computing virtualization technology, the network switching function of virtual machines is provided by virtual network interface cards (vNICs), which are equivalent to physical network interface cards (NICs). To achieve a network structure equivalent to that of traditional physical networks, switches are also virtualized into virtual switches (vSwitch). Each virtual NIC is connected to a port on the virtual switch, and the virtual switch accesses the external physical network through the physical NICs of the physical server.

[0060] Open vSwitch (OVS) is a production-quality virtual switch developed in C. Implemented on a server host, OVS differs from traditional switches in that it prioritizes portability across different virtualization platforms and adheres to the Apache open-source license, making it a fundamental component of open-source networking. Flow tables are the core functionality of OVS for data forwarding, defining rules for forwarding data packets between ports. A flow table rule consists of two parts: Match and Action. The Match part determines which data packets need to be processed, and the Action part determines how to process the matched packets. Traditional switches rely on Layer 2 and 3 forwarding tables for forwarding, while flow tables are primarily used in OVS, which forwards data based on flow tables.

[0061] Because OVS consumes significant host computing resources, especially at high throughput, it typically binds to multiple CPU cores to ensure forwarding quality, thus increasing enterprise operating costs. With technological advancements, hardware offloading solutions that offload OVS to SmartNICs or DPUs have become widely adopted.

[0062] Since the flow table space of a Smart NIC or DPU is limited, flow table aging is required to maximize its utilization. Flow table aging is a method that uses a timestamp mechanism to delete flow tables that have not been used recently.

[0063] Currently, there are two common flow table aging schemes: software and hardware. The software scheme typically uses multiple background threads to periodically scan the flow table for aging. When the aging scan conditions are met, aging information needs to be filled into the aging queue (Event Queue), and the pointer of the aging queue needs to be updated. Since this involves multiple background threads updating the same queue pointer simultaneously, each thread needs to acquire a lock based on its thread ID before updating the aging queue. The lock is then unlocked after the queue content and pointer are updated. This locking and unlocking process takes a considerable amount of time (the locking and unlocking module takes approximately 20 clock cycles to process requests, and the queue content and pointer updates for each thread are executed serially), leading to a decrease in aging performance. The hardware scheme typically uses multiple aging engines to periodically scan the flow table. Its processing flow is similar to the software scheme, using multiple dedicated hardware units to replace multiple background threads on the CPU. The hardware scheme also has scenarios where multiple aging engines update the same queue pointer simultaneously, still requiring locking and unlocking to ensure the correctness of the pointer update. This also suffers from the problem of long locking and unlocking times leading to performance degradation.

[0064] See Figure 1 , Figure 1This illustrates a typical aging scan process. N aging threads execute aging scans in parallel, reading a statistics table. The statistics table contains a timestamp indicating the most recent access time of the currently scanned flow table, and a system current timestamp. These two timestamps, along with a set aging time threshold, determine whether aging is required. When reading the statistics table, each thread reads different rows, avoiding duplicate content. For example, if the row indexes of the statistics table are 0-8000, thread 0 can be configured to read rows 0-1000, thread 1 to read rows 1001-2000, and so on. The aging scan determination process is as follows: Aging thread 0 determines that the aging conditions are met, needs to report aging information to the aging queue, and initiates a lock request (1a); Aging thread 1 determines that the aging conditions are met, needs to report aging information to the aging queue, and initiates a lock request (1b); Aging thread N determines that the aging conditions are met, needs to report aging information to the aging queue, and initiates a lock request (1c).

[0065] After the aging scan determines the lock resource ②, the lock / unlock module authorizes aging thread 0 with the lock resource ② based on the lock request. Aging thread 0 updates the aging queue content and pointer. Aging thread 0 then initiates an unlock request ③, and the lock / unlock module authorizes aging thread 1 with the lock resource ④. Aging thread 1 updates the aging queue content and pointer. Aging thread 1 then initiates an unlock request ⑤, and the lock / unlock module authorizes aging thread N with the lock resource ⑥. Aging thread N updates the aging queue content and pointer, until aging thread N initiates an unlock request ⑦.

[0066] Please refer to the signal flow path in the prior art. Figure 2 , Figure 2 After scanning and updating, the aging engine arrives at the hardware lock module via paths 1, 2, and 3 in sequence. Path 2 is initiated only after path 1 is completed, and path 3 is initiated only after path 2 is completed. Then, the aging queue for updating the Host DDR (host memory) is executed sequentially via PCIE (peripheral component interconnect express, high-speed serial computer expansion bus standard), which results in a long processing time.

[0067] exist Figure 1 In the existing scheme shown, N aging threads report N aging information to the aging queue, with a total processing time of T0. Each thread updates the aging queue content and aging queue pointer serially, resulting in a long processing time. Ideally, the processing time should be T1 (with N aging threads executing in complete parallel). T2 represents the overhead of the existing scheme relative to the ideal scenario; reducing T2 is the problem this application aims to solve.

[0068] Therefore, this application proposes a method, apparatus, system, network chip, and network interface card for aging request processing, which can eliminate the need for unlocking / unlocking processes while ensuring the correctness of pointer updates (e.g., Figure 3 As shown, this allows the process of aging threads reporting aging information to the aging queue to be executed in parallel, avoiding the latency introduced by each aging thread updating the queue serially.

[0069] The following description, in conjunction with the accompanying drawings, illustrates exemplary embodiments of this application.

[0070] Figure 4 A flowchart illustrating a method for handling aging requests according to an example embodiment is shown.

[0071] See Figure 4 In S401, available resources are allocated to at least two aging requests based on the available resource information of the aging queue, and the available resource indexes corresponding to the at least two aging requests are recorded, wherein the at least two aging requests write aging information into the same aging queue.

[0072] According to some embodiments, based on the aging information update requests from multiple aging threads, corresponding available queue resources for aging queues are allocated to multiple aging requests, and the correspondence between multiple aging requests and available queue resources is recorded. Specifically, the allocation of available queue resources is determined using a resource index, and the available resource index is incrementally updated.

[0073] According to some embodiments, a queue resource cache (ooo_req_idx[]) records the pre-allocated available queue resources for aging requests, and the depth of the queue resource cache is consistent with the number of aging threads. The queue resource cache can be an array, and this application does not limit it to this.

[0074] According to some implementations, multiple aging threads periodically scan the flow table. When the aging conditions are met, the aging threads need to fill in the information to be reported in the aging queue. For example, when aging thread X requests to report queue information, wr_idx is assigned to aging thread X and recorded in ooo_req_idx[], denoted as ooo_req_idx[X]. After recording, wr_idx is incremented by 1.

[0075] See Figure 5 The allocation relationship of queue resources is recorded in the queue resource cache: ooo_req_idx[0]=9, ooo_req_idx[1]=7, ooo_req_idx[2]=8, ooo_req_idx[3]=6.

[0076] According to some embodiments, the resource index pre-allocates the next allocatable available queue resource in the aging queue, and increments the resource index by one each time an available queue resource is allocated. For example, wr_idx (resource index) is used to record the next allocatable idx (available queue resource) in the aging queue. Assuming that idx 0-5 of the current aging queue have been used, the next pre-allocated resource is 6. When aging thread 0 initiates an update queue request, it gets the pre-allocated resource 6; when aging thread 1 initiates a request, it gets the pre-allocated resource 7, and so on.

[0077] See Figure 5 Suppose there are four aging threads: aging thread 0, aging thread 1, aging thread 2, and aging thread 3. These threads initiate updates to the aging queue. The aging requests initiated by aging threads 0, 1, 2, and 3 are allocated to the corresponding pre-allocated aging queue resources. Aging thread 0 is allocated wr_idx = 9, aging thread 1 is allocated wr_idx = 7, aging thread 2 is allocated wr_idx = 8, and aging thread 3 is allocated wr_idx = 6.

[0078] In S403, the aging requests are sent to the aging queue according to their order, and the order of the aging requests is recorded using a record queue.

[0079] According to some embodiments, the information of the multiple aging threads is stored in a synchronous first-in-first-out queue in the order of reporting.

[0080] See Figure 5 The aging thread initiates updates to the aging queue in the following order: aging thread 3 -> aging thread 1 -> aging thread 2 -> aging thread 0. This order is recorded by a synchronized first-in-first-out (FIFO) queue.

[0081] In S405, the current response information returned by the aging queue after responding to the aging request is received.

[0082] See Figure 5 The aging thread reports aging information via aging requests according to the reporting order, and the aging queue begins to update. After the aging queue is updated, response messages corresponding to the aging requests are returned according to the reporting order.

[0083] According to some embodiments, multiple returned response messages are recorded through a response message cache (ooo_rsp_buf). The response does not carry content and can be considered as a completion marker.

[0084] In some embodiments, the depth of the response message cache is consistent with the number of aging threads. A response message cache of depth N is used to record N returned response messages. The response message cache can be an array, and this application does not limit this.

[0085] See Figure 5 After the aging thread receives the pre-allocated aging queue resources, it reports aging information to the aging queue. After each write, it returns a response. Assume the order of the returned responses is: aging thread 1 RSP -> aging thread 0 RSP -> aging thread 2 RSP -> aging thread 3 RSP.

[0086] In S407, the write pointer of the aging queue is updated according to the order, the response information, and the available resource index.

[0087] According to some embodiments, the write pointer of the aging queue is written from the tail of the queue, and the aging queue update is to update the tail pointer of the queue.

[0088] According to some embodiments, the current thread value of the FIFO cache is read, and it is determined whether the current thread value is the same as the thread value in the current response information and the thread value in the response information cache unit. If the current thread value is different from the current response information and different from the thread value in the response information cache unit, the thread value of the response information is written into the response information cache unit.

[0089] Assuming the current thread value of the FIFO is aging thread 3, the current thread value of the response information is aging thread 1, and there is no cached response information in the response information cache, it can be determined that the current thread value is different from the current response information and different from the thread value in the response information cache unit. Therefore, the aging thread 1 of the current response information is written into the response information cache unit.

[0090] According to some embodiments, if the current thread value is the same as the thread value information in the current response information, the pointer value of the aging queue is updated using the available resource index corresponding to the current thread value, and the current thread value of the FIFO is read again. The write pointer of the aging queue is updated according to the current thread value read again and the thread value in the response information cache unit.

[0091] Assuming the current thread value of the FIFO is aging thread 3, and the thread value information in the current response information is also aging thread 3, then the pointer value of the aging queue is updated using the available resource index wr_idx corresponding to the current thread value aging thread 3. Assuming that the wr_idx allocated to aging thread 3 is 6, then the write pointer of the aging queue is updated to 6, and then the current thread value of the FIFO is read again.

[0092] According to some embodiments, if the current thread value being read is different from the thread value in the current response information cache unit, it is determined whether it is the same as the thread value in the current response information being received. If they are different, the thread value of the current response information is written into the response information cache unit, and the current thread value of the FIFO is read again. The write pointer of the aging queue is updated according to the current thread value of the FIFO being read again and the thread value in the response information cache unit.

[0093] According to some embodiments, if the current thread value of the FIFO being read again is the same as the thread value in the response information cache unit, the available resource index corresponding to the current thread value of the FIFO being read again is used to update the aging queue pointer, and the current thread value of the FIFO is read again until the current thread value of the FIFO is different from the thread value in the response information cache unit.

[0094] According to some embodiments, based on the current second response information, the current thread value of the FIFO and the thread value in the response information cache unit are read to update the aging queue index value, wherein the current second response information is the response information received after the current first response information and before the current thread value to be read is obtained.

[0095] Assuming the current thread value of the second response information is aging thread 0, the current thread value to be read is aging thread 2, and the thread value in the current response information cache unit is aging thread 1, if the current thread value is different from the thread value in the current response information cache unit, then it is determined whether the current thread value is the same as the current thread value of the second response information. If they are different, the aging thread 0 of the current second response information is written into the response information cache unit, and the current thread value of the FIFO is read again.

[0096] If the current thread value of aging thread 1 being read is the same as the aging thread 1 in the response information cache unit, then the aging queue pointer is updated according to the available resource index wr_idx corresponding to the current thread value of aging thread 1 in the read FIFO, and the current thread value of the FIFO is read again until the current thread value of the FIFO is different from the thread value in the response information cache unit.

[0097] An example is described below. See also... Figure 5The FIFO records the reporting order of aging information update requests from multiple aging threads. The reporting order is aging thread 3 -> aging thread 1 -> aging thread 2 -> aging thread 0. According to the reporting order, wr_idx = 6 is allocated to aging thread 3, wr_idx = 7 is allocated to aging thread 1, wr_idx = 8 is allocated to aging thread 2, and wr_idx = 9 is allocated to aging thread 0. Ooo_req_idx[0] = 9, Ooo_req_idx[1] = 7, Ooo_req_idx[2] = 8, and Ooo_req_idx[3] = 6 are recorded in ooo_req_idx[]. The order of returned responses is aging thread 1 RSP -> aging thread 0 RSP -> aging thread 2 RSP -> aging thread 3 RSP.

[0098] Based on the reporting order, the current thread value in the FIFO is aging thread 3, and the thread value corresponding to the first response is aging thread 1. Since the current thread value (aging thread 3) is different from the aging thread 1 of the first response message, the first response message is first stored in the response information buffer unit, awaiting the return of the second response message. The second response message is aging thread 0, and since it is different from the current thread value (aging thread 3) in the FIFO, the second response message is stored in the response information buffer unit, continuing to wait for the return of the third response message. The third response message is aging thread 2, and since it is different from the current thread value (aging thread 3) in the FIFO, the third response message is stored in the response information buffer unit, continuing to wait for the return of the fourth response message.

[0099] The fourth response message is for aging thread 3. If it is determined that the current thread value in the FIFO is the same as aging thread 3, then according to the previously allocated available resource index recorded in ooo_req_idx[], i.e. ooo_req_idx[3] = 6, the write pointer of the aging queue is updated to 6, and the current thread value in the FIFO is updated to aging queue 1.

[0100] The aging thread 1 of the current thread value in the FIFO is read and compared with the response message recorded in the response information cache unit. If the aging thread 1 of the current thread value in the FIFO is the same as the aging thread 1 corresponding to the first response message recorded in the response information cache unit, then according to the previously allocated available resource index recorded in ooo_req_idx[], i.e., ooo_req_idx[1] = 7, the write pointer of the aging queue is updated to 7, and the current thread value in the FIFO is updated to aging queue 2. The above steps are repeated to compare the remaining thread values ​​in the FIFO with the thread values ​​corresponding to the response messages recorded in the response information cache unit until the write pointer is updated to 9, thus completing the update of the aging queue write pointer.

[0101] According to some embodiments, this application also provides a network chip, including a processor and a memory, wherein a computer program is stored on the memory, and when the processor runs the computer program stored on the memory, it implements the method described in any of the preceding claims.

[0102] According to some embodiments, this application also provides a network interface card, which includes a network chip and a plurality of interfaces as described above, wherein the network chip performs data communication through the plurality of interfaces.

[0103] Figure 6 A schematic diagram of an aging request processing system according to an example embodiment is shown.

[0104] See Figure 6 , Figure 6 This example illustrates an aging request processing system, which includes an aging engine module 601 and an aging request processing device. The aging request device includes an available resource allocation unit 603, a sending unit 605, a recording unit 607, a receiving unit 609, and a write pointer update unit 611. The system also includes a pre-allocation module 603, an aging queue resource recording module 605, a reporting recording module 607, a response message recording module 609, and a polling maintenance module 611.

[0105] According to some embodiments, the aging engine module 601 is used to perform aging scans. When an aging thread is detected, an aging request is generated and sent. The aging engine module 601 is the hardware that controls the aging scan of the queue, and the aging queue is a queue that stores the aging information reported by the aging engine.

[0106] According to some embodiments, the available resource allocation unit 603 is used to allocate available resources for at least two aging requests based on the available resource information of the aging queue, and record the available resource index corresponding to the at least two aging requests, wherein the at least two aging requests write aging information into the same aging queue. The available resource allocation unit 603 allocates corresponding aging queue resources for multiple aging engines based on aging information update requests from multiple aging engines, records the next allocatable resource index of the aging queue, and records the corresponding allocation relationship between the multiple aging engines and the aging queue resources. After allocating queue resources, the resource index is updated by incrementing by 1. The available resource allocation unit 603 records the corresponding allocation relationship between aging requests and available queue resources through a queue resource cache (ooo_req_idx[]), which is used for subsequent updates to the aging queue pointer.

[0107] According to some embodiments, the sending unit 605 is used to send the aging requests to the aging queue according to the order of the aging requests.

[0108] According to some embodiments, the recording unit 607 is used to record the order in which the aging requests are submitted. The recording unit 607 records the reporting order of the aging information submitted by multiple aging engines based on the allocated available queue resources, and records the reporting order of the aging information submitted by the aging threads through a synchronized first-in-first-out (FIFO) queue.

[0109] According to some embodiments, the receiving unit 609 is used to receive the current response information returned by the aging queue in response to the aging request, and to record the response messages returned by multiple aging engines after reporting the aging information. The receiving unit 609 caches the response messages returned by the Double Rate Synchronous Dynamic Random Memory (DDR) after the aging request is reported through a response message buffer (ooo_rsp_buf). The aging thread reports aging information to the aging queue, writes data to a specified address in the DDR, and returns a response after writing to inform the aging thread that the data writing is complete. Each time aging information is written to the aging queue, the DDR returns a response.

[0110] According to some embodiments, the write pointer update unit 611 is used to update the write pointer of the aging queue according to the order, the response information, and the available resource index. The specific method of the write pointer update unit 611 updating the write pointer of the aging queue has been described in detail in the previous embodiment and will not be repeated here.

[0111] According to some embodiments, the aging request processing system polls to check the order of events, response information, and update resource indexes. Specifically, it checks the response message cache to prevent the aging thread from constantly checking the current synchronization first-in-first-out queue order itself. If the aging thread maintains its own pointers, it cannot obtain the status information of other aging threads, which can easily lead to update errors in the aging queue. The aging request processing system polls to check the status of all aging threads and uniformly updates and maintains the pointers, ensuring the correctness of pointer updates.

[0112] According to the embodiments of this application, the recording unit 607 records the reporting order of aging information update requests from multiple aging engines. The reporting order is aging engine 3 -> aging engine 1 -> aging engine 2 -> aging engine 0. According to the reporting order, the available resource allocation unit 603 allocates wr_idx=6 to aging engine 3, wr_idx=7 to aging engine 1, wr_idx=8 to aging engine 2, and wr_idx=9 to aging engine 0, and records ooo_req_idx[0]=9, ooo_req_idx[1]=7, ooo_req_idx[2]=8, and ooo_req_idx[3]=6 in ooo_req_idx[]. The response order returned by DDR is aging engine 1 RSP -> aging engine 0 RSP -> aging engine 2 RSP -> aging engine 3 RSP.

[0113] Since the reporting order is aging engine 3 -> aging engine 1 -> aging engine 2 -> aging engine 0, when the write pointer update unit 611 updates the write pointer, it will write the first returned aging engine 0RSP, aging engine 1RSP and aging engine 2RSP to ooo_rsp_buf[] through the receiving unit 609. When the write pointer update unit 611 detects the return of the response of the first aging engine 3 that initiated the update of the aging queue, it uses ooo_req_idx[3] in ooo_req_idx[] to update wr_idx=6, and then through the aging engine 0RSP, aging engine 1RSP and aging engine 2RSP recorded in ooo_rsp_buf[], according to the order of the returned response and the reporting order recorded by the recording unit 607, it updates ooo_req_idx[1]=7, ooo_req_idx[2]=8 and ooo_req_idx[0]=9 in sequence to realize the update of the aging queue pointer. The specific update process is detailed in the previous description and will not be repeated here.

[0114] According to some embodiments, this application solves the problem of inefficient processing performance caused by serial execution of locking and unlocking during flow table aging scanning. Using the technical solution of this application, the processing performance of N aging engines is approximately equal to N times the processing performance caused by one aging engine, essentially equivalent to N aging engines executing in complete parallel, greatly improving the processing capability of the aging scanning engine.

[0115] Figure 7 This diagram illustrates a comparison of the technical effects of the optimized aging queue update scheme according to an example embodiment with existing schemes and ideal scenarios.

[0116] See Figure 7In existing technologies, updating the queue requires locking and unlocking, and aging threads request updates sequentially. With N aging threads reporting N aging information entries to the aging queue, the total processing time is T0, which is quite long. In the ideal scenario, the processing time is T1, with N aging threads executing in complete parallel. The overhead of the existing solution compared to the ideal scenario is T2.

[0117] According to some embodiments, in this application, aging information from multiple aging threads can be simultaneously reported to a message queue (EQ) for parallel updates. Compared with existing solutions, the processing time for N aging engines to report N aging messages is reduced from T0 to T3, a reduction of T4. Compared with the ideal scenario, the optimized solution of this application only adds T5 due to the return of RSP after pointer pre-allocation processing, which is close to the theoretically achievable optimal processing performance, greatly saving the overall process time.

[0118] Figure 8 A block diagram of a computing device according to an example embodiment of this application is shown.

[0119] like Figure 8 As shown, the computing device 30 includes a processor 12 and a memory 14. The computing device 30 may also include a bus 22, a network interface card 16, and an I / O interface 18. The processor 12, memory 14, network interface card 16, and I / O interface 18 can communicate with each other via the bus 22.

[0120] Processor 12 may include one or more general-purpose CPUs (Central Processing Units), microprocessors, or application-specific integrated circuits, for executing relevant program instructions. According to some embodiments, computing device 30 may also include a high-performance display adapter (GPU) 20 for accelerating processor 12.

[0121] Memory 14 may include a machine system readable medium in the form of volatile memory, such as random access memory (RAM), read-only memory (ROM), and / or cache memory. Memory 14 is used to store one or more programs containing instructions, as well as data. Processor 12 may read the instructions stored in memory 14 to perform the methods described above according to embodiments of this application.

[0122] The computing device 30 can also communicate with one or more networks via the network interface card 16. The network interface card 16 can be a DPU smart network card.

[0123] Bus 22 can include address bus, data bus, control bus, etc. Bus 22 provides a path for exchanging information between components.

[0124] It should be noted that, in specific implementations, the computing device 30 may also include other components necessary for normal operation. Furthermore, those skilled in the art will understand that the device described above may only include the components necessary for implementing the embodiments of this specification, and not necessarily all the components shown in the figures.

[0125] This application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the above-described method. The computer-readable storage medium may include, but is not limited to, any type of disk, including floppy disks, optical disks, DVDs, CD-ROMs, microdrives, as well as magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, DRAMs, VRAMs, flash memory devices, magnetic cards or optical cards, nanosystems (including molecular memory ICs), network storage devices, cloud storage devices, or any type of medium or device suitable for storing instructions and / or data.

[0126] This application also provides a computer program product, which includes a computer program operable to cause a computer to perform some or all of the steps of any of the methods described in the above method embodiments.

[0127] Those skilled in the art will clearly understand that the technical solutions of this application can be implemented using software and / or hardware. In this specification, "unit" and "module" refer to software and / or hardware capable of independently performing or cooperating with other components to perform a specific function, where the hardware may be, for example, a field-programmable gate array (FPGA), integrated circuit, etc.

[0128] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0129] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0130] In the several embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some service interface; the indirect coupling or communication connection between apparatuses or units may be electrical or other forms.

[0131] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0132] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0133] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage device. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application.

[0134] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0135] The exemplary embodiments of this application have been specifically shown and described above. It should be understood that this application is not limited to the detailed structures, arrangements, or implementation methods described herein; rather, this application is intended to cover various modifications and equivalent arrangements contained within the spirit and scope of the appended provisions.

Claims

1. A method for processing aging requests, characterized in that, The method includes: Based on the available resource information of the aging queue, at least two aging requests are allocated available resources, and the available resource indexes corresponding to the at least two aging requests are recorded, wherein the at least two aging requests write aging information into the same aging queue. The aging requests are sent to the aging queue according to their order, and the order of the aging requests is recorded using FIFO. The system receives current response information returned by the aging queue after responding to the aging request. The current response information includes current first response information and current second response information. The process of updating the write pointer of the aging queue according to the order, the current response information, and the available resource index includes: reading the current thread value of the FIFO cache, determining whether the current thread value is the same as the thread value in the current response information and the thread value in the response information cache unit; if the current thread value is different from the current response information and different from the thread value in the response information cache unit, then writing the thread value of the response information into the response information cache unit. If the current thread value is the same as the thread value information in the current response information, then the pointer value of the aging queue is updated using the available resource index corresponding to the current thread value, and the current thread value of the FIFO is read again. The write pointer of the aging queue is updated according to the current thread value read again and the thread value in the response information cache unit.

2. The method according to claim 1, characterized in that, The step of updating the pointer of the aging queue according to the order, the current response information, and the available resource index further includes: If the current thread value read is different from the thread value in the current response information cache unit, it is determined whether it is the same as the thread value in the current response information that is received. If they are different, the thread value of the current response information is written into the response information cache unit, and the current thread value of the FIFO is read again. The write pointer of the aging queue is updated according to the current thread value of the FIFO read again and the thread value in the response information cache unit.

3. The method according to claim 2, characterized in that, The method further includes updating the write pointer of the aging queue based on the current thread value read and the thread value in the response information cache unit, and also includes: If the current thread value of the FIFO being read again is the same as the thread value in the response information cache unit, the aging queue pointer will be updated with the available resource index corresponding to the current thread value of the FIFO being read again, and the current thread value of the FIFO will continue to be read until the current thread value of the FIFO is different from the thread value in the response information cache unit.

4. The method according to claim 2, characterized in that, The method further includes updating the pointer value of the aging queue based on the current thread value read and the thread value in the response information cache unit, and also includes: Based on the current second response information, the current thread value of the FIFO being read and the thread value in the response information cache unit are used to update the aging queue index value, wherein the current second response information is the response information received after the current first response information and before the current thread value being read.

5. An aging request processing device, characterized in that, The device includes: an available resource allocation unit, a sending unit, a FIFO unit, a receiving unit, and a write pointer update unit, wherein, An available resource allocation unit is used to allocate available resources to at least two aging requests based on the available resource information of the aging queue, and to record the available resource index corresponding to the at least two aging requests, wherein the at least two aging requests write aging information into the same aging queue. A sending unit is used to send the aging requests to the aging queue according to the order of the aging requests; A FIFO unit is used to record the order in which the aging requests are made; The receiving unit is configured to receive the current response information returned by the aging queue in response to the aging request, wherein the current response information includes current first response information and current second response information; The pointer update unit is used to update the pointer of the aging queue according to the order, the current response information, and the available resource index. The unit includes: reading the current thread value of the FIFO cache; determining whether the current thread value is the same as the thread value in the current response information and the thread value in the response information cache unit; if the current thread value is different from the current response information and different from the thread value in the response information cache unit, then writing the thread value of the response information into the response information cache unit; if the current thread value is the same as the thread value in the current response information, then updating the pointer value of the aging queue using the available resource index corresponding to the current thread value, and continuing to read the current thread value of the FIFO cache, updating the write pointer of the aging queue according to the continuously read current thread value and the thread value in the response information cache unit.

6. The apparatus according to claim 5, characterized in that, The pointer update unit is also configured to: If the current thread value read is different from the thread value in the current response information cache unit, it is determined whether it is the same as the thread value in the current response information that is received. If they are different, the thread value of the current response information is written into the response information cache unit, and the current thread value of the FIFO is read again. The write pointer of the aging queue is updated according to the current thread value of the FIFO read again and the thread value in the response information cache unit.

7. The apparatus according to claim 6, characterized in that, The pointer update unit is also configured to: If the current thread value of the FIFO read again is the same as the thread value in the response information cache unit, then the available resource index corresponding to the current thread value of the FIFO read again will be used to update the aging queue pointer, and the current thread value of the FIFO will continue to be read until the current thread value of the FIFO is different from the thread value in the response information cache unit.

8. The apparatus according to claim 7, characterized in that, The pointer update unit is also configured to: Based on the current second response information, continue to read the current thread value of the FIFO and the thread value in the response information cache unit to update the aging queue index value, wherein the current second response information is the response information received after the current first response information and before obtaining the current thread value to be read.

9. An aging request processing system, characterized in that, The system includes an aging engine module and the apparatus as described in any one of claims 5-8, wherein... The aging engine module is used to perform aging scans. When an aging thread is detected, an aging request is generated and sent.

10. A network chip, comprising a processor and a memory, characterized in that, The memory stores a computer program, and when the processor runs the computer program stored in the memory, it implements the method as described in any one of claims 1-4.

11. A network interface card, characterized in that, The network interface card includes a network chip according to claim 10 and a plurality of interfaces, wherein the network chip performs data communication through the plurality of interfaces.

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