Semiconductor device
By using an insulator structure with hydrogen barrier and hydrogen capture functions in oxide semiconductor devices and controlling the hydrogen concentration, the reliability and electrical characteristics unevenness problems of existing semiconductor devices are solved, and efficient miniaturization and high integration are achieved.
Patent Information
- Application Number
- CN202480008911.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-02-17
- Filing Date
- 2024-02-09
- Publication Date
- 2025-09-05
AI Technical Summary
Existing semiconductor devices have problems such as low reliability, uneven electrical characteristics, low on-state current, high power consumption, low productivity and low integration, making it difficult to achieve miniaturization and high integration.
An oxide semiconductor and an insulator structure with hydrogen barrier and hydrogen capture functions are used. The hydrogen concentration is controlled by secondary ion mass spectrometry. Materials such as silicon nitride and hafnium silicate are used as insulators to reduce the hydrogen concentration in the oxide semiconductor. The electrical properties and reliability are improved by optimizing the supply of oxygen and hydrogen.
A semiconductor device with high reliability, excellent electrical characteristics, low power consumption and high productivity is achieved, which supports miniaturization and high integration and improves on-state current and operating speed.
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Figure CN120604638A_ABST
Abstract
Description
Technical Field
[0001] One embodiment of the present invention relates to a semiconductor device, a storage device, and an electronic device. Another embodiment of the present invention relates to a method for manufacturing the semiconductor device.
[0002] Note that one embodiment of the present invention is not limited to the aforementioned technical field. Examples of the technical fields of one embodiment of the present invention include semiconductor devices, display devices, light-emitting devices, power storage devices, memory devices, electronic devices, lighting devices, input devices (e.g., touch sensors), input / output devices (e.g., touch panels), and methods for driving or manufacturing such devices.
[0003] Note that in this specification and other documents, the term "semiconductor device" refers to any device that can operate by utilizing semiconductor characteristics. In addition to semiconductor elements such as transistors, semiconductor circuits, computing devices, and storage devices are also examples of semiconductor devices. Display devices (such as liquid crystal display devices and light-emitting display devices), projection devices, lighting devices, electro-optical devices, power storage devices, storage devices, semiconductor circuits, imaging devices, and electronic equipment may also be considered semiconductor devices. Background Art
[0004] In recent years, semiconductor devices have been developed, with LSIs (Large Scale Integration), CPUs (Central Processing Units), and memories being the main components of these devices. A CPU is a collection of semiconductor elements that includes a semiconductor integrated circuit (including at least transistors and memory) formed by processing a semiconductor wafer into a chip, and electrodes serving as connection terminals.
[0005] Semiconductor circuits (IC chips) such as LSIs, CPUs, and memories are mounted on circuit boards (for example, printed wiring boards) and used as one of the components of various electronic devices.
[0006] In addition, technology that uses a semiconductor thin film formed on a substrate with an insulating surface to form a transistor has attracted attention. Such transistors are widely used in electronic devices such as integrated circuits (ICs) and image display devices (simply referred to as display devices). Silicon-based semiconductor materials are widely known as semiconductor thin films that can be used in transistors. As other materials, oxide semiconductors are attracting attention.
[0007] Furthermore, it is known that transistors using oxide semiconductors have extremely low leakage current in the non-conducting state. For example, Patent Document 1 discloses a low-power CPU that utilizes the low leakage current characteristics of transistors using oxide semiconductors. Furthermore, Patent Document 2 discloses a memory device that utilizes the low leakage current characteristics of transistors using oxide semiconductors to achieve long-term retention of stored data.
[0008] In recent years, with the miniaturization and lightweighting of electronic devices, the demand for further high-density integrated circuits has increased. In addition, it is required to improve the productivity of semiconductor devices including integrated circuits. For example, Patent Document 3 and Non-Patent Document 1 disclose a technology in which a first transistor using an oxide semiconductor film and a second transistor using an oxide semiconductor film are stacked and a plurality of memory cells are arranged in an overlapping manner, thereby increasing the density of the integrated circuit. In addition, for example, as shown in Patent Document 4, a technology is also disclosed in which the channel of a transistor using an oxide semiconductor film is vertically configured to achieve high density of the integrated circuit. [Prior technical literature] [Patent Document]
[0009] [Patent Document 1] Japanese Patent Application Publication No. 2012-257187 [Patent Document 2] Japanese Patent Application Publication No. 2011-151383 [Patent Document 3] International Patent Application Publication No. 2021 / 053473 [Patent Document 4] Japanese Patent Application Publication No. 2013-211537 [Non-patent literature]
[0010] [Non-Patent Literature 1] M. Oota et al., “3D-Stacked CAAC-In-Ga-Zn Oxide FETs with Gate Length of 72nm,” IEDM Tech. Dig., 2019, pp. 50-53 Summary of the Invention Technical problem to be solved by the invention
[0011] One object of one embodiment of the present invention is to provide a semiconductor device with high reliability. One object of one embodiment of the present invention is to provide a semiconductor device with excellent electrical characteristics. One object of one embodiment of the present invention is to provide a semiconductor device with small variations in the electrical characteristics of transistors. One object of one embodiment of the present invention is to provide a semiconductor device with large on-state current. In addition, one object of one embodiment of the present invention is to provide a semiconductor device that can achieve miniaturization or high integration. One object of one embodiment of the present invention is to provide a semiconductor device with high operating speed. One object of one embodiment of the present invention is to provide a low-power semiconductor device. One object of one embodiment of the present invention is to provide a novel semiconductor device. One object of one embodiment of the present invention is to provide a method for manufacturing a semiconductor device with high productivity. One object of one embodiment of the present invention is to provide a method for manufacturing a novel semiconductor device.
[0012] Another object of one embodiment of the present invention is to provide a memory device that can be miniaturized or highly integrated. Another object of one embodiment of the present invention is to provide a memory device with a large storage capacitor. Another object of one embodiment of the present invention is to provide a memory device with a high operating speed. Another object of one embodiment of the present invention is to provide a low-power memory device. Another object of one embodiment of the present invention is to provide a novel memory device.
[0013] Note that the inclusion of these objectives does not preclude the existence of other objectives. One embodiment of the present invention does not necessarily achieve all of the above objectives. Objectives other than the above objectives may be extracted from the description, drawings, and claims. Means of solving technical problems
[0014] One embodiment of the present invention is a semiconductor device including an oxide semiconductor, a conductor, a first insulator provided between the oxide semiconductor and the conductor, and a second insulator opposing the first insulator via the oxide semiconductor, wherein the first insulator has a function of capturing or fixing hydrogen, the first insulator contains hafnium, silicon, and oxygen, the second insulator is in contact with at least a portion of the oxide semiconductor, the second insulator has a hydrogen barrier property, and the hydrogen concentration of the oxide semiconductor is less than 1×10 19 atoms / cm 3 In at least a portion of the region between the oxide semiconductor and the conductor, the hydrogen concentration of the first insulator is 1×10 19 atoms / cm 3 In the above description, the hydrogen concentrations of the oxide semiconductor and the first insulator are values measured by secondary ion mass spectrometry.
[0015] In the semiconductor device, a composition ratio of silicon to hafnium and silicon in the first insulator is preferably 1 atomic % or more and 10 atomic % or less.
[0016] Another embodiment of the present invention is a semiconductor device including an oxide semiconductor, a conductor, a first insulator provided between the oxide semiconductor and the conductor, and a second insulator opposing the first insulator via the oxide semiconductor, wherein the first insulator has a function of capturing or fixing hydrogen, the first insulator has an amorphous structure, the second insulator is in contact with at least a portion of the oxide semiconductor, the second insulator has hydrogen barrier properties, and the hydrogen concentration of the oxide semiconductor is less than 1×10 19 atoms / cm 3 In at least a portion of the region between the oxide semiconductor and the conductor, the hydrogen concentration of the first insulator is 1×10 19 atoms / cm 3 In the above description, the hydrogen concentrations of the oxide semiconductor and the first insulator are values measured by secondary ion mass spectrometry.
[0017] Another embodiment of the present invention is a semiconductor device including an oxide semiconductor, a conductor, a first insulator provided between the oxide semiconductor and the conductor, a second insulator opposing the first insulator via the oxide semiconductor, a third insulator provided between the conductor and the first insulator, and a fourth insulator provided between the oxide semiconductor and the second insulator, wherein the first insulator and the fourth insulator have a function of capturing or fixing hydrogen, the first insulator and the fourth insulator contain hafnium, silicon, and oxygen, the second insulator and the third insulator have hydrogen barrier properties, and the hydrogen concentration of the oxide semiconductor is less than 1×10 19 atoms / cm 3 In at least a portion of the region between the oxide semiconductor and the conductor, the hydrogen concentration of the first insulator is 1×10 19 atoms / cm 3 In the above description, the hydrogen concentrations of the oxide semiconductor and the first insulator are values measured by secondary ion mass spectrometry.
[0018] In the semiconductor device, the composition ratio of silicon to hafnium and silicon in the first insulator is preferably 1 atomic % to 10 atomic % inclusive, and the composition ratio of silicon to hafnium and silicon in the fourth insulator is preferably 1 atomic % to 10 atomic % inclusive.
[0019] Another embodiment of the present invention is a semiconductor device including an oxide semiconductor, a conductor, a first insulator provided between the oxide semiconductor and the conductor, a second insulator opposing the first insulator via the oxide semiconductor, a third insulator provided between the conductor and the first insulator, and a fourth insulator provided between the oxide semiconductor and the second insulator, wherein the first insulator and the fourth insulator have a function of capturing or fixing hydrogen, the first insulator and the fourth insulator have an amorphous structure, the second insulator and the third insulator have hydrogen barrier properties, and the hydrogen concentration of the oxide semiconductor is less than 1×10 19 atoms / cm 3 In at least a portion of the region between the oxide semiconductor and the conductor, the hydrogen concentration of the first insulator is 1×10 19 atoms / cm 3 In the above description, the hydrogen concentrations of the oxide semiconductor and the first insulator are values measured by secondary ion mass spectrometry.
[0020] In the above semiconductor device, the second insulator preferably includes silicon and nitrogen.
[0021] The semiconductor device may have a structure in which the second insulator includes an opening, the oxide semiconductor is provided inside the opening of the second insulator, and a channel is formed along a side surface of the opening of the second insulator.
[0022] The semiconductor device may also have a structure including a fifth insulator including an opening, an oxide semiconductor provided on the second insulator, a fifth insulator provided on the oxide semiconductor, and the first insulator and the conductor provided inside the opening included in the fifth insulator. Effects of the Invention
[0023] According to one embodiment of the present invention, a semiconductor device with high reliability can be provided. According to one embodiment of the present invention, a semiconductor device with excellent electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with small variations in the electrical characteristics of transistors can be provided. According to one embodiment of the present invention, a semiconductor device with large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device capable of miniaturization or high integration can be provided. According to one embodiment of the present invention, a semiconductor device with high operating speed can be provided. According to one embodiment of the present invention, a low-power semiconductor device can be provided. According to one embodiment of the present invention, a novel semiconductor device can be provided. According to one embodiment of the present invention, a method for manufacturing a semiconductor device with high productivity can be provided. According to one embodiment of the present invention, a method for manufacturing a novel semiconductor device can be provided.
[0024] Furthermore, one embodiment of the present invention can provide a storage device that can be miniaturized or highly integrated. One embodiment of the present invention can provide a storage device with a large storage capacitor. One embodiment of the present invention can provide a storage device with a high operating speed. One embodiment of the present invention can provide a storage device with low power consumption. One embodiment of the present invention can provide a novel storage device.
[0025] Note that the description of these effects does not preclude the existence of other effects. One embodiment of the present invention does not necessarily have all of the above effects. Effects other than the above effects can be extracted from the description of the specification, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Figure 1A 、 Figure 1C and Figure 1E It is a perspective view showing an example of a structure. Figure 1B 、 Figure 1D and Figure 1F is a cross-sectional view showing an example of a structure. Figure 2 This is a diagram illustrating the relationship between hydrogen and oxygen and the initial characteristics and reliability of a transistor. Figure 3A and Figure 3D It is a perspective view illustrating the shape of an oxide semiconductor. Figure 3B 、 Figure 3C 、 Figure 3E and Figure 3F is a cross-sectional view illustrating the shape of an oxide semiconductor. Figure 4A 、 Figure 4C and Figure 4E It is a perspective view showing an example of a structure. Figure 4B 、 Figure 4D and Figure 4F is a cross-sectional view showing an example of a structure. Figure 5A and Figure 5C It is a perspective view showing an example of a structure. Figure 5B and Figure 5D is a cross-sectional view showing an example of a structure. 6A to 6D is a cross-sectional view showing an example of a structure. Figure 7A is a plan view showing an example of a semiconductor device. Figures 7B to 7D is a cross-sectional view showing an example of a semiconductor device. Figure 8A and Figure 8B is a cross-sectional view showing an example of a semiconductor device. Figure 9A is a plan view showing an example of a semiconductor device. Figures 9B to 9D is a cross-sectional view showing an example of a semiconductor device. Figure 10A is a plan view showing an example of a semiconductor device. FIG. 10B to FIG. 10D is a cross-sectional view showing an example of a semiconductor device. Figure 11A is a plan view showing an example of a semiconductor device. Figure 11B and Figure 11C is a cross-sectional view showing an example of a semiconductor device. Figure 12A is a plan view showing an example of a semiconductor device. 12B to 12D is a cross-sectional view showing an example of a semiconductor device. Figure 13A is a plan view showing an example of a semiconductor device. 13B to 13D is a cross-sectional view showing an example of a semiconductor device. Figure 14A and Figure 14B is a cross-sectional view showing an example of a semiconductor device. Figure 15A is a plan view showing an example of a semiconductor device. Figures 15B to 15D is a cross-sectional view showing an example of a semiconductor device. 16A to 16E is a cross-sectional view showing an example of a semiconductor device. Figure 17A is a plan view showing an example of a semiconductor device. 17B to 17D is a cross-sectional view showing an example of a semiconductor device. Figure 18A is a plan view showing an example of a semiconductor device. Figures 18B to 18D is a cross-sectional view showing an example of a semiconductor device. Figure 19A is a plan view showing an example of a semiconductor device. Figures 19B to 19D is a cross-sectional view showing an example of a semiconductor device. Figure 20 is a cross-sectional view showing an example of a semiconductor device. Figures 21A to 21E is a cross-sectional view showing an example of a semiconductor device. Figure 22A is a plan view showing an example of a semiconductor device. FIG. 22B to FIG. 22D is a cross-sectional view showing an example of a semiconductor device. Figure 23 is a block diagram showing an example of a storage device. Figure 24A and Figure 24B 1 and 2 are schematic diagrams and circuit diagrams showing an example of a storage device. Figure 25A and Figure 25B is a schematic diagram illustrating an example of a storage device. Figures 26A to 26C is a circuit diagram showing an example of a storage device. Figure 27 is a circuit diagram showing an example of a storage device. Figure 28 is a cross-sectional view showing an example of a storage device. Figure 29 is a cross-sectional view showing an example of a storage device. Figure 30 is a cross-sectional view showing an example of a storage device. Figure 31 is a cross-sectional view showing an example of a storage device. Figure 32A and Figure 32B is a diagram showing an example of a semiconductor device. Figure 33A and Figure 33B This is a diagram showing an example of an electronic component. Figure 34A and Figure 34B is a diagram showing an example of an electronic device, Figures 34C to 34E This is a diagram showing an example of a mainframe computer. Figure 35 This is a diagram showing an example of space equipment. Figure 36 FIG. 1 is a diagram illustrating an example of a storage system that can be used in a data center. Figure 37A and Figure 37B This is an example of the structure of a display device. Figure 38 This is an example of the structure of a display device. Figure 39 This is an example of the structure of a display device. Figure 40 This is an example of the structure of a display device. Figures 41A to 41C This is an example of the structure of a display device. Figure 42A and Figure 42B This is an example of the structure of a display device. Figures 43A to 43D This is an example of the structure of an electronic device. Figures 44A to 44F This is an example of the structure of an electronic device. Figures 45A to 45GThis is an example of the structure of an electronic device. Figure 46A and Figure 46B is a graph showing the results of SIMS analysis of the sample according to this example. Figure 47A and Figure 47B is a graph showing the results of SIMS analysis of the sample according to this example. Figure 48 is a graph showing the results of SIMS analysis of the sample according to this example. Figure 49A and Figure 49B This is a graph of SIMS analysis according to this example. Figures 50A to 50D is a graph showing the XRD measurement results of the sample according to this example. Modes for Carrying Out the Invention
[0027] The embodiments are described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the following description. A person skilled in the art will readily appreciate that the embodiments and details can be modified in various ways without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited solely to the embodiments described below.
[0028] Note that in the invention structure described below, the same symbols are used in different drawings to represent the same parts or parts with the same function, and repeated descriptions are omitted. In addition, when parts with the same function are represented, the same hatching is sometimes used without adding special symbols.
[0029] In addition, for ease of understanding, the positions, sizes, and ranges of various components shown in the drawings may not necessarily represent their actual positions, sizes, and ranges. Therefore, the disclosed invention is not necessarily limited to the positions, sizes, and ranges disclosed in the drawings.
[0030] Furthermore, in particular, in plan views or perspective views, some components may be omitted to facilitate understanding of the invention. Also, some hidden lines may be omitted.
[0031] Note that in this specification and other documents, ordinal numbers such as "first" and "second" are used for convenience, but these numbers do not limit the number of components or the order of the components (for example, the order of steps or the order of stacking). In addition, the ordinal numbers assigned to components in one part of this specification may not be consistent with the ordinal numbers assigned to the same components in other parts of this specification or in the claims.
[0032] In addition, depending on the situation or circumstances, the terms "film" and "layer" may be interchanged. For example, a "conductive layer" may be interchanged with a "conductive film." Furthermore, an "insulating film" may be interchanged with an "insulating layer." Furthermore, depending on the situation or circumstances, a "conductor" may be interchanged with a "conductive layer" or a "conductive film." Furthermore, depending on the situation or circumstances, an "insulator" may be interchanged with an "insulating layer" or an "insulating film." Furthermore, depending on the situation or circumstances, an "oxide semiconductor" may be interchanged with an "oxide semiconductor layer" or an "oxide semiconductor film."
[0033] In this specification, etc., "parallel" refers to a state where the angle formed by two straight lines is greater than -10 degrees and less than 10 degrees. Therefore, a state where the angle is greater than -5 degrees and less than 5 degrees is also included. "Approximately parallel" refers to a state where the angle formed by two straight lines is greater than -30 degrees and less than 30 degrees. In addition, "perpendicular" refers to a state where the angle formed by two straight lines is greater than 80 degrees and less than 100 degrees. Therefore, a state where the angle is greater than 85 degrees and less than 95 degrees is also included. "Approximately perpendicular" refers to a state where the angle formed by two straight lines is greater than 60 degrees and less than 120 degrees.
[0034] The opening includes, for example, a groove, a slit, a recessed portion, etc. In addition, a region where an opening is formed may be referred to as an opening portion.
[0035] Furthermore, the drawings used in the embodiments of this specification illustrate the case where the side walls of the openings of the insulator are perpendicular or substantially perpendicular to the substrate surface or the surface on which they are formed, but the side walls may also be tapered.
[0036] Note that in this specification, etc., a conical shape refers to a shape in which at least a portion of the side surface of a constituent element is arranged obliquely relative to the substrate surface or the formed surface. For example, a region having an angle (hereinafter sometimes referred to as a cone angle) formed by the inclined side surface and the substrate surface or the formed surface is less than 90°. Note that the side surface of a constituent element and the substrate surface do not necessarily have to be completely flat, and may also be an approximately planar shape with a slight curvature or an approximately planar shape with fine concave-convex shapes. In this specification, etc., an inverse cone refers to a shape having a side or upper portion that protrudes more than the bottom in a direction parallel to the substrate.
[0037] Note that in this specification, etc., "high consistency" refers to a structure in which the height from the reference surface (for example, a flat surface such as a substrate surface) in the cross section is equal. For example, in the manufacturing process of a storage device, sometimes during a flattening process (typically a chemical mechanical polishing (CMP) process), the surface of a single layer or multiple layers is exposed. At this time, the surface to be processed by the CMP process has a structure with the same height from the reference surface. However, depending on the processing device, processing method or material of the surface to be processed used during the CMP process, the heights of the multiple layers may sometimes be different. In this specification, etc., "high consistency" also includes the above-mentioned situation. For example, in the case of a layer having two heights relative to the reference surface (referred to herein as the first layer and the second layer), when the difference between the height of the top surface of the first layer and the height of the top surface of the second layer is 20 nm or less, it is also referred to as "high consistency".
[0038] Note that in this specification, etc., "side end portions are aligned" refers to a situation where at least a portion of the outlines of stacked layers overlap when viewed from above. For example, this includes a situation where the upper and lower layers are processed using the same mask pattern or a portion of the same mask pattern. However, strictly speaking, there are cases where the outlines do not overlap and the outline of the upper layer is located inside the outline of the lower layer or the outline of the upper layer is located outside the outline of the lower layer. In these cases, "side end portions are aligned."
[0039] Note that, in general, it is difficult to clearly distinguish between “completely consistent” and “substantially consistent.” Therefore, in this specification, “consistent” includes both complete and substantial consistency.
[0040] Note that in this specification, etc., "the first thickness and the second thickness are consistent" means that the absolute value of the difference between the first and second thicknesses divided by the first thickness is 0.1 or less. Alternatively, it means that the absolute value of the difference between the first and second thicknesses divided by the second thickness is 0.1 or less.
[0041] Note that in this specification, etc., "distance A and distance B are equal" means that the absolute value of the difference between distances A and B divided by distance A is 0.1 or less. Alternatively, it means that the absolute value of the difference between distances A and B divided by distance B is 0.1 or less.
[0042] (Implementation 1) This embodiment describes a structure of one embodiment of the present invention. The structure of one embodiment of the present invention can be used in a semiconductor device including a transistor. Note that the details of a semiconductor device including the structure of one embodiment of the present invention will be described after Embodiment 2.
[0043] A structure of one embodiment of the present invention includes an oxide semiconductor, a first insulator, a second insulator and a conductor. The oxide semiconductor is arranged inside an opening included in the first insulator. Alternatively, the oxide semiconductor is clamped by the first insulator. In the above structure, by making the first insulator have hydrogen barrier properties, the diffusion of hydrogen into the oxide semiconductor can be suppressed. In the structure, a second insulator having the function of capturing or fixing hydrogen (also called absorption) is also provided between the oxide semiconductor and the first insulator. Here, as the second insulator, hafnium silicate having an amorphous structure is preferably used. By adopting such a structure, the hydrogen concentration in the oxide semiconductor can be reduced. Note that the oxide semiconductor has a region opposite to the conductor across one or both of the first insulator and the second insulator. Alternatively, the oxide semiconductor has a region overlapping with the conductor across one or both of the first insulator and the second insulator.
[0044] Note that when the first layer has an overlapping region with the second layer, it can also be said that the first layer and the second layer are opposite in this region. Therefore, in this specification, etc., the term "the first layer has an overlapping region with the second layer" can sometimes be replaced with "the first layer has an opposite region with the second layer."
[0045] <Structure Example 1> Reference Figure 1A and Figure 1B An example of a structure according to one embodiment of the present invention will be described. Figure 1A This is a perspective view of a structure according to one embodiment of the present invention. Figure 1B is a cross-sectional view of the structure, which also corresponds to Figure 1A A cross-sectional view of the portion indicated by the dot-dash line B1-B2.
[0046] Figure 1A and Figure 1B The structure shown includes an oxide semiconductor 30 , an insulator 21 , an insulator 51 , and a conductor 60 .
[0047] At least a portion of the oxide semiconductor 30 has a cylindrical shape with a hollow portion. In other words, the oxide semiconductor 30 has a cylindrical region with a hollow portion.
[0048] An insulator 51 is provided in contact with the side surfaces of the hollow portion in the oxide semiconductor 30, and a conductor 60 is also provided inside the insulator 51. That is, at least a portion of the insulator 51 and at least a portion of the conductor 60 are provided inside the hollow portion in the oxide semiconductor 30. Furthermore, the insulator 51 is provided between the oxide semiconductor 30 and the conductor 60. In other words, the conductor 60 has a region facing the oxide semiconductor 30 via the insulator 51.
[0049] Note that when depositing the insulators, conductors, and oxide semiconductors described in this specification and other materials (e.g., insulator 21, insulator 51, conductor 60, or oxide semiconductor 30), sputtering, CVD, molecular beam epitaxy (MBE), pulsed laser deposition (PLD), atomic layer deposition (ALD), or the like can be used. Examples of ALD methods include thermal ALD, which uses only thermal energy to react precursors and reactants, and plasma-enhanced ALD (PEALD), which uses plasma-excited reactants.
[0050] For example, sputtering, which does not require the use of molecules containing hydrogen as a deposition gas, is preferred because it can reduce the hydrogen concentration in the oxide semiconductor 30, etc. Furthermore, the ALD method, for example, can deposit a film with good coverage, and is therefore preferably used when depositing a thin film or when the deposition substrate has large irregularities.
[0051] The insulator 21 is provided in contact with the side surface of the outer side of the oxide semiconductor 30. Figure 1A and Figure 1B In the embodiment, the oxide semiconductor 30, the insulator 51, and the conductor 60 are sequentially provided inside the opening of the insulator 21. In this case, the insulator 21 has a region facing the insulator 51 with the oxide semiconductor 30 interposed therebetween.
[0052] The oxide semiconductor 30 can be used as a semiconductor layer of a transistor, for example. In this case, the conductor 60 can be used as the gate electrode of the transistor. In addition, the insulator 51 can be used as a gate insulating film of the transistor. In addition, at least a portion of the region of the oxide semiconductor 30 that faces the conductor 60 can be used as a channel forming region (also referred to as a channel forming region). More specifically, at least a portion of the region of the oxide semiconductor 30 that faces the conductor 60 across the insulator 51 can be used as a channel forming region. Note that the gate insulating film is sometimes referred to as a gate insulating layer or a gate insulator.
[0053] In a transistor using an oxide semiconductor for a semiconductor layer (also referred to as an OS transistor), when oxygen vacancies (V O ) and impurities, the electrical characteristics may change easily and the reliability may be reduced. In addition, the hydrogen near the oxygen vacancy forms a defect in which hydrogen enters the oxygen vacancy (hereinafter sometimes referred to as V OH) and may generate electrons that become carriers. Therefore, when oxygen vacancies are included in the channel formation region in the oxide semiconductor, the OS transistor tends to have a normally-on characteristic. Therefore, in the channel formation region in the oxide semiconductor, it is preferred to minimize hydrogen, which is a type of oxygen vacancy and impurity. In other words, it is preferred that the carrier concentration in the channel formation region in the oxide semiconductor is reduced and is i-type (intrinsic) or substantially i-type.
[0054] Note that in this specification and other publications, the term "normally-on" refers to a state in which a channel exists and current flows between the source and drain of a transistor even when no gate voltage is applied. Similarly, the term "normally-off" refers to a state in which current does not flow between the source and drain of a transistor when no gate voltage is applied or when the gate is grounded.
[0055] Reference Figure 2 Explain the above in detail. Figure 2 The vertical axis represents the amount of oxygen supplied to the oxide semiconductor in the OS transistor (the amount of oxygen in the oxide semiconductor). The closer to the upper side of the vertical axis, the more oxygen is supplied to the oxide semiconductor, and the closer to the lower side of the vertical axis, the less oxygen is supplied to the oxide semiconductor. Note that the amount of oxygen supplied to the oxide semiconductor can be referred to as the amount of oxygen released by the insulator provided in contact with the oxide semiconductor or the amount of oxygen released by the insulator provided near the oxide semiconductor. In addition, Figure 2 The horizontal axis represents the amount of hydrogen supplied to the oxide semiconductor in the OS transistor (the amount of hydrogen in the oxide semiconductor). The closer to the right side of the horizontal axis, the greater the amount of hydrogen supplied to the oxide semiconductor. Note that the amount of hydrogen supplied to the oxide semiconductor can also be referred to as the hydrogen concentration in the oxide semiconductor.
[0056] also, Figure 2 A schematic diagram of the Id-Vg characteristic (drain current-gate voltage characteristic) is also shown. Figure 2 In FIG. 1 , the vertical axis represents Id and the horizontal axis represents Vg. The solid line represents the initial characteristics of the OS transistor, and the dotted line represents the Id-Vg characteristics of the OS transistor after a +GBT (Gate Bias-Temperature) stress test.
[0057] When an oxide semiconductor is supplied with an excessive amount of hydrogen, V O The amount of H increases. Therefore, if Figure 2 As shown in 2), the initial characteristics of the OS transistor drift in the negative direction and tend to become normally-on characteristics. In addition, negative drift degradation under the +GBT stress test is likely to occur. In other words, the amount of negative drift degradation under the +GBT stress test increases. That is, by reducing the hydrogen concentration in the oxide semiconductor, as Figure 2As shown in 1), the negative drift of the initial characteristics of the OS transistor is suppressed, achieving a normally-off characteristic. Furthermore, the degradation of negative drift during the +GBT stress test is also suppressed.
[0058] In addition, when an oxide semiconductor is supplied with an excessive amount of oxygen, electron traps due to the excessive oxygen are formed in the gate insulating film. Figure 2 As shown in 3) in FIG, the initial characteristics of the OS transistor drift in the positive direction, and are likely to become normally-off characteristics. In addition, the forward drift degradation under the +GBT stress test is likely to occur. In other words, the forward drift degradation amount under the +GBT stress test increases. On the other hand, when the amount of oxygen supplied to the oxide semiconductor is insufficient, the V O Therefore, if Figure 2 As shown in 4), the initial characteristics of the OS transistor drift in the negative direction and tend to become normally-on characteristics.
[0059] As mentioned above, in order to obtain good initial characteristics, when the oxygen content is reduced to a minimum, the forward drift degradation under the +GBT stress test is suppressed, and the initial characteristics and reliability of the OS transistor are improved. Figure 2 As shown in 1), it is important to optimize the amount of oxygen supplied to the oxide semiconductor while sufficiently reducing the hydrogen concentration in the oxide semiconductor.
[0060] As an example, the hydrogen concentration in the channel formation region of the oxide semiconductor obtained by secondary ion mass spectrometry (SIMS) is preferably less than 1×10 20 atoms / cm 3 , more preferably less than 5×10 19 atoms / cm 3 , more preferably less than 1×10 19 atoms / cm 3 , more preferably less than 5×10 18 atoms / cm 3 , more preferably less than 1×10 18 atoms / cm 3 , further below 1×10 17 atoms / cm 3 .
[0061] Therefore, in one embodiment of the present invention, a hydrogen barrier insulator is preferably used as the insulator 21. The insulator 21 is provided so as to surround the oxide semiconductor 30. When the insulator 21 provided outside the oxide semiconductor 30 has hydrogen barrier properties, diffusion of hydrogen into the oxide semiconductor 30 can be suppressed.
[0062] Note that in this specification, etc., a blocking insulator refers to an insulator having a barrier property. Furthermore, a barrier property refers to a property that the corresponding substance does not easily diffuse (also referred to as a property that the corresponding substance does not easily permeate, a property with low permeability to the corresponding substance, or a function of inhibiting the diffusion of the corresponding substance). Furthermore, hydrogen, which is referred to as a corresponding substance, refers to, for example, hydrogen atoms, hydrogen molecules, water molecules, and OH. - At least one of substances that bond with hydrogen, etc. Furthermore, unless otherwise specified, impurities described as corresponding substances refer to impurities in the channel formation region or the semiconductor layer, and include, for example, at least one of hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), copper atoms, etc. Furthermore, oxygen described as a corresponding substance refers to, for example, at least one of oxygen atoms, oxygen molecules, etc.
[0063] Examples of the hydrogen-blocking insulator include aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride, and silicon oxynitride.
[0064] For example, silicon nitride is preferably used as the insulator 21. In this case, the insulator 21 contains silicon and nitrogen.
[0065] Silicon nitride that can be used for insulator 21 has hydrogen barrier properties, for example, when the thickness is 2 nm or greater. Note that to improve hydrogen barrier properties, the thickness of silicon nitride is preferably 3 nm or greater, more preferably 5 nm or greater. Furthermore, silicon nitride has oxygen barrier properties, for example, when the thickness is 1 nm or greater. Note that to improve oxygen barrier properties, the thickness of silicon nitride is preferably 2 nm or greater. In other words, silicon nitride formed at a thickness that provides hydrogen barrier properties also has oxygen barrier properties.
[0066] The insulator 21 preferably has hydrogen barrier properties, so when silicon nitride is used as the insulator 21, the width of the insulator 21 in the B1-B2 direction is preferably 2 nm or more, more preferably 3 nm or more. Here, the width of the insulator 21 in the B1-B2 direction is set to the shortest distance between the side surface of the outer side of the oxide semiconductor 30 and the side surface of the outer side of the adjacent oxide semiconductor 30. Note that there is no particular limit on the upper limit of the width of the insulator 21 in the B1-B2 direction, but from the perspective of miniaturization or high integration of semiconductor devices, it is preferably less than 200 nm, less than 100 nm, less than 50 nm, less than 30 nm, less than 20 nm, less than 10 nm or less than 5 nm. Therefore, the width of the insulator 21 in the B1-B2 direction is preferably 2 nm or more and less than 200 nm, more preferably 2 nm or more and less than 100 nm. In addition, the width of the insulator 21 in the B1-B2 direction is preferably 3 nm or more and less than 200 nm, more preferably 3 nm or more and less than 100 nm.
[0067] As described above, when the insulator 21 has hydrogen barrier properties, the insulator 21 also has oxygen barrier properties. Furthermore, the insulator 21 has a region in contact with the oxide semiconductor 30. Therefore, when the insulator 21 has oxygen barrier properties, oxygen extraction from the oxide semiconductor 30 and the formation of excessive oxygen vacancies in the oxide semiconductor 30 can be suppressed.
[0068] The insulator 51 preferably uses an insulator having the function of capturing or fixing hydrogen. When the insulator 51 provided in contact with the oxide semiconductor 30 has the function of capturing or fixing hydrogen, the hydrogen concentration in the oxide semiconductor 30 located inside the insulator 21 can be reduced. In this case, the hydrogen in the oxide semiconductor 30 is captured or fixed by the insulator 51, so the hydrogen concentration of the insulator 51 becomes higher. As an example, the hydrogen concentration of the insulator 51 obtained by SIMS is sometimes 1×10 19 atoms / cm 3 Above or 1×10 20 atoms / cm 3 At this time, the hydrogen concentration of at least a portion of the insulator 51 is higher than the hydrogen concentration of the oxide semiconductor 30 . In other words, the oxide semiconductor 30 has a region whose hydrogen concentration is lower than the hydrogen concentration of the insulator 51 .
[0069] Note that the function of trapping or fixing the corresponding substance can also be said to have the property of preventing the corresponding substance from diffusing easily. Therefore, the function of trapping or fixing the corresponding substance can also be replaced by the term "barrier property".
[0070] The insulator having the function of capturing or fixing hydrogen is preferably a metal oxide containing hafnium or the like. Furthermore, the metal oxide preferably contains oxygen atoms having dangling bonds. Such metal oxides sometimes have the property of capturing or fixing hydrogen with dangling bonds. For example, the metal oxide preferably has an amorphous structure. This is because some of the oxygen atoms in the metal oxide having an amorphous structure have dangling bonds. Note that while the metal oxide preferably has an amorphous structure, a crystalline region may be formed in a portion thereof. Furthermore, the metal oxide sometimes has grain boundaries in a portion thereof.
[0071] Here, by adding silicon oxide to hafnium oxide or by including silicon in hafnium oxide, polycrystallization of hafnium oxide can be suppressed. In other words, an oxide containing hafnium and silicon (hereinafter sometimes referred to as hafnium silicate) tends to have an amorphous structure. Therefore, hafnium silicate has the property of capturing or fixing hydrogen, making it suitable for insulator 51. In this case, insulator 51 contains hafnium, silicon, and oxygen.
[0072] The composition ratio of silicon relative to hafnium and silicon in the insulator 51 is greater than 0.1 atomic% and less than 100 atomic%, preferably greater than 0.1 atomic% and less than 70 atomic%, more preferably greater than 0.1 atomic% and less than 50 atomic%, further preferably greater than 0.1 atomic% and less than 30 atomic%, further preferably greater than 1 atomic% and less than 10 atomic%, and further preferably greater than 3 atomic% and less than 8 atomic%. The composition ratio of silicon in the hafnium silicate can be quantified, for example, by X-ray photoelectron spectroscopy (XPS). Note that hafnium silicate sometimes contains metals such as zirconium, and such metals may also be included in the measurement object. In this case, normalization may be performed so that the sum of the composition ratios of hafnium, silicon, and zirconium is 100 atomic%.
[0073] By making the insulator 51 have an amorphous structure, the formation of grain boundaries can be suppressed. This suppresses the formation of grain boundaries and improves the flatness of the film of the insulator 51. This makes the thickness distribution of the insulator 51 uniform, reducing the number of extremely thin portions, thereby improving the withstand voltage of the insulator 51. Furthermore, the thickness distribution of the film provided on the insulator 51 can be made uniform.
[0074] Furthermore, by suppressing the formation of grain boundaries in the insulator 51, leakage current caused by defect states at the grain boundaries can be reduced. As a result, the insulator 51 can be used as an insulating film with low leakage current.
[0075] Furthermore, because hafnium oxide is a high-k material, hafnium silicate also becomes a high-k material depending on the silicon content. Therefore, when the structure of one embodiment of the present invention is used in a transistor, the gate potential applied during transistor operation can be reduced while maintaining the physical thickness of the gate insulator. Furthermore, the equivalent oxide thickness (EOT) of the insulator used as the gate insulator can be reduced.
[0076] For example, the width of the insulator 51 in the B1-B2 direction is preferably greater than or equal to 0.5 nm and less than or equal to 15 nm, more preferably greater than or equal to 0.5 nm and less than or equal to 12 nm, and even more preferably greater than or equal to 0.5 nm and less than or equal to 10 nm. At least a portion of the insulator 51 may have a region having the above-mentioned width. The width of the insulator 51 in the B1-B2 direction may also be referred to as the thickness of the insulator 51. Here, the insulator 51 has an amorphous structure, so the formation of grain boundaries is reduced and the flatness is high. Therefore, the insulator 51 can be a thin film with a high withstand voltage and reduced leakage current. Therefore, the insulator 51 is suitable for use as a gate insulator.
[0077] In addition, when depositing a hafnium silicate film, a deposition gas or deposition target containing hafnium and silicon can be used in the above-mentioned deposition method. For example, a co-sputtering method using a silicon oxide target and a hafnium oxide target can be used. For example, a thermal ALD method using hafnium tetrachloride and silicon tetrachloride as precursors can be used. In addition, for example, after depositing a hafnium oxide film using the above-mentioned method, silicon can be added to the hafnium oxide film to form a hafnium silicate film. As a method for adding silicon, for example, an ion implantation method in which silicon is added by mass separation of an ionized source gas, or an ion doping method in which silicon is added to an ionized source gas without mass separation can be used.
[0078] Note that while hafnium oxides are cited above as insulators capable of capturing or fixing hydrogen, the present invention is not limited thereto. Examples include magnesium oxides, aluminum oxides, and oxides containing aluminum and hafnium (hafnium aluminate). Furthermore, oxides containing zirconium can also be used, such as those containing hafnium and zirconium. These metal oxides preferably have silicon oxide added and have an amorphous structure.
[0079] In addition, by performing a heat treatment, the insulator 51 can capture or fix hydrogen released from the oxide semiconductor 30. Here, the insulator 51 and the oxide semiconductor 30 are preferably arranged in a closed system composed of an insulator 21 having hydrogen barrier properties. As a result, the frequency of hydrogen migration between the inside and outside of the closed system is extremely low, so it is possible to prevent hydrogen from diffusing from the outside of the closed system to the inside or from the inside to the outside during the heat treatment. Therefore, by capturing or fixing the hydrogen inside the closed system by the insulator 51, the hydrogen concentration of the oxide semiconductor 30 can be reduced. Here, in the above-mentioned closed system, a hydrogen blocking insulator is used to cover at least a portion of the oxide semiconductor to reduce hydrogen diffusion from the outside of the closed system to the inside or from the inside to the outside. Here, in the above-mentioned closed system, the portion of the oxide semiconductor used as the channel formation region is preferably located inside the hydrogen blocking insulator. For example, in the above-mentioned closed system, it is preferred that the hydrogen blocking insulator is arranged in a manner extending in the channel length direction of the oxide semiconductor, and the oxide semiconductor is arranged in a manner surrounded or clamped by the hydrogen blocking insulator. Note that the above-mentioned closed system does not completely block hydrogen migration, as long as the frequency of hydrogen migration is reduced. Therefore, the above-mentioned closed system is sometimes not completely closed but a part or multiple parts thereof are open.
[0080] The heat treatment may be performed within a temperature range where polycrystallization of the oxide semiconductor 30 and the insulator 51 does not occur. The heat treatment temperature is preferably 100°C or higher, 250°C or higher, or 350°C or higher and 650°C or lower, 600°C or lower, 550°C or lower, 450°C or lower, or 400°C or lower. By adding silicon to the insulator 51, the heat treatment can also suppress polycrystallization of the insulator 51.
[0081] In addition, the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas or an atmosphere containing an oxidizing gas of more than 10 ppm, more than 1% or more than 10%. For example, when the heat treatment is performed in a mixed atmosphere of nitrogen gas and oxygen gas, the ratio of the oxygen gas is preferably set to about 20%. The heat treatment can also be performed under reduced pressure. Alternatively, the heat treatment can also be performed in an atmosphere of nitrogen gas or an inert gas, and then in order to compensate for the oxygen that has been separated, it is performed in an atmosphere of an oxidizing gas of more than 10 ppm, more than 1% or more than 10%. In addition, the gas used in the above-mentioned heat treatment is preferably highly purified. For example, the water content in the gas used in the above-mentioned heat treatment is preferably less than 1 ppb, more preferably less than 0.1 ppb, and further preferably less than 0.05 ppb. By using a highly purified gas for heat treatment, it is possible to prevent moisture and the like from being absorbed by the oxide semiconductor 30, the insulator 51, etc. as much as possible.
[0082] Thus, by adopting the above structure as a structure including an oxide semiconductor, an oxide semiconductor with low oxygen vacancies and impurities can be provided. Therefore, by using this structure in a transistor, the electrical characteristics of the transistor can be improved, thereby improving the reliability of the transistor.
[0083] Furthermore, when the structured body described above is used in a transistor, the formation of oxygen vacancies in the channel formation region and the diffusion of hydrogen into the channel formation region can be suppressed. This can suppress variations in the amount of oxygen vacancies and hydrogen concentration in the channel formation region across transistors. Consequently, variations in the electrical characteristics of the transistor can be reduced.
[0084] Figure 1A and Figure 1B Although the structure in which the hydrogen blocking insulator is provided outside the oxide semiconductor 30 is shown, the present invention is not limited thereto. For example, the hydrogen blocking insulator may be provided inside the hollow portion of the oxide semiconductor 30 in addition to outside the oxide semiconductor 30 .
[0085] Figure 1C This is a perspective view of a structure according to one embodiment of the present invention. Figure 1D is a cross-sectional view of the structure, which also corresponds to Figure 1C A cross-sectional view of the portion indicated by the dot-dash line B1-B2.
[0086] Figure 1C and Figure 1D The structure shown is Figure 1A and Figure 1B The main difference of the structure shown is that it includes an insulator 52. The following mainly describes the parts that are different from the above description, and for the overlapping parts, reference is made to the above description, and the description thereof may be omitted.
[0087] The insulator 52 is provided between the insulator 51 and the conductor 60. A hydrogen-blocking insulator is preferably used as the insulator 52. This structure allows the oxide semiconductor 30 to be sandwiched between the hydrogen-blocking insulator. For example, diffusion of hydrogen from the conductor 60 into the oxide semiconductor 30 can be suppressed. Consequently, diffusion of hydrogen into the oxide semiconductor 30 can be further suppressed.
[0088] The insulator 52 preferably has hydrogen barrier properties. Therefore, when silicon nitride is used as the insulator 52, the width of the insulator 52 in the B1-B2 direction is preferably 2 nm or more, more preferably 3 nm or more. Note that there is no particular upper limit on the width of the insulator 52 in the B1-B2 direction, but from the perspective of miniaturization or high integration of semiconductor devices, and improved productivity of semiconductor devices, it is preferably 20 nm or less, 10 nm or less, or 5 nm or less. Therefore, the width of the insulator 52 in the B1-B2 direction is preferably 2 nm or more and 10 nm or less, more preferably 2 nm or more and 5 nm or less. In addition, the width of the insulator 52 in the B1-B2 direction is preferably 3 nm or more and 10 nm or less, more preferably 3 nm or more and 5 nm or less. The width of the insulator 52 in the B1-B2 direction can also be said to be the thickness of the insulator 52.
[0089] As described above, when the insulator 52 has hydrogen barrier properties, the insulator 52 also has oxygen barrier properties. Furthermore, the insulator 52 has a region in contact with the conductor 60. Therefore, when the insulator 52 has oxygen barrier properties, it is possible to suppress oxygen in the oxide semiconductor 30 or the insulator 51 from diffusing into the conductor 60 and oxidizing the conductor 60. Furthermore, it is possible to suppress oxygen in the oxide semiconductor 30 from diffusing into the conductor 60 and forming oxygen vacancies in the oxide semiconductor 30.
[0090] Note that the insulator 21 suppresses hydrogen diffusion into the oxide semiconductor 30, so the width of the insulator 52 in the B1-B2 direction is not limited to the above. For example, the width of the insulator 52 in the B1-B2 direction may be 0.1 nm or more and less than 3 nm, or 0.1 nm or more and less than 2 nm.
[0091] When the oxide semiconductor 30 is used for a semiconductor layer of a transistor, the insulator 51 and the insulator 52 can each serve as a gate insulating film of the transistor.
[0092] Figure 1A and Figure 1B The structure shown and Figure 1C and Figure 1D The structure shown can be formed by, for example, providing an oxide semiconductor 30 or the like inside an opening in an insulator 21. Specifically, Figure 1A and Figure 1B In the embodiment, an oxide semiconductor 30, an insulator 51 and a conductor 60 are sequentially provided inside the opening of the insulator 21. Figure 1C and Figure 1D The oxide semiconductor 30, the insulator 51, the insulator 52, and the conductor 60 are sequentially provided inside the opening of the insulator 21. Note that the present invention is not limited to this. For example, the insulator 21 may be provided inside the opening of an insulator different from the insulator 21.
[0093] Figure 1E This is a perspective view of a structure according to one embodiment of the present invention. Figure 1F is a cross-sectional view of the structure, which also corresponds to Figure 1E A cross-sectional view of the portion indicated by the dot-dash line B1-B2.
[0094] Figure 1E and Figure 1F The structure shown is Figure 1C and Figure 1D The main difference of the structure shown is that it includes an insulator 24. The following mainly describes the parts that are different from the above description, and for the overlapping parts, reference is made to the above description, and the description thereof may be omitted.
[0095] exist Figure 1E and Figure 1F In the embodiment, the insulator 21, the oxide semiconductor 30, the insulator 51, the insulator 52, and the conductor 60 are sequentially provided inside the opening of the insulator 24. From the viewpoints of miniaturization or high integration of semiconductor devices and improvement of semiconductor device productivity, the width of the insulator 21 in the B1-B2 direction is preferably within the range of the width of the insulator 52 in the B1-B2 direction.
[0096] exist Figure 1E and Figure 1F In the structure shown, the range of materials available for the insulator, including the opening portion in which the oxide semiconductor 30 is provided, can be expanded. As an example, a material with a low relative dielectric constant can be used as the insulator 24. In this case, if a conductor is provided above and below the insulator 24, respectively, the parasitic capacitance generated between the conductors can be reduced. Alternatively, as another example, a conductor can be provided in place of the insulator 24. In this case, the oxide semiconductor 30 can be sandwiched between two conductors.
[0097] On the other hand, Figure 1A and Figure 1B The structure shown and Figure 1C and Figure 1D In the structure shown, the insulator including the opening in which the oxide semiconductor 30 is provided also serves as a hydrogen barrier insulator, eliminating the need for a separate hydrogen barrier insulator. This simplifies the manufacturing process of a semiconductor device including the structure, thereby improving productivity.
[0098] Here, the shape of the oxide semiconductor 30 will be described with reference to FIG. 3 . Figure 3A and Figure 3D It is a perspective view illustrating the shape of the oxide semiconductor 30 . Figure 3B 、 Figure 3C 、 Figure 3E and Figure 3F2 is a cross-sectional view illustrating the shape of the oxide semiconductor 30. Note that for clarity, the oxide semiconductor 30 and the insulator 21 are shown. In addition, a portion of the insulator 21 is shown by a dotted line.
[0099] Ruru Figure 3A As shown, the top surface of the oxide semiconductor 30 is preferably aligned with the top surface of the insulator 21. Figure 3B As shown, the oxide semiconductor 30 may also be in the shape of a cylinder with a hollow portion. Alternatively, as shown in FIG. Figure 3C As shown, it can also be a cylindrical shape with a bottom. In other words, it can also be a cylindrical shape with a groove.
[0100] Figure 3A The top surface of the oxide semiconductor 30 is aligned with the top surface of the insulator 21. Note that the present invention is not limited to this. Figure 3D As shown in FIG. 1 , a portion of the oxide semiconductor 30 may also be located above the insulator 21. In other words, the oxide semiconductor 30 may also have a region in contact with the top surface of the insulator 21. In this case, as shown in FIG. Figure 3E As shown, the oxide semiconductor 30 may also be in the shape of a cylinder with a hollow portion. Alternatively, as shown in FIG. Figure 3F As shown, it can also be in the shape of a cylinder with a bottom.
[0101] Notice, Figures 3D to 3F While the oxide semiconductor 30 is shown as having a region in contact with the top surface of the insulator 21, the present invention is not limited thereto. For example, the oxide semiconductor 30 may be in contact with the top surface of at least a portion of a layer disposed on the insulator 21. In this case, the layer preferably includes an opening that overlaps with the opening of the insulator 21. Note that the layer may be an insulator, a semiconductor, or a conductor. Furthermore, the insulator may have a structure in which multiple layers selected from among insulators, semiconductors, and conductors are stacked.
[0102] Notice, Figures 3A to 3F The bottom surface of the oxide semiconductor 30 is aligned with the bottom surface of the insulator 21, but the present invention is not limited thereto. For example, the bottom surface of the oxide semiconductor 30 may be above or below the bottom surface of the insulator 21.
[0103] Notice, Figures 3A to 3F The outer side surfaces of the oxide semiconductor 30 and the inner side surfaces of the oxide semiconductor 30 are shown as being perpendicular or substantially perpendicular to the substrate surface (not shown), but the present invention is not limited thereto. For example, the outer side surfaces of the oxide semiconductor 30 and the inner side surfaces of the oxide semiconductor 30 may be tapered or inversely tapered.
[0104] <Structure Example 2> The structure described in <Structural Example 1> above includes a region where the oxide semiconductor 30 is in contact with the insulator 21. Note that the present invention is not limited to this. When the oxide semiconductor 30 is provided inside the opening in the insulator 21, the oxide semiconductor 30 and the insulator 21 do not necessarily need to be in contact. The following description mainly focuses on portions that differ from the description in <Structural Example 1> above. For overlapping portions, reference is made to the above description, and description thereof may be omitted.
[0105] Reference Figure 4A and Figure 4B Another example of the structure of one embodiment of the present invention will be described. Figure 4A This is a perspective view of a structure according to one embodiment of the present invention. Figure 4B is a cross-sectional view of the structure, which also corresponds to Figure 4A A cross-sectional view of the portion indicated by the dot-dash line B1-B2.
[0106] Figure 4A and Figure 4B The structure shown includes an oxide semiconductor 30, an insulator 21, an insulator 22, an insulator 51, and a conductor 60. In other words, Figure 4A and Figure 4B The structure shown is Figure 1A and Figure 1B The structure shown differs primarily in the inclusion of an insulator 22 .
[0107] The insulator 22 is provided between the insulator 21 and the oxide semiconductor 30. The insulator 22 preferably uses an insulator having the function of capturing or fixing hydrogen. For example, the insulator 22 can use a material that can be used for the insulator 51. By adopting such a structure, the oxide semiconductor 30 can be sandwiched by the insulator that captures or fixes hydrogen. Furthermore, the oxide semiconductor 30 sandwiched by the insulator that captures or fixes hydrogen can be surrounded by a hydrogen blocking insulator. Thus, the hydrogen concentration in the oxide semiconductor 30 can be further reduced. At this time, a portion of the hydrogen in the oxide semiconductor 30 is captured or fixed by the insulator 51. In addition, another portion of the hydrogen in the oxide semiconductor 30 is captured or fixed by the insulator 22. Therefore, the hydrogen concentration of the insulator 51 and the hydrogen concentration of the insulator 22 become higher. For example, the hydrogen concentration of the insulator 51 and the hydrogen concentration of the insulator 22 are higher than the hydrogen concentration of the oxide semiconductor 30.
[0108] By adopting the above structure as a structure including an oxide semiconductor, an oxide semiconductor with low oxygen vacancies and impurities can be provided. Therefore, by using this structure in a transistor, the electrical characteristics of the transistor can be improved, thereby improving the reliability of the transistor.
[0109] Furthermore, when the structured body described above is used in a transistor, the formation of oxygen vacancies in the channel formation region and the diffusion of hydrogen into the channel formation region can be suppressed. This can suppress variations in the amount of oxygen vacancies and hydrogen concentration in the channel formation region across transistors. Consequently, variations in the electrical characteristics of the transistor can be reduced.
[0110] Note that when the insulator 22 having the function of capturing or fixing hydrogen is provided inside the insulator 21, as shown in FIG. Figure 4C and Figure 4D As shown, an insulator 52 may be provided instead of the insulator 51. By adopting this structure, the oxide semiconductor 30 can be sandwiched by the hydrogen blocking insulator. For example, the diffusion of hydrogen in the conductor 60 to the oxide semiconductor 30 can be suppressed. Therefore, the diffusion of hydrogen to the oxide semiconductor 30 can be further suppressed. Note that Figure 4C This is a perspective view of a structure according to one embodiment of the present invention. Figure 4D is a cross-sectional view of the structure, which also corresponds to Figure 4C A cross-sectional view of the portion indicated by the dot-dash line B1-B2.
[0111] In addition, if Figure 4E and Figure 4F As shown, an insulator 51 and an insulator 52 may be provided between the oxide semiconductor 30 and the conductor 60. By adopting such a structure, the diffusion of hydrogen into the oxide semiconductor 30 can be further suppressed, and thus the hydrogen concentration in the oxide semiconductor 30 can be further reduced. Note that Figure 4E This is a perspective view of a structure according to one embodiment of the present invention. Figure 4F is a cross-sectional view of the structure, which also corresponds to Figure 4E The cross-sectional view of the portion indicated by the dot-dash line B1-B2 in FIG. Figure 4E and Figure 4F The structure shown is Figure 1C and Figure 1D The main difference of the structure shown is the inclusion of an insulator 22. That is, Figure 4E and Figure 4F The structure shown is also Figure 1C and Figure 1D Examples of variations of the structure shown.
[0112] Figure 4E and Figure 4F The structure shown can be formed by, for example, providing an oxide semiconductor 30 inside the opening of the insulator 21. Specifically, the insulator 22, the oxide semiconductor 30, the insulator 51, the insulator 52, and the conductor 60 are stacked in this order inside the opening of the insulator 21. In this case, the insulator 52 is provided between the conductor 60 and the insulator 51. Note that Figure 4A and Figure 4BThe structure shown and Figure 4C and Figure 4D The same is true for the structure shown in FIG. Note that the present invention is not limited to this. Figure 1E and Figure 1F As described above, the insulator 21 may be provided inside an opening in an insulator different from the insulator 21 , for example.
[0113] Figure 5A This is a perspective view of a structure according to one embodiment of the present invention. Figure 5B is a cross-sectional view of the structure, which also corresponds to Figure 5A A cross-sectional view of the portion indicated by the dot-dash line B1-B2.
[0114] Figure 5A and Figure 5B The structure shown is Figure 4E and Figure 4F The main difference of the structure shown is that it includes an insulator 24. The following mainly describes the parts that are different from the above description, and for the overlapping parts, reference is made to the above description, and the description thereof may be omitted.
[0115] exist Figure 5A and Figure 5B In the embodiment, the insulator 21, the insulator 22, the oxide semiconductor 30, the insulator 51, the insulator 52, and the conductor 60 are sequentially provided inside the opening of the insulator 24. From the viewpoints of miniaturization or high integration of semiconductor devices and improvement of semiconductor device productivity, the width of the insulator 21 in the B1-B2 direction is preferably within the range of the width of the insulator 52 in the B1-B2 direction.
[0116] As mentioned above, by adopting Figure 5A and Figure 5B The structure shown in FIG. 1 can expand the range of choices of materials for the insulator (here, the insulator 24) including the opening portion provided with the oxide semiconductor 30 and the like. On the other hand, by adopting Figure 4A and Figure 4B In the structure shown in FIG, etc., the insulator (here, insulator 21) including the opening portion provided with the oxide semiconductor 30 also serves as a hydrogen barrier insulator, eliminating the need for a separate hydrogen barrier insulator. This simplifies the manufacturing process of the semiconductor device including the structure, thereby improving productivity.
[0117] Figure 5A and Figure 5B Although the insulator has a structure including an opening in which the oxide semiconductor 30 and the like are arranged, the present invention is not limited thereto. For example, the conductor may also include an opening in which the oxide semiconductor 30 and the like are arranged.
[0118] Figure 5CThis is a perspective view of a structure according to one embodiment of the present invention. Figure 5D is a cross-sectional view of the structure, which also corresponds to Figure 5C A cross-sectional view of the portion indicated by the dot-dash line B1-B2.
[0119] Figure 5C and Figure 5D The structure shown is Figure 5A and Figure 5B The main difference of the structure shown is that it includes a conductor 15 instead of the insulator 24. The following mainly describes the parts that are different from the above description, and the above description is referred to for the overlapping parts, and the description thereof may be omitted.
[0120] exist Figure 5C and Figure 5D In the embodiment, the insulator 21, the insulator 22, the oxide semiconductor 30, the insulator 51, the insulator 52, and the conductor 60 are sequentially arranged inside the opening of the conductor 15. The conductor 15 includes a region that faces the oxide semiconductor 30 via the insulators 21 and 22. In addition, the conductor 15 includes a region that faces the conductor 60 via the oxide semiconductor 30. In other words, the oxide semiconductor 30 includes a region between the conductor 60 and the conductor 15.
[0121] As described above, the oxide semiconductor 30 can be used as a semiconductor layer of a transistor, for example. In this case, the conductor 60 can be used as the first gate electrode of the transistor. In addition, the insulators 51 and 52 can be used as the first gate insulating film of the transistor. In addition, the conductor 15 can be used as the second gate electrode of the transistor. In addition, the insulators 21 and 22 can be used as the second gate insulating film of the transistor. In addition, at least a portion of the region of the oxide semiconductor 30 located between the conductor 60 and the conductor 15 can be used as a channel formation region.
[0122] When the oxide semiconductor 30 is used as the semiconductor layer of the transistor, the threshold voltage (Vth) of the transistor can be controlled by independently changing the potential applied to the conductor 15 and the potential applied to the conductor 60 without being linked. In particular, when the transistor is an n-channel transistor, when a negative potential (a potential lower than the source potential) is applied to one of the conductors 15 and 60, the Vth of the transistor can be increased and the off-state current can be reduced. As a result, when a negative potential is applied to one of the conductors 15 and 60, the drain current when the potential applied to the other of the conductors 15 and 60 is 0V can be reduced compared to the case where a negative potential is not applied to one of the conductors 15 and 60.
[0123] Alternatively, the conductor 15 may be electrically connected to the conductor 60. By connecting the conductor 15 and the conductor 60 and applying the same potential, the on-state current can be increased, initial characteristic variations can be reduced, degradation of electrical characteristics during a GBT stress test can be suppressed, and fluctuations in the rising voltage of the on-state current at different drain voltages can be suppressed.
[0124] <Structure Example 3> In the above-described <Structural Example 1> and <Structural Example 2>, a structure in which the oxide semiconductor 30 is provided inside the opening in the insulator 21 is described. Note that the present invention is not limited to this. For example, the structure may also employ a structure in which the oxide semiconductor 30 is sandwiched between a pair of hydrogen-blocking insulators. The following description focuses on the parts that differ from the descriptions of <Structural Example 1> and <Structural Example 2>. For overlapping parts, reference is made to the above description, and their description may be omitted.
[0125] Reference Figure 6A Another example of the structure of one embodiment of the present invention will be described. Figure 6A This is a cross-sectional view of a structure according to one embodiment of the present invention.
[0126] Figure 6A The structure shown includes an insulator 21, an oxide semiconductor 30 on the insulator 21, an insulator 51 on the oxide semiconductor 30, an insulator 52 on the insulator 51, and a conductor 60 on the insulator 52. Figure 6A The structure shown can also be said to be a laminate.
[0127] The oxide semiconductor 30 can be used as a semiconductor layer of a transistor, for example. In this case, the conductor 60 can be used as the gate electrode of the transistor. Alternatively, the insulators 51 and 52 can be used as the gate insulating film of the transistor. Furthermore, at least a portion of the region of the oxide semiconductor 30 that overlaps with the conductor 60 can be used as a channel formation region.
[0128] The oxide semiconductor 30 is provided between the insulator 21 and the insulator 52. As described above, hydrogen-blocking insulators are preferably used for the insulators 21 and 52. Thus, the oxide semiconductor 30 can be sandwiched between the hydrogen-blocking insulators. Therefore, diffusion of hydrogen from above the insulator 52 and below the insulator 21 into the oxide semiconductor 30 can be suppressed.
[0129] From the perspective of miniaturization or high integration of semiconductor devices and improvement of semiconductor device productivity, the thickness of insulator 21 and the thickness of insulator 52 are preferably within the range of the width of insulator 52 in the B1-B2 direction described in <Structural Example 1>.
[0130] In addition, Figure 6AIn the structure shown, an insulator 51 is provided between the oxide semiconductor 30 and the insulator 52. As described above, the insulator 51 is preferably an insulator that has the function of capturing or fixing hydrogen. This can reduce the hydrogen concentration in the oxide semiconductor 30 located between the insulator 21 and the insulator 52.
[0131] By adopting the above structure as a structure including an oxide semiconductor, an oxide semiconductor with low oxygen vacancies and impurities can be provided. Therefore, by using this structure in a transistor, the electrical characteristics of the transistor can be improved, thereby improving the reliability of the transistor.
[0132] Furthermore, when the structured body described above is used in a transistor, the formation of oxygen vacancies in the channel formation region and the diffusion of hydrogen into the channel formation region can be suppressed. This can suppress variations in the amount of oxygen vacancies and hydrogen concentration in the channel formation region across transistors. Consequently, variations in the electrical characteristics of the transistor can be reduced.
[0133] Figure 6A The structure shown is one in which the insulator 21 is in contact with the oxide semiconductor 30. Note that the present invention is not limited to this. When the oxide semiconductor 30 is sandwiched between hydrogen barrier insulators, the insulator 21 and the oxide semiconductor 30 may not be in contact.
[0134] For example, Figure 6B As shown, instead of the insulator 51, an insulator 22 may be provided between the insulator 21 and the oxide semiconductor 30. As described above, an insulator having the function of trapping or fixing hydrogen is preferably used as the insulator 22. Even with this structure, the hydrogen concentration in the oxide semiconductor 30 can be reduced.
[0135] In addition, if Figure 6C As shown in FIG. 5 , an insulator 22 may be provided as an insulator having a function of trapping or fixing hydrogen in addition to the insulator 51. By adopting such a structure, the hydrogen concentration in the oxide semiconductor 30 can be further reduced.
[0136] Note that in Figure 6C In the structure shown, a conductor may be provided below the insulator 21 . Figure 6DA cross-sectional view of a structure in which a conductor 15 is provided below an insulator 21 is shown. In this structure, when the oxide semiconductor 30 is used as a semiconductor layer of a transistor, the conductor 60 can be used as the first gate electrode of the transistor. In addition, the insulators 51 and 52 can be used as the first gate insulating film of the transistor. In addition, the conductor 15 can be used as the second gate electrode of the transistor. In addition, the insulators 21 and 22 can be used as the second gate insulating film of the transistor. In addition, at least a portion of the region of the oxide semiconductor 30 located between the conductor 60 and the conductor 15 can be used as a channel formation region.
[0137] When the oxide semiconductor 30 is used as a semiconductor layer of a transistor, as described in Structural Example 2, the potential applied to the conductor 15 and the potential applied to the conductor 60 can be changed independently of each other.
[0138] By using a structure according to one embodiment of the present invention in a semiconductor device, a semiconductor device having excellent electrical characteristics can be provided. Furthermore, a semiconductor device with high reliability can be provided. Furthermore, a semiconductor device with minimal variation in transistor electrical characteristics can be provided. Furthermore, a semiconductor device with high on-state current can be provided.
[0139] This embodiment mode can be combined with other embodiment modes as appropriate. In addition, in this specification, when a plurality of configuration examples are shown in one embodiment mode, the configuration examples can be combined as appropriate.
[0140] (Implementation Method 2) In this embodiment, referring to 7A to 14B An example of a semiconductor device according to one embodiment of the present invention will be described. The semiconductor device according to one embodiment of the present invention includes the structure described in Embodiment 1.
[0141] <Structural Example 1 of Semiconductor Device> Reference 7A to 7D An example of the structure of a semiconductor device according to one embodiment of the present invention will be described. 7A to 7D 2 are a plan view and a cross-sectional view of a semiconductor device including the transistor 200A. Figure 7A is a plan view of the semiconductor device. Figures 7B to 7D is a cross-sectional view of the semiconductor device. Figure 7B yes Figure 7A The cross-sectional view of the portion indicated by the dot-dash line A1-A2 in FIG. Figure 7C yes Figure 7A The cross-sectional view of the portion indicated by the dotted line A3-A4 in FIG. Figure 7A Some components are omitted in the plan view.
[0142] Note that arrows indicating the X direction, Y direction, and Z direction are sometimes attached in the drawings and other aspects of this specification. Note that in this specification and other aspects, the "X direction" refers to the direction along the X axis, and except for cases explicitly stated, the forward and reverse directions are sometimes not distinguished. The same applies to the "Y direction" and the "Z direction". In addition, the X direction, Y direction, and Z direction are directions that intersect with each other. For example, the X direction, Y direction, and Z direction are directions that are orthogonal to each other. In this specification and other aspects, the X direction, Y direction, or Z direction is sometimes referred to as the "first direction". In addition, the other one is sometimes referred to as the "second direction". In addition, the remaining one is sometimes referred to as the "third direction".
[0143] 7A to 7D The semiconductor device shown includes an insulator 210 on a substrate (not shown), a transistor 200A on the insulator 210, an insulator 280 on the insulator 210, and an insulator 283 on the transistor 200A. The insulator 210 serves as an interlayer film.
[0144] The transistor 200A includes a conductor 220 , a conductor 240 on an insulator 280 , an oxide semiconductor 230 , an insulator 251 on the oxide semiconductor 230 , an insulator 252 on the insulator 251 , and a conductor 260 on the insulator 252 .
[0145] like Figure 7B and Figure 7C As shown, openings 290 are provided in insulator 280 and conductor 240, reaching conductor 220. Here, the bottom of opening 290 is the top surface of conductor 220, and the sidewalls of opening 290 are the side surfaces of insulator 280 and conductor 240. Opening 290 includes both the openings of insulator 280 and the openings of conductor 240. In other words, the opening of insulator 280 in the region overlapping with conductor 220 is part of opening 290, while the opening of conductor 240 in the region overlapping with conductor 220 is another part of opening 290.
[0146] At least a portion of the components of the transistor 200A is disposed in the opening 290 . Specifically, the oxide semiconductor 230 , the insulator 251 , the insulator 252 , and the conductor 260 are disposed so that at least a portion thereof is located in the opening 290 .
[0147] Furthermore, the portions of the oxide semiconductor 230, the insulator 251, the insulator 252, and the conductor 260 that are arranged within the opening 290 are arranged to reflect the shape of the opening 290. Therefore, the oxide semiconductor 230 is arranged to cover the bottom and sidewalls of the opening 290, the insulator 251 is arranged to cover the oxide semiconductor 230, the insulator 252 is arranged to cover the insulator 251, and the conductor 260 is arranged to fit into a recess of the insulator 252 that reflects the shape of the opening 290.
[0148] In transistor 200A, the oxide semiconductor 230 is used as a semiconductor layer, the conductor 260 is used as a gate electrode, the insulator 251 and the insulator 252 are used as gate insulators, the conductor 220 is used as one of the source electrode and the drain electrode, and the conductor 240 is used as the other of the source electrode and the drain electrode.
[0149] As described above, oxide semiconductor 230 is provided inside the opening formed by insulator 280. Furthermore, in transistor 200A, one of the source and drain electrodes (here, conductor 220) is located at the bottom, while the other (here, conductor 240) is located at the top. Therefore, current flows in the vertical direction. In other words, a channel is formed along the side surfaces of the opening formed by insulator 280.
[0150] In the transistor 200A, a metal oxide (also referred to as an oxide semiconductor) serving as a semiconductor is preferably used for the oxide semiconductor 230 including the channel formation region. In this case, the transistor 200A is an OS transistor.
[0151] As described in Embodiment 1, the channel formation region of the OS transistor is preferably a high-resistance region with a low carrier concentration. Therefore, the channel formation region of the OS transistor is preferably i-type (intrinsic) or substantially i-type.
[0152] On the other hand, the source region and drain region of the OS transistor are preferably the following regions: Since there are more oxygen vacancies than in the channel formation region, V O The presence of more H or higher concentrations of impurities such as hydrogen, nitrogen, or metal elements increases the carrier concentration, thus lowering the resistance. That is, the source and drain regions of the OS transistor are preferably n-type regions with higher carrier concentrations and lower resistance than the channel formation region.
[0153] 7A to 7D The semiconductor device shown in the figure has an oxide semiconductor 230, an insulator 251, an insulator 252, and a conductor 260 sequentially provided inside the opening portion included in the insulator 280. In other words, 7A to 7D The semiconductor device shown includes a reference Figure 1C and Figure 1DTherefore, 7A to 7D The oxide semiconductor 230, the insulator 280, the insulator 251, the insulator 252, and the conductor 260 in the structure shown correspond to the oxide semiconductor 230 described in Embodiment 1. Figure 1C and Figure 1D The structure shown includes an oxide semiconductor 30 , an insulator 21 , an insulator 51 , an insulator 52 , and a conductor 60 .
[0154] As insulator 280, a hydrogen-blocking insulator is preferably used. As insulator 280, an insulator that can be used for insulator 21 described in Embodiment Mode 1 can be used. Furthermore, as insulator 251, an insulator having a function of capturing or fixing hydrogen is preferably used. As insulator 251, an insulator that can be used for insulator 51 described in Embodiment Mode 1 can be used. As insulator 252, a hydrogen-blocking insulator is preferably used. As insulator 252, an insulator that can be used for insulator 52 described in Embodiment Mode 1 can be used.
[0155] By adopting the above structure, a semiconductor device having excellent electrical characteristics can be provided. Furthermore, a semiconductor device having high reliability can be provided. Furthermore, a semiconductor device having minimal variation in the electrical characteristics of the transistors can be provided. Furthermore, a semiconductor device having high on-state current can be provided.
[0156] The sidewalls of the opening 290 are preferably perpendicular to the top surface of the insulator 210. By adopting such a structure, miniaturization or high integration of the semiconductor device can be achieved.
[0157] Note that in Figure 7B and Figure 7C The opening 290 is provided in such a manner that the sidewall of the opening 290 is perpendicular to the top surface of the insulator 210, but the present invention is not limited thereto. For example, the sidewall of the opening 290 may also be tapered. By making the sidewall of the opening 290 have a tapered shape, the coverage of the oxide semiconductor 230, the insulator 251 and the insulator 252, etc. can be improved, thereby reducing defects such as voids. When the sidewall of the opening 290 is tapered, for example, the angle formed by the side surface of the insulator 280 in the opening 290 and the top surface of the insulator 210 is preferably greater than 45 degrees and less than 90 degrees. Alternatively, it is preferably greater than 45 degrees and less than 75 degrees. Alternatively, it is preferably greater than 45 degrees and less than 65 degrees.
[0158] Alternatively, for example, the sidewall of the opening 290 may have an inverse tapered shape. In other words, the angle formed by the side surface of the insulator 280 and the top surface of the insulator 210 in the opening 290 may also be greater than 90 degrees.
[0159] The oxide semiconductor 230 includes a region in contact with the side surfaces of the conductor 240 in the opening 290 and a region in contact with at least a portion of the top surface of the conductor 240. Thus, since the oxide semiconductor 230 is in contact with not only the side surfaces but also the top surface of the conductor 240, the area in contact between the oxide semiconductor 230 and the conductor 240 can be increased. Furthermore, the oxide semiconductor 230 includes a region in contact with the top surface of the exposed conductor 220 in the opening 290 and a region in contact with the side surfaces of the insulator 280 in the opening 290.
[0160] like Figure 7B and Figure 7C As shown, a portion of the oxide semiconductor 230 is located outside the opening 290, that is, on the conductor 240. Figure 7B , the oxide semiconductor 230 is divided in the X direction, but the present invention is not limited thereto. For example, the oxide semiconductor 230 may extend in the X direction. Note that in this case, the oxide semiconductor 230 is also divided in the Y direction.
[0161] also, Figure 7C The structure shown is one in which the side edges of the oxide semiconductor 230 are located inside the side edges of the conductor 240. Note that the present invention is not limited to this. For example, a structure may be employed in which the side edges of the oxide semiconductor 230 and the side edges of the conductor 240 are aligned in the Y direction. Alternatively, a structure may be employed in which the side edges of the oxide semiconductor 230 are located outside the side edges of the conductor 240.
[0162] The insulator 251 is provided in contact with the top surface of the oxide semiconductor 230. The insulator 251 includes a region in contact with the top surface of the conductor 240, a region in contact with the side surface of the conductor 240, and a region in contact with the insulator 280.
[0163] The insulator 252 is in contact with the top surface of the insulator 251 .
[0164] like Figure 7B and Figure 7C As shown, a portion of insulator 251 and a portion of insulator 252 are located outside opening 290, that is, on conductor 240 and insulator 280. In this case, insulator 251 and insulator 252 preferably cover the side edges of oxide semiconductor 230. This prevents short circuits between conductor 260 and oxide semiconductor 230. Furthermore, insulator 251 and insulator 252 preferably cover the side edges of conductor 240. This prevents short circuits between conductor 260 and conductor 240.
[0165] The conductor 260 contacts the top surface of the insulator 252 .
[0166] like Figure 7B and Figure 7C As shown, a portion of the conductor 260 is located outside the opening 290, that is, on the conductor 240 and the insulator 280. Figure 7B As shown, the side ends of the conductor 260 are preferably located inside the side ends of the oxide semiconductor 230. This can prevent a short circuit between the conductor 260 and the oxide semiconductor 230. Furthermore, the side ends of the conductor 260 may be aligned with the side ends of the oxide semiconductor 230 or may be located outside the side ends of the oxide semiconductor 230.
[0167] exist Figure 7B and Figure 7C The conductor 260 is disposed so as to be embedded in the opening 290, but the present invention is not limited thereto. For example, the conductor 260 may have a recessed portion reflecting the shape of the opening 290, with a portion of the recessed portion located within the opening 290. In this case, the recessed portion may be filled with an inorganic insulating material or the like.
[0168] The conductor 240 includes an opening in a region overlapping with the conductor 220. Furthermore, the conductor 240 is preferably not provided within the opening included in the insulator 280. That is, the conductor 240 preferably does not include a region in contact with the side surface of the insulator 280 in the opening 290. By adopting this structure, the opening included in the conductor 240 and the opening included in the insulator 280 can be formed simultaneously. Furthermore, by adopting a structure in which the side surface of the conductor 240 in the opening 290 and the side surface of the insulator 280 in the opening 290 coincide with each other, the thickness distribution of the oxide semiconductor 230 provided within the opening 290 can be made uniform. Furthermore, separation of the oxide semiconductor 230 due to the step between the conductor 240 and the insulator 280 can be suppressed.
[0169] exist Figure 7B and Figure 7C In the figure, although a structure is shown in which the side surface of the conductor 240 in the opening 290 is consistent with the side surface of the insulator 280 in the opening 290, the present invention is not limited to this. For example, the side surface of the conductor 240 in the opening 290 and the side surface of the insulator 280 in the opening 290 may also be discontinuous. In addition, the inclination of the side surface of the conductor 240 in the opening 290 and the inclination of the side surface of the insulator 280 in the opening 290 may also be different from each other. In this case, for example, the angle formed by the side surface of the conductor 240 in the opening 290 and the top surface of the insulator 210 is preferably smaller than the angle formed by the side surface of the insulator 280 in the opening 290 and the top surface of the insulator 210. By adopting this structure, the coverage of the side surface of the conductor 240 in the opening 290 by the oxide semiconductor 230 is improved, and defects such as voids can be reduced.
[0170] The oxide semiconductor 230 includes a first region, a second region, and a third region provided so as to sandwich the first region.
[0171] The second region is a region in contact with the conductor 220 of the oxide semiconductor 230. At least a portion of the second region is used as one of the source region and the drain region of the transistor 200A. The third region is a region in contact with the conductor 240 of the oxide semiconductor 230. At least a portion of the third region is used as the other of the source region and the drain region of the transistor 200A.
[0172] The first region is a region between the second region and the third region of the oxide semiconductor 230. At least a portion of the first region is used as a channel formation region of the transistor 200A. In other words, the channel formation region of the transistor 200A is located in the region between the conductor 220 and the conductor 240 of the oxide semiconductor 230. Alternatively, the channel formation region of the transistor 200A can be said to be located in a region of the oxide semiconductor 230 that contacts the insulator 280 or in a region near the insulator 280.
[0173] Here, Figure 7D 2 shows a cross-sectional view of the XY plane including the insulator 280. Figure 7D As shown, the insulator 280 is in contact with the entire periphery of the oxide semiconductor 230. Therefore, the channel formation region of the transistor 200A may be formed on the entire periphery of the portion of the oxide semiconductor 230 formed in the same layer as the insulator 280. Figure 7D It can also be said to be a cross-sectional view taken along the XY plane including the channel formation region of the oxide semiconductor 230 .
[0174] The channel length of the transistor 200A is the distance between the source region and the drain region. In other words, the channel length of the transistor 200A is determined by the thickness of the insulator 280 on the conductor 220. Figure 7B , the dotted double-headed arrow indicates the channel length L of the transistor 200A. When viewed in cross section, the channel length L is the distance from the end of the region where the oxide semiconductor 230 contacts the conductor 220 to the end of the region where the oxide semiconductor 230 contacts the conductor 240. In other words, the channel length L corresponds to the length of the side surface of the insulator 280 on the side of the opening 290 when viewed in cross section.
[0175] In planar transistors, the channel length is limited by the exposure limit of photolithography, making further miniaturization difficult. However, in the present invention, the channel length can be set according to the thickness of insulator 280. Therefore, the channel length of transistor 200A can be set to a very fine structure below the exposure limit of photolithography (for example, less than 60nm, less than 50nm, less than 40nm, less than 30nm, less than 20nm, or less than 10nm and greater than 0.1nm, greater than 1nm, or greater than 5nm). As a result, the on-state current of transistor 200A becomes larger, thereby improving the frequency characteristics.
[0176] Furthermore, as described above, a channel formation region, a source region, and a drain region can be formed in the opening 290. Therefore, compared to a planar transistor in which the channel formation region, source region, and drain region are provided separately on the XY plane, the area occupied by the transistor 200A can be reduced. This allows for high integration of semiconductor devices. Furthermore, when a semiconductor device according to one embodiment of the present invention is used in a memory device, the storage capacitor per unit area can be increased.
[0177] In addition, if Figure 7D As shown, the oxide semiconductor 230, the insulator 251, the insulator 252 and the conductor 260 are arranged in a concentric circle shape. Therefore, the side surface of the conductor 260 arranged in the center is opposite to the side surface of the oxide semiconductor 230 via the insulator 251 and the insulator 252. In other words, the entire circle of the oxide semiconductor 230 becomes a channel formation region when viewed from above. At this time, for example, the channel width of the transistor 200A is determined by the length of the outer periphery of the oxide semiconductor 230. That is, it can be said that the channel width of the transistor 200A is determined by the size of the maximum width of the opening 290 (the diameter when the shape of the opening 290 when viewed from above is circular). In Figure 7B and Figure 7D In FIG, the double-dot chain line double arrow indicates the maximum width D of the opening 290. Figure 7D In FIG, a double-dot chain arrow indicates the channel width W of the transistor 200A. By increasing the maximum width D of the opening 290, the channel width per unit area can be increased, thereby increasing the on-state current.
[0178] When the opening 290 is formed using photolithography, the maximum width D of the opening 290 is set based on the exposure limit of the photolithography. Furthermore, the maximum width D of the opening 290 is set based on the thicknesses of the oxide semiconductor 230, the insulator 251, the insulator 252, and the conductor 260 provided in the opening 290. The maximum width D of the opening 290 is preferably, for example, not less than 5 nm, not less than 10 nm, or not less than 20 nm and not more than 100 nm, not more than 60 nm, not more than 50 nm, not more than 40 nm, or not more than 30 nm. Note that when the opening 290 is circular in plan view, the maximum width D of the opening 290 corresponds to the diameter of the opening 290, and the channel width W can be calculated as "D×π."
[0179] In the semiconductor device of one embodiment of the present invention, the channel length L of the transistor 200A is preferably smaller than at least the channel width W of the transistor 200A. The channel length L of the transistor 200A of one embodiment of the present invention is not less than 0.1 times and not more than 0.99 times, and preferably not less than 0.5 times and not more than 0.8 times, the channel width W of the transistor 200A. By adopting this structure, a transistor with excellent electrical characteristics and high reliability can be realized.
[0180] Furthermore, by forming the opening 290 to have a circular shape in plan view, the oxide semiconductor 230, the insulator 251, the insulator 252, and the conductor 260 are arranged concentrically. This makes the distance between the conductor 260 and the oxide semiconductor 230 substantially uniform, allowing a substantially uniform gate electric field to be applied to the oxide semiconductor 230.
[0181] Note that while this embodiment shows an example in which the shape of the opening 290 when viewed from above is circular, the present invention is not limited to this. For example, the shape of the opening 290 when viewed from above may also be a substantially circular shape such as an ellipse, a polygon such as a square, or a polygon such as a square with curved corners. In this case, the maximum width of the opening 290 is preferably calculated based on the shape of the uppermost portion of the opening 290. For example, if the opening is a square when viewed from above, the maximum width of the opening 290 is preferably calculated as the length of the diagonal line of the uppermost portion of the opening 290.
[0182] As the oxide semiconductor 230 , a metal oxide described in the later-described “Metal Oxide” can be used in a single layer or in a stacked layer.
[0183] Specifically, the oxide semiconductor 230 may be a metal oxide having a composition of In:M:Zn = 1:3:2 (atomic ratio) or a composition close thereto, In:M:Zn = 1:3:4 (atomic ratio) or a composition close thereto, In:M:Zn = 1:1:0.5 (atomic ratio) or a composition close thereto, In:M:Zn = 1:1:1 (atomic ratio) or a composition close thereto, In:M:Zn = 1:1:1.2 (atomic ratio) or a composition close thereto, In:M:Zn = 1:1:2 (atomic ratio) or a composition close thereto, or In:M:Zn = 4:2:3 (atomic ratio) or a composition close thereto. Note that the composition close thereto falls within a range of ±30% of the desired atomic ratio. As the element M, one or more of gallium, aluminum, and tin are preferably used.
[0184] In addition, the oxide semiconductor 230 may not contain the element M. For example, In-Zn oxide may be used as the metal oxide used as the oxide semiconductor 230. Specifically, the oxide semiconductor 230 may have a composition of In:Zn=1:1 [atomic ratio] or a composition close thereto, or In:Zn=4:1 [atomic ratio] or a composition close thereto. Indium oxide may also be used as the oxide semiconductor 230. Furthermore, the oxide semiconductor 230 may also contain a trace amount of the element M. For example, specifically, the oxide semiconductor 230 may have a composition of In:Sn:Zn=4:0.1:1 [atomic ratio] or a composition close thereto.
[0185] As an analysis of the composition of the metal oxide used for the oxide semiconductor 230, for example, energy dispersive X-ray spectroscopy (EDX), X-ray photoelectron spectroscopy (XPS), inductively coupled plasma mass spectrometry (ICP-MS) or inductively coupled plasma atomic emission spectrometry (ICP-AES) can be used. Alternatively, a combination of multiple methods can be used for analysis. Note that elements with low content are sometimes affected by the analysis accuracy, and the actual content is different from the content obtained by analysis. For example, when the content of element M is low, the content of element M obtained by analysis is sometimes lower than the actual content.
[0186] The metal oxide can be formed using sputtering or atomic layer deposition (ALD) as appropriate. Note that when forming the metal oxide using sputtering, the composition of the formed metal oxide may differ from that of the sputtering target. In particular, the zinc content of the formed metal oxide may be reduced to approximately 50% of that of the sputtering target.
[0187] Examples of the ALD method include a thermal ALD method in which a precursor and a reactant react using only thermal energy, and a plasma ALD method (PEALD: Plasma Enhanced ALD) method using a reactant excited by plasma.
[0188] The ALD method can deposit atoms layer by layer, so it has the effects of being able to deposit extremely thinly, being able to deposit on structures with high aspect ratios or surfaces with large steps, being able to deposit in a manner with few defects such as pinholes, being able to deposit with high coverage, and being able to deposit at low temperatures. In addition, in the PEALD method, deposition can be performed at lower temperatures by utilizing plasma, so it is sometimes preferred. In addition, the precursors used in the ALD method sometimes contain elements such as carbon or chlorine. Therefore, the film set by the ALD method sometimes contains more elements such as carbon or chlorine than the film set by other deposition methods. In addition, the quantification of these elements can be performed using XPS or SIMS. Note that in one embodiment of the present invention, the ALD method is used in the deposition method of the metal oxide, because the substrate temperature is high during deposition and one or both of the impurity removal treatment are performed, the amount of carbon and chlorine in the film is sometimes less than when the ALD method is used without these conditions.
[0189] The ALD method is different from the deposition method of the particles released from the target material, etc., and is a deposition method of the shape deposition due to the reaction on the surface of the processed object. Therefore, the ALD method is a deposition method that is not easily affected by the shape of the processed object and has high step coverage. In particular, the ALD method has good step coverage and thickness uniformity, so the ALD method is suitable for forming a film on the surface of the opening portion with a high aspect ratio. However, the deposition rate of the ALD method is relatively slow, so it is sometimes preferably used in combination with other deposition methods such as sputtering or CVD methods with fast deposition rates. For example, when the metal oxide adopts a laminated structure of the first metal oxide and the second metal oxide, a method of depositing the first metal oxide using the sputtering method and depositing the second metal oxide on the first metal oxide using the ALD method can be cited. For example, when the above-mentioned first metal oxide has a crystalline portion, the above-mentioned second metal oxide sometimes carries out crystal growth with the crystalline portion as the core.
[0190] The ALD method can control the composition of the obtained film according to the amount of source gas introduced. For example, when the ALD method is used, a film of any composition can be deposited by adjusting the amount of source gas introduced, the number of introductions (also called the number of pulses), and the time required for one pulse (also called the pulse time). In addition, for example, when the ALD method is used, a film whose composition continuously changes can be deposited by changing the source gas while deposition is performed. When deposition is performed while changing the source gas, since the time required for conveying and adjusting the pressure is not required, the deposition time can be shortened compared to the case where deposition is performed using multiple deposition chambers. Therefore, the productivity of semiconductor devices can sometimes be improved.
[0191] Note that there is no particular limitation on the method for depositing the oxide semiconductor film to be the oxide semiconductor 230. For example, the oxide semiconductor film can be deposited using CVD, MBE, PLD, or the like.
[0192] The oxide semiconductor 230 is preferably crystalline. Examples of crystalline oxide semiconductors include CAAC-OS (c-axis aligned crystalline oxide semiconductor), nc-OS (nanocrystalline oxide semiconductor), polycrystalline oxide semiconductors, and single crystal oxide semiconductors. CAAC-OS or nc-OS is preferably used as the oxide semiconductor 230, with CAAC-OS being particularly preferred.
[0193] The CAAC-OS preferably has multiple layered crystal regions with their c-axes oriented in the normal direction of the surface on which they are formed. For example, the oxide semiconductor 230 preferably has layered crystals that are roughly parallel to the sidewalls of the opening 290, and particularly, layered crystals that are roughly parallel to the side surfaces of the insulator 280. By adopting this structure, the layered crystals of the oxide semiconductor 230 are roughly parallel to the channel length direction of the transistor, thereby increasing the on-state current of the transistor.
[0194] CAAC-OS has a dense structure with high crystallinity and is a metal oxide with few impurities and defects (e.g., oxygen vacancies). In particular, by heat-treating the metal oxide after formation at a temperature at which the metal oxide does not undergo polycrystallization (e.g., 400°C to 600°C), CAAC-OS can be given a dense structure with even higher crystallinity. By further increasing the density of CAAC-OS, the diffusion of impurities or oxygen in the CAAC-OS can be further reduced.
[0195] Furthermore, CAAC-OS rarely has clear grain boundaries, making it less likely to cause a drop in electron mobility due to these boundaries. Consequently, metal oxides containing CAAC-OS have stable physical properties. Consequently, metal oxides containing CAAC-OS are heat-resistant and highly reliable.
[0196] Furthermore, when a crystalline oxide such as CAAC-OS is used as the oxide semiconductor 230, oxygen can be suppressed from being extracted from the oxide semiconductor 230 via the source electrode or the drain electrode. Therefore, even during heat treatment, oxygen extraction from the oxide semiconductor 230 is suppressed, and the transistor is stable to the high temperatures (so-called thermal budget) experienced during the manufacturing process.
[0197] The crystallinity of the oxide semiconductor 230 can be analyzed, for example, by X-ray diffraction (XRD), transmission electron microscopy (TEM), or electron diffraction (ED), or a combination of these methods.
[0198] When the oxide semiconductor 230 is in contact with the conductor 220, a metal compound or oxygen vacancies are formed, thereby reducing the resistance of the second region of the oxide semiconductor 230. When the oxide semiconductor 230 in contact with the conductor 220 is reduced in resistance, the contact resistance between the oxide semiconductor 230 and the conductor 220 can be reduced. Similarly, when the oxide semiconductor 230 is in contact with the conductor 240, the third region of the oxide semiconductor 230 is reduced in resistance. Consequently, the contact resistance between the oxide semiconductor 230 and the conductor 240 can be reduced.
[0199] Note that in Figure 7B and Figure 7C The oxide semiconductor 230 is shown as a single-layer structure, but the present invention is not limited to this. The oxide semiconductor 230 may also have a stacked structure of multiple oxide layers having different chemical compositions. For example, multiple metal oxides selected from the metal oxides described in the following section may be appropriately stacked.
[0200] For example, Figure 8A As shown, the oxide semiconductor 230 may have a stacked-layer structure of an oxide semiconductor 230 a and an oxide semiconductor 230 b on the oxide semiconductor 230 a .
[0201] The conductivity of the material used for the oxide semiconductor 230 a is preferably different from the conductivity of the material used for the oxide semiconductor 230 b .
[0202] For example, the oxide semiconductor 230a may be made of a material having higher conductivity than the oxide semiconductor 230b. By using a material having higher conductivity for the conductor 220 serving as the source electrode or the drain electrode and the oxide semiconductor 230a in contact with the conductor 240, the contact resistance between the oxide semiconductor 230 and the conductor 220 and the contact resistance between the oxide semiconductor 230 and the conductor 240 can be reduced, thereby realizing a transistor with a large on-state current.
[0203] Here, when a material with high conductivity is used for the oxide semiconductor 230b provided on one side of the conductor 260 serving as the gate electrode, this sometimes causes a drift in the threshold voltage of the transistor, thereby increasing the drain current (hereinafter also referred to as the cutoff current) flowing when the gate voltage is 0V. Specifically, when the transistor 200A is an n-channel transistor, the threshold voltage is sometimes reduced. Therefore, the oxide semiconductor 230b preferably uses a material with lower conductivity than the oxide semiconductor 230a. Thus, when the transistor 200A is an n-channel transistor, the threshold voltage can be increased, and a transistor with a small cutoff current can be realized. Note that sometimes a small cutoff current is recorded as normally closed.
[0204] By making the oxide semiconductor 230 have a stacked structure and using a material having higher conductivity than the oxide semiconductor 230b for the oxide semiconductor 230a, a normally-off transistor with a large on-state current can be realized.
[0205] Furthermore, the carrier concentration of the oxide semiconductor 230a is preferably higher than that of the oxide semiconductor 230b. Increasing the carrier concentration of the oxide semiconductor 230a increases conductivity, thereby reducing the contact resistance between the oxide semiconductor 230 and the conductor 220 and the contact resistance between the oxide semiconductor 230 and the conductor 240, thereby realizing a transistor with a large on-state current. Reducing the carrier concentration of the oxide semiconductor 230b reduces conductivity, thereby realizing a normally-off transistor.
[0206] While an example is shown here in which a material having a higher conductivity than the oxide semiconductor 230b is used for the oxide semiconductor 230a, one embodiment of the present invention is not limited thereto. The oxide semiconductor 230a may also be made of a material having a lower conductivity than the oxide semiconductor 230b. The carrier concentration of the oxide semiconductor 230a may be lower than that of the oxide semiconductor 230b.
[0207] The band gap of the first metal oxide used in the oxide semiconductor 230a is preferably different from the band gap of the second metal oxide used in the oxide semiconductor 230b. For example, the difference between the band gaps of the first metal oxide and the second metal oxide is preferably 0.1 eV or more, more preferably 0.2 eV or more, and even more preferably 0.3 eV or more.
[0208] The band gap of the first metal oxide used in oxide semiconductor 230a can be smaller than the band gap of the second metal oxide used in oxide semiconductor 230b. This can reduce the contact resistance between oxide semiconductor 230 and conductor 220, and the contact resistance between oxide semiconductor 230 and conductor 240, thereby realizing a transistor with a large on-state current. In addition, if transistor 200A is an n-channel transistor, the threshold voltage can be increased, thereby realizing a normally-off transistor.
[0209] Here, an example is shown in which the band gap of the first metal oxide is smaller than the band gap of the second metal oxide, but the present invention is not limited thereto. The band gap of the first metal oxide may be larger than the band gap of the second metal oxide.
[0210] As described above, the band gap of the first metal oxide used for the oxide semiconductor 230a can be smaller than the band gap of the second metal oxide used for the oxide semiconductor 230b. The composition of the first metal oxide is preferably different from the composition of the second metal oxide. By making the composition of the first metal oxide different from that of the second metal oxide, the band gap can be controlled. For example, the content of the element M of the first metal oxide is preferably lower than the content of the element M of the second metal oxide. Specifically, in the case where the first metal oxide and the second metal oxide are In-M-Zn oxides, the first metal oxide can be set to a composition of In:M:Zn=1:1:1 [atomic number ratio] or a composition thereabout, and the second metal oxide can be set to a composition of In:M:Zn=1:3:2 [atomic number ratio] or a composition thereabout. As the element M, it is particularly preferred to use one or more of gallium, aluminum and tin.
[0211] The first metal oxide may not contain the element M. For example, the first metal oxide used for the oxide semiconductor 230a may be an In-Zn oxide, and the second metal oxide used for the oxide semiconductor 230b may be an In-M-Zn oxide. Specifically, the first metal oxide may be an In-Zn oxide, and the second metal oxide may be an In-Ga-Zn oxide. More specifically, the first metal oxide may have a composition of In:Zn = 1:1 [atomic ratio] or thereabouts, or In:Zn = 4:1 [atomic ratio] or thereabouts, and the second metal oxide may have a composition of In:Ga:Zn = 1:1:1 [atomic ratio] or thereabouts. In addition, the first metal oxide may also contain a trace amount of the element M. For example, specifically, the first metal oxide may have a composition of In:Sn:Zn = 4:0.1:1 [atomic ratio] or thereabouts.
[0212] Here, an example is shown in which the content of the element M in the first metal oxide is lower than the content of the element M in the second metal oxide, but one embodiment of the present invention is not limited to this. The content of the element M in the first metal oxide may also be higher than the content of the element M in the second metal oxide. Note that as long as the compositions of the first metal oxide and the second metal oxide are different, the contents of elements other than the element M in the first metal oxide and the second metal oxide may also be different.
[0213] The thickness of the oxide semiconductor 230 is preferably greater than or equal to 1 nm, greater than or equal to 3 nm, or greater than or equal to 5 nm, and less than or equal to 20 nm, less than or equal to 15 nm, less than or equal to 12 nm, or less than or equal to 10 nm.
[0214] The thickness of each layer constituting the oxide semiconductor 230 (here, the oxide semiconductor 230a and the oxide semiconductor 230b) can be determined so that the thickness of the oxide semiconductor 230 is within the above-mentioned range. The thickness of the oxide semiconductor 230a can be determined so that the contact resistance between the oxide semiconductor 230a and the conductor 220 and the contact resistance between the oxide semiconductor 230a and the conductor 240 are within the required range. In addition, the thickness of the oxide semiconductor 230b can be determined so that the threshold voltage of the transistor is within the required range. Note that the thickness of the oxide semiconductor 230a can be the same as or different from the thickness of the oxide semiconductor 230b.
[0215] Furthermore, the ratio of the thickness of the portion where the top surface of the conductor 240 is formed to the thickness of the portion where the side surfaces of the conductor 240 and the insulator 280 are formed may differ between the oxide semiconductor 230 a and the oxide semiconductor 230 b .
[0216] Figure 8AAlthough the oxide semiconductor 230 has an example of a stacked-layer structure of two layers, namely, the oxide semiconductor 230 a and the oxide semiconductor 230 b , the present invention is not limited thereto and may have a stacked-layer structure of three or more layers.
[0217] As an example, Figure 8B As shown, the oxide semiconductor 230 may also have a stacked structure of an oxide semiconductor 230a, an oxide semiconductor 230b on the oxide semiconductor 230a, and an oxide semiconductor 230c on the oxide semiconductor 230b. Figure 8A In the illustrated structure, an oxide semiconductor 230 c may be provided between the conductor 260 and the oxide semiconductor 230 b .
[0218] Furthermore, the atomic ratio of the element M to In in the metal oxide used for the oxide semiconductor 230a is preferably greater than the atomic ratio of the element M to In in the metal oxide used for the oxide semiconductor 230b. This structure can suppress the diffusion of impurities and oxygen from structures formed outside the oxide semiconductor 230a into the oxide semiconductor 230b. Furthermore, the diffusion of elements contained in the insulator 280, the conductor 220, or the conductor 240 into the oxide semiconductor 230b can be suppressed.
[0219] Note that the insulator 280 has a function of suppressing the diffusion of hydrogen and oxygen, so the oxide semiconductor 230a may not be provided. In this case, the oxide semiconductor 230 may have a stacked-layer structure of an oxide semiconductor 230b and an oxide semiconductor 230c on the oxide semiconductor 230b.
[0220] Furthermore, for example, when the oxide semiconductor film is deposited using a formation method that causes less damage to the insulator 280, the oxide semiconductor 230a may not be provided. For example, when the oxide semiconductor film to be the oxide semiconductor 230b is formed using an ALD method or a CVD method, the oxide semiconductor 230a may not be provided. When the oxide semiconductor film is deposited using an ALD method or a CVD method, damage to the insulator 280 is reduced, and diffusion of elements contained in the insulator 280 into the oxide semiconductor film can be suppressed.
[0221] When a material with high conductivity is used for the oxide semiconductor 230c provided on the side of the conductor 260 serving as the gate electrode, this may cause the threshold voltage of the transistor 200A to drift, thereby increasing the off-state current. Specifically, when the transistor 200A is an n-channel transistor, the threshold voltage may be reduced. Therefore, it is preferable to use a material with lower conductivity than the oxide semiconductor 230b for the oxide semiconductor 230c. As a result, when the transistor 200A is an n-channel transistor, the threshold voltage can be increased, and a transistor with low off-state current can be realized.
[0222] As described above, by using a material having higher conductivity than the oxide semiconductor 230c for the oxide semiconductor 230b, a normally-off transistor with a large on-state current can be realized. This makes it possible to realize a semiconductor device with low power consumption and high performance.
[0223] The carrier concentration of the oxide semiconductor 230b is preferably higher than that of the oxide semiconductor 230c. Increasing the carrier concentration of the oxide semiconductor 230b increases conductivity, thereby realizing a transistor with a large on-state current. Furthermore, decreasing the carrier concentration of the oxide semiconductor 230c decreases conductivity, thereby realizing a normally-off transistor.
[0224] While an example is shown here of using a material having a higher conductivity than the oxide semiconductor 230c for the oxide semiconductor 230b, one embodiment of the present invention is not limited thereto. A material having a lower conductivity than the oxide semiconductor 230c may be used for the oxide semiconductor 230b. The carrier concentration of the oxide semiconductor 230b may also be lower than that of the oxide semiconductor 230c.
[0225] The band gap of the second metal oxide used in the oxide semiconductor 230b is preferably different from the band gap of the third metal oxide used in the oxide semiconductor 230c. For example, the difference between the band gaps of the second metal oxide and the third metal oxide is preferably 0.1 eV or more, more preferably 0.2 eV or more, and even more preferably 0.3 eV or more.
[0226] The band gap of the second metal oxide used in oxide semiconductor 230b can be smaller than the band gap of the third metal oxide used in oxide semiconductor 230c. This can realize a transistor with a large on-state current. In addition, when transistor 200A is an n-channel transistor, the threshold voltage can be increased, thereby realizing a normally-off transistor.
[0227] Here, an example in which the band gap of the second metal oxide is smaller than the band gap of the third metal oxide is shown, but one embodiment of the present invention is not limited thereto. The band gap of the second metal oxide may be larger than the band gap of the third metal oxide.
[0228] In addition, the compositions of the first metal oxide used for the oxide semiconductor 230 a and the third metal oxide used for the oxide semiconductor 230 c may be the same or different.
[0229] For example, the oxide semiconductor 230a may use a metal oxide having an atomic ratio of In:Ga:Zn = 1:1:1 or a composition thereof. The oxide semiconductor 230b may use a metal oxide having an atomic ratio of In:Zn = 1:1 or a composition thereof, a metal oxide having an atomic ratio of In:Zn = 4:1 or a composition thereof, a metal oxide having an atomic ratio of In:Sn:Zn = 4:0.1:1 or a composition thereof, or an indium oxide. The oxide semiconductor 230c may use a metal oxide having an atomic ratio of In:Ga:Zn = 1:1:1 or a composition thereof, a metal oxide having an atomic ratio of In:Ga:Zn = 1:3:2 or a composition thereof, or a metal oxide having an atomic ratio of In:Ga:Zn = 1:3:4 or a composition thereof. By adopting such a structure, the on-state current of the transistor 200A can be increased, and a transistor structure with less variation and high reliability can be realized.
[0230] As described above, the insulator 251 preferably uses an insulator that has the function of capturing or fixing hydrogen. By providing the insulator 251, hydrogen contained in the oxide semiconductor 230 can be more efficiently captured or fixed. Therefore, the hydrogen concentration in the oxide semiconductor 230 can be reduced. As the insulator 251, for example, hafnium silicate is preferably used. In addition, the insulator 251 preferably has an amorphous structure. In addition, as the insulator 251, the insulators described in Embodiment 1 can also be used as a single layer or a stacked layer.
[0231] As described above, a hydrogen-blocking insulator is preferably used for the insulator 252. This can suppress diffusion of impurities contained in the conductor 260 into the oxide semiconductor 230. Silicon nitride has a high hydrogen-blocking property and is therefore preferably used for the insulator 252. In this case, the insulator 252 contains at least nitrogen and silicon. Alternatively, the insulators described in Embodiment 1 may be used as a single layer or a stacked layer as the insulator 252.
[0232] The thickness of the insulator 251 is preferably within the range of the width of the insulator 51 in the B1-B2 direction described in Embodiment 1. The thickness of the insulator 252 is preferably within the range of the width of the insulator 52 in the B1-B2 direction described in Embodiment 1.
[0233] A single layer or a stack of the conductors described in [Conductor] below can be used as the conductor 260. For example, a highly conductive material such as tungsten can be used as the conductor 260.
[0234] Furthermore, it is preferable to use a conductive material that is not easily oxidized or a conductive material that has the function of inhibiting oxygen diffusion as the conductor 260. Examples of such conductive materials include conductive materials containing nitrogen (e.g., titanium nitride or tantalum nitride) and conductive materials containing oxygen (e.g., ruthenium oxide). This can suppress a decrease in the conductivity of the conductor 260.
[0235] Note that in Figure 7B and Figure 7C The conductor 260 is shown as a single layer, but the present invention is not limited thereto. The conductor 260 may also have a stacked structure. For example, Figure 8A As shown, conductor 260 may also have a stacked structure comprising conductor 260a and conductor 260b on conductor 260a. In this case, for example, titanium nitride may be used as conductor 260a, and tungsten may be used as conductor 260b. Providing a layer containing tungsten in this manner improves the conductivity of conductor 260, allowing conductor 260 to fully function as wiring.
[0236] exist Figure 8A The conductor 260 has a two-layer laminate structure of the conductor 260a and the conductor 260b, but the present invention is not limited thereto and the conductor 260 may also have a laminate structure of three or more layers.
[0237] Conductors described in the section "Conductors" described later can be used as the conductor 220, either in a single layer or in a stacked layer. Conductive materials that are not easily oxidized or that inhibit oxygen diffusion are preferably used as the conductor 220. For example, titanium nitride or tantalum nitride can be used.
[0238] In addition, the conductor 220 has a region in contact with the oxide semiconductor 230, so it is preferable to use a conductive material containing oxygen in the [Conductor] described later. By using a conductive material containing oxygen as the conductor 220, the conductor 220 can maintain conductivity even if it absorbs oxygen. In addition, even if an insulator containing oxygen such as hafnium oxide is used as the insulator 210, the conductor 220 can maintain conductivity, so it is preferred. As the conductor 220, for example, indium tin oxide (also known as ITO), indium tin oxide with added silicon (also known as ITSO), indium zinc oxide (also known as IZO (registered trademark)), etc. can be used in a single layer or a stacked layer.
[0239] Note that in Figure 7B and Figure 7CThe conductor 220 is shown as a single layer, but the present invention is not limited thereto. The conductor 220 may also have a stacked structure. For example, Figure 8A As shown, the conductor 220 may also have a stacked structure of a conductor 220a and a conductor 220b on the conductor 220a.
[0240] In this case, for example, titanium nitride can be used as the conductor 220a, and tantalum nitride can be used as the conductor 220b. In this case, the titanium nitride is in contact with the insulator 210, and the tantalum nitride is in contact with the oxide semiconductor 230. This structure can suppress excessive oxidation of the conductor 220 by the oxide semiconductor 230. Furthermore, when an oxide insulator is used as the insulator 210, excessive oxidation of the conductor 220 by the insulator 210 can be suppressed. Alternatively, for example, titanium nitride can be used as the conductor 220a, and tungsten can be used as the conductor 220b.
[0241] In addition, the conductor 220 may also have a stacked structure of three or more layers, in which a conductor containing a metal element different from the conductor is stacked in a manner that sandwiches a conductor containing a material with high conductivity. For example, as a material with high conductivity, a conductive material mainly composed of tungsten, copper or aluminum can be cited. In addition, as a conductor sandwiching a conductor containing a material with high conductivity, it is preferred to use a conductive material that is not easily oxidized, a conductive material that has a function of inhibiting oxygen diffusion, or a conductive material containing oxygen. Specifically, tungsten can be used as a material with high conductivity, titanium nitride can be used as a conductive material that is not easily oxidized or a conductive material that has a function of inhibiting oxygen diffusion, and indium tin oxide with silicon added can be used as a conductive material containing oxygen. In this case, the conductor 220 has a stacked structure of titanium nitride, tungsten on titanium nitride, and indium tin oxide with silicon added on tungsten.
[0242] in addition, Figure 7B and Figure 7C The top surface of the conductor 220 is shown as a flat structure, but the present invention is not limited to this. Figure 8A As shown, a structure may also be employed in which a recessed portion overlapping the opening 290 is formed on the top surface of the conductor 220. By employing a structure in which the oxide semiconductor 230, the insulator 251, the insulator 252, and at least a portion of the conductor 260 are formed so as to be embedded in the recessed portion, the gate electric field of the conductor 260 can be easily applied to the vicinity of the conductor 220 in the oxide semiconductor 230. Furthermore, the contact area between the oxide semiconductor 230 and the conductor 220 can be increased, thereby reducing the contact resistance between the oxide semiconductor 230 and the conductor 220. Consequently, the on-state current of the transistor 200A can be increased.
[0243] As the conductor 240, the conductors described in [Conductor] described later can be used in a single layer or a stacked layer. For example, ruthenium is preferably used as the conductor 240. Ruthenium is a material with good contact resistance with the oxide semiconductor 230, so it can be used appropriately. In addition, since ruthenium oxide is also conductive, it has good conductivity even if its surface is oxidized during the manufacturing process, so it can be used appropriately.
[0244] Alternatively, for example, a highly conductive material such as tungsten may be used as the conductor 240 .
[0245] Alternatively, a conductive material that is not easily oxidized or that has a function of inhibiting oxygen diffusion may be used as the conductor 240. For example, titanium nitride or tantalum nitride may be used. This structure can prevent the conductor 240 from being excessively oxidized by the oxide semiconductor 230.
[0246] Note that in Figure 7B and Figure 7C The conductor 240 is shown as a single layer, but the present invention is not limited thereto. The conductor 240 may also have a stacked structure. For example, Figure 8A As shown, the conductor 240 may also have a stacked structure of a conductor 240 a and a conductor 240 b on the conductor 240 a .
[0247] In this case, for example, ruthenium may be used as the conductor 240a, and titanium nitride or tantalum nitride may be used as the conductor 240b. By providing a layer containing titanium nitride or tantalum nitride in this manner, the sheet resistance of the oxide semiconductor 230 in the region in contact with the layer may be reduced. In addition, the carrier concentration may be increased. Therefore, the oxide semiconductor 230 in the region in contact with the conductor 240 can be self-aligned to reduce resistance. As a result, a transistor with a large on-state current can be realized.
[0248] Alternatively, for example, ruthenium may be used as the conductor 240a, and indium zinc oxide may be used as the conductor 240b. By providing a layer containing indium zinc oxide in this manner, the sheet resistance of the oxide semiconductor 230 in the region in contact with the layer may be reduced. Furthermore, the carrier concentration may be increased. Consequently, the resistance of the oxide semiconductor 230 in the region in contact with the conductor 240 may be reduced in a self-aligned manner. Consequently, a transistor with a large on-state current may be realized.
[0249] Alternatively, for example, titanium nitride or tantalum nitride may be used as the conductor 240a, and tungsten may be used as the conductor 240b. Providing a layer containing tungsten in this manner improves the conductivity of the conductor 240, allowing it to fully function as a wiring.
[0250] Alternatively, for example, conductor 240a may be formed of a highly conductive material, and conductor 240b may be formed of a conductive material containing oxygen. Using a conductive material containing oxygen as conductor 240b, which contacts insulator 251, can suppress diffusion of oxygen from insulator 251 into conductor 240a. For example, it is preferable to use tungsten as conductor 240a and indium tin oxide doped with silicon as conductor 240b.
[0251] Since the insulator 210 is used as an interlayer film, its relative dielectric constant is preferably low. By using a material with a low relative dielectric constant for the interlayer film, the parasitic capacitance generated between the wirings can be reduced. As the insulator 210, an insulator containing a material with a low relative dielectric constant described in [Insulator] described later can be used in a single layer or a stacked layer. Silicon oxide and silicon oxynitride are preferably used because they have thermal stability. In addition, the impurity concentration of water, hydrogen, etc. in the insulator 210 is preferably reduced. As a result, it is possible to suppress the mixing of impurities such as water and hydrogen into the channel formation region of the oxide semiconductor 230.
[0252] As described above, a hydrogen-blocking insulator is preferably used as the insulator 280. This structure can suppress the diffusion of hydrogen into the oxide semiconductor 230. Furthermore, the concentration of impurities such as water and hydrogen in the insulator 280 is preferably reduced. This can suppress the infiltration of impurities such as water and hydrogen into the channel formation region of the oxide semiconductor 230. Furthermore, the insulators described in [Insulator] described later can be used as the insulator 280, either as a single layer or as a stacked layer.
[0253] A hydrogen-blocking insulator is preferably used for the insulator 283. This can suppress the diffusion of hydrogen from above the insulator 283 into the oxide semiconductor 230. Silicon nitride films and silicon oxynitride films are suitable for the insulator 283 because they each release little impurities (e.g., water and hydrogen) from the insulator itself and are less likely to permeate oxygen and hydrogen.
[0254] Silicon nitride deposited by sputtering is particularly preferably used as insulator 283. In this case, insulator 283 contains silicon and nitrogen. Since sputtering does not require the use of molecules containing hydrogen in the deposition gas, the hydrogen concentration of insulator 283 can be reduced. In addition, by depositing insulator 283 by sputtering, high-density silicon nitride can be formed.
[0255] Alternatively, an insulator capable of capturing or fixing hydrogen may be used as the insulator 283. This structure can suppress the diffusion of hydrogen from above the insulator 283 into the oxide semiconductor 230, and can capture or fix hydrogen contained in the oxide semiconductor 230. Consequently, the hydrogen concentration in the oxide semiconductor 230 can be reduced. Hafnium silicate or the like can be used as the insulator 283.
[0256] Alternatively, the insulator 283 may have a stacked structure of an insulator having a function of trapping or fixing hydrogen and a hydrogen blocking insulator. For example, the insulator 283 may be a stacked film of aluminum oxide and silicon nitride on the aluminum oxide.
[0257] 7A to 7D Although the insulator 280 is in contact with the oxide semiconductor 230 in the opening 290 , the present invention is not limited thereto. For example, an insulator capable of trapping or fixing hydrogen may be provided between the insulator 280 and the oxide semiconductor 230 .
[0258] 9A to 9D Another example of a semiconductor device according to one embodiment of the present invention is shown. Figure 9A is a plan view of a semiconductor device. Figures 9B to 9D is a cross-sectional view of the semiconductor device. Figure 9B It is along Figure 9A The cross-sectional view of the portion indicated by the dot-dash line A1-A2 in FIG. Figure 9C It is along Figure 9A A cross-sectional view of the portion indicated by the dashed line A3-A4 in FIG. Figure 9D is a cross-sectional view taken along the XY plane including the insulator 280. Note that for clarity, Figure 9A Some components are omitted in the plan view.
[0259] 9A to 9D The semiconductor device shown is 7A to 7D The difference of the semiconductor device shown is that it includes an insulator 223. 7A to 7D For parts of the description that differ in content, reference will be made to the above description for the overlapping parts, and the description thereof may be omitted.
[0260] like 9A to 9D As shown, the insulator 223 is provided between the insulator 280 and the oxide semiconductor 230. Furthermore, the portions of the insulator 223, the oxide semiconductor 230, the insulator 251, the insulator 252, and the conductor 260 that are located within the opening 290 are arranged to reflect the shape of the opening 290. Thus, the insulator 223 is provided to cover the side walls of the opening 290, the oxide semiconductor 230 is provided to cover the side surfaces of the insulator 223 and the bottom of the opening 290, the insulator 251 is provided to cover the oxide semiconductor 230, the insulator 252 is provided to cover the insulator 251, and the conductor 260 is provided to fit into a recess of the insulator 252 that reflects the shape of the opening 290.
[0261] 9A to 9DThe semiconductor device shown in the figure is provided with an insulator 223, an oxide semiconductor 230, an insulator 251, an insulator 252, and a conductor 260 in this order inside the opening portion included in the insulator 280. In other words, 9A to 9D The semiconductor device shown includes a reference Figure 4E and Figure 4F Therefore, 9A to 9D The oxide semiconductor 230, the insulator 280, the insulator 223, the insulator 251, the insulator 252, and the conductor 260 in the structure shown correspond to the semiconductor devices described in Embodiment 1. Figure 4E and Figure 4F The structure shown includes an oxide semiconductor 30 , an insulator 21 , an insulator 22 , an insulator 51 , an insulator 52 , and a conductor 60 .
[0262] The insulator 223 preferably uses an insulator that has a function of capturing or fixing hydrogen. As the insulator 223, the insulator that can be used for the insulator 22 described in Embodiment 1 can be used. Thus, the oxide semiconductor 230 can have a structure in which the oxide semiconductor 230 is sandwiched between insulators that have a function of capturing or fixing hydrogen (here, the insulator 251 and the insulator 223), and a hydrogen blocking insulator (here, the insulator 280) is provided outside the oxide semiconductor 230. This structure can suppress the diffusion of hydrogen into the oxide semiconductor 230, thereby further reducing the hydrogen concentration in the oxide semiconductor 230.
[0263] The thickness of the insulator 223 is preferably within the range of the width of the insulator 51 in the B1 - B2 direction described in the first embodiment.
[0264] Notice, 9A to 9D The insulator 223 is provided between the insulator 280 and the oxide semiconductor 230. Note that the present invention is not limited to this as long as the insulator 223 is provided in contact with the oxide semiconductor 230 or provided near the oxide semiconductor 230.
[0265] 10A to 10D Another example of a semiconductor device according to one embodiment of the present invention is shown. Figure 10A is a plan view of a semiconductor device. FIG. 10B to FIG. 10D is a cross-sectional view of the semiconductor device. Figure 10B yes Figure 10A The cross-sectional view of the portion indicated by the dot-dash line A1-A2 in FIG. Figure 10C yes Figure 10A The cross-sectional view of the portion indicated by the dot-dash line A3-A4 in FIG. Figure 10D is a cross-sectional view taken along the XY plane including the insulator 280. Figure 10A Some components are omitted in the plan view.
[0266] 10A to 10D The semiconductor device shown is 7A to 7D The difference of the semiconductor device shown is that the insulator 222 is provided between the insulator 210 and the insulator 280 and the conductor 220. 7A to 7D or 9A to 9D For parts that are different from the description, reference will be made to the parts that are repeated, and the description will be omitted.
[0267] like Figure 10A and Figure 10D As shown, the insulator 222 is disposed on the insulator 210 and below the insulator 280 and the conductor 220. In other words, the insulator 222 is disposed on the insulator 210, and the conductor 220 and the insulator 280 are disposed on the insulator 222.
[0268] An insulator having a function of capturing or fixing hydrogen is preferably used as the insulator 222. Similar to the insulator 223, the insulator 222 that can be used for the insulator 22 described in Embodiment 1 can be used. With this structure, hydrogen in the oxide semiconductor 230 diffuses through the conductor 220 into the insulator 222, where it can be captured or fixed. Consequently, the hydrogen concentration in the oxide semiconductor 230 can be reduced.
[0269] Note that in Figure 10A and Figure 10D , a single layer of conductor 240 is shown, but the present invention is not limited thereto. Figures 11A to 11C As shown, the conductor 240 may have a two-layer stacked structure of the conductor 240a and the conductor 240b. Alternatively, the conductor 240 may have a three-layer stacked structure or more.
[0270] Note that in Figure 10A and Figure 10D , a single layer of conductor 220 is shown, but the present invention is not limited thereto. Figures 11A to 11C As shown, the conductor 220 may have a two-layer stacked structure of the conductor 220a and the conductor 220b. Alternatively, the conductor 220 may have a three-layer or more stacked structure.
[0271] 9A to 9D Although the insulator 223 is provided between the insulator 280 and the oxide semiconductor 230 , the present invention is not limited thereto. For example, an insulator capable of trapping or fixing hydrogen and a hydrogen blocking insulator may be provided between the insulator 280 and the oxide semiconductor 230 .
[0272] 12A to 12D Another example of a semiconductor device according to one embodiment of the present invention is shown. Figure 12A is a plan view of a semiconductor device. 12B to 12D is a cross-sectional view of the semiconductor device. Figure 12B It is along Figure 12A A cross-sectional view of the portion along the dotted line A1-A2 in FIG. Figure 12C It is along Figure 12A The cross-sectional view of the portion along the dot-dash line A3-A4 in FIG. Figure 12D is a cross-sectional view of the XY plane including the insulator 280. Note that Figure 12A In the plan view, some components are omitted for clarity.
[0273] 12A to 12D The semiconductor device shown is 9A to 9D The semiconductor device shown is different in that it includes an insulator 221. In addition, 12A to 12D The semiconductor device shown is 7A to 7D The difference between the semiconductor device shown is that it includes an insulator 221 and an insulator 223. 7A to 7D or 9A to 9D For parts of the description that differ in content, reference will be made to the above description for the overlapping parts, and the description thereof may be omitted.
[0274] like 12A to 12D As shown, insulator 221 is provided between insulator 280 and insulator 223. Furthermore, the portions of insulator 221, insulator 223, oxide semiconductor 230, insulator 251, insulator 252, and conductor 260 that are located within opening 290 are arranged to reflect the shape of opening 290. Therefore, insulator 221 is provided to cover the side walls of opening 290, insulator 223 is provided to cover the side surfaces of insulator 221, oxide semiconductor 230 is provided to cover the side surfaces of insulator 223 and the bottom of opening 290, insulator 251 is provided to cover oxide semiconductor 230, insulator 252 is provided to cover insulator 251, and conductor 260 is provided to fit into a recess of insulator 252 that reflects the shape of opening 290.
[0275] A hydrogen-blocking insulator is preferably used as the insulator 221. Thus, the oxide semiconductor 230 can have a structure in which the oxide semiconductor 230 is sandwiched between insulators capable of capturing or fixing hydrogen (here, the insulator 251 and the insulator 223), and a hydrogen-blocking insulator (here, the insulator 221) is provided outside the oxide semiconductor 230. This structure suppresses the diffusion of hydrogen into the oxide semiconductor 230, thereby further reducing the hydrogen concentration in the oxide semiconductor 230.
[0276] The thickness of the insulator 221 is preferably within the range of the width of the insulator 52 in the B1 - B2 direction described in the first embodiment.
[0277] For example, silicon nitride is preferably used as the insulator 221. Furthermore, silicon nitride that can be used for the insulator 221 also has oxygen barrier properties. Furthermore, the insulator 221 is in contact with the side surface of the conductor 240 in the opening 290. Therefore, by using silicon nitride as the insulator 221 in contact with the conductor 240, oxidation of the conductor 240 can be suppressed.
[0278] Note that in 12A to 12D In the structure shown, since insulator 221 has hydrogen barrier properties, the material used for insulator 280 is not limited to the material that can be used for insulator 21 described in Embodiment Mode 1. For example, insulator 280 can also be formed using a material with a low relative dielectric constant. By forming insulator 280 using a material with a low relative dielectric constant, insulator 280 can be used as an interlayer film. As a result, parasitic capacitance generated between wirings can be reduced.
[0279] at this time, 12A to 12D The semiconductor device shown includes a reference Figure 5A and Figure 5B Description of the structure. 12A to 12D The oxide semiconductor 230, the insulator 280, the insulator 221, the insulator 223, the insulator 251, the insulator 252, and the conductor 260 in the structure shown correspond to the semiconductor devices described in Embodiment 1. Figure 5A and Figure 5B The structure shown includes an oxide semiconductor 30 , an insulator 24 , an insulator 21 , an insulator 22 , an insulator 51 , an insulator 52 , and a conductor 60 .
[0280] Note that in 12A to 12D The insulator 280 is shown as a single layer, but the present invention is not limited thereto and may have a stacked structure.
[0281] 13A to 13D Another example of a semiconductor device according to one embodiment of the present invention is shown. Figure 13A is a plan view of a semiconductor device. 13B to 13D is a cross-sectional view of the semiconductor device. Figure 13B It is along Figure 13A The cross-sectional view of the portion indicated by the dot-dash line A1-A2 in FIG. Figure 13C It is along Figure 13A Note that for clarity, Figure 13A Some components are omitted in the plan view.
[0282] For example, 13A to 13CAs shown, the insulator 280 may also have a stacked structure of an insulator 280a, an insulator 280b on the insulator 280a, and an insulator 280c on the insulator 280b. Figure 13D is a cross-sectional view taken along the XY plane including the insulator 280 b .
[0283] Insulator 280a has a region in contact with the top surface of insulator 210, a region in contact with the side surface of conductor 220, and a region in contact with the top surface of conductor 220. Insulator 280c has a region in contact with the bottom surface of conductor 240.
[0284] exist 13A to 13D In the embodiment, since insulator 221 having hydrogen barrier properties is provided between insulator 280 and insulator 223, insulator 280b can also be formed using, for example, a material with a low relative dielectric constant. Using a material with a low relative dielectric constant for insulator 280b can reduce parasitic capacitance generated between wirings. Specifically, silicon oxide or silicon oxynitride can be used as insulator 280b, for example.
[0285] When an insulator containing oxygen is used as insulator 280b, insulators 280a and 280c preferably use oxygen-blocking insulators as described in [Insulators] below. Providing insulator 280a between insulator 280b and conductor 220 can prevent oxidation of conductor 220 and an increase in the resistance of conductor 220. Furthermore, providing insulator 280c between insulator 280b and conductor 240 can prevent oxidation of conductor 240 and an increase in the resistance of conductor 240.
[0286] Alternatively, the insulator 280a and the insulator 280c may use the hydrogen barrier insulator described in Embodiment 1. Thus, the insulator 280b can be surrounded by the hydrogen barrier insulator (here, the insulator 280a, the insulator 280c, and the insulator 221). Therefore, the hydrogen contained in the insulator 280b can be suppressed from diffusing into the oxide semiconductor 230. Since the silicon nitride film and the silicon oxynitride film each have the characteristics of releasing little impurities (e.g., water and hydrogen) from themselves and not easily permeating oxygen and hydrogen, they can be suitable for the insulator 280a and the insulator 280c. Note that the insulator 280a and the insulator 280c may be made of the same material or different materials.
[0287] Alternatively, an insulator having a function of capturing or fixing hydrogen may be used as the insulator 280a. By adopting such a structure, it is possible to suppress the diffusion of hydrogen from below the insulator 280a to the oxide semiconductor 230, and it is possible to capture or fix the hydrogen contained in the oxide semiconductor 230. Thus, the hydrogen concentration in the oxide semiconductor 230 can be reduced. As the insulator 280a, magnesium oxide, aluminum oxide, hafnium oxide, or an oxide containing hafnium and silicon may be used. Alternatively, for example, a stacked film of aluminum oxide and silicon nitride on the aluminum oxide may be used as the insulator 280a. Alternatively, an insulator having a function of capturing or fixing hydrogen may be used as the insulator 280c.
[0288] As an example, silicon nitride can be used as the insulator 280a and the insulator 280c, and silicon oxide can be used as the insulator 280b. In this case, the insulator 280a and the insulator 280c contain at least silicon and nitrogen. In addition, the insulator 280b contains at least silicon and oxygen.
[0289] In addition, Figure 13B and Figure 13C , a structure in which an insulator 280c is provided on a flattened insulator 280b is shown, but the present invention is not limited thereto. For example, the insulator 280c may be deposited without performing a flattening treatment on the insulator 280b. By not performing a flattening treatment, the yield rate can be improved while reducing manufacturing costs. In addition, the insulator 280a, the insulator 280b, and the insulator 280c can be continuously deposited without being exposed to the atmospheric environment. By depositing without being exposed to the atmospheric environment, impurities or moisture from the atmospheric environment can be prevented from adhering to the insulators 280a to 280c, thereby keeping the vicinity of the interface between the insulator 280a and the insulator 280b and the vicinity of the interface between the insulator 280b and the insulator 280c clean.
[0290] Notice, 13A to 13D The insulator 280 is shown to have a three-layer stacked structure, but the present invention is not limited thereto. The insulator 280 may have a two-layer stacked structure or a stacked structure of four or more layers.
[0291] Note that in 13A to 13D In the embodiment, the insulator 251 having the function of trapping or fixing hydrogen is provided in contact with the oxide semiconductor 230. Therefore, when the insulators 280a, 280c, and 252 have hydrogen barrier properties and the hydrogen concentration in the insulator 280b is sufficiently reduced, as shown in FIG. Figure 14A As shown, the insulator 221 and the insulator 223 may not be provided.
[0292] At this time, the insulator 280b is in contact with at least a portion of the oxide semiconductor 230. Furthermore, the insulator 280b is preferably an insulator containing oxygen. The insulator 280b preferably has a region containing a higher oxygen content than at least one of the insulators 280a and 280c. In particular, the insulator 280b preferably has a region containing a higher oxygen content than each of the insulators 280a and 280c. By increasing the oxygen content of the insulator 280b, an i-type region is easily formed in the oxide semiconductor 230 near the insulator 280b.
[0293] The insulator 280b is preferably a film that releases oxygen when heated. Due to the heat applied during the manufacturing process of the transistor 200A, the insulator 280b releases oxygen, and thus oxygen can be supplied to the oxide semiconductor 230. By supplying oxygen from the insulator 280b to the oxide semiconductor 230, especially to the channel formation region of the oxide semiconductor 230, oxygen vacancies in the oxide semiconductor 230 and V O H, a transistor with good electrical characteristics and high reliability can be realized.
[0294] In addition, as reference Figure 2 As described above, in order to improve the initial characteristics and reliability of the OS transistor, it is important to optimize the amount of oxygen supplied to the oxide semiconductor while sufficiently reducing the hydrogen concentration in the oxide semiconductor.
[0295] As an example, the amount of oxygen molecules released from the insulator 280b is preferably 1.0×10 14 molecules / cm 2 Above and below 1.0×10 15 molecules / cm 2 Note that the amount of oxygen molecules released can be measured using thermal desorption spectroscopy.
[0296] In particular, when the channel length of the transistor 200A is small, oxygen vacancies in the channel formation region and V O H has a particularly significant effect on electrical characteristics and reliability. Therefore, by optimizing the amount of oxygen supplied to the oxide semiconductor 230 while sufficiently reducing the hydrogen concentration in the oxide semiconductor 230, a transistor with a short channel length having good electrical characteristics and high reliability can be realized.
[0297] Insulator 280b is preferably formed using a deposition method such as sputtering or plasma-enhanced chemical vapor deposition (PECVD). In particular, when sputtering is used, a deposition method that does not use hydrogen gas as a deposition gas can be used to form a film with a very low hydrogen content. This prevents hydrogen from being supplied to semiconductor 230, thereby stabilizing the electrical characteristics of transistor 200A.
[0298] In order to increase the amount of oxygen supplied to the oxide semiconductor 230, for example, it is preferable to perform heat treatment in an oxygen-containing atmosphere or plasma treatment in an oxygen-containing atmosphere after forming the insulator 280 b. Alternatively, an oxide film may be deposited on the top surface of the insulator 280 b using a sputtering method in an oxygen atmosphere to supply oxygen. This oxide film may then be removed. By performing such a treatment, oxygen can be supplied to the insulator 280 b, thereby increasing the amount of oxygen supplied to the oxide semiconductor 230.
[0299] On the other hand, when reducing the amount of oxygen supplied to the oxide semiconductor 230, it is preferable to provide one or both of the insulator 221 and the insulator 223. With this structure, even when the amount of oxygen released from the insulator 280b is large, excessive oxygen supply to the oxide semiconductor 230 can be suppressed.
[0300] In addition, in the oxide semiconductor 230, the amount of oxygen supplied to the region in contact with the insulator 280a and the region in contact with the insulator 280c is smaller than that in contact with the insulator 280b. As a result, the region in contact with the insulator 280a and the region in contact with the insulator 280c of the oxide semiconductor 230 may have a lower resistance. That is, by adjusting the thickness of the insulator 280a, the range of the second region serving as one of the source region and the drain region can be controlled. Similarly, by adjusting the thickness of the insulator 280c, the range of the third region serving as the other of the source region and the drain region can be controlled. Therefore, the thickness of the insulator 280a and the insulator 280c can be appropriately set according to the characteristics required of the transistor 200A.
[0301] Figure 7B and Figure 7C The structure shown is one in which an insulator 251 and an insulator 252 are provided between the oxide semiconductor 230 and the conductor 260. In this case, the oxide semiconductor 230 has a region in contact with the insulator 251. In addition, the insulator 252 is provided between the conductor 260 and the insulator 251. Note that the present invention is not limited to this.
[0302] For example, Figure 14AAs shown, an insulator 253 may be provided between the oxide semiconductor 230 and the insulator 251 .
[0303] Insulator 253 is preferably made of a material with a low relative dielectric constant, as described in the "Insulator" section below. Silicon oxide and silicon oxynitride are particularly preferred due to their thermal stability. In this case, insulator 253 contains at least oxygen and silicon. This structure reduces parasitic capacitance between conductor 260 and conductor 240. Furthermore, the concentration of impurities such as water and hydrogen in insulator 253 is preferably reduced.
[0304] Furthermore, when the insulator 253 is provided, the insulator 252 preferably also has oxygen barrier properties. The insulator 252 is provided between the insulator 253 and the conductor 260. This prevents oxygen contained in the insulator 253 from diffusing into the conductor 260, thereby suppressing oxidation of the conductor 260. Furthermore, a decrease in the amount of oxygen supplied to the first region of the oxide semiconductor 230 can be suppressed.
[0305] In addition, for example, Figure 14B As shown, an insulator 254 may be further provided between the oxide semiconductor 230 and the insulator 253 .
[0306] The insulator 254 preferably uses an oxygen-blocking insulator described in [Insulator] to be described later. The insulator 254 has a region in contact with the oxide semiconductor 230. When the insulator 254 has oxygen-blocking properties, it is possible to suppress the detachment of oxygen from the oxide semiconductor 230 during heat treatment, etc. Therefore, the formation of oxygen vacancies in the oxide semiconductor 230 can be suppressed. As a result, the electrical characteristics of the transistor 200A can be improved, and the reliability can be improved. As the insulator 254, aluminum oxide is preferably used, for example. In this case, the insulator 254 contains at least oxygen and aluminum. In addition, aluminum oxide has the function of capturing or fixing hydrogen, so it is suitable for use as the insulator 254 in contact with the oxide semiconductor 230.
[0307] To achieve miniaturization of the transistor 200A, the thickness of the insulator 253 and the insulator 254 is preferably small. The thickness of the insulator 253 and the insulator 254 is preferably 0.1 nm to 10 nm, more preferably 0.1 nm to 5 nm, even more preferably 0.5 nm to 5 nm, even more preferably 1 nm to less than 5 nm, and even more preferably 1 nm to 3 nm. In this case, at least a portion of each of the insulators 253 and 254 may be a region having the aforementioned thickness.
[0308] Typically, the thicknesses of the insulator 254, the insulator 253, the insulator 251, and the insulator 252 are preferably 1 nm, 2 nm, 2 nm, and 1 nm, respectively.
[0309] In order to reduce the thickness of the insulators 251 to 254 as described above, it is preferable to deposit them using the ALD method. In addition, in order to provide the insulators 251 to 254 inside the opening 290, it is preferable to deposit them using the ALD method.
[0310] 7A to 7D The gate insulator has a two-layer stacked structure of an insulator 251 and an insulator 252. Figure 14A The gate insulator has a three-layer stacked structure of insulators 251 to 253. Figure 14B The gate insulator is shown as having a four-layer stacked structure of insulators 251 to 254, but the present invention is not limited thereto. The gate insulator may also have a single layer or a stacked structure of five or more layers. In this case, each layer of the gate insulator is preferably appropriately selected from insulators 251 to 254.
[0311] <Structural Materials of Semiconductor Devices> Hereinafter, constituent materials that can be used for semiconductor devices will be described.
[0312] [Substrate] As a substrate for forming a transistor, for example, an insulating substrate, a semiconductor substrate, or a conductive substrate can be used. Examples of insulating substrates include glass substrates, quartz substrates, sapphire substrates, stabilized zirconia substrates (such as yttria-stabilized zirconia substrates), and resin substrates. Furthermore, examples of semiconductor substrates include semiconductor substrates made of silicon or germanium, or compound semiconductor substrates made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, and gallium oxide. Furthermore, examples include semiconductor substrates having an insulating region within the above-mentioned semiconductor substrates, such as SOI (Silicon On Insulator) substrates. Examples of conductive substrates include graphite substrates, metal substrates, alloy substrates, and conductive resin substrates. Alternatively, examples include substrates containing metal nitrides and substrates containing metal oxides. Furthermore, examples include insulating substrates provided with conductors or semiconductors, semiconductor substrates provided with conductors or insulators, and conductive substrates provided with semiconductors or insulators. Alternatively, substrates provided with elements on these substrates can also be used. Examples of the element provided over the substrate include a capacitor, a resistor, a switching element, a light-emitting element, and a memory element.
[0313] [Insulator] Examples of the insulator include oxides, nitrides, oxynitrides, oxynitrides, metal oxides, metal oxynitrides, and metal oxynitrides having insulating properties.
[0314] For example, when carrying out miniaturization and high integration of transistors, due to the thin film of gate insulator, problems such as leakage current sometimes occur. By using high-k material as an insulator used as a gate insulator, it is possible to achieve low voltage when the transistor is working while maintaining physical thickness. In addition, the equivalent oxide thickness (EOT) of the insulator used as the gate insulator can be reduced. On the other hand, by using a material with low relative dielectric constant for an insulator used as an interlayer film, the parasitic capacitance generated between the wirings can be reduced. Therefore, it is preferred to select a material according to the function of the insulator. In addition, a material with low relative dielectric constant is also a material with high dielectric strength.
[0315] Examples of materials with a high relative dielectric constant (high-k) include aluminum oxide, gallium oxide, hafnium oxide, tantalum oxide, zirconium oxide, hafnium zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium.
[0316] As materials with low relative dielectric constants, for example, inorganic insulating materials such as silicon oxide, silicon oxynitride and silicon nitride oxide, resins such as polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate and acrylic resin can be cited. In addition, as inorganic insulating materials with low relative dielectric constants other than those mentioned above, for example, silicon oxide with fluorine added, silicon oxide with carbon added, and silicon oxide with carbon and nitrogen added can be cited. In addition, silicon oxide with pores can be cited. In addition, these silicon oxides can also contain nitrogen.
[0317] In addition, by surrounding a transistor using a metal oxide with an insulator that has the function of suppressing the transmission of impurities and oxygen, the electrical characteristics of the transistor can be stabilized. As an insulator that has the function of suppressing the transmission of impurities and oxygen, for example, a single layer or a stack of insulators containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum can be used. Specifically, as an insulator that has the function of suppressing the transmission of impurities and oxygen, metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide, and metal nitrides such as aluminum nitride, silicon oxynitride, and silicon nitride can be used.
[0318] Furthermore, an insulator in contact with a semiconductor, such as a gate insulator, or an insulator disposed near a semiconductor layer preferably has a region containing oxygen released by heating (hereinafter sometimes referred to as excess oxygen). For example, when an insulator having a region containing excess oxygen is in contact with a semiconductor layer, or when an insulator having a region containing excess oxygen is disposed near a semiconductor layer, oxygen vacancies in the semiconductor layer can be reduced. Examples of insulators that easily form regions containing excess oxygen include silicon oxide, silicon oxynitride, and silicon oxide having vacancies.
[0319] Examples of oxygen-blocking insulators include oxides containing one or both of aluminum and hafnium, oxides containing hafnium and silicon (hafnium silicate), magnesium oxide, gallium oxide, gallium zinc oxide, indium gallium zinc oxide, silicon nitride, and silicon oxynitride. Examples of oxides containing one or both of aluminum and hafnium include aluminum oxide, hafnium oxide, and oxides containing aluminum and hafnium (hafnium aluminate).
[0320] Regarding the hydrogen barrier insulator, the contents described in Embodiment Mode 1 can be referred to.
[0321] The oxygen-blocking insulator and the hydrogen-blocking insulator can be said to be insulators that block one or both of oxygen and hydrogen.
[0322] In addition, regarding the insulator having the function of capturing or fixing hydrogen, the contents described in Embodiment Mode 1 can be referred to.
[0323] [Conductor] As the conductor, it is preferred to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium and lanthanum, an alloy with the above metal elements as a component, or an alloy combining the above metal elements, etc. As the alloy with the above metal elements as a component, a nitride of the alloy or an oxide of the alloy can also be used. For example, tantalum nitride, titanium nitride, tungsten, a nitride comprising titanium and aluminum, a nitride comprising tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide comprising strontium and ruthenium, an oxide comprising lanthanum and nickel, etc. can be preferably used. In addition, a semiconductor with high conductivity represented by polycrystalline silicon containing impurity elements such as phosphorus and silicides such as nickel silicide can also be used.
[0324] In addition, a conductive material containing nitrogen such as a tantalum nitride, a titanium nitride, a molybdenum nitride, a tungsten nitride, a ruthenium nitride, a tantalum and aluminum nitride, or a titanium and aluminum nitride, a ruthenium oxide, an oxide of strontium and ruthenium, or an oxide of lanthanum and nickel, or a material containing metal elements such as titanium, tantalum or ruthenium is a conductive material that is not easily oxidized, a conductive material having a function of suppressing oxygen diffusion, or a material that maintains conductivity even when absorbing oxygen, so it is preferred. As a conductive material containing oxygen, indium oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide, indium tin oxide containing titanium oxide, indium tin oxide added with silicon, indium zinc oxide, and indium zinc oxide containing tungsten oxide can be cited. In this specification, etc., a conductive film deposited using a conductive material containing oxygen is sometimes referred to as an oxide conductive film.
[0325] Furthermore, conductive materials mainly composed of tungsten, copper, or aluminum are preferred because of their high conductivity.
[0326] Furthermore, a plurality of conductive layers formed from the above-mentioned materials may be stacked. For example, a laminated structure may be formed by combining a material containing the above-mentioned metal element with a conductive material containing oxygen. Alternatively, a laminated structure may be formed by combining a material containing the above-mentioned metal element with a conductive material containing nitrogen. Alternatively, a laminated structure may be formed by combining a material containing the above-mentioned metal element, a conductive material containing oxygen, and a conductive material containing nitrogen.
[0327] Furthermore, when a metal oxide is used in the channel formation region of a transistor, the conductor used as the gate electrode preferably has a stacked structure combining a material containing the aforementioned metal element and a conductive material containing oxygen. In this case, the conductive material containing oxygen is preferably positioned on the channel formation region side. By positioning the conductive material containing oxygen on the channel formation region side, oxygen released from the conductive material is more easily supplied to the channel formation region.
[0328] In particular, as a conductor used as a gate electrode, it is preferable to use a conductive material containing a metal element contained in the metal oxide forming the channel and oxygen. In addition, a conductive material containing the above-mentioned metal elements and nitrogen can also be used. For example, a conductive material containing nitrogen, such as titanium nitride or tantalum nitride, can also be used. In addition, one or more of indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and indium tin oxide added with silicon can also be used. In addition, indium gallium zinc oxide containing nitrogen can also be used. By using the above-mentioned materials, hydrogen in the metal oxide forming the channel can sometimes be captured. Alternatively, hydrogen mixed in from an external insulator can sometimes be captured.
[0329] [Metal oxides] Metal oxides sometimes have lattice defects. Lattice defects include point defects such as atomic vacancies and foreign atoms, line defects such as dislocations, surface defects such as grain boundaries, and volume defects such as voids. Lattice defects can also be caused by imbalances in the ratio of the number of constituent atoms (excess or deficiency of constituent atoms) and impurities.
[0330] When metal oxides are used in the semiconductor layers of transistors, lattice defects in the metal oxides can lead to carrier generation and trapping. Therefore, using metal oxides with many lattice defects in the semiconductor layers of transistors can lead to unstable electrical characteristics of the transistors. Therefore, metal oxides used in the semiconductor layers of transistors preferably have fewer lattice defects.
[0331] The type of lattice defects that are likely to exist in a metal oxide and the amount of the lattice defects that exist vary depending on the structure of the metal oxide, the method of depositing the metal oxide, and the like.
[0332] The structures of metal oxides are classified into single crystal structures and other structures (non-single crystal structures). Examples of non-single crystal structures include CAAC structures, polycrystalline structures, NC structures, amorphous-like (A-like) structures, and amorphous structures. The A-like structure has a structure between the NC structure and the amorphous structure. Note that the classification of crystal structures will be described later.
[0333] In addition, metal oxides with an a-like structure and metal oxides with an amorphous structure contain voids or low-density regions. In other words, the crystallinity of metal oxides with an a-like structure and metal oxides with an amorphous structure is lower than that of metal oxides with an nc structure and metal oxides with a CAAC structure. In addition, the hydrogen concentration in metal oxides with an a-like structure is higher than that of metal oxides with an nc structure and metal oxides with a CAAC structure. Therefore, lattice defects are easily generated in metal oxides with an a-like structure and metal oxides with an amorphous structure.
[0334] Therefore, it is preferable to use a highly crystalline metal oxide for the semiconductor layer of a transistor. For example, a metal oxide having a CAAC structure or a single-crystalline metal oxide is preferably used. By using such a metal oxide in a transistor, a transistor with excellent electrical characteristics can be realized. In addition, a transistor with high reliability can be realized.
[0335] In addition, the channel formation region of the transistor preferably uses a metal oxide that increases the on-state current of the transistor. In order to increase the on-state current of the transistor, it is necessary to improve the carrier mobility of the metal oxide used for the transistor. In order to improve the carrier mobility of the metal oxide, it is necessary to improve the transmission of carriers (electrons in the case of n-channel transistors) or reduce the scattering factors that affect the transmission of carriers. In addition, carriers flow from the source to the drain through the channel formation region. Therefore, by providing a channel formation region in which carriers easily flow in the channel length direction, the on-state current of the transistor can be increased.
[0336] Here, the metal oxide having a channel formation region preferably uses a metal oxide with high crystallinity. Furthermore, the crystal preferably has a crystal structure having multiple layers (e.g., a first layer, a second layer, and a third layer). In other words, the crystal has a layered crystal structure (also referred to as a layered crystal, a layered structure). At this time, the c-axis direction of the crystal is the direction in which multiple layers are stacked. Metal oxides having this crystal include, for example, single crystal oxide semiconductors, CAAC-OS, etc.
[0337] Furthermore, the c-axis of the crystals is preferably oriented in the normal direction to the metal oxide's formed surface or film surface. Thus, the multiple layers are arranged parallel or substantially parallel to the metal oxide's formed surface or film surface. In other words, the multiple layers extend in the channel length direction.
[0338] For example, the three-layered crystal structure has the following structure: The first layer has an atomic coordination structure in which the metal contained in the first layer is present in an oxygen octahedron at the center. Furthermore, the second layer has an atomic coordination structure in which the metal contained in the second layer is present in an oxygen trigonal bipyramid or tetrahedron at the center. Furthermore, the third layer has an atomic coordination structure in which the metal contained in the third layer is present in an oxygen trigonal bipyramid or tetrahedron at the center.
[0339] Examples of the crystal structure of the above-mentioned crystal include a YbFe2O4 type structure, a Yb2Fe3O7 type structure, and modified structures thereof.
[0340] Furthermore, it is preferred that the first to third layers all consist of a single metal element or multiple metal elements having the same valence, and oxygen. Note that it is preferred that the valence of the one or more metal elements constituting the first layer be the same as the valence of the one or more metal elements constituting the second layer. Alternatively, the first and second layers may contain the same metal element. Furthermore, it is preferred that the valence of the one or more metal elements constituting the first layer be different from the valence of the one or more metal elements constituting the third layer.
[0341] By adopting the above structure, the crystallinity of the metal oxide can be improved, thereby increasing the carrier mobility of the metal oxide. Therefore, by using the metal oxide in the channel formation region of the transistor, the on-state current of the transistor can be increased, thereby improving the electrical characteristics of the transistor.
[0342] As a metal oxide of one embodiment of the present invention, for example, indium oxide, gallium oxide and zinc oxide can be mentioned. The metal oxide of one embodiment of the present invention preferably contains at least indium (In) or zinc (Zn). In addition, the metal oxide preferably contains two or three selected from indium, element M and zinc. Note that element M is a metal element or semi-metal element with a high bonding energy with oxygen, for example, a metal element or semi-metal element with a higher bonding energy with oxygen than indium. As element M, specifically, aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium and antimony can be mentioned. The element M contained in the metal oxide is preferably any one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin and yttrium, and further preferably gallium. When the element M contained in the metal oxide is gallium, the metal oxide of one embodiment of the present invention preferably contains any one or more selected from indium, gallium and zinc. Note that in this specification and the like, metal elements and semi-metal elements may be collectively referred to as “metal elements”, and “metal elements” described in this specification and the like may include semi-metal elements.
[0343] As a metal oxide of one embodiment of the present invention, for example, indium zinc oxide (In-Zn oxide), indium tin oxide (In-Sn oxide), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide, also referred to as IGTO), gallium zinc oxide (Ga-Zn oxide, also referred to as GZO), aluminum zinc oxide (Al-Zn oxide, also referred to as AZO), indium aluminum zinc oxide (In-Al-Zn oxide, also referred to as IAZO), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also referred to as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also referred to as IGZTO), indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also referred to as IGAZO or IAGZO), etc. can be used. Alternatively, indium tin oxide, gallium tin oxide (Ga—Sn oxide), aluminum tin oxide (Al—Sn oxide), and the like containing silicon can be cited.
[0344] By increasing the atomic number ratio of indium relative to the total atomic number of all metal elements in the metal oxide, the field-effect mobility of the transistor can be increased.
[0345] Note that the metal oxide may also replace the metal elements with a large period number in the periodic table of one or more elements. Alternatively, the metal oxide may also contain, in addition to indium, one or more metal elements with a large period number in the periodic table of one or more elements. There is a tendency that the greater the orbital overlap of the metal elements, the greater the carrier conduction in the metal oxide. Therefore, by including a metal element with a large period number in the periodic table of the elements, the field effect mobility of the transistor can sometimes be improved. As the metal elements with a large period number in the periodic table of the elements, metal elements belonging to the 5th period and metal elements belonging to the 6th period can be cited. As the metal elements, specifically, yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium and europium can be cited. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium and europium are called light rare earth elements.
[0346] Furthermore, the metal oxide may also contain one or more non-metallic elements. The inclusion of non-metallic elements in the metal oxide can sometimes improve the field-effect mobility of the transistor. Examples of non-metallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.
[0347] Furthermore, by increasing the atomic ratio of zinc relative to the total atomic number of all metal elements in the metal oxide, the metal oxide can be made highly crystalline, thereby suppressing the diffusion of impurities in the metal oxide. Consequently, variations in the electrical characteristics of the transistor can be suppressed, improving reliability.
[0348] Furthermore, by increasing the atomic ratio of the element M relative to the total atomic number of all metal elements in the metal oxide, the formation of oxygen vacancies in the metal oxide can be suppressed. Consequently, carrier generation due to oxygen vacancies is suppressed, thereby enabling the realization of a transistor with low off-state current. Furthermore, fluctuations in the electrical characteristics of the transistor are suppressed, thereby improving reliability.
[0349] Furthermore, by increasing the ratio of the number of In atoms to the total number of atoms of all metal elements in the metal oxide, a transistor having a large on-state current and high frequency characteristics can be obtained.
[0350] In this embodiment, In—Ga—Zn oxide is sometimes used as an example of a metal oxide for description.
[0351] In order to form the metal oxide having the layered crystal structure, it is preferable to deposit atoms layer by layer. In the metal oxide deposition method according to one embodiment of the present invention, since the ALD method is used, the metal oxide having the layered crystal structure can be easily formed.
[0352] [[Transistor including an oxide semiconductor]] Next, a case where a metal oxide (oxide semiconductor) is used for a transistor will be described. Hereinafter, a transistor using an oxide semiconductor in a semiconductor layer may be referred to as an OS transistor, and a transistor using silicon in a semiconductor layer may be referred to as a Si transistor.
[0353] By using a metal oxide (oxide semiconductor) of one embodiment of the present invention in a transistor, a transistor with high field-effect mobility can be realized. In addition, a transistor with high reliability can be realized. In addition, miniaturized or highly integrated transistors can be realized. For example, a transistor with a channel length of 2 nm or more and 30 nm or less can be manufactured.
[0354] It is preferable to use an oxide semiconductor with a low carrier concentration for the channel formation region of the transistor. For example, the carrier concentration of the channel formation region of the oxide semiconductor can be 1×10 18 cm -3 Below, preferably 1×10 17 cm -3 Below, more preferably 1×10 15 cm -3 Below, more preferably 1×10 13 cm -3 Below, more preferably 1×10 11 cm -3 Below, more preferably less than 1×10 10 cm -3 , and is 1×10 -9 cm -3 When the carrier concentration of the oxide semiconductor film is to be reduced, the impurity concentration in the oxide semiconductor film can be reduced to reduce the defect state density. In this specification, etc., a state with a low impurity concentration and a low defect state density is referred to as high-purity intrinsic or substantially high-purity intrinsic. In addition, an oxide semiconductor with a low carrier concentration is sometimes referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor.
[0355] Since a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film has a low defect state density, the trap state density may also be low.
[0356] Furthermore, charges trapped in trap states of an oxide semiconductor take a long time to disappear, and may behave like fixed charges. Consequently, the electrical characteristics of a transistor whose channel formation region is formed in an oxide semiconductor with a high trap state density may be unstable.
[0357] Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. In order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in the nearby film. Examples of impurities include hydrogen, carbon, and nitrogen. Note that impurities in an oxide semiconductor refer to, for example, elements other than the main components that constitute the oxide semiconductor. For example, an element with a concentration of less than 0.1 atomic% can be considered an impurity.
[0358] In addition, the band gap of the oxide semiconductor is preferably larger than the band gap of silicon (typically 1.1 eV), preferably 2 eV or more, more preferably 2.5 eV or more, and more preferably 3.0 eV or more. By using an oxide semiconductor having a band gap larger than that of silicon, the off-state current (also called Ioff) of the transistor can be reduced.
[0359] In addition, in Si transistors, the short channel effect (also called Short Channel Effect: SCE) appears as the miniaturization of transistors progresses. Therefore, the miniaturization of Si transistors is very difficult. One of the reasons for the short channel effect is that the band gap of silicon is small. On the other hand, in OS transistors, oxide semiconductors, which are semiconductor materials with a large band gap, are used, so the short channel effect can be suppressed. In other words, OS transistors are transistors with no short channel effect or very little short channel effect.
[0360] The short-channel effect refers to the degradation of electrical properties that occurs with transistor miniaturization (reduction in channel length). Specific examples of the short-channel effect include a decrease in threshold voltage, an increase in the subthreshold swing value (sometimes referred to as the S value), and an increase in leakage current. The S value refers to the change in gate voltage in the subthreshold region that causes a single-digit change in drain current at a fixed drain voltage.
[0361] Characteristic length is widely used as an indicator of resistance to short channel effects. Characteristic length refers to the curvature of the potential in the channel formation region. The smaller the characteristic length, the more steeply the potential rises, and therefore it can be said that the resistance to short channel effects is high.
[0362] OS transistors are accumulation-mode transistors, while Si transistors are inversion-mode transistors. Therefore, the characteristic lengths between the source region and the channel formation region, and the characteristic lengths between the drain region and the channel formation region, are smaller in OS transistors than in Si transistors. Consequently, OS transistors are more resistant to short-channel effects than Si transistors. In other words, when manufacturing transistors with short channel lengths, OS transistors are more suitable than Si transistors.
[0363] When the carrier concentration of the oxide semiconductor is reduced until the channel formation region becomes i-type or substantially i-type, in a short channel transistor, the lower end of the conduction band of the channel formation region is lowered due to the conduction-band-lowering (CBL) effect, thereby reducing the energy difference between the lower end of the conduction band of the source region or the drain region and the channel formation region to 0.1eV or more and 0.2eV or less. Therefore, the OS transistor can be regarded as having n + / n - / n + The accumulation-type junctionless transistor structure or n + / n - / n + The accumulation type non-junction transistor structure, in which the channel forming region is n - Type region, source region and drain region are n + Type area.
[0364] Because the OS transistor has the above-mentioned structure, it can have good electrical characteristics even if the OS transistor is miniaturized or highly integrated. For example, even if the channel length or gate length of the OS transistor is less than 20nm, less than 15nm, less than 10nm, less than 7nm or less than 6nm and more than 1nm, more than 3nm or more than 5nm, good electrical characteristics can be obtained. On the other hand, a short channel effect occurs in Si transistors, so it is sometimes difficult to set the gate length to less than 20nm or less than 15nm. Therefore, compared with Si transistors, OS transistors are more suitable for use as transistors with a small channel length. Note that the gate length refers to the length of the gate electrode in the direction in which carriers migrate in the channel formation region when the transistor is operating.
[0365] Furthermore, miniaturizing the OS transistor can improve the transistor's high-frequency characteristics. Specifically, the transistor's cutoff frequency can be increased. When the gate length of the OS transistor is within the above range, for example, at room temperature, the transistor's cutoff frequency can be above 50 GHz, preferably above 100 GHz, and more preferably above 150 GHz.
[0366] As described above, OS transistors have advantages superior to Si transistors, such as small off-state current and the ability to manufacture transistors with small channel lengths.
[0367] [[Impurities in metal oxides]] Here, the influence of various impurities in metal oxides (oxide semiconductors) will be described.
[0368] When the oxide semiconductor contains silicon or carbon, which is one of the elements in Group 14, defect states are formed in the oxide semiconductor. Therefore, the carbon concentration in the channel formation region of the oxide semiconductor measured by SIMS is set to 1×10 20 atoms / cm 3 Below, preferably 5×10 19 atoms / cm 3 Below, more preferably 3×10 19 atoms / cm 3 Below, more preferably 1×10 19 atoms / cm 3 Below, more preferably 3×10 18 atoms / cm 3 Below, more preferably 1×10 18 atoms / cm 3 The silicon concentration in the channel formation region of the oxide semiconductor measured by SIMS was set to 1×10 20 atoms / cm 3 Below, preferably 5×10 19 atoms / cm 3 Below, more preferably 3×10 19 atoms / cm 3 Below, more preferably 1×10 19 atoms / cm 3 Below, more preferably 3×10 18 atoms / cm 3 Below, more preferably 1×10 18 atoms / cm 3 the following.
[0369] When an oxide semiconductor contains nitrogen, electrons are generated as carriers, which increases the carrier concentration and makes it easy to become n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor tends to have a normally-on characteristic. Alternatively, when an oxide semiconductor contains nitrogen, a trap state is sometimes formed. As a result, the electrical characteristics of the transistor are sometimes unstable. Therefore, the nitrogen concentration in the channel formation region of the oxide semiconductor measured by SIMS is set to 1×10 20 atoms / cm 3 Below, preferably 5×10 19 atoms / cm 3Below, more preferably 1×10 19 atoms / cm 3 Below, more preferably 5×10 18 atoms / cm 3 Below, more preferably 1×10 18 atoms / cm 3 Below, more preferably 5×10 17 atoms / cm 3 the following.
[0370] The hydrogen contained in the oxide semiconductor reacts with the oxygen bonded to the metal atom to generate water, and thus oxygen vacancies are sometimes formed. When hydrogen enters the oxygen vacancy, electrons as carriers are sometimes generated. In addition, sometimes electrons as carriers are generated because part of the hydrogen is bonded to the oxygen bonded to the metal atom. Therefore, a transistor having an oxide semiconductor containing hydrogen tends to have a normally-on characteristic. Therefore, it is preferable to reduce the hydrogen in the channel formation region of the oxide semiconductor as much as possible. Specifically, the hydrogen concentration in the channel formation region of the oxide semiconductor measured by SIMS is set to less than 1×10 20 atoms / cm 3 , preferably less than 5×10 19 atoms / cm 3 , more preferably less than 1×10 19 atoms / cm 3 , more preferably less than 5×10 18 atoms / cm 3 , and preferably less than 1×10 18 atoms / cm 3 , and more preferably less than 1×10 17 atoms / cm 3 the following.
[0371] In addition, when an oxide semiconductor contains an alkali metal or an alkaline earth metal, defect states may sometimes be formed to generate carriers. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal tends to have a normally-on characteristic. Therefore, the concentration of the alkali metal or alkaline earth metal in the channel formation region of the oxide semiconductor measured by SIMS is set to 1×10 18 atoms / cm 3 Below, preferably 2×10 16 atoms / cm 3 the following.
[0372] By using an oxide semiconductor in which impurities are sufficiently reduced for a channel formation region of a transistor, the transistor can have stable electrical characteristics.
[0373] [Other semiconductor materials] The oxide semiconductor 230 may be referred to as a semiconductor layer having a channel formation region of the transistor. The semiconductor material that can be used for the semiconductor layer is not limited to the above-mentioned metal oxides. As the semiconductor layer, a semiconductor material having a band gap (a semiconductor material that is not a zero-band gap semiconductor) may also be used. For example, a single element semiconductor, a compound semiconductor, or a layered material (also referred to as an atomic layer material, a two-dimensional material, etc.) is preferably used as the semiconductor material.
[0374] Here, in this specification, etc., layered materials are a general term for a group of materials having a layered crystal structure. A layered crystal structure is a structure in which layers formed by covalent or ionic bonds are stacked together through bonds weaker than covalent and ionic bonds, such as van der Waals forces. Layered materials have high electrical conductivity per unit layer, that is, high two-dimensional conductivity. By using a material that functions as a semiconductor and has high two-dimensional conductivity in the channel formation region, a transistor with a large on-state current can be provided.
[0375] Examples of single-element semiconductors that can be used as semiconductor materials include silicon and germanium. Examples of silicon that can be used in semiconductor layers include single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. Examples of polycrystalline silicon include low-temperature polysilicon (LTPS).
[0376] Examples of compound semiconductors that can be used as semiconductor materials include silicon carbide, silicon germanium, gallium arsenide, indium phosphide, boron nitride, and boron arsenide. Boron nitride that can be used in the semiconductor layer preferably has an amorphous structure. Boron arsenide that can be used in the semiconductor layer preferably includes crystals having a cubic structure.
[0377] Examples of layered materials include graphene, silicene, boron carbonitride, and chalcogenides. In boron carbonitride, a layered material, carbon, nitrogen, and boron atoms are arranged on a plane in a hexagonal lattice structure. Chalcogenides are compounds containing elements from the chalcogen group. Chalcogenides are a general term for elements belonging to Group 16, which includes oxygen, sulfur, selenium, tellurium, polonium, and lead. Examples of chalcogenides include transition metal chalcogenides and Group 13 chalcogenides.
[0378] As the semiconductor layer, for example, a transition metal chalcogenide used as a semiconductor is preferably used. Specifically, transition metal chalcogenides that can be used as semiconductor layers include molybdenum sulfide (typically MoS2), molybdenum selenide (typically MoSe2), molybdenum telluride (typically MoTe2), tungsten sulfide (typically WS2), tungsten selenide (typically WSe2), tungsten telluride (typically WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (typically ZrS2), zirconium selenide (typically ZrSe2), etc. By using the above-mentioned transition metal chalcogenides for the semiconductor layer, a semiconductor device with a large on-state current can be provided.
[0379] This embodiment mode can be combined with other embodiment modes as appropriate. In addition, in this specification, when a plurality of configuration examples are shown in one embodiment mode, the configuration examples can be combined as appropriate.
[0380] (Implementation 3) In this embodiment, referring to 15A to 22D An example of a structure of a semiconductor device according to one embodiment of the present invention will be described. The semiconductor device according to one embodiment of the present invention includes the structure described in Embodiment 1.
[0381] exist 15A to 22D In the semiconductor device shown, the same reference numerals are given to components having the same functions as those of the semiconductor device described in Embodiment 2. Note that in this embodiment, the materials described in detail in Embodiment 1 or 2 can also be used as structural materials of the semiconductor device.
[0382] In Figures 15, 17, 18, 19, and 22, each Figure A shows a plan view of a semiconductor device. Furthermore, each Figure B is a cross-sectional view corresponding to the portion indicated by the dotted line A1-A2 in each Figure A, and is also a cross-sectional view along the channel length direction of the transistor. Furthermore, each Figure C is a cross-sectional view corresponding to the portion indicated by the dotted line A3-A4 in each Figure A, and is also a cross-sectional view along the channel width direction of the transistor. Each Figure D is a cross-sectional view corresponding to the portion indicated by the dotted line A5-A6 in each Figure A. Here, the dotted line A1-A2 is orthogonal to the dotted line A3-A4 and the dotted line A5-A6, and the dotted line A3-A4 and the dotted line A5-A6 are parallel to each other. For clarity, some components are omitted from the plan views of each Figure A.
[0383] <Structural Example 2 of Semiconductor Device> Reference 15A to 19D Another example of the structure of a semiconductor device will be described. 15A to 15D 2 are a plan view and a cross-sectional view of a semiconductor device including the transistor 200B.
[0384] Transistor 200B includes an insulator 216 on an insulator 214, a conductor 215 arranged in a manner embedded in the insulator 216, an insulator 221 on the insulator 216 and the conductor 215, an insulator 222 on the insulator 221, an oxide semiconductor 230 on the insulator 222, a conductor 242a and a conductor 242b on the oxide semiconductor 230, an insulator 251 on the oxide semiconductor 230, an insulator 252 on the insulator 251, and a conductor 260 on the insulator 252.
[0385] In transistor 200B, the oxide semiconductor 230 is used as a semiconductor layer, the conductor 260 is used as a first gate electrode (the upper gate electrode), the insulator 251 and the insulator 252 are used as a first gate insulator, the conductor 215 is used as a second gate electrode (the lower gate electrode), the insulator 221 and the insulator 222 are used as a second gate insulator, the conductor 242a is used as one of the source electrode and the drain electrode, and the conductor 242b is used as the other of the source electrode and the drain electrode.
[0386] The oxide semiconductor 230 includes a channel formation region and a source region and a drain region disposed so as to sandwich the channel formation region. At least a portion of the channel formation region overlaps with the conductor 260. The source region overlaps with the conductor 242a, and the drain region overlaps with the conductor 242b. Note that the source and drain regions may be swapped.
[0387] Furthermore, it may be difficult to clearly distinguish the boundaries between regions in the oxide semiconductor 230. The concentrations of the metal element and impurity elements such as hydrogen and nitrogen detected in each region do not need to change in stages for each region, but may change continuously within each region. In other words, the concentrations of impurity elements such as hydrogen and nitrogen may decrease as the region is closer to the channel formation region.
[0388] In the transistor 200B, a metal oxide (also referred to as an oxide semiconductor) serving as a semiconductor is preferably used for the oxide semiconductor 230 including the channel formation region. In this case, the transistor 200B is an OS transistor.
[0389] As described in the above embodiment, the channel formation region of the OS transistor is preferably a high-resistance region with a low carrier concentration. Therefore, the channel formation region of the OS transistor is preferably i-type (intrinsic) or substantially i-type.
[0390] On the other hand, the source region and drain region of the OS transistor are preferably the following regions: Since there are more oxygen vacancies than in the channel formation region, V OThe presence of more H or higher concentrations of impurities such as hydrogen, nitrogen, or metal elements increases the carrier concentration, thus lowering the resistance. That is, the source and drain regions of the OS transistor are preferably n-type regions with higher carrier concentrations and lower resistance than the channel formation region.
[0391] 15A to 15D The semiconductor device shown includes a reference Figure 6D Therefore, 15A to 15D The conductor 215, the insulator 221, the insulator 222, the oxide semiconductor 230, the insulator 251, the insulator 252, and the conductor 260 in the structure shown correspond to the conductors described in Embodiment 1. Figure 6D The structure shown includes the conductor 15 , the insulator 21 , the insulator 22 , the oxide semiconductor 30 , the insulator 51 , the insulator 52 , and the conductor 60 .
[0392] The insulator 251 in contact with the top surface and side surface of the channel formation region of the oxide semiconductor 230 preferably has a function of capturing or fixing hydrogen. This can reduce the hydrogen concentration in the channel formation region of the oxide semiconductor 230. Therefore, the V O H makes the channel formation region i-type or substantially i-type. The material and structure of the insulator 251 can also refer to the contents of the insulator 51 described in the first embodiment.
[0393] Note that the insulator 251 is not in contact with the source region or the drain region of the oxide semiconductor 230, so the hydrogen concentration in the source region and the drain region is higher than that in the channel formation region, or the V O There is more H. Therefore, the source region and the drain region can be made into regions having a higher carrier concentration than the channel formation region and lower resistance.
[0394] The insulator 222 in contact with the bottom surface of the channel formation region of the oxide semiconductor 230 preferably has a function of trapping or fixing hydrogen. This can reduce the hydrogen concentration in the channel formation region of the oxide semiconductor 230. Therefore, the V O H makes the channel formation region i-type or substantially i-type. The material and structure of the insulator 222 can also refer to the details of the insulator 22 described in the first embodiment.
[0395] For example, hafnium silicate can be used as insulator 251 and insulator 222. In addition, hafnium silicate becomes a high dielectric constant (high-k) material depending on the silicon content. Therefore, the first gate potential applied when the transistor is operating can be reduced while maintaining the physical thickness of the first gate insulator. In addition, the equivalent oxide thickness (EOT) of the insulator used as the first gate insulator can be reduced. Similarly, the second gate potential applied when the transistor is operating can be reduced while maintaining the physical thickness of the second gate insulator. In addition, the equivalent oxide thickness (EOT) of the insulator used as the second gate insulator can be reduced. As in embodiment 1, insulator 251 and insulator 222 preferably have an amorphous structure. By adopting the above structure, the formation of grain boundaries in insulator 251 and insulator 222 is reduced, thereby achieving high flatness of insulator 251 and insulator 222. Therefore, insulator 251 and insulator 222 can be thin films with high withstand voltage and reduced leakage current. Therefore, insulator 251 and insulator 222 are suitable for use as gate insulators.
[0396] The thickness of insulator 222 is preferably within the range of the width of insulator 51 in the B1-B2 direction described in Embodiment 1. The thicker the insulator that has the function of capturing or fixing hydrogen, the greater its ability to capture or fix hydrogen. Therefore, the thickness of insulator 222 is not limited to the above thickness. For example, the thickness of insulator 222 may be greater than 2 nm and less than 30 nm, or greater than 3 nm and less than 30 nm. It is sufficient that at least a portion of insulator 222 has a region having the above thickness.
[0397] The insulator 252 located above the channel formation region of the oxide semiconductor 230 is preferably a hydrogen blocking insulator. This can suppress the diffusion of hydrogen in the structure provided above the insulator 252 into the channel formation region of the oxide semiconductor 230. Therefore, the V O H makes the channel formation region i-type or substantially i-type. The material and structure of the insulator 252 can also refer to the contents of the insulator 52 described in the first embodiment.
[0398] A hydrogen-blocking insulator is preferably used as the insulator 221 located below the channel formation region of the oxide semiconductor 230. Alternatively, an oxygen-blocking insulator is preferably used as the insulator 221. For example, the insulator 221 preferably has a function of suppressing the diffusion of one or both of hydrogen and oxygen, as compared to the insulator 216.
[0399] When the insulator 221 is formed using such a material, the insulator 221 serves as a layer that suppresses the release of oxygen from the oxide semiconductor 230 to the substrate side and the diffusion of impurities such as hydrogen from the periphery of the transistor 200B into the oxide semiconductor 230. Therefore, by providing the insulator 221, the diffusion of impurities such as hydrogen into the inner side of the transistor 200B can be suppressed, and the generation of oxygen vacancies in the oxide semiconductor 230 can be suppressed. In addition, the reaction between the conductor 215 and oxygen contained in the oxide semiconductor 230 can be suppressed.
[0400] The material, structure, etc. used for the insulator 221 can also refer to the contents of the insulator 21 described in the first embodiment.
[0401] An insulator 280 is provided over the conductors 242a and 242b. Specifically, the insulator 280 is provided over the oxide semiconductor 230. The insulators 251 and 252, and the conductor 260 are embedded within the openings in the insulator 280. An insulator 283 is provided over the insulators 280, 251, 252, and the conductor 260.
[0402] like Figure 15B As shown, when the transistor 200B is viewed from a cross section, it is preferable that one end of the conductor 242a is substantially aligned with one end of the oxide semiconductor 230, and one end of the conductor 242b is substantially aligned with the other end of the oxide semiconductor 230. To achieve this structure, the oxide semiconductor 230 and the conductive layers that become the conductors 242a and 242b are preferably processed together into an island shape. This allows the semiconductor device of one embodiment of the present invention to be manufactured with good productivity.
[0403] The conductor 215 is arranged so as to overlap with the oxide semiconductor 230 and the conductor 260. Here, the conductor 215 is preferably provided so as to be embedded in the opening formed in the insulator 216. Figure 15A and Figure 15C As shown in FIG. 1 , the conductor 215 is preferably extended in the channel width direction. By adopting this structure, the conductor 215 can be used as a wiring when arranging a plurality of transistors.
[0404] The conductor 215 may have a single layer structure or a stacked layer structure. Figure 15B and Figure 15C As shown, conductor 215 includes conductor 215a and conductor 215b. Conductor 215a is provided so as to contact the bottom surface and sidewalls of the opening. Conductor 215b is provided so as to be embedded in a recess formed along the opening of conductor 215a. The top surface of conductor 215 is substantially the same height as the top surface of insulator 216.
[0405] In addition, if Figure 15B As shown in FIG. 2 , the conductor 215 is preferably larger than a region of the oxide semiconductor 230 that does not overlap with the conductors 242 a and 242 b. Figure 15C As shown, the conductor 215 preferably extends to a region outside the end portion in the channel width direction of the oxide semiconductor 230. That is, the conductor 215 and the conductor 260 preferably overlap with the insulator interposed therebetween outside the side surface in the channel width direction of the oxide semiconductor 230. With this structure, the channel formation region of the oxide semiconductor 230 can be electrically surrounded by the electric field of the conductor 260 serving as the first gate electrode and the electric field of the conductor 215 serving as the second gate electrode.
[0406] In this specification, etc., a transistor structure in which a channel forming region is surrounded by the electric field of at least the first gate electrode is referred to as a surrounded channel (S-channel) structure. In addition, the S-channel structure disclosed in this specification, etc. is different from a Fin-type structure and a planar structure. On the other hand, the S-channel structure disclosed in this specification, etc. can be regarded as a type of Fin-type structure. In addition, in this specification, etc., a Fin-type structure refers to a structure in which a gate electrode is configured in a manner that surrounds at least two or more sides of a channel (specifically, two sides, three sides, or four sides, etc.). By adopting a Fin-type structure and an S-channel structure, resistance to short channel effects can be improved. In other words, a transistor that is not prone to short channel effects can be realized.
[0407] By adopting the above-mentioned S-channel structure as the transistor 200B, the channel formation region can be electrically surrounded. The S-channel structure is a structure that electrically surrounds the channel formation region, so it can also be said that the structure is essentially the same as the GAA (Gate All Around: full surround gate) structure or the LGAA (Lateral Gate All Around: lateral full surround gate) structure. By making the transistor 200B have an S-channel structure, a GAA structure or a LGAA structure, the channel formation region formed at or near the interface between the oxide semiconductor 230 and the gate insulator can be regarded as the entire bulk of the oxide semiconductor 230. Therefore, the current density flowing through the transistor can be increased, so an increase in the on-state current of the transistor or the field-effect mobility of the transistor can be expected.
[0408] In addition, if Figure 15C As shown, conductor 215 is extended to serve as wiring. However, the present invention is not limited to this, and a conductor serving as wiring may be provided under conductor 215. Furthermore, conductor 215 need not necessarily be provided for each transistor. For example, conductor 215 may be shared by multiple transistors.
[0409] Conductor 215 is sometimes used as a second gate electrode. In this case, by independently changing the potential applied to conductor 215 without interlocking it with the potential applied to conductor 260, the threshold voltage (Vth) of transistor 200B can be controlled. In particular, when transistor 200B is an n-channel transistor, by applying a negative potential to conductor 215, the Vth of transistor 200B can be further increased and the off-state current can be reduced. As a result, when a negative potential is applied to conductor 215, the drain current when the potential applied to conductor 260 is 0V can be reduced compared to when no negative potential is applied to conductor 215.
[0410] Furthermore, the resistivity of the conductor 215 is designed taking into account the potential applied to the conductor 215, and the thickness of the conductor 215 is set based on this resistivity. Furthermore, the thickness of the insulator 216 is substantially the same as that of the conductor 215. It is preferable to reduce the thickness of the conductor 215 and the insulator 216 within the design allowable range of the conductor 215. By reducing the thickness of the insulator 216, the absolute amount of impurities such as hydrogen contained in the insulator 216 can be reduced, thereby reducing the diffusion of these impurities into the oxide semiconductor 230.
[0411] Since insulator 216 serves as an interlayer film, it is preferred that its relative dielectric constant be lower than that of insulator 222. By using a material with a low relative dielectric constant for the interlayer film, parasitic capacitance generated between wirings can be reduced. Insulator 216 can be a single layer or a stack of insulators containing a material with a low relative dielectric constant as described in [Insulator] in Embodiment 2. Silicon oxide and silicon oxynitride are preferably used because they are thermally stable. Furthermore, the top surface of insulator 216 may be flattened.
[0412] Furthermore, the concentration of impurities such as water and hydrogen in the insulator 216 is preferably reduced. This can prevent impurities such as water and hydrogen from entering the channel formation region of the oxide semiconductor 230 .
[0413] The conductor 260 may have a single-layer structure or a stacked-layer structure.
[0414] like Figure 15B and Figure 15C As shown, the conductor 260 is arranged inside the opening formed in the insulator 280. Inside the opening, the conductor 260 is provided so as to cover the top surface of the insulator 222, the side surfaces of the oxide semiconductor 230, and the top surface of the oxide semiconductor 230 via the insulators 251 and 252. The top surface of the conductor 260 is aligned with the top surface of the insulator 251, the top surface of the insulator 252, and the top surface of the insulator 280.
[0415] In addition, if Figure 15A and Figure 15C As shown in FIG. 1 , the conductor 260 is preferably extended in the channel width direction. By adopting this structure, the conductor 260 can be used as a wiring when arranging a plurality of transistors.
[0416] In the case of adopting the above structure, if Figure 15C As shown, when viewed in cross section in the channel width direction of the transistor 200B, a curved surface may be provided between the side surface of the oxide semiconductor 230 and the top surface of the oxide semiconductor 230. That is, the ends of the side surface and the top surface may be curved (hereinafter also referred to as rounded).
[0417] The radius of curvature of the curved surface is preferably greater than 0 nm and less than the thickness of the oxide semiconductor 230 in the region overlapping with the conductor 242 a or the conductor 242 b, or less than half the length of the region without the curved surface. Specifically, the radius of curvature of the curved surface is greater than 0 nm and less than 20 nm, preferably greater than 1 nm and less than 15 nm, and more preferably greater than 2 nm and less than 10 nm. By adopting this shape, the coverage of the oxide semiconductor 230 by the insulator 251, the insulator 252, and the conductor 260 can be improved.
[0418] exist Figure 15B In the embodiment shown in FIG. 1 , conductor 260 has a two-layer structure. Here, conductor 260 preferably includes conductor 260a and conductor 260b disposed on conductor 260a. For example, conductor 260a is preferably disposed so as to surround the bottom and side surfaces of conductor 260b. In this case, conductor 260a is preferably made of a conductive material that is not easily oxidized or has a function of inhibiting oxygen diffusion.
[0419] The conductors 242a and 242b can be single layers or stacked layers of the conductors described in [Conductor] in Embodiment 2. For example, a highly conductive material such as tungsten can be used as the conductors 242a and 242b.
[0420] As with conductor 260, conductors 242a and 242b are preferably made of a conductive material that is not easily oxidized or has a function of inhibiting oxygen diffusion. For example, titanium nitride or tantalum nitride can be used. In this case, conductors 242a and 242b both contain at least metal and nitrogen. This structure can prevent excessive oxidation of conductors 242a and 242b by oxide semiconductor 230.
[0421] Note that in Figure 15B and Figure 15CIn the embodiment, the conductor 242a and the conductor 242b each have a single layer, but the present invention is not limited thereto. Note that the conductor 242a and the conductor 242b may also have a stacked-layer structure.
[0422] When both the conductor 242 a and the conductor 242 b have a two-layer structure, a conductive material that is not easily oxidized, such as a metal nitride, or a conductive material that has a function of inhibiting oxygen diffusion is preferably used as the lower layer of each of the conductors 242 a and 242 b (the layer in contact with the oxide semiconductor 230). This prevents the conductors 242 a and 242 b from being excessively oxidized by oxygen in the oxide semiconductor 230. This prevents a decrease in the conductivity of the conductors 242 a and 242 b.
[0423] In addition, the upper layer of each of the conductors 242a and 242b is preferably a conductor such as a metal layer having a higher conductivity than the lower layer of each of the conductors 242a and 242b. For example, it is preferable that the thickness of the upper layer of each of the conductors 242a and 242b is greater than the thickness of the lower layer of each of the conductors 242a and 242b. As the upper layer of each of the conductors 242a and 242b, a conductor that can be used for the conductor 215b can be used. Thus, the conductors 242a and 242b can be used as wiring or electrodes with high conductivity. In this way, a semiconductor device can be provided in which the conductors 242a and 242b used as wiring or electrodes are provided in a manner in contact with the top surface of the oxide semiconductor 230 used as an active layer.
[0424] For example, titanium nitride or tantalum nitride can be used as the lower layer of each of the conductors 242a and 242b, and tungsten can be used as the upper layer of each of the conductors 242a and 242b. Providing a layer containing tungsten in this manner can improve the conductivity of the conductors 242a and 242b, allowing them to fully function as wiring.
[0425] Figure 15B and Figure 15C In the illustrated structure, an insulator 251 and an insulator 252 are provided between the oxide semiconductor 230 and the conductor 260. In this case, the oxide semiconductor 230 has a region in contact with the insulator 251. Note that the present invention is not limited to this.
[0426] For example, Figure 16A As shown, an insulator 253 may be provided between the oxide semiconductor 230 and the insulator 222 and the insulator 251. Note that Figure 16A It is an enlarged cross-sectional view of the transistor 200B in the channel width direction.
[0427] Insulator 253 is preferably made of a material having a low relative dielectric constant as described in [Insulator] in Embodiment 2. This structure can reduce parasitic capacitance between conductor 260 and conductor 242a or conductor 242b. Furthermore, the concentration of impurities such as water and hydrogen in insulator 253 is preferably reduced. The materials and structure of insulator 253 can also refer to the description of insulator 253 in Embodiment 2.
[0428] Furthermore, when the insulator 253 is provided, the insulator 252 preferably also has oxygen barrier properties. The insulator 252 is provided between the insulator 253 and the conductor 260. This prevents oxygen contained in the insulator 253 from diffusing into the conductor 260, thereby suppressing oxidation of the conductor 260. Furthermore, oxygen in the channel formation region of the oxide semiconductor 230 from diffusing into the conductor 260 and forming oxygen vacancies in the channel formation region can be suppressed.
[0429] In addition, if Figure 16B As shown, the insulator 253 may also be disposed between the insulator 251 and the insulator 252 . Figure 16B It is an enlarged cross-sectional view of the transistor 200B in the channel width direction.
[0430] In addition, for example, Figure 16C As shown, insulators 253 and 254 may be provided between the oxide semiconductor 230 and the insulator 222 and the insulator 251 . Figure 16C It is an enlarged cross-sectional view of the transistor 200B in the channel width direction.
[0431] The insulator 254 preferably uses the oxygen-blocking insulator described in [Insulator] described in Embodiment 2. The insulator 254 has a region in contact with the oxide semiconductor 230. When the insulator 254 has oxygen-blocking properties, it is possible to suppress the detachment of oxygen from the oxide semiconductor 230 during heat treatment, etc. Therefore, the formation of oxygen vacancies in the oxide semiconductor 230 can be suppressed. As a result, the electrical characteristics of the transistor 200B can be improved, and the reliability can be improved. In addition, the insulator 254 is in contact with each side surface of the conductor 242a and the conductor 242b, so that the side surfaces of the conductor 242a and the conductor 242b are suppressed from being oxidized and forming an oxide film on the side surfaces. As a result, a decrease in the on-state current of the transistor 200B or a decrease in the field-effect mobility can be suppressed. The materials and structure used for the insulator 254 can also refer to the contents of the insulator 254 described in Embodiment 2.
[0432] Insulators 251 to 254 serve as part of the gate insulator. Insulators 251 to 254 are provided inside the opening formed in insulator 280 together with conductor 260. In order to miniaturize transistor 200B, insulators 251 to 254 are preferably thin.
[0433] The thickness of the insulator 251 is preferably within the range of the width of the insulator 51 in the B1-B2 direction described in Embodiment 1. The thickness of the insulator 252 is preferably within the range of the width of the insulator 52 in the B1-B2 direction described in Embodiment 1.
[0434] The thickness of insulators 253 and 254 is preferably 0.1 nm to 10 nm, more preferably 0.1 nm to 5 nm, even more preferably 0.5 nm to 5 nm, even more preferably 1 nm to less than 5 nm, and even more preferably 1 nm to 3 nm. In this case, at least a portion of each of insulators 253 and 254 may be defined as a region having the aforementioned thickness.
[0435] In order to reduce the thickness of the insulators 251 to 254 as described above, deposition is preferably performed using the ALD method.
[0436] Note that while the first gate insulator has been described above as having a two-layer structure of insulators 251 and 252, a three-layer structure of insulators 251 to 253, or a four-layer structure of insulators 251 to 254, the present invention is not limited thereto. The first gate insulator may have a structure including at least one of insulators 251 to 254. By configuring the first gate insulator to include one, two, or three layers of insulators 251 to 254, the manufacturing process of the semiconductor device can be simplified, thereby improving productivity.
[0437] exist 15A to 15D In the semiconductor device shown, the channel formation region of the oxide semiconductor 230 is sandwiched between insulators having a hydrogen barrier property (here, the insulator 221 and the insulator 252 ). Therefore, an insulator may be provided between the oxide semiconductor 230 and the insulator 221 .
[0438] For example, Figure 16D As shown, an insulator 224 may be provided between the oxide semiconductor 230 and the insulator 222. In this case, the insulator 224 is in contact with at least a portion of the oxide semiconductor 230. Furthermore, the insulator 224 has a region facing the insulator 251 across the oxide semiconductor 230. Furthermore, the oxide semiconductor 230 is provided on the insulator 224. Figure 16D It is an enlarged cross-sectional view of the transistor 200B in the channel width direction.
[0439] The insulator 224 is preferably an insulator containing oxygen, and more preferably a film that releases oxygen by heating. Due to the heat applied during the manufacturing process of the transistor 200B, the insulator 224 releases oxygen, and thus oxygen can be supplied to the oxide semiconductor 230. By supplying oxygen from the insulator 224 to the oxide semiconductor 230, especially to the channel formation region of the oxide semiconductor 230, oxygen vacancies in the oxide semiconductor 230 and V O H, a transistor having good electrical characteristics and high reliability can be realized. The insulator 224 is preferably made of a material that can be used for the insulator 280b described in Embodiment 2.
[0440] In addition, as reference Figure 2 As explained above, in order to improve the initial characteristics and reliability of the OS transistor, it is important to optimize the amount of oxygen supplied to the oxide semiconductor while sufficiently reducing the hydrogen concentration in the oxide semiconductor. As an example, the amount of oxygen molecules released from the insulator 224 is preferably 1.0×10 14 molecules / cm 2 Above and below 1.0×10 15 molecules / cm 2 Note that the amount of oxygen molecules released can be measured using thermal desorption spectroscopy.
[0441] Note that in Figures 15B to 15D Although the oxide semiconductor 230 is shown as a single-layer structure, the present invention is not limited thereto. The oxide semiconductor 230 may also have a stacked structure of multiple oxide layers having different chemical compositions. For example, a structure may be employed in which multiple metal oxides selected from the group described in [Metal Oxide] in Embodiment 2 are stacked as appropriate.
[0442] As an example, Figure 16E As shown, the oxide semiconductor 230 may have a stacked structure of an oxide semiconductor 230a on the insulator 222 and an oxide semiconductor 230b on the oxide semiconductor 230a. When the oxide semiconductor 230a is included under the oxide semiconductor 230b, diffusion of impurities from a structure formed under the oxide semiconductor 230a to the oxide semiconductor 230b can be suppressed. Figure 16E It is an enlarged cross-sectional view of the transistor 200B in the channel width direction.
[0443] Here, the band gap of the oxide semiconductor 230b can be smaller than the band gap of the oxide semiconductor 230a. The composition of the oxide semiconductor 230b is preferably different from the composition of the oxide semiconductor 230a. By making the composition of the oxide semiconductor 230a and the oxide semiconductor 230b different, the band gap can be controlled. For example, the content of the element M in the oxide semiconductor 230b is preferably lower than the content of the element M in the oxide semiconductor 230a. Specifically, in the case where the oxide semiconductor 230a and the oxide semiconductor 230b are In-M-Zn oxides, the oxide semiconductor 230b can be set to a composition of In:M:Zn=1:1:1 [atomic ratio] or a composition thereabout, and the oxide semiconductor 230a can be set to a composition of In:M:Zn=1:3:2 [atomic ratio] or a composition thereabout. As the element M, it is particularly preferred to use one or more of gallium, aluminum, and tin.
[0444] The oxide semiconductor 230b may not contain the element M. For example, the oxide semiconductor 230b may be an In-Zn oxide, and the oxide semiconductor 230a may be an In-M-Zn oxide. Specifically, the oxide semiconductor 230b may be an In-Zn oxide, and the oxide semiconductor 230a may be an In-Ga-Zn oxide. More specifically, the oxide semiconductor 230b may have a composition of In:Zn = 1:1 [atomic ratio] or a composition close thereto, or a composition of In:Zn = 4:1 [atomic ratio] or a composition close thereto, and the oxide semiconductor 230a may have a composition of In:Ga:Zn = 1:1:1 [atomic ratio] or a composition close thereto. In addition, the oxide semiconductor 230b may also contain a trace amount of the element M. For example, the oxide semiconductor 230b may have a composition of In:Sn:Zn = 4:0.1:1 [atomic ratio] or a composition close thereto.
[0445] Figure 16E Although the oxide semiconductor 230 has an example of a two-layer structure of an oxide semiconductor 230 a and an oxide semiconductor 230 b , the present invention is not limited thereto and the oxide semiconductor 230 may have a stacked-layer structure of three or more layers, for example.
[0446] The material, structure, and the like used for the oxide semiconductor 230 can refer to the contents of the oxide semiconductor 230 described in Embodiment 2.
[0447] In this embodiment, microwave treatment is preferably performed in an oxygen-containing atmosphere in a state where the conductors 242 a and 242 b are provided over the oxide semiconductor 230 .
[0448] In this specification, microwave treatment refers to treatment using an apparatus including a power source that generates high-density plasma using microwaves. Furthermore, in this specification, microwaves refer to electromagnetic waves having a frequency of 300 MHz or higher and 300 GHz or lower. Microwave treatment may also be referred to as microwave-excited high-density plasma treatment.
[0449] By performing microwave treatment in an oxygen-containing atmosphere, microwaves or high frequencies such as RF can be used to convert the oxygen gas into plasma and allow the oxygen plasma to act. At this time, microwaves or high frequencies such as RF can also be irradiated to the channel formation region. By the action of plasma, microwaves, etc., the V in the channel formation region can be reduced. O H separated into oxygen vacancies (V O ) and hydrogen (H), the hydrogen can be removed from the channel formation region and the oxygen vacancies can be filled with oxygen. Therefore, the hydrogen concentration, oxygen vacancies and V in the channel formation region can be reduced. O H and reduce the carrier concentration.
[0450] Furthermore, when microwave treatment is performed in an oxygen-containing atmosphere, the effects of microwaves, high frequencies such as RF, and oxygen plasma are shielded by the conductors 242a and 242b and do not affect the source and drain regions. Furthermore, the effects of oxygen plasma can be reduced by the insulator 280 provided to cover the oxide semiconductor 230, the conductors 242a, and the conductors 242b. Thus, since V is not generated in the source and drain regions during microwave treatment, O The decrease in H and the supply of excessive oxygen can prevent the decrease in carrier concentration.
[0451] Furthermore, it is preferable to perform microwave treatment in an oxygen-containing atmosphere after depositing the insulating film that will become the insulator 251. By performing microwave treatment in an oxygen-containing atmosphere through the insulator 251, oxygen can be efficiently implanted into the channel formation region. Furthermore, by disposing the insulator 251 so as to contact the side surfaces of the conductor 242 a, the side surfaces of the conductor 242 b, and the surface of the channel formation region, unnecessary oxygen implantation into the channel formation region can be suppressed, thereby suppressing oxidation of the side surfaces of the conductors 242 a and 242 b.
[0452] In addition, the oxygen injected into the channel formation region may be in various forms, such as oxygen atoms, oxygen molecules, oxygen ions (charged oxygen atoms or molecules), and oxygen radicals (oxygen atoms, oxygen molecules, or oxygen ions containing unpaired electrons). The oxygen injected into the channel formation region may be in any one or more of the above forms, with oxygen radicals being particularly preferred. In addition, since the film quality of the insulator 251 can be improved, the reliability of the transistor 200B is improved.
[0453] As described above, oxygen vacancies and V can be selectively removed in the channel formation region.O H, thereby making the channel formation region i-type or substantially i-type. Furthermore, excessive oxygen supply to the source and drain regions can be suppressed, thereby maintaining the n-type region in its original state prior to microwave treatment. This can suppress variations in the electrical characteristics of the transistor 200B and reduce variations in the electrical characteristics of the transistor 200B within the substrate surface.
[0454] By adopting the above structure, oxygen can be efficiently supplied to the channel formation region, thereby making the channel formation region an i-type region. Furthermore, since the amount of oxygen supplied to the source and drain regions is less than that to the channel formation region, a decrease in the carrier concentration in the source and drain regions can be prevented.
[0455] A hydrogen-blocking insulator is preferably used as the insulator 280. The insulator 280 has regions in contact with the source and drain regions of the oxide semiconductor 230. This prevents hydrogen contained in the source and drain regions of the oxide semiconductor 230 from diffusing to the outside, thereby suppressing a decrease in the hydrogen concentration in the source and drain regions. Consequently, the source and drain regions can be rendered n-type.
[0456] For example, silicon nitride can be used as insulator 280. In this case, insulator 280 contains silicon and nitrogen. Since the side surfaces and top surfaces of conductors 242 a and 242 b are in contact with insulator 280, using silicon nitride as insulator 280 can prevent oxidation of conductors 242 a and 242 b, which would increase resistivity and reduce on-state current.
[0457] The concentration of impurities such as water and hydrogen in the insulator 280 is preferably reduced.
[0458] Notice, Figures 15B to 15D The insulator 280 is shown as a single-layer structure, but the present invention is not limited thereto. The insulator 280 may also have a stacked structure. For example, 17B to 17D As shown, the insulator 280 may also have a stacked structure of an insulator 280a and an insulator 280b on the insulator 280a.
[0459] As the insulator 280a, for example, silicon nitride is preferably used, more preferably silicon nitride formed by ALD, and even more preferably silicon nitride formed by PEALD. ALD has good step coverage and thickness uniformity, making it suitable for depositing thin films and covering surfaces with high aspect ratios.
[0460] For example, when depositing a silicon nitride film using the PEALD method, it is preferred to use a precursor containing a halogen such as fluorine, chlorine, bromine, or iodine. Furthermore, after introducing the above precursors, plasma treatment is performed in an atmosphere containing a nitriding agent such as N2, N2O, NH3, NO, NO2, or N2O2, thereby depositing a high-quality silicon nitride film.
[0461] In addition, silicon nitride formed by sputtering is preferably used as the insulator 280b. Since the deposition rate of the sputtering method is faster than that of the ALD method, productivity can be improved.
[0462] As described above, silicon nitride has hydrogen barrier properties when its thickness is, for example, 2 nm or greater, and has high hydrogen barrier properties when its thickness is, for example, 3 nm or greater. Therefore, when insulator 280 a is formed using a silicon nitride film having a thickness of 2 nm or greater, preferably 3 nm or greater, the material that can be used for insulator 280 b does not need to be a hydrogen barrier insulator.
[0463] For example, the insulator 280 b can be formed using a material that can be used for the insulator 280 b described in Embodiment 2. For example, an insulator containing oxygen can also be used. The insulator 280 b preferably has a region with a higher oxygen content than the insulator 280 a. In particular, the insulator 280 b preferably has a region with a higher oxygen content than the insulator 280 a. By increasing the oxygen content of the insulator 280 b, an i-type region is easily formed in the oxide semiconductor 230 near the insulator 280 b.
[0464] Furthermore, since the insulator 280 a is provided between the insulator 280 b and the source and drain regions, even if an insulator containing oxygen is used as the insulator 280 b , the amount of oxygen supplied to the source and drain regions of the oxide semiconductor 230 can be reduced.
[0465] In addition, in this embodiment, it is preferred that the semiconductor device has a structure that suppresses hydrogen from being mixed into the transistor 200B in addition to the above-mentioned structure. For example, it is preferred that an insulator having a function of suppressing hydrogen diffusion is provided in a manner that covers one or both of the upper and lower sides of the transistor 200B. In the semiconductor device described in this embodiment, as the insulator, for example, an insulator 214 and an insulator 283 can be cited. Here, the insulator 214 provided under the transistor 200B can also have the same structure as the insulator 283. As described above, by using a hydrogen blocking insulator as the insulator 283, a closed system consisting of the insulator 283 and the insulator 221 can be formed. The closed system is provided with an insulator 251 and an insulator 222 that capture or fix hydrogen, and an oxide semiconductor 230. Furthermore, by using a hydrogen blocking insulator as the insulator 214, a closed system consisting of the insulator 283 and the insulator 214 can be formed. The entire transistor 200B can be included inside the closed system. By forming the closed system and performing the heat treatment, hydrogen is captured or fixed by the insulator 251 and the insulator 222 , whereby the hydrogen concentration in the oxide semiconductor 230 can be reduced.
[0466] One or both of the insulator 214 and the insulator 283 are preferably used as a blocking insulator to inhibit the diffusion of impurities such as water and hydrogen from the substrate side or from above the transistor 200B into the transistor 200B. Therefore, one or both of the insulator 214 and the insulator 283 are preferably made of an insulating material that has the function of inhibiting the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitric oxide molecules (N2O, NO, NO2, etc.), and copper atoms (making these impurities less likely to pass through). In addition, they are preferably made of an insulating material that has the function of inhibiting the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules) (making these oxygen less likely to pass through).
[0467] As the insulator 214 and the insulator 283, it is preferable to use an insulator that has the function of suppressing the diffusion of impurities such as water, hydrogen, and oxygen. For example, the insulator 283 preferably has a high hydrogen barrier property. Thus, it is possible to suppress impurities such as water and hydrogen from diffusing from the interlayer insulating film, etc., arranged on the upper side of the insulator 283 to the transistor 200B. In addition, it is possible to suppress the diffusion of oxygen contained in the insulator 280, etc. to the top of the transistor 200B. In addition, by adopting the same structure as the insulator 283 as the insulator 214, it is possible to suppress impurities such as water and hydrogen from diffusing from the substrate side to the transistor 200B. In addition, it is possible to suppress the diffusion of oxygen in the oxide semiconductor 230, etc. to the bottom of the transistor 200B. In this way, by adopting a structure in which the upper and lower parts of the transistor 200B are surrounded by an insulator having the function of suppressing the diffusion of impurities such as water, hydrogen, and oxygen, it is possible to suppress the diffusion of excess oxygen and hydrogen to the oxide semiconductor. Thus, it is possible to achieve improvements in the electrical characteristics and reliability of the semiconductor device.
[0468] exist 17B to 17D In the embodiment, the insulator 283 is provided in a manner of contacting the top surface of the insulator 280b, the top surface of the insulator 251, the top surface of the insulator 252 and the top surface of the conductor 260, but the present invention is not limited thereto. 18A to 18D As in the semiconductor device shown in FIG. 1 , an insulator 282 may be provided between the insulator 283 and the insulator 280 b , the insulator 251 , the insulator 252 , and the conductor 260 .
[0469] As insulator 282, an insulator that can add oxygen to insulator 280 is preferably used. For example, aluminum oxide is preferably used as insulator 282. In this case, insulator 282 contains at least oxygen and aluminum. Furthermore, insulator 282 or the insulating film that will become insulator 282 is preferably deposited by sputtering, more preferably deposited by sputtering in an oxygen-containing atmosphere. By depositing insulator 282 by sputtering in an oxygen-containing atmosphere, oxygen can be added to insulator 280 during deposition. This allows insulator 280 to contain excess oxygen.
[0470] Here, a metal oxide having an amorphous structure is preferably used as the insulator 282. Metal oxides having an amorphous structure sometimes have the following properties: oxygen atoms with dangling bonds are present, and hydrogen is captured or fixed by these dangling bonds. By using the above-mentioned metal oxide having an amorphous structure as a component of the transistor 200B or providing it around the transistor 200B, hydrogen contained in the transistor 200B can be captured or fixed. In particular, it is preferable to capture or fix hydrogen contained in the channel formation region of the transistor 200B. By adopting this structure, a transistor 200B with excellent characteristics and high reliability can be manufactured.
[0471] Insulator 282 preferably has an amorphous structure, but a portion thereof may have a polycrystalline region. Furthermore, insulator 282 may have a multilayer structure in which an amorphous layer and a polycrystalline layer are stacked. For example, a stacked structure in which a polycrystalline layer is stacked on an amorphous layer may be used.
[0472] Notice, Figures 18B to 18D The insulator 282 is shown as a single-layer structure, but the present invention is not limited thereto and may also have a stacked-layer structure.
[0473] Note that in Figures 15B to 15D In the embodiment, the insulator 280 is provided in contact with the top surface of the conductor 242a and the top surface of the conductor 242b, but the present invention is not limited thereto. Figure 18B and Figure 18DAs shown, an insulator 271a may be provided between the conductor 242a and the insulator 280, and an insulator 271b may be provided between the conductor 242b and the insulator 280. In other words, the insulator 271a may be provided on the conductor 242a, and the insulator 271b may be provided on the conductor 242b.
[0474] In addition, both the insulator 271a and the insulator 271b are used as etching stop layers to protect the conductors 242a and 242b. Figure 18B and Figure 18D As shown, when viewed from a cross section of the transistor 200B, it is preferable that the side ends of the insulator 271a are approximately aligned with the side ends of the conductor 242a, and the side ends of the insulator 271b are approximately aligned with the side ends of the conductor 242b.
[0475] Insulators 271a and 271b are both inorganic insulators that protect conductors 242a and 242b. Furthermore, since insulators 271a and 271b are in contact with conductors 242a and 242b, respectively, they are preferably inorganic insulators that are less likely to oxidize conductors 242a and 242b. Therefore, insulators 271a and 271b preferably have a stacked structure of a first insulator and a second insulator on top of the first insulator. Here, the first insulator of insulators 271a and 271b preferably uses a nitride insulator that can be used for insulator 252, so as to less likely oxidize conductors 242a and 242b. Furthermore, the second insulator of insulators 271a and 271b preferably uses an oxide insulator that can be used for insulator 253. For example, silicon nitride can be used as the first insulator of the insulator 271 a and the first insulator of the insulator 271 b , and silicon oxide can be used as the second insulator of the insulator 271 a and the second insulator of the insulator 271 b .
[0476] The insulating layer that will become insulators 271a and 271b is used as a mask for the conductive layer that will become conductors 242a and 242b, so that the conductive layer does not have a curved surface between the side and top surfaces. As a result, the ends where the side and top surfaces of conductors 242a and 242b intersect are angular. When the ends where the side and top surfaces of conductors 242a and 242b intersect are angular, the cross-sectional area of conductors 242a and 242b increases compared to when the ends have curved surfaces. Furthermore, by using a nitride insulator that is not prone to metal oxidation as the first insulator of insulators 271a and 271b, it is possible to prevent conductors 242a and 242b from being over-oxidized. As a result, the resistance of conductors 242a and 242b decreases, thereby increasing the on-state current of the transistor.
[0477] By adopting the above structure, the channel formation region can be i-type or substantially i-type, and the source and drain regions can be n-type, thereby providing a semiconductor device with excellent electrical characteristics. By adopting the above structure, even if the semiconductor device is miniaturized or highly integrated, it can still have excellent electrical characteristics. In addition, by miniaturizing transistor 200B, high-frequency characteristics can be improved. Specifically, the cutoff frequency can be increased.
[0478] <Deformation Example> exist Figure 15B and Figure 15D In the embodiment, insulator 251 is in contact with the side surface of insulator 280 in the opening provided in insulator 280, but the present invention is not limited to this structure. For example, an insulator may be provided between insulator 251 and insulator 280 in the opening.
[0479] Reference 19A to 22D A modified example of the semiconductor device described in <Structural Example 2 of Semiconductor Device> will be described. 19A to 19D 2 is a plan view and a cross-sectional view of a semiconductor device including a transistor 200C. Figure 20 An enlarged cross-sectional view of the transistor 200C in the channel length direction is shown.
[0480] 19A to 19D The transistor 200C shown is also 15A to 15D The transistor 200B shown in FIG. 19A to 19D The transistor 200C is shown with 15A to 15D The transistor 200B shown mainly differs from the insulator 255 in that it includes the insulator 255. The following mainly describes portions different from those described in the above-mentioned <Structural Example 2 of Semiconductor Device>, and the above description is referred to for overlapping portions, which may be omitted.
[0481] In addition, Figure 19B and Figure 19D In the figure, conductors 242a and 242b both have a two-layer structure. Conductor 242a has a stacked structure consisting of conductor 242a1 and conductor 242a2 on top of conductor 242a1. Conductor 242b has a stacked structure consisting of conductor 242b1 and conductor 242b2 on top of conductor 242b1. Conductors 242a1 and 242b1 correspond to the lower layers of conductors 242a and 242b, while conductors 242a2 and 242b2 correspond to the upper layers of conductors 242a and 242b.
[0482] like Figure 19B and Figure 19CAs shown, insulator 255 is disposed inside the opening formed in insulator 280 and contacts the side surfaces of insulator 280, the side surfaces of conductor 242a2, the side surfaces of conductor 242b2, the top surface of conductor 242a1, the top surface of conductor 242b1, and the top surface of insulator 222 in the opening. In other words, insulator 255 can be said to be formed in a sidewall shape so as to contact the sidewalls of the opening formed in insulator 280. Here, the sidewalls of the opening correspond to, for example, the side surfaces of insulator 280 and the like in the opening.
[0483] In addition, the insulator 251 is in contact with the side surface of the insulator 255 .
[0484] The insulator 255 preferably has oxygen barrier properties. When the insulator 255 has oxygen barrier properties, oxidation of the side surfaces of the conductors 242 a and 242 b and the formation of oxide films on these side surfaces can be suppressed. Consequently, a decrease in the on-state current of the transistor 200C or a decrease in the field-effect mobility can be suppressed.
[0485] The opening provided in insulator 280 overlaps the area between conductors 242a2 and 242b2. When viewed from above, the side surfaces of insulator 280 in the opening are aligned with the side surfaces of conductors 242a2 and 242b2. Furthermore, portions of conductors 242a1 and 242b1 are formed to protrude inwardly from the opening. In other words, the portion of the top surface of conductor 242a1 where insulator 255 is formed protrudes toward conductor 260 relative to conductor 242a2. Similarly, the portion of the top surface of conductor 242b1 where insulator 255 is formed protrudes toward conductor 260 relative to conductor 242b2.
[0486] Here, a portion of the top surface of the conductor 242a1 is in contact with the conductor 242a2, and a portion of the top surface of the conductor 242b1 is in contact with the conductor 242b2. Therefore, the insulator 255 is in contact with another portion of the top surface of the conductor 242a1, another portion of the top surface of the conductor 242b1, a side surface of the conductor 242a2, and a side surface of the conductor 242b2 within the aforementioned opening. Furthermore, the insulator 251 is in contact with the top surface of the oxide semiconductor 230, the side surface of the conductor 242a1, the side surface of the conductor 242b1, and the side surface of the insulator 255.
[0487] Insulator 255 is formed into a sidewall shape by anisotropic etching so as to contact the sidewalls of the opening provided in insulator 280. Insulator 255 is formed so as to contact the side surfaces of conductor 242a2 and conductor 242b2 and has the function of protecting conductors 242a2 and conductor 242b2.
[0488] In addition, when the conductor 242a1 and the conductor 242b1 are separated, the insulator 255 is used as a mask. Figure 20 As shown in FIG. 1 and FIG. 2 , when the transistor 200C is viewed in cross section, the side end portions of the insulator 255 are preferably aligned with the side end portions of the conductor 242 a 1 and the side end portions of the conductor 242 b 1 .
[0489] Note that it is preferable to perform heat treatment in an oxygen-containing atmosphere after separating the conductors 242a1 and 242b1 and before depositing the insulator 251. In this case, since the insulator 255 is formed so as to contact the side surfaces of the conductors 242a2 and 242b2, excessive oxidation of the conductors 242a2 and 242b2 can be prevented. Furthermore, even if microwave treatment is performed after separating the conductors 242a1 and 242b1, the formation of oxide films on the side surfaces of the conductors 242a and 242b can be suppressed.
[0490] Insulator 255, insulator 251, insulator 252, and conductor 260 are arranged in the portion of the opening provided in insulator 280 so as to reflect the shape of the opening. Therefore, insulator 255 is arranged to cover the sidewalls of the opening, insulator 251 is arranged to cover the bottom of the opening and insulator 255, insulator 252 is arranged to cover insulator 251, and conductor 260 is arranged to fit into the recess of insulator 252.
[0491] In addition, the thickness of the insulator 255 is preferably not less than 0.5 nm and not more than 20 nm, more preferably not less than 0.5 nm and not more than 10 nm, and even more preferably not less than 0.5 nm and not more than 3 nm. When the insulator 255 has the above thickness, it is possible to suppress excessive oxidation of the conductor 242a2 and the conductor 242b2. Note that the insulator 255 only needs to have a region with a thickness of the above value in at least a portion thereof. In addition, because the insulator 255 is provided in a manner in contact with the sidewalls of the opening formed in the insulator 280, it is preferably deposited using an ALD method with high coverage. When the thickness of the insulator 255 is too large, the deposition time of the insulator 255 using the ALD method is long, resulting in a decrease in productivity. Therefore, it is preferable to set the thickness of the insulator 255 approximately within the above range.
[0492] like Figure 20As shown, when viewed in a cross section along the channel length of transistor 200C, the distance L2 between conductors 242a1 and 242b1 is smaller than the distance L1 between conductors 242a2 and 242b2. Specifically, the difference between distance L1 and distance L2 is equal to twice the thickness of insulator 255. In other words, distance L1 is equal to distance L2 plus twice the thickness of insulator 255. Here, the thickness of insulator 255 refers to the width of at least a portion of insulator 255 in the A1-A2 direction. By adopting this structure, the distance between the source and drain can be further shortened and the channel length can be reduced accordingly. Therefore, the frequency characteristics of transistor 200C can be improved. In this way, by miniaturizing the semiconductor device, a semiconductor device with improved operating speed can be provided.
[0493] In addition, the insulator 255 may also have a stacked structure with more than two layers. In this case, as long as at least one layer is the above-mentioned inorganic insulator that is not easily oxidized. For example, the above-mentioned inorganic insulator that is not easily oxidized is used as the first insulator of the insulator 255, and the insulator that can be used for the insulator 253 (for example, silicon oxide, etc.) is used as the second insulator on the first insulator of the insulator 255. The dielectric constant of the first insulator of the insulator 255 is preferably lower than that of the second insulator of the insulator 255. In this way, by increasing the thickness by adopting a two-layer structure as the insulator 255, the distance between the conductor 260 and the conductor 242a or the conductor 242b can be increased to reduce the parasitic capacitance.
[0494] In addition, with Figure 16A Similarly to the structure shown in FIG. 1 , an insulator 253 may be provided between the oxide semiconductor 230 and the insulator 222 and the insulator 251 (see FIG. 2 ). Figure 21A ).
[0495] In addition, with Figure 16B Similarly to the structure shown in FIG. 1 , the insulator 253 can also be provided between the insulator 251 and the insulator 252 (see FIG. 1 ). Figure 21B ).
[0496] In addition, with Figure 16C Similarly to the structure shown in FIG. 1 , an insulator 253 and an insulator 254 may be provided between the oxide semiconductor 230 and the insulator 222 and the insulator 251 (see FIG. 1 ). Figure 21C ).
[0497] In addition, with Figure 16D Similarly to the structure shown in FIG. 1 , an insulator 224 may be provided between the oxide semiconductor 230 and the insulator 222 (see FIG. 2 ). Figure 21D ).
[0498] In addition, with Figure 16EThe oxide semiconductor 230 may also have a stacked structure of an oxide semiconductor 230a on an insulator 222 and an oxide semiconductor 230b on the oxide semiconductor 230a (see FIG. Figure 21E ).
[0499] Notice, Figures 19B to 19D The insulator 280 is shown as a single-layer structure, but the present invention is not limited thereto. The insulator 280 may also have a stacked structure. For example, 22A to 22D As in the semiconductor device shown in FIG. 1 , the insulator 280 may have a stacked-layer structure of an insulator 280 a and an insulator 280 b on the insulator 280 a .
[0500] Here, it is preferable that the region of the insulator 280a that does not overlap with the oxide semiconductor 230 is in contact with the insulator 222, the side ends of the insulator 280a are in contact with the insulator 255, and the upper ends of the insulator 255, the upper ends of the insulator 251, and the upper ends of the insulator 252 are in contact with the insulator 283. With this structure, in the region sandwiched between the insulator 283 and the insulator 222, the insulator 280b is separated from the oxide semiconductor 230 by the insulator 280a, the insulator 280b is separated from the insulator 251 by the insulator 255, the conductor 260 is separated from the insulator 251 by the insulator 252, and the conductors 242a2 and 242b2 are separated from the insulator 251 by the insulator 255.
[0501] In addition, if FIG. 22B to FIG. 22D As shown, an insulator 282 may be provided between the insulator 283 and the insulator 280 b , the insulator 251 , the insulator 252 , and the conductor 260 .
[0502] In addition, if Figure 22B and Figure 22D As shown, an insulator 271 a may be provided between the conductor 242 a and the insulator 280 , and an insulator 271 b may be provided between the conductor 242 b and the insulator 280 .
[0503] The semiconductor device according to this embodiment includes an OS transistor. The OS transistor has a low off-state current, thereby realizing a semiconductor device with low power consumption. Furthermore, the OS transistor has high frequency characteristics, thereby realizing a semiconductor device with high operating speed. Furthermore, the use of an OS transistor can realize a semiconductor device with excellent electrical characteristics, a semiconductor device with minimal variation in transistor electrical characteristics, a semiconductor device with high on-state current, and a semiconductor device with high reliability.
[0504] This embodiment mode can be combined with other embodiment modes as appropriate. In addition, in this specification, when a plurality of configuration examples are shown in one embodiment mode, the configuration examples can be combined as appropriate.
[0505] (Implementation 4) In this embodiment, referring to Figures 23 to 31 A memory device using a transistor according to one embodiment of the present invention will be described.
[0506] This embodiment describes a structural example of a memory device using a memory cell including the transistors described in the above embodiment. This embodiment describes a structural example of a memory device in which a layer including a functional circuit having a function of amplifying and outputting the data potential held in the memory cell is provided between layers including stacked memory cells.
[0507] [Configuration Example of Storage Device] Figure 23 This is a block diagram showing a storage device according to one embodiment of the present invention.
[0508] Figure 23 The memory device 600 shown includes a driving circuit 621 and a memory array 620. The memory array 620 includes a plurality of memory cells 610 and a functional layer 650 having a plurality of functional circuits 651.
[0509] Figure 23 The memory array 620 is shown as an example including a plurality of memory cells 610 arranged in a matrix of m rows and n columns (m and n are each independently an integer greater than 2). Figure 23 An example is shown in which a functional circuit 651 is provided for each wiring BL serving as a bit line, and an example is also shown in which the functional layer 650 includes a plurality of functional circuits 651 provided corresponding to n wirings BL.
[0510] exist Figure 23 , the first row and first column storage cell 610 is represented as storage cell 610[1, 1], and the m-th row and n-th column storage cell 610 is represented as storage cell 610[m, n]. In addition, in this embodiment, etc., it is sometimes written as "row i" to represent an arbitrary row. In addition, it is sometimes written as "column j" to represent an arbitrary column. Therefore, i is an integer greater than 1 and less than m, and j is an integer greater than 1 and less than n. In addition, in this embodiment, etc., the i-th row and j-th column storage cell 610 is represented as storage cell 610[i, j]. Note that in this embodiment, etc., when expressed as "i+α" (α is a positive integer or a negative integer), "i+α" is not less than 1 and not greater than m. Similarly, when expressed as "j+α", "j+α" is not less than 1 and not greater than n.
[0511] In addition, the memory array 620 includes m wirings WL extending in the row direction, m wirings PL extending in the row direction, and n wirings BL extending in the column direction. In this embodiment and other embodiments, the first wiring WL provided in the first row is referred to as wiring WL[1], and the wiring WL provided in the mth row is referred to as wiring WL[m]. Similarly, the first wiring PL provided in the first row is referred to as wiring PL[1], and the wiring PL provided in the mth row is referred to as wiring PL[m]. Similarly, the first wiring BL provided in the first column is referred to as wiring BL[1], and the wiring BL provided in the nth column is referred to as wiring BL[n].
[0512] The plurality of memory cells 610 arranged in the i-th row are electrically connected to the i-th row wiring WL (wiring WL[i]) and the i-th row wiring PL (wiring PL[i]). The plurality of memory cells 610 arranged in the j-th column are electrically connected to the j-th column wiring BL (wiring BL[j]).
[0513] The memory array 620 can use DOSRAM (registered trademark) (Dynamic Oxide Semiconductor Random Access Memory). DOSRAM is a RAM including 1T (transistor) 1C (capacitor) type memory cells, and is a memory in which the access transistor is an OS transistor. In the off state, the current flowing between the source and the drain of the OS transistor, that is, the leakage current is extremely small. In DOSRAM, by turning off the access transistor (making it non-conductive), the charge according to the data stored in the capacitor can be maintained for a long time. Therefore, compared with DRAM composed of transistors (Si transistors) containing silicon in the channel formation region, the refresh operation frequency of DOSRAM can be lower. As a result, low power consumption can be achieved. In addition, since the frequency characteristics of the OS transistor are high, high-speed reading and writing of the storage device can be performed. Thus, a storage device with a high operating speed can be provided.
[0514] In addition, by using an OS transistor with a small off-state current for a memory cell, the stored content can be maintained for a long time. In other words, since no refresh operation is required or the frequency of the refresh operation is extremely low, the power consumption of the memory device can be substantially reduced. In addition, the frequency of the refresh operation required for a general DRAM is about 1 time / 60msec, and the frequency of the refresh operation of a memory device according to one embodiment of the present invention can be about 1 time / 10sec, that is, it is possible to achieve a refresh line frequency that is 10 times or 100 times higher. In addition, by using a memory device according to one embodiment of the present invention, the frequency of the refresh operation can be set to be greater than 1 time / 1sec and less than 1 time / 100sec, preferably greater than 1 time / 5sec and less than 1 time / 50sec.
[0515] For example, Figure 23 The illustrated memory array 620 may include a plurality of memory arrays 620[1] to 620[m] stacked together. By arranging the memory arrays 620[1] to 620[m] included in the memory array 620 in a direction perpendicular to the substrate surface on which the driver circuit 621 is provided, the storage density of the memory cell 610 may be increased.
[0516] Wiring BL is used as a bit line for writing and reading data. Wiring WL is used as a word line to control the on / off state (conductive state or non-conductive state) of the access transistor used as a switch. Wiring PL is used as a constant potential line connected to the capacitor. In addition, wiring CL (not shown) can be provided separately as a wiring for transmitting the back gate potential to the back gate of the OS transistor of the access transistor. Alternatively, a structure can be adopted in which wiring PL also serves as a transmission back gate potential.
[0517] The memory cells 610 included in each of the memory arrays 620[1] to 620[m] are connected to the functional circuit 651 via wiring BL. The wiring BL can be arranged in a direction perpendicular to the substrate surface on which the driver circuit 621 is provided. By arranging the wiring BL extending from the memory cells 610 included in the memory arrays 620[1] to 620[m] in a direction perpendicular to the substrate surface, the length of the wiring between the memory array 620 and the functional circuit 651 can be shortened. Therefore, since the signal transmission distance between the two circuits connected to the bit line can be shortened and the resistance and parasitic capacitance of the bit line can be significantly reduced, power consumption and signal delay can be reduced. In addition, operation can be achieved even if the capacitance of the capacitor included in the memory cell 610 is reduced.
[0518] The functional circuit 651 has the function of amplifying the data potential held in the memory cell 610 and outputting it to the sense amplifier 646 included in the driver circuit 621 via the wiring GBL (not shown), which will be described later. This structure allows amplification of a small potential difference in the wiring BL when reading data. The wiring GBL, like the wiring BL, can be arranged in a direction perpendicular to the substrate surface on which the driver circuit 621 is provided. By arranging the wiring BL and the wiring GBL extending from the memory cells 610 included in the memory array 620[1] to 620[m] in a direction perpendicular to the substrate surface, the length of the wiring between the functional circuit 651 and the sense amplifier 646 can be shortened. Consequently, since the signal transmission distance between the two circuits connected to the wiring GBL can be shortened and the resistance and parasitic capacitance of the wiring GBL can be significantly reduced, power consumption and signal delay can be reduced.
[0519] Furthermore, the wiring BL is provided so as to be in contact with the semiconductor layer of the transistor included in the memory cell 610. Alternatively, the wiring BL is provided so as to be in contact with a region of the semiconductor layer of the transistor included in the memory cell 610 that functions as a source or drain. Alternatively, the wiring BL is provided so as to be in contact with a conductive body that is in contact with a region of the semiconductor layer of the transistor included in the memory cell 610 that functions as a source or drain. In other words, the wiring BL can be said to be a wiring that electrically connects one of the source and drain of the transistor included in the memory cell 610 in each layer of the memory array 620 to the functional circuit 651 in the vertical direction.
[0520] The memory array 620 can be arranged to overlap the driver circuit 621. By overlapping the driver circuit 621 and the memory array 620, the signal transmission distance between the driver circuit 621 and the memory array 620 can be shortened. Consequently, the resistance and parasitic capacitance between the driver circuit 621 and the memory array 620 are reduced, thereby reducing power consumption and signal delay. Furthermore, the memory device 600 can be miniaturized.
[0521] By configuring the functional circuit 651 using OS transistors, similar to the transistors included in the memory cell 610 of the DOSRAM, the functional circuit 651 can be freely arranged on a circuit using Si transistors, similar to the memory array 620[1] to 620[m], thereby facilitating integration. By employing a structure in which the functional circuit 651 amplifies the signal, circuits such as the sense amplifier 646 in the subsequent circuit stage can be miniaturized, thereby miniaturizing the memory device 600.
[0522] The driving circuit 621 includes a PSW 622 (power switch), a PSW 623 , and a peripheral circuit 631 . The peripheral circuit 631 includes a peripheral circuit 641 , a control circuit 632 , and a voltage generating circuit 633 .
[0523] In memory device 600, various circuits, signals, and voltages can be appropriately selected as needed. Alternatively, other circuits or signals may be added. Signals BW, CE, GW, CLK, WAKE, ADDR, WDA, PON1, and PON2 are external input signals, while signal RDA is an external output signal. Signal CLK is a clock signal.
[0524] In addition, signals BW, CE, and GW are control signals. Signal CE is a chip enable signal, signal GW is a global write enable signal, and signal BW is a byte write enable signal. Signal ADDR is an address signal. Signal WDA is write data, and signal RDA is read data. Signals PON1 and PON2 are power gating control signals. Signals PON1 and PON2 can also be generated in control circuit 632.
[0525] The control circuit 632 is a logic circuit that controls the overall operation of the memory device 600. For example, the control circuit performs logical operations on signals CE, GW, and BW to determine the operating mode (e.g., write operation, read operation) of the memory device 600. Alternatively, the control circuit 632 generates control signals for the peripheral circuit 641 to implement the aforementioned operating mode.
[0526] Voltage generating circuit 633 generates a negative voltage. Signal WAKE controls the input of signal CLK to voltage generating circuit 633. For example, when signal WAKE is at an H level, signal CLK is input to voltage generating circuit 633, causing voltage generating circuit 633 to generate a negative voltage.
[0527] The peripheral circuit 641 is a circuit for writing and reading data from the memory cell 610. Furthermore, the peripheral circuit 641 is a circuit for outputting various signals for controlling the functional circuit 651. The peripheral circuit 641 includes a row decoder 642, a row driver 643, a column decoder 644, a column driver 645, a sense amplifier 646, an input circuit 647, and an output circuit 648.
[0528] The row decoder 642 and column decoder 644 decode the signal ADDR. The row decoder 642 specifies the row to be accessed, while the column decoder 644 specifies the column to be accessed. The row driver 643 selects the wiring WL specified by the row decoder 642. The column driver 645 writes data to the memory cell 610, reads data from the memory cell 610, and stores the read data.
[0529] Input circuit 647 holds signal WDA. Data held in input circuit 647 is output to column driver 645. The output data from input circuit 647 is data (Din) written to memory cell 610. Data (Dout) read from memory cell 610 by column driver 645 is output to output circuit 648. Output circuit 648 holds Dout. Furthermore, output circuit 648 outputs Dout to the outside of memory device 600. Data output from output circuit 648 is signal RDA.
[0530] PSW622 has the function of controlling the supply of VDD to the peripheral circuit 631. PSW623 has the function of controlling the supply of VHM to the row driver 643. Here, the high power supply voltage of the memory device 600 is VDD, and the low power supply voltage is GND (ground potential). In addition, VHM is a high power supply voltage for making the word line high, which is higher than VDD. The on / off of PSW622 is controlled by the signal PON1, and the on / off of PSW623 is controlled by the signal PON2. Figure 23 In the embodiment, the number of power domains to which VDD is supplied in the peripheral circuit 631 is one, but it may be multiple. In this case, a power switch may be provided for each power domain.
[0531] The memory array 620 includes memory arrays 620[1] to 620[m] (m is an integer greater than or equal to 2) and a functional layer 650. Multiple layers of memory arrays 620 can be stacked on the driver circuit 621. By stacking multiple layers of memory arrays 620, the storage density of the memory cell 610 can be increased. Figure 24A 1 is a perspective view of a memory device 600 in which a functional layer 650 and five layers (m=5) of memory arrays 620 [ 1 ] to 620 [ 5 ] are stacked on a driving circuit 621 .
[0532] exist Figure 24A In the example, the memory array 620 provided in the first layer is referred to as the memory array 620[1], the memory array 620 provided in the second layer is referred to as the memory array 620[2], and the memory array 620 provided in the fifth layer is referred to as the memory array 620[5]. Figure 24A The diagram shows wirings WL, CL, and PL extending in the X direction, and wirings BL extending in the Z direction (a direction perpendicular to the substrate surface on which the driver circuit is provided). Note that for easier understanding of the drawings, some of the wirings WL and PL included in each memory array 620 are omitted.
[0533] Figure 24B Show instructions Figure 24A Schematic diagram of a structural example of a functional circuit 651 connected to the wiring BL and a memory cell 610 included in a memory array 620[1] to 620[5] connected to the wiring BL. Figure 24B The wiring GBL provided between the functional circuit 651 and the driver circuit 621 is shown. Furthermore, a structure that electrically connects one wiring BL to a plurality of memory cells (memory cells 610) is also referred to as a "memory string." Note that in the drawings, the wiring GBL is sometimes shown with a thick line for improved visibility.
[0534] Figure 24B An example of a circuit structure of a memory cell 610 connected to a wiring BL is shown. The memory cell 610 includes a transistor 611 and a capacitor 612. Regarding the transistor 611, the capacitor 612, and each wiring (wiring BL, wiring WL, etc.), for example, wiring BL[1] and wiring WL[1] are sometimes referred to as wiring BL and wiring WL, etc. Here, the transistor 611 corresponds to the transistor 200A to the transistor 200C shown in the above embodiment. Note that although Figure 24B The transistor 611 is shown to include a back gate, but may not include a back gate.
[0535] In memory cell 610, one of the source and drain of transistor 611 is connected to wiring BL. The other of the source and drain of transistor 611 is connected to one electrode of capacitor 612. The other electrode of capacitor 612 is connected to wiring PL. The gate of transistor 611 is connected to wiring WL. The back gate of transistor 611 is connected to wiring CL.
[0536] Wiring PL is a wiring that supplies a constant potential for maintaining the potential of capacitor 612. Wiring CL is a wiring that supplies a constant potential for controlling the threshold voltage of transistor 611. Wiring PL and wiring CL may also have the same potential. In this case, by connecting the two wirings, the number of wirings connected to memory cell 610 can be reduced.
[0537] Figure 24B The wiring GBL shown is provided so as to electrically connect the driver circuit 621 and the functional layer 650 . Figure 25A FIG. 6 is a schematic diagram showing a memory device 600 with a functional circuit 651 and memory arrays 620[1] to 620[m] as a repeating unit 670. Figure 25A One wiring GBL is shown in the figure, but the wiring GBL may be appropriately provided according to the number of functional circuits 651 in the functional layer 650 .
[0538] Furthermore, the GBL wiring is provided so as to be in contact with the semiconductor layer of the transistor included in the functional circuit 651. Alternatively, the GBL wiring is provided so as to be in contact with a region of the semiconductor layer of the transistor included in the functional circuit 651 that functions as a source or drain. Alternatively, the GBL wiring is provided so as to be in contact with a conductive body that is in contact with a region of the semiconductor layer of the transistor included in the functional circuit 651 that functions as a source or drain. In other words, the GBL wiring can be said to be a wiring that electrically connects one of the source and drain of the transistor included in the functional circuit 651 of the functional layer 650 to the driver circuit 621 in a vertical direction.
[0539] Alternatively, a structure may be provided in which a repeating unit 670 including a functional circuit 651 and memory arrays 620[1] to 620[m] is stacked. Figure 25B The repeating units 670[1] to 670[p] (p is an integer greater than or equal to 2) may be included. The wiring GBL is connected to the functional layer 650 included in the repeating unit 670. The wiring GBL may be appropriately provided according to the number of functional circuits 651.
[0540] In one embodiment of the present invention, OS transistors are stacked and bit line wiring is arranged perpendicular to the substrate surface on which the driver circuit 621 is provided. By arranging the bit line wiring extending from the memory array 620 in a direction perpendicular to the substrate surface, the length of the wiring between the memory array 620 and the driver circuit 621 can be shortened. Consequently, parasitic capacitance of the bit line can be significantly reduced.
[0541] In addition, one embodiment of the present invention includes a functional layer 650 in the layer where the memory array 620 is provided. This functional layer 650 includes a functional circuit 651 that amplifies the data potential held in the memory cell 610 and outputs it. This structure allows the amplification of a minute potential difference in the wiring BL used as a bit line when reading data, thereby driving the sense amplifier 646 included in the driver circuit 621. This allows for miniaturization of circuits such as the sense amplifier, thereby miniaturizing the memory device 600. Furthermore, even with a reduced capacitance, the capacitor 612 included in the memory cell 610 can operate.
[0542] Note that the above description describes a memory device including the memory arrays 620 [ 1 ] to 620 [ m ], but the semiconductor device according to the present invention can also be applied to a single-layer memory device including only the memory array 620 [ 1 ].
[0543] Note that, although the memory cell 610 has an example of a 1T (transistor) 1C (capacitor) type structure shown above, the present invention is not limited to this. Figure 26A As shown, a 3T1C type memory cell can also be used for the memory device. Figure 26A The memory cell shown includes transistors 611a, 611b, and 611c, and a capacitor 612a. Transistors 611a, 611b, and 611c may have the same structure as transistor 611, and capacitor 612a may have the same structure as capacitor 612. A RAM having the above structure is sometimes referred to as a NOSRAM (registered trademark) (Nonvolatile Oxide Semiconductor RAM).
[0544] like Figure 26A As shown, one of the source and drain of transistor 611a is electrically connected to one electrode of capacitor 612a and the first gate of transistor 611b. Furthermore, one of the source and drain of transistor 611b is electrically connected to one of the source and drain of transistor 611c. Note that wiring can be appropriately provided for the first gate of transistor 611a, the other of the source and drain of transistor 611a, the second gate of transistor 611a, the other of the source and drain of transistor 611b, the second gate of transistor 611b, the first gate of transistor 611c, the other of the source and drain of transistor 611c, the second gate of transistor 611c, and the other of capacitor 612a. Furthermore, the structure of the memory device can be modified appropriately to correspond to the above wiring.
[0545] In addition, if Figure 26B As shown, a structure in which only the transistors 611a and 611b and the capacitor 612a are provided instead of the transistor 611c may be employed.
[0546] In addition, when the parasitic capacitance of the transistor 611a and the transistor 611b is sufficiently large, as shown in FIG. Figure 26C As shown, the capacitor 612a may not be provided. In this case, the memory cell is constituted by only the transistor 611a and the transistor 611b.
[0547] [Configuration Example of Memory Array 620 and Functional Circuit 651] Reference Figure 27 illustrate Figures 23 to 25B The configuration examples of the functional circuit 651 and the sense amplifier 646 included in the memory array 620 and the driver circuit 621 are described. Figure 27 The driving circuit 621 is shown, and the driving circuit 621 is connected to the wiring GBL (wiring GBL_A, wiring GBL_B), and the wiring GBL is connected to the functional circuit 651 (functional circuit 651A, functional circuit 651B), and the functional circuit 651 is connected to the memory cell 610 (memory cell 610A, memory cell 610B) connected to different wirings BL (wiring BL_A, wiring BL_B). Figure 27 The driving circuit 621 shown includes, in addition to the sense amplifier 646 , a precharge circuit 671A, a precharge circuit 671B, a switch circuit 672A, a switch circuit 672B, and a write / read circuit 673 .
[0548] Transistors 652a, 652b, 653a, 653b, 654a, 654b, 655a, and 655b are shown as the functional circuits 651A and 651B. Figure 27The transistors 652a, 652b, 653a, 653b, 654a, 654b, 655a, and 655b shown are OS transistors, similar to the transistor 611 included in the memory cell 610. The functional layer 650 including the functional circuit 651 can be stacked similarly to the memory arrays 620[1] to 620[m].
[0549] Wiring BL_A is connected to the gate of transistor 652a, and wiring BL_B is connected to the gate of transistor 652b. Wiring GBL_A is connected to one of the source and drain of transistors 653a and 654a. Wiring GBL_B is connected to one of the source and drain of transistors 653b and 654b. Like wiring BL_A and BL_B, wiring GBL_A and GBL_B are arranged in a vertical direction and connected to transistors included in driver circuit 621. Figure 27 As shown, the gates of the transistors 653a, 653b, 654a, 654b, 655a, and 655b are supplied with the selection signal MUX, the control signal WE, or the control signal RE.
[0550] constitute Figure 27 Transistors 681_1 to 681_6 and 682_1 to 682_4 of the sense amplifier 646, precharge circuits 671A, and precharge circuits 671B are shown as being made of Si transistors. Switches 683A to 683D of the switch circuits 672A and 672B can also be made of Si transistors. One of the source and drain electrodes of transistors 653a, 653b, 654a, and 654b is connected to a transistor or switch of the precharge circuits 671A, 671B, sense amplifier 646, and switch circuit 672A.
[0551] The precharge circuit 671A includes n-channel transistors 681_1 to 681_3. The precharge circuit 671A precharges the wirings BL_A and BL_B to an intermediate potential VPC (VDD / 2) between the high power supply potential (VDD) and the low power supply potential (VSS) in response to a precharge signal supplied to the precharge line PCL1.
[0552] The precharge circuit 671B includes n-channel transistors 681_4 to 681_6 and precharges the wirings GBL_A and GBL_B to an intermediate potential VPC corresponding to VDD / 2 between VDD and VSS in response to a precharge signal supplied to the precharge line PCL2.
[0553] The sense amplifier 646 includes p-channel transistors 682_1 and 682_2, and n-channel transistors 682_3 and 682_4, connected to wiring VHH or wiring VLL. Wiring VHH or wiring VLL functions as a supply of VDD or VSS. Transistors 682_1 to 682_4 form an inverter loop. The potential of wirings BL_A and BL_B, which are precharged by selecting memory cells 610A and 610B, changes, and the potential of wirings GBL_A and GBL_B is set to VDD or VSS based on this change. The potential of wirings GBL_A and GBL_B can be output externally via switches 683C and 683D and the write / read circuit 673. Wirings BL_A and BL_B, and wirings GBL_A and GBL_B, correspond to a bit line pair. Writing of data signals by the write / read circuit 673 is controlled by signal EN_data.
[0554] Switch circuit 672A controls the conduction state between sense amplifier 646 and wirings GBL_A and GBL_B. Switch circuit 672A can be switched on and off by controlling switching signal CSEL1. If switches 683A and 683B are n-channel transistors, they are turned on when switching signal CSEL1 is high and turned off when switching signal CSEL1 is low. Switch circuit 672B controls the conduction state between write / read circuit 673 and the bit line pair connected to sense amplifier 646. Switch circuit 672B can be switched on and off by controlling switching signal CSEL2. Switches 683C and 683D can function similarly to switches 683A and 683B.
[0555] like Figure 27 As shown, the memory device 600 can have a structure in which the memory cell 610, the functional circuit 651, and the sense amplifier 646 are connected via the wiring BL and the wiring GBL arranged in the shortest vertical direction. Although the number of functional layers 650 including transistors constituting the functional circuit 651 increases, the load on the wiring BL is reduced, thereby shortening the writing time and facilitating data reading.
[0556] In addition, if Figure 27 As shown, the transistors included in functional circuits 651A and 651B are controlled by control signals WE and RE and a select signal MUX. In response to the control and select signals, each transistor outputs the potential of wiring BL to driver circuit 621 via wiring GBL. Functional circuits 651A and 651B can be used as sense amplifiers comprised of OS transistors. This structure amplifies minute potential differences in wiring BL during readout, enabling the driving of sense amplifier 646 using Si transistors.
[0557] <Memory Cell Structure Example 1> use Figure 28 An example of the structure of the storage unit 610 used in the above-mentioned storage device will be described.
[0558] Note that in Figure 28 In FIG, the X direction is parallel to the channel width direction of the transistor, the Y direction is perpendicular to the X direction, and the Z direction is perpendicular to the X direction and the Y direction.
[0559] like Figure 28 As shown, the memory cell 610 includes a transistor 611 and a capacitor 612. An insulator 285 is provided on the transistor 611 and an insulator 284 is provided on the insulator 285. The insulators that can be used for the insulator 216 can be used for the insulator 285 and the insulator 284. In addition, the transistor 611 has the same structure as the transistor 200B shown in the above embodiment, and the same symbols are attached to the same components. For details of the transistor 200B, reference can be made to the above embodiment. In addition, the conductor 240 (conductor 240a and conductor 240b) is provided in a manner that contacts one of the source electrode and the drain electrode (conductor 242b) of the transistor 611. The conductor 240 extends in the Z direction and is used as the wiring BL.
[0560] The capacitor 612 includes a conductor 453 on the conductor 242 a , an insulator 454 on the conductor 453 , and conductors 460 (conductors 460 a and 460 b ) on the insulator 454 .
[0561] At least a portion of each of conductor 453, insulator 454, and conductor 460 is disposed inside openings provided in insulators 280, 283, and 285. An end portion of each of conductor 453, insulator 454, and conductor 460 is located at least on insulator 283, preferably on insulator 285. Insulator 454 is provided so as to cover the end portion of conductor 453. This allows for electrical insulation between conductor 453 and conductor 460.
[0562] The deeper the openings provided in insulators 280, 283, and 285 (that is...
Claims
1. A semiconductor device comprising: oxide semiconductors; Conductors; a first insulator provided between the oxide semiconductor and the conductor; as well as a second insulator opposed to the first insulator via the oxide semiconductor, Wherein, the first insulator has the function of capturing or fixing hydrogen, The first insulator comprises hafnium, silicon and oxygen, The second insulator is in contact with at least a portion of the oxide semiconductor, The second insulator has hydrogen barrier properties, The hydrogen concentration of the oxide semiconductor is lower than 1×10 19 atoms / cm 3 , In at least a portion of a region between the oxide semiconductor and the conductor, the hydrogen concentration of the first insulator is 1×10 19 atoms / cm 3 above, Furthermore, the hydrogen concentration of the oxide semiconductor and the hydrogen concentration of the first insulator are values measured using secondary ion mass spectrometry.
2. The semiconductor device according to claim 1, The composition ratio of silicon to hafnium and silicon in the first insulator is greater than or equal to 1 atomic % and less than or equal to 10 atomic %.
3. A semiconductor device comprising: oxide semiconductors; Conductors; a first insulator provided between the oxide semiconductor and the conductor; as well as a second insulator opposed to the first insulator via the oxide semiconductor, Wherein, the first insulator has the function of capturing or fixing hydrogen, The first insulator has an amorphous structure, The second insulator is in contact with at least a portion of the oxide semiconductor, The second insulator has hydrogen barrier properties, The hydrogen concentration of the oxide semiconductor is lower than 1×10 19 atoms / cm 3 , In at least a portion of a region between the oxide semiconductor and the conductor, the hydrogen concentration of the first insulator is 1×10 19 atoms / cm 3 above, Furthermore, the hydrogen concentration of the oxide semiconductor and the hydrogen concentration of the first insulator are values measured using secondary ion mass spectrometry.
4. A semiconductor device comprising: oxide semiconductors; Conductors; a first insulator provided between the oxide semiconductor and the conductor; a second insulator opposed to the first insulator via the oxide semiconductor; a third insulator disposed between the conductor and the first insulator; as well as a fourth insulator provided between the oxide semiconductor and the second insulator, The first insulator and the fourth insulator have the function of capturing or fixing hydrogen. The first insulator and the fourth insulator include hafnium, silicon and oxygen, The second insulator and the third insulator have hydrogen barrier properties, The hydrogen concentration of the oxide semiconductor is lower than 1×10 19 atoms / cm 3 , In at least a portion of a region between the oxide semiconductor and the conductor, the hydrogen concentration of the first insulator is 1×10 19 atoms / cm 3 above, Furthermore, the hydrogen concentration of the oxide semiconductor and the hydrogen concentration of the first insulator are values measured using secondary ion mass spectrometry.
5. The semiconductor device according to claim 4, wherein the composition ratio of silicon to hafnium and silicon in the first insulator is 1 atomic % or more and 10 atomic % or less, Furthermore, a composition ratio of silicon to hafnium and silicon in the fourth insulator is greater than or equal to 1 atomic % and less than or equal to 10 atomic %.
6. A semiconductor device comprising: oxide semiconductors; Conductors; a first insulator provided between the oxide semiconductor and the conductor; a second insulator opposed to the first insulator via the oxide semiconductor; a third insulator disposed between the conductor and the first insulator; as well as a fourth insulator provided between the oxide semiconductor and the second insulator, The first insulator and the fourth insulator have the function of capturing or fixing hydrogen. The first insulator and the fourth insulator have an amorphous structure, The second insulator and the third insulator have hydrogen barrier properties, The hydrogen concentration of the oxide semiconductor is lower than 1×10 19 atoms / cm 3 , In at least a portion of a region between the oxide semiconductor and the conductor, the hydrogen concentration of the first insulator is 1×10 19 atoms / cm 3 above, Furthermore, the hydrogen concentration of the oxide semiconductor and the hydrogen concentration of the first insulator are values measured using secondary ion mass spectrometry.
7. The semiconductor device according to any one of claims 1 to 6, The second insulator includes silicon and nitrogen.
8. The semiconductor device according to any one of claims 1 to 6, wherein the second insulator includes an opening, The oxide semiconductor is provided inside the opening portion included in the second insulator, and forms a channel along a side surface of the opening portion included in the second insulator.
9. The semiconductor device according to any one of claims 1 to 6, further comprising: a fifth insulator including an opening, wherein the oxide semiconductor is provided on the second insulator, The fifth insulator is provided on the oxide semiconductor. Furthermore, the first insulator and the conductor are disposed inside the opening of the fifth insulator.
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