Chip multi-layer structure subfissure detection method and system based on multi-mode sensing fusion

Abstract

The invention relates to a chip multilayer structure subfissure detection method and system based on multi-mode sensing fusion, and the method comprises the following steps: scanning a chip based on 3D structured light, and generating a topological graph of a chip multilayer structure; obtaining surface defects of the chip multilayer structure through polarization multispectral imaging to form optical data; detecting microcracks in the multi-layer structure of the chip through electric heating excitation and infrared thermal imaging to form thermal imaging data, positioning the positions of the microcracks in the multi-layer structure of the chip through high-frequency ultrasound in combination with the thermal imaging data, and detecting to form ultrasonic data; optical data, thermal imaging data and ultrasonic data are fused to form multi-modal data, and the multi-modal data are combined with the topological graph to generate a defect three-dimensional distribution graph. The method and the device have the effect of realizing the detection accuracy of the hidden crack of the multi-layer structure.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor detection, and in particular to a method and system for detecting hidden cracks in a chip multilayer structure based on multimodal sensing fusion. Background Art

[0002] As chip integration increases, the problem of hidden cracks in multi-layer heterogeneous structures such as PI insulation layer, Si substrate layer, metal layer, SiN passivation layer, etc. is becoming increasingly prominent.

[0003] Traditional inspection technologies have the following limitations: 1. AOI: This technology is susceptible to interference from the high reflectivity of the metal layer, making it difficult to penetrate multi-layer structures, resulting in a missed detection rate of over 30%; 2. SAT: Although high-frequency probes (such as 500MHz) have a resolution of 0.5μm, the metal layer will shield the acoustic wave signal, resulting in missed detection of interface cracks; 3. Single-modal inspection: This technology is unable to synchronously obtain the correlation information between material properties and defects, leading to misjudgment.

[0004] Regarding the above-mentioned related technologies, the inventors believe that there is currently no solution for detecting hidden cracks in multi-layer heterogeneous structures, resulting in insufficient accuracy in detecting hidden cracks in multi-layer chip structures. Therefore, there is an urgent need for a high-precision detection solution that integrates multiple physical field signals. Summary of the Invention

[0005] In order to achieve accurate detection of hidden cracks in multi-layer structures, the present application provides a chip multi-layer structure hidden crack detection method and system based on multimodal sensing fusion.

[0006] The present application provides a method for detecting hidden cracks in a multi-layer chip structure based on multimodal sensing fusion, which adopts the following technical solutions: A method for detecting hidden cracks in a chip multilayer structure based on multimodal sensor fusion includes the following steps: Scan the chip with 3D structured light to generate a topological map of the chip's multi-layer structure; Obtain optical data on surface defects in multi-layer chip structures through polarization multispectral imaging; The microcracks inside the chip's multilayer structure are detected through electrothermal excitation and infrared thermal imaging to generate thermal imaging data. The microcracks inside the chip's multilayer structure are located and detected through high-frequency ultrasound combined with thermal imaging data to generate ultrasonic data. The optical data, the thermal imaging data and the ultrasonic data are fused to form multimodal data, and the multimodal data is combined with the topological map to generate a three-dimensional defect distribution map.

[0007] Preferably, the step of detecting microcracks inside the multilayer structure of the chip to form thermal imaging data by electrothermal excitation and infrared thermal imaging includes the following steps: Apply pulse current to the multilayer structure of the chip through a dot-matrix probe array; Infrared thermal imaging captures temperature anomalies inside the chip's multi-layer structure, determines the location of microcracks inside the chip's multi-layer structure, and forms thermal imaging data.

[0008] Preferably, the pulse current applied by the dot matrix probe array is 10 mA to 20 mA, the width of the pulse current is 10 ms, and the interval of the pulse current is 20 ms.

[0009] Preferably, the step of locating the position of microcracks inside the chip multilayer structure by combining high-frequency ultrasound with thermal imaging data and detecting and forming ultrasonic data includes the following steps: Mark the temperature anomaly points in the thermal imaging data as the center coordinates of the area to be detected; Mark the height range of each layer based on the topological map of the chip's multi-layer structure and determine the height coordinates of the temperature anomaly point; Deionized water is sprayed on the chip surface through a micro nozzle to form a local water film area, the center coordinates of the local water film area are the same as the center coordinates of the area to be detected, and the center coordinates of the local water film area are located in a direction perpendicular to the center coordinates of the area to be detected; The high-frequency ultrasonic probe is vertically aligned with the center of the local water film area. Based on the height coordinates of the temperature anomaly points, acoustic impedance imaging is performed on the temperature anomaly points inside the multi-layer structure of the chip to obtain crack depth data to form ultrasonic data.

[0010] Preferably, the thickness of the local water film area is ≤50 μm.

[0011] Preferably, the water film coverage diameter of the local water film area = 2×maximum estimated length of microcracks + probe focal spot diameter; Among them, the maximum estimated length of the microcrack is determined by the temperature anomaly point inside the multi-layer structure of the chip captured by infrared thermal imaging, and the probe focal spot diameter is determined by the high-frequency ultrasonic probe based on the height coordinate of the temperature anomaly point.

[0012] Preferably, the high-frequency ultrasonic probe locates the position of the temperature anomaly point inside the multi-layer structure of the chip based on the ultrasonic echo time difference formula, and the ultrasonic echo time difference formula is as follows:

[0013] Preferably, after the step of locating the position of microcracks inside the chip multilayer structure by combining high-frequency ultrasound with thermal imaging data and detecting and forming ultrasonic data, the following step is also included: The residual deionized water on the chip surface was removed by nitrogen purge.

[0014] Preferably, the method further comprises the following steps: The multimodal data is combined with the topological map to generate a three-dimensional defect distribution map and a risk assessment report.

[0015] The present application provides a chip multilayer structure hidden crack detection system based on multimodal sensor fusion, which adopts the following technical solutions: A chip multilayer structure hidden crack detection system based on multimodal sensor fusion, comprising: Detection platform, used to carry chips; 3D structured light scanner, which scans the chip based on 3D structured light to generate a topological map of the chip's multi-layer structure; Polarization multispectral camera, which acquires optical data of surface defects in multi-layer chip structures based on polarization multispectral imaging; Electrothermal excitation probes and infrared imagers are used to detect thermal imaging data of microcracks inside the chip's multilayer structure; High-frequency ultrasonic probe, which locates the location of microcracks inside the chip's multi-layer structure based on high-frequency ultrasound combined with thermal imaging data and detects and generates ultrasonic data; An analysis platform is used to fuse optical data, thermal imaging data and ultrasonic data to form multimodal data, and the multimodal data is combined with the topological map to generate a three-dimensional defect distribution map.

[0016] In summary, this application includes at least one of the following beneficial technical effects: 1. This application upgrades the detection dimension from two-dimensional to three-dimensional. Traditional defect detection (such as AOI and SAT) mainly relies on two-dimensional plane images or cross-sectional scanning, which cannot fully reflect the spatial distribution of hidden cracks in multi-layer structures, such as the extension path of cracks between the PI insulation layer, Si substrate layer, metal layer, and SiN passivation layer. This application, by fusing multimodal data (light, sound, and heat), constructs a three-dimensional defect distribution map, achieving accurate visualization of defect depth, direction, and inter-layer correlation, with the aim of solving the problem of hidden cracks in complex chips. 2. This application fuses optical data, thermal imaging data, and ultrasonic data to form multimodal data, generating a three-dimensional defect distribution map and risk assessment report to improve classification accuracy; 3. This application is based on a 3D structured light scanning chip to achieve layer-by-layer focusing, such as separating surface cracks in the PI insulation layer from hidden cracks inside the metal layer to avoid multi-layer signal interference. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a flowchart of the chip multi-layer structure hidden crack detection method based on multi-modal sensor fusion.

[0018] Figure 2 It is a schematic diagram of the process of generating thermal imaging data of microcracks inside the multi-layer structure of a chip.

[0019] Figure 3 It is a schematic diagram of the process of locating microcracks inside a chip's multilayer structure and detecting and generating ultrasonic data. DETAILED DESCRIPTION

[0020] The following is combined with Figure 1-3 This application is described in further detail.

[0021] Example 1 A chip multilayer structure hidden crack detection method based on multimodal sensor fusion, referring to Figure 1 As shown, the following steps are included: Preprocessing steps: Based on 3D structured light scanning of the chip, a topological map of the chip's multi-layer structure is generated.

[0022] In the preprocessing step, specifically, in this embodiment, the chip is placed on a detection platform, the detection platform has an XY precision moving stage, supports a 660mm×650mm stroke, and a repeat positioning accuracy of ±0.5μm. A vacuum adsorption fixture is set in the center of the detection platform for fixing the chip, which is compatible with 12-inch wafers, and the adsorption pressure is adjustable (0~80kPa). The surface of the vacuum adsorption fixture is covered with an anti-static ceramic coating.

[0023] The 3D structured light scanner is set above the detection platform. The 3D structured light scanner scans the chip based on 3D structured light, and then generates a topological map of the chip's multi-layer structure. The above-mentioned chip multi-layer structure refers to the PI insulation layer, Si substrate layer, metal layer, and SiN passivation layer, and the topological map of the chip multi-layer structure refers to the topological maps of the PI insulation layer, Si substrate layer, metal layer, metal layer, and SiN passivation layer respectively.

[0024] 3D structured light technology projects a specific pattern of light field (such as stripes, dot matrix, coded pattern) onto the target object, and uses the geometric deformation and phase change of light to calculate the three-dimensional coordinates of the object. In the chip field, its workflow is as follows: 1. Light source projection: Infrared laser or LED projects structured light pattern (such as Gray code stripes, sinusoidal grating) onto the chip surface; 2. Image acquisition: High-resolution CMOS / CCD camera captures the deformed light field modulated by the chip surface morphology; 3. 3D reconstruction: Through phase solution and stereo matching algorithm, the depth value (Z-axis coordinate) of each pixel is calculated to generate a 3D point cloud model.

[0025] In this application, a Z-axis piezoelectric driver is provided on the chip-carrying detection platform with a stroke of 50-200μm, a resolution of ≤2.5nm, and a response time of less than 1ms. The Z-axis piezoelectric driver dynamically adjusts the focus position of the structured light, and combines the layer-by-layer scanning strategy to separate the imaging data of the PI insulation layer, Si substrate layer, metal layer, and SiN passivation layer to achieve high-precision three-dimensional imaging of the multi-layer structure inside the chip, thereby generating a topological map of the chip's multi-layer structure.

[0026] The following explains how to generate a topology map of the metal layer in a chip using 3D structured light: 1. 3D structured light scanning: 1. Project stripe light onto the chip (e.g., a wavelength of 780nm, which can penetrate thin dielectric layers (e.g., <10μm SiO2) to reduce the impact of surface occlusion). The quad-lens camera captures the deformed stripes and outputs point cloud data (x, y, z). 2. Generate a multi-layer topology map: 1. Perform hierarchical clustering of the point cloud using the DBSCAN algorithm; 2. Mark the height range of each layer (e.g., z = 45-70 μm for the metal layer); 3. Specific identification of metal layers: 1. Multispectral reflectivity analysis, such as using a 1550nm supercontinuum laser (power 10-50mW) as the light source, combined with a fiber spectrometer (resolution 2nm), with a metal region (Cu / Al) reflectivity >90% and a dielectric layer (SiO2 / SiN) reflectivity <30%, to extract candidate metal regions through threshold segmentation; 4. GDSII coordinate matching: 1. Align the topology map with the design coordinates and output the metal layer area boundary coordinates (x min ,y min ,x max ,y max ).

[0027] At this point, it is possible to use 3D structured light to generate a topological map of the metal layer in the chip, and to locate the boundary coordinates of the metal layer area through 3D structured light. Similarly, 3D structured light can be used to locate the boundary coordinates of each layer area in the chip's multi-layer structure.

[0028] Multimodal data collection steps: Polarization multispectral imaging is used to obtain optical data of surface defects in the chip's multi-layer structure. Electrothermal excitation and infrared thermal imaging are used to detect microcracks inside the chip's multi-layer structure to form thermal imaging data. High-frequency ultrasound combined with thermal imaging data is used to locate the position of microcracks inside the chip's multi-layer structure and detect them to form ultrasonic data.

[0029] In the multimodal data acquisition step, a polarization multispectral camera is specifically positioned above the detection platform. Polarization multispectral imaging is an imaging technology that fuses the polarization properties of light (polarization degree, polarization angle, Stokes parameters) with multispectral wavelength information (ultraviolet-infrared bands). This technology achieves high-precision detection of material composition, surface structure, and defects by acquiring multidimensional optical information. In this embodiment, the polarization multispectral camera uses a light source in the 1050-1550nm wavelength range, a circular polarization filter to suppress metal reflections, and is aimed vertically downward at the chip on the detection platform for acquisition. It also works in conjunction with the Z-axis piezoelectric actuator on the detection platform to achieve automatic focal length adjustment.

[0030] Polarization multispectral cameras use polarization multispectral imaging to obtain optical data on surface defects in multi-layer chip structures.

[0031] Surface defects in a chip's multi-layer structure refer to surface defects in the PI insulating layer and SiN passivation layer, such as scratches on the PI insulating layer and cracks on the SiN passivation layer. Polarization multispectral imaging can be used to obtain indicators such as the width of surface cracks in the chip's multi-layer structure, thereby forming optical data with a detection accuracy of up to 0.2μm.

[0032] Electrothermal excitation and infrared thermal imaging are used to detect microcracks within the chip's multilayer structure. These microcracks refer to microcracks in the metal layer. High-frequency ultrasound combined with thermal imaging data is used to locate and detect microcracks within the chip's multilayer structure. These microcracks refer to microcracks in the metal layer and Si substrate layer (or Si layer).

[0033] Reference Figure 2 As shown, the step of detecting microcracks inside the multilayer structure of a chip by electrothermal excitation and infrared thermal imaging to form thermal imaging data includes the following steps: Apply pulse current to the multilayer structure of the chip through a dot-matrix probe array; Infrared thermal imaging captures temperature anomalies inside the chip's multi-layer structure, determines the location of microcracks inside the chip's multi-layer structure, and forms thermal imaging data.

[0034] Specifically, the electrothermal excitation probe and the infrared imager are mainly used to detect whether there are internal microcracks in the metal layer of the chip multi-layer structure.

[0035] The electrothermal excitation probe is arranged above the detection platform. The electrothermal excitation probe is controlled to rise and fall by a pneumatic device. The electrothermal excitation probe adopts the above-mentioned dot matrix probe array. There is a contact detection area of ​​the metal layer on the chip surface. The electrothermal excitation probe abuts on the chip surface only on the contact detection area.

[0036] It is worth noting that different types of chips have different contact detection areas of the metal layer, and this embodiment is achieved by replacing the corresponding matching electrothermal excitation probes.

[0037] In this embodiment, the pulse current applied by the dot matrix probe array is 10mA to 20mA, the pulse current width is 10ms, and the pulse current interval is 20ms. Preferably, the pulse current applied by the dot matrix probe array is 10mA to reduce damage to the chip.

[0038] The infrared imager is set above the detection platform. The pulse current applied by the electrothermal excitation probe will stimulate the thermal response of the material. When there are hidden cracks in the metal layer, it will cause the local resistance to increase, and the electrothermal excitation will produce an abnormal temperature rise. When the abnormal temperature rise ΔT ≥ 0.3℃, it can be judged as a hidden crack.

[0039] Therefore, the temperature anomaly points inside the chip multi-layer structure are captured by infrared thermal imaging, the location of microcracks inside the chip multi-layer structure is determined, and thermal imaging data is formed.

[0040] Multiple microcracks may exist within a chip's multilayer structure. These microcracks can take on different forms, including point, line, or surface. When a microcrack is point-like, the temperature anomaly will be distributed as a single point. When a microcrack is line-like, the temperature anomaly will be distributed along the edge of the microcrack, forming a line with multiple points. When a microcrack is surface-like, the temperature anomaly will be distributed along the edge of the microcrack, forming a line with multiple points forming a surface.

[0041] The distribution position of microcracks, the crack length of linear microcracks, the crack length and width of planar microcracks, and the area of ​​planar microcracks can be obtained from the thermal imaging data.

[0042] Reference Figure 3 As shown, the steps of locating the position of microcracks inside the multilayer structure of a chip by combining high-frequency ultrasound with thermal imaging data and detecting and forming ultrasonic data include the following steps: Mark the temperature anomaly points in the thermal imaging data as the center coordinates of the area to be detected; Mark the height range of each layer based on the topological map of the chip's multi-layer structure and determine the height coordinates of the temperature anomaly point; Deionized water is sprayed on the chip surface through a micro nozzle to form a local water film area, the center coordinates of the local water film area are the same as the center coordinates of the area to be detected, and the center coordinates of the local water film area are located in a direction perpendicular to the center coordinates of the area to be detected; The high-frequency ultrasonic probe is vertically aligned with the center of the local water film area. Based on the height coordinates of the temperature anomaly points, acoustic impedance imaging is performed on the temperature anomaly points inside the multi-layer structure of the chip to obtain crack depth data to form ultrasonic data.

[0043] Specifically, a high-frequency ultrasonic probe is set on one side of the detection platform through a manipulator. The high-frequency ultrasonic probe uses a 1GHz high-frequency ultrasonic probe. The manipulator uses a six-axis robotic arm. The high-frequency ultrasonic probe is integrated at the end of the six-axis robotic arm and can be extended into the detection platform during detection.

[0044] The temperature anomaly points in the thermal imaging data are mainly concentrated in the metal layer, which is located inside the multi-layer structure of the chip. The temperature anomaly points in the thermal imaging data are marked as the center coordinates of the area to be detected. The x-coordinate and y-coordinate of the center coordinates of the area to be detected are the same as the x-coordinate and y-coordinate of the temperature anomaly points.

[0045] Among them, the height range of each layer has been marked in the topological diagram of the chip multi-layer structure, from which the z coordinate of the temperature anomaly point can be determined, and the z coordinate of the center coordinate of the area to be detected is in the vertical direction of the z coordinate of the temperature anomaly point. The z coordinate of the center coordinate of the area to be detected is the chip surface, that is, the position that can be directly reached by the high-frequency ultrasonic probe, ensuring that the high-frequency ultrasonic probe can be vertically aligned with the metal layer where the temperature anomaly point is located.

[0046] Deionized water is sprayed on the chip surface through a micro nozzle to form a local water film area. The micro nozzle is set on one side of the high-frequency ultrasonic probe. The micro nozzle is integrated at the end of the six-axis robotic arm. During detection, it moves with the high-frequency ultrasonic probe and can be extended into the detection platform.

[0047] In one embodiment, the micro nozzle spray range accuracy is ±1 μm, the minimum coverage area is 5 μm×5 μm, and the thickness of the local water film area is ≤50 μm.

[0048] The water film coverage diameter of the local water film area = 2 × the maximum estimated length of the microcrack + the probe focal spot diameter; among them, the maximum estimated length of the microcrack is determined by the temperature anomaly point inside the multi-layer structure of the chip captured by infrared thermal imaging, and the probe focal spot diameter is determined by the high-frequency ultrasonic probe based on the height coordinate of the temperature anomaly point.

[0049] In one embodiment, the microcracks in the thermal imaging data are linear, and the maximum estimated length of the microcracks, such as 0.5 μm, can be obtained by calculating the distance between the temperature anomaly points at both ends of the microcracks. In one embodiment, based on the height coordinates of the temperature anomaly points, the high-frequency ultrasonic probe is positioned to the position of the microcracks in the metal layer, and the probe focal spot is determined to be 10 μm, thereby obtaining the water film coverage diameter of the local water film area = 2×0.5+10=11 μm.

[0050] The local water film area is sprayed on the surface of the chip, thereby covering the microcracks inside the chip's multi-layer structure in the vertical direction. The high-frequency ultrasonic probe is vertically aligned with the center of the local water film area. Based on the height coordinates of the temperature anomaly point, acoustic impedance imaging is performed on the temperature anomaly point inside the chip's multi-layer structure to obtain crack depth data to form ultrasonic data.

[0051] Among them, the high-frequency ultrasonic probe locates the position of the temperature anomaly inside the multi-layer structure of the chip based on the ultrasonic echo time difference formula. The ultrasonic echo time difference formula is as follows:

[0052] In the topological map of the chip multilayer structure formed by the above-mentioned 3D structured light scanning, the surface topological height of each layer in the chip multilayer structure can be obtained. The following distance description shows that the height of the metal layer Metal1 is 45μm, and the height of the metal layer Metal2 is 80μm. It can be seen that from the metal layer Metal1 to the metal layer Metal2, Δz = 35μm. Based on the above-mentioned ultrasonic echo time difference formula, it can be known that Δt≈8.3ns.

[0053] Therefore, when the height coordinates of the temperature anomaly point are obtained, the metal layer Metaln where the temperature anomaly point is located can be obtained, and then the high-frequency ultrasonic probe can be accurately positioned at the height position of the temperature anomaly point in the metal layer through the ultrasonic echo time difference formula.

[0054] The high-frequency ultrasonic probe performs acoustic impedance imaging on the microcracks where the temperature anomaly is located, and then obtains the crack depth data to form ultrasonic data.

[0055] After the steps of locating the position of microcracks inside the chip multilayer structure by combining high-frequency ultrasound with thermal imaging data and detecting the generated ultrasonic data, the following steps are also included: The residual deionized water on the chip surface was removed by nitrogen purge.

[0056] The nitrogen purging nozzle can be set on the four corners of the detection platform, or the nitrogen purging nozzle can also be integrated at the end of the six-axis robotic arm and set on the side of the micro nozzle. During detection, it moves with the high-frequency ultrasonic probe and the micro nozzle and can be extended into the detection platform. Nitrogen purging is performed after the high-frequency ultrasonic scanning is completed. The nitrogen purging time is ≤0.5 seconds.

[0057] Data fusion and analysis steps: The optical data, thermal imaging data and ultrasonic data are fused to form multimodal data, and the multimodal data is combined with the topological map to generate a three-dimensional defect distribution map and a risk assessment report.

[0058] In the data fusion and analysis step, the analysis platform can be integrated into a cloud server or a host computer, which can be located on the detection platform. The analysis platform is used to acquire optical data, thermal imaging data, and ultrasonic data and fuse them into multimodal data.

[0059] It is worth noting that the analysis platform can use a convolutional neural network (CNN model) to fuse optical data, thermal imaging data, and ultrasonic data to train a defect feature library, so that the classification accuracy of the defect feature library is greater than 98%.

[0060] The following table is the classification standard for the defect feature library. Defect Type Core indicators Grading threshold Surface cracks width *m*>0.1μm (high risk) Internal void Area ratio coefficient *p* *p*>0.05 (medium risk) Chip cracks Abnormal electrothermal coupling ΔT ≥ 0.3°C + leakage current > 1μA (high risk)

[0061] When classifying in the defect feature library, when surface cracks reach the high-risk grading threshold standard, internal voids reach the medium-risk grading threshold standard, and chip hidden cracks reach the high-risk grading threshold standard, the topological map will be combined to generate a three-dimensional defect distribution map. Through the three-dimensional defect distribution map, the defect type existing in each layer of the chip's multi-layer structure and the corresponding optical data, thermal imaging data or ultrasonic data corresponding to the corresponding defects can be intuitively seen.

[0062] Accordingly, a risk assessment report is generated by combining the multimodal data with the topological map. The content of the risk assessment report is presented below.

[0063] 1. Core Structure of the Report 2. Implementation of Key Technologies Generation of 3D defect distribution maps 3. Output format of the report Visual interface 3D interactive view: You can rotate / zoom the defect model and click on hot spots to display physical parameters (such as crack tip ΔT = 0.35°C).

[0064] Example 2 The present application provides a chip multi-layer structure hidden crack detection system based on multimodal sensor fusion, which adopts the following technical solution: a chip multi-layer structure hidden crack detection system based on multimodal sensor fusion, including a detection platform, a 3D structured light scanner, a polarization multispectral camera, an electrothermal excitation probe and an infrared imager, a high-frequency ultrasonic probe and an analysis platform.

[0065] The detection platform is used to carry the chip; The 3D structured light scanner scans the chip based on 3D structured light to generate a topological map of the chip's multi-layer structure; Polarization multispectral camera acquires optical data of surface defects in chip multilayer structures based on polarization multispectral imaging; Electrothermal excitation probes and infrared imagers are used to detect thermal imaging data of microcracks inside the chip's multilayer structure; The high-frequency ultrasonic probe locates the micro-cracks inside the chip's multi-layer structure based on high-frequency ultrasound combined with thermal imaging data and detects and generates ultrasonic data; The analysis platform is used to fuse optical data, thermal imaging data and ultrasonic data to form multimodal data, and the multimodal data is combined with the topological map to generate a three-dimensional defect distribution map.

[0066] Therefore, this application has the following beneficial effects: 1. Pioneering multimodal fusion architecture: Integrating optical, acoustic, and thermal sensing technologies to overcome the physical limitations of a single detection modality; 2. Dynamic layered imaging technology: This application uses 3D structured light and Z-axis piezoelectric actuators to achieve layer-by-layer defect separation in multi-layer structures; 3. Environmental compatibility design: This application uses local water coupling and nitrogen purge to achieve seamless switching between air and water environments, ensuring that optical / electrical thermal detection is not interfered with; 4. Mass production compatibility: Combining spectral confocal and high-speed scanning technology, UPH ≥ 300 pieces, meeting the needs of advanced packaging production lines.

[0067] The above are all preferred embodiments of the present application, and are not intended to limit the scope of protection of the present application. Therefore, any equivalent changes made based on the structure, shape, and principle of the present application should be included in the scope of protection of the present application.

Claims

1. A chip multilayer structure hidden crack detection method based on multimodal sensor fusion, characterized in that: The method comprises the following steps: scanning the chip based on 3D structured light to generate a topological map of the chip's multi-layer structure; Obtain optical data on surface defects in multi-layer chip structures through polarization multispectral imaging; The microcracks inside the chip's multilayer structure are detected through electrothermal excitation and infrared thermal imaging to generate thermal imaging data. The microcracks inside the chip's multilayer structure are located and detected through high-frequency ultrasound combined with thermal imaging data to generate ultrasonic data. The optical data, the thermal imaging data and the ultrasonic data are fused to form multimodal data, and the multimodal data is combined with the topological map to generate a three-dimensional defect distribution map.

2. The chip multilayer structure hidden crack detection method based on multimodal sensing fusion according to claim 1 is characterized in that: The step of detecting microcracks inside the multilayer structure of a chip by electrothermal excitation and infrared thermal imaging to form thermal imaging data includes the following steps: Apply pulse current to the multilayer structure of the chip through a dot-matrix probe array; Infrared thermal imaging captures temperature anomalies inside the chip's multi-layer structure, determines the location of microcracks inside the chip's multi-layer structure, and forms thermal imaging data.

3. The chip multilayer structure hidden crack detection method based on multimodal sensing fusion according to claim 2 is characterized in that: The pulse current applied by the dot matrix probe array is 10mA to 20mA, the width of the pulse current is 10ms, and the interval of the pulse current is 20ms.

4. The chip multilayer structure hidden crack detection method based on multimodal sensing fusion according to claim 2 is characterized in that: The steps of locating the position of microcracks inside the multilayer structure of a chip by combining high-frequency ultrasound with thermal imaging data and detecting and forming ultrasonic data include the following steps: Mark the temperature anomaly points in the thermal imaging data as the center coordinates of the area to be detected; Mark the height range of each layer based on the topological map of the chip's multi-layer structure and determine the height coordinates of the temperature anomaly point; Deionized water is sprayed on the chip surface through a micro nozzle to form a local water film area, the center coordinates of the local water film area are the same as the center coordinates of the area to be detected, and the center coordinates of the local water film area are located in a direction perpendicular to the center coordinates of the area to be detected; The high-frequency ultrasonic probe is vertically aligned with the center of the local water film area. Based on the height coordinates of the temperature anomaly points, acoustic impedance imaging is performed on the temperature anomaly points inside the multi-layer structure of the chip to obtain crack depth data to form ultrasonic data.

5. The chip multilayer structure hidden crack detection method based on multimodal sensing fusion according to claim 4 is characterized in that: The thickness of the local water film area is ≤50 μm.

6. The chip multilayer structure hidden crack detection method based on multimodal sensing fusion according to claim 4 is characterized in that: The water film coverage diameter of the local water film area = 2×the maximum estimated length of the microcrack + the probe focal spot diameter; wherein, the maximum estimated length of the microcrack is determined by the temperature anomaly point inside the multilayer structure of the infrared thermal imaging capture chip, and the probe focal spot diameter is determined by the high-frequency ultrasonic probe based on the height coordinate of the temperature anomaly point.

7. The method for detecting hidden cracks in a chip multilayer structure based on multimodal sensing fusion according to claim 4, characterized in that: The high-frequency ultrasonic probe locates the temperature anomaly point inside the multi-layer structure of the chip based on the ultrasonic echo time difference formula. The ultrasonic echo time difference formula is as follows:

8. The method for detecting hidden cracks in a chip multilayer structure based on multimodal sensing fusion according to claim 4, characterized in that: After the steps of locating the position of microcracks inside the chip multilayer structure by combining high-frequency ultrasound with thermal imaging data and detecting the generated ultrasonic data, the following steps are also included: The residual deionized water on the chip surface was removed by nitrogen purge.

9. The chip multilayer structure hidden crack detection method based on multimodal sensing fusion according to claim 4 is characterized in that: The following steps are also included: The multimodal data is combined with the topological map to generate a three-dimensional defect distribution map and a risk assessment report.

10. A chip multilayer structure hidden crack detection system based on multimodal sensor fusion, characterized in that: include: Detection platform, used to carry chips; 3D structured light scanner, which scans the chip based on 3D structured light to generate a topological map of the chip's multi-layer structure; Polarization multispectral camera, which acquires optical data of surface defects in multi-layer chip structures based on polarization multispectral imaging; Electrothermal excitation probes and infrared imagers are used to detect thermal imaging data of microcracks inside the chip's multilayer structure; High-frequency ultrasonic probe, which locates the location of microcracks inside the chip's multi-layer structure based on high-frequency ultrasound combined with thermal imaging data and detects and generates ultrasonic data; An analysis platform is used to fuse optical data, thermal imaging data and ultrasonic data to form multimodal data, and the multimodal data is combined with the topological map to generate a three-dimensional defect distribution map.

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