A re-timer and electronic device

Abstract

The application provides a re-timer and an electronic device. When the re-timer enters a code error detection mode, the re-timer is switched to a loopback mode, so that the output end and the input end of the second physical layer module are connected. When a primary test is performed, a code stream generation module generates a pseudo-random code stream according to first source data information in a first source register, and transmits the pseudo-random code stream to a first data coding module. A first code stream detection module verifies the output code stream of a second data decoding module according to the first source data information, and confirms whether there is a code error. By generating and transmitting the pseudo-random code stream, whether a code error occurs in the link transmission process between the first data coding module-second physical layer module-second data decoding module in the re-timer is determined, and then when the code error exists, the module that may have a fault can be determined, so that code error fault positioning is realized, and the staff can repair the module.

Description

Technical Field

[0001] The present invention relates to the field of chips, and in particular to a retimer and an electronic device. Background Art

[0002] In high-speed data transmission systems, signal quality degrades after long-distance transmission or through complex circuit board routing, leading to issues such as signal attenuation and jitter. A retimer receives these damaged signals, reshapes and regenerates them, and then retransmits them using the original clock or a new reference clock to ensure signal integrity and accuracy. Retimers are crucial in high-speed data transmission.

[0003] When the data link corresponding to the retimer experiences bit errors or is completely out of order, it can significantly impact the high-speed data transmission system, affecting its transmission quality and stability. Therefore, it is necessary to perform fault location testing on the retimer to determine if it is faulty and facilitate repairs. Summary of the Invention

[0004] An object of the present invention is to provide a retimer and an electronic device to improve the above-mentioned problem.

[0005] In order to achieve the above objectives, the technical solutions adopted in the embodiments of the present invention are as follows:

[0006] In a first aspect, an embodiment of the present invention provides a retimer, comprising: a code stream generation module, a first code stream detection module, a first branch, a second branch, a first physical layer module, and a second physical layer module, wherein an input end of the first branch is connected to the first physical layer module, an output end of the first branch is connected to the second physical layer module, an input end of the second branch is connected to the second physical layer module, and an output end of the first branch is connected to the first physical layer module;

[0007] The first output end of the code stream generation module is connected to the input end of the first data encoding module in the first branch, and the input end of the first code stream detection module is connected to the output end of the second data decoding module in the second branch;

[0008] When the retimer enters the error detection mode, the retimer switches to the loopback mode to connect the output terminal and the input terminal of the second physical layer module;

[0009] During the preliminary test, the code stream generating module is used to generate a pseudo-random code stream according to the first source data information in the first source register, and transmit the pseudo-random code stream to the first data encoding module;

[0010] The first code stream detection module is used to verify the output code stream of the second data decoding module according to the first source data information to confirm whether there is a code error.

[0011] By generating and transmitting a pseudo-random digital stream, it is determined whether a bit error occurs during the link transmission between the first data encoding module, the second physical layer module, and the second data decoding module in the retimer. If a bit error occurs, the module that may have failed can be determined, thereby locating the bit error fault and facilitating repair by staff.

[0012] Optionally, the retimer further includes a second code stream detection module, the second output end of the code stream generation module is connected to the first data scrambling module in the first branch, and the input end of the second code stream detection module is connected to the output end of the second data descrambling module in the second branch;

[0013] When performing the secondary test, the code stream generating module is used to generate a service code stream according to the second source data information in the second source register, and transmit the service code stream to the first data scrambling module;

[0014] The second code stream detection module is used to verify the output code stream of the second data descrambling module according to the second source data information to confirm whether there is a code error.

[0015] By generating and transmitting the service code stream, it is determined whether bit errors occur during the link transmission process between the first data scrambling module-first data encoding module-second physical layer module-second data decoding module-second data descrambling module in the retimer. If bit errors occur, the module that may have failed can be determined, thereby locating the bit error fault and facilitating repair by staff.

[0016] Optionally, the retimer further includes a third code stream detection module, wherein an input end of the third code stream detection module is connected to an output end of the first data scrambling module in the first branch;

[0017] The third code stream detection module is used to verify the output code stream of the first data scrambling module according to the second source data information to confirm whether there is a code error, thereby determining whether there is a fault in the first data scrambling module.

[0018] Optionally, the retimer further includes an error injection module, wherein an output end of the error injection module is connected to an input end of any one of the first code stream detection module, the second code stream detection module, and the third code stream detection module;

[0019] The error injection module is used to inject errors into the received code stream data and transmit the injected error code stream data to the back-end code stream detection module;

[0020] The back-end code stream detection module is used to detect the received error-injected code stream data to determine whether it matches the error-injection rule.

[0021] By marking errors in the received bitstream data, the correctness of the backend bitstream detection module is verified.

[0022] Optionally, the first bitstream detection module is configured to determine the first standard bitstream data corresponding to the current clock based on the historical bitstream data and the first source data information received at the previous clock;

[0023] The first code stream detection module is used to compare the current code stream data received at the current clock with the first standard code stream data to determine whether there is a code error.

[0024] Optionally, when the service code stream is a TS1 code stream or a TS2 code stream, the second code stream detection module is used to determine the second standard code stream data corresponding to the current clock according to the current clock and the second source data information;

[0025] The second code stream detection module is used to compare the current code stream data received at the current clock with the second standard code stream data to determine whether there is a code error.

[0026] Optionally, when the service code stream is a data code stream, the second code stream detection module is used to compare the current code stream data received at the current clock with the third standard code stream data to confirm whether there is a code error.

[0027] In a second aspect, an embodiment of the present invention provides an electronic device including the above-mentioned retimer.

[0028] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0030] Figure 1 This is one of the structural diagrams of the retimer provided in an embodiment of the present invention.

[0031] Figure 2 This is a second structural diagram of the retimer provided in an embodiment of the present invention.

[0032] Figure 3 This is the third structural diagram of the retimer provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0033] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0034] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort shall fall within the scope of protection of the present invention.

[0035] It should be noted that similar reference numerals and letters represent similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings. At the same time, in the description of the present invention, the terms "first", "second", etc. are used only to distinguish the description and should not be understood as indicating or implying relative importance.

[0036] The following embodiments of the present invention are described in detail with reference to the accompanying drawings. In the absence of conflict, the following embodiments and features in the embodiments may be combined with each other.

[0037] The embodiment of the present invention provides a retimer, please refer to Figure 1 , Figure 1 This is one of the structural diagrams of the retimer provided in an embodiment of the present invention.

[0038] The retimer includes: a code stream generation module, a first code stream detection module, a first branch, a second branch, a first physical layer module, and a second physical layer module. The input end of the first branch is connected to the first physical layer module, the output end of the first branch is connected to the second physical layer module, the input end of the second branch is connected to the second physical layer module, and the output end of the first branch is connected to the first physical layer module.

[0039] The physical layer module in the embodiment of the present invention refers to the electrical physical layer, the first physical layer module is the first electrical physical layer, and the second physical layer module is the second electrical physical layer.

[0040] When the first branch is a downlink branch in a retimer, the second branch is an uplink branch in the retimer, the first physical layer module may be, but is not limited to, a physical layer module (PHY) for connecting to a central processing unit (CPU), and the second physical layer module may be, but is not limited to, a physical layer module (PHY) for connecting to a graphics processing unit (GPU).

[0041] When the first branch is an uplink branch in a retimer, and the second branch is a downlink branch in the retimer, the first physical layer module may be, but is not limited to, a physical layer module (PHY) for connecting to a graphics processing unit (GPU), and the second physical layer module may be, but is not limited to, a physical layer module (PHY) for connecting to a central processing unit (CPU).

[0042] Please continue to refer to Figure 1 The first branch includes a first data locking module, a first data decoding module, a first data descrambling module, a first data alignment module, a first data scrambling module and a first data encoding module connected in sequence. The input end of the first data locking module serves as the input end of the first branch (connected to the first physical layer module), and the output end of the first data encoding module serves as the output end of the first branch (connected to the second physical layer module).

[0043] The second branch includes a second data locking module, a second data decoding module, a second data descrambling module, a second data alignment module, a second data scrambling module and a second data encoding module connected in sequence. The input end of the second data locking module serves as the input end of the second branch (connected to the second physical layer module), and the output end of the second data encoding module serves as the output end of the second branch (connected to the first physical layer module).

[0044] The physical layer module is a subsystem in the retimer that can adjust the quality of the bit signal it receives to the optimal state it adapts to. At the same time, it can perform serial-to-parallel conversion, converting serial data transmitted by an external device (such as a CPU or GPU) into parallel data and transmitting the parallel data to the branches in the retimer. It can also convert the parallel data transmitted by the branches in the retimer into serial data and transmit the serial data to the external device (such as a CPU or GPU).

[0045] The data locking module is used to identify the physical layer output code stream (a bunch of parallel irregular data) corresponding to the physical layer module to determine the fixed position information of the valid code stream and pass the physical layer output code stream to the data decoding module in the branch.

[0046] The data decoding module is used to decode the physical layer output code stream it receives according to the fixed position information determined by the data locking module, and pass the decoded code stream data to the data descrambling module in the branch.

[0047] The data descrambling module descrambles the received data stream and passes it to the data alignment module in the branch. It descrambles the data stream according to the corresponding protocol to parse it into the recognizable training sequence 1 stream (TS1 stream), training sequence 2 stream (TS2 stream), and data stream.

[0048] The data alignment module is used to perform de-skew processing on the received code stream data and pass the de-skewed code stream data to the data scrambling module in the branch.

[0049] The data scrambling module is used to scramble the received code stream data and pass the scrambled code stream data to the data encoding module in the branch.

[0050] The data decoding module is used to encode the received code stream data according to the corresponding protocol and pass the encoded code stream data to the back-end physical layer module.

[0051] The main improvement of the retimer in the embodiment of the present invention is that it is provided with a code stream generation module and a code stream detection module (including the first code stream detection module, the second code stream detection module and the third code stream detection module below), so that error fault location can be achieved. For details, please continue to refer to Figure 1 .

[0052] The first output end of the code stream generating module is connected to the input end of the first data encoding module in the first branch, and the input end of the first code stream detecting module is connected to the output end of the second data decoding module in the second branch.

[0053] In an optional embodiment, the code stream generation module includes a first code stream generation unit and a second code stream generation unit, the first output end of the code stream generation module may be the output end of the first code stream generation unit, and the second output end of the code stream generation module may be the output end of the second code stream generation unit; alternatively, the code stream generation module includes a third code stream generation unit and a first selector, the output end of the third code stream generation unit is connected to the input end of the first selector, and the i-th output end of the first selector serves as the i-th output end of the code stream generation module.

[0054] When the retimer enters the error detection mode, the retimer switches to the loopback mode so that the output terminal and the input terminal of the second physical layer module are connected.

[0055] Of course, the output terminal and the input terminal of the first physical layer module can also be connected, and the primary test and the secondary test can be performed in the error detection mode.

[0056] During the preliminary test, the code stream generating module is used to generate a pseudo-random code stream according to the first source data information in the first source register, and transmit the pseudo-random code stream to the first data encoding module.

[0057] The first code stream detection module is used to verify the output code stream of the second data decoding module according to the first source data information to confirm whether there is a code error.

[0058] In an optional implementation manner, when a bit error exists, the bit error may be further located.

[0059] In the retimer provided in an embodiment of the present invention, by generating and transmitting a pseudo-random digital stream, it is determined whether a bit error occurs during the link transmission between the first data encoding module-the second physical layer module-the second data decoding module in the retimer. When a bit error occurs, the module that may have failed can be determined, thereby realizing the location of the bit error fault and facilitating the staff to repair it.

[0060] Please continue to refer to Figure 1 The retimer also includes a second code stream detection module, the second output end of the code stream generation module is connected to the first data scrambling module in the first branch, and the input end of the second code stream detection module is connected to the output end of the second data descrambling module in the second branch.

[0061] When performing the secondary test, the code stream generating module is used to generate a service code stream according to the second source data information in the second source register, and transmit the service code stream to the first data scrambling module.

[0062] The service code stream may be, but is not limited to, any one of the TS1 code stream, the TS2 code stream, and the idle data code stream.

[0063] The second code stream detection module is used to verify the output code stream of the second data descrambling module according to the second source data information to confirm whether there is a code error.

[0064] In an optional implementation manner, when a bit error exists, the bit error may be further located.

[0065] By generating and transmitting the service code stream, it is determined whether bit errors occur during the link transmission process between the first data scrambling module-first data encoding module-second physical layer module-second data decoding module-second data descrambling module in the retimer. If bit errors occur, the module that may have failed can be determined, thereby locating the bit error fault and facilitating repair by staff.

[0066] Please continue to refer to Figure 1 The retimer further includes a third code stream detection module, an input end of the third code stream detection module is connected to the output end of the first data scrambling module in the first branch.

[0067] The third code stream detection module is used to verify the output code stream of the first data scrambling module according to the second source data information to confirm whether there is a code error, thereby determining whether there is a fault in the first data scrambling module.

[0068] Please refer to Figure 2 , Figure 2 The second structural diagram of the retimer provided in the embodiment of the present invention. In an optional implementation, the retimer further includes a control module.

[0069] The control module is connected to the code stream generating module, the first code stream detecting module, the second code stream detecting module, the third code stream detecting module and the second physical layer module respectively.

[0070] Of course, it can also be connected with the first physical layer module, the module in the first branch, and the module in the second branch to complete the relevant configuration, which is not limited here.

[0071] When the retimer enters the error detection mode, the control module is used to control the retimer to switch to the loop mode to connect the output end and the input end of the second physical layer module, thereby transmitting the code stream data output by the first data encoding module to the second data locking module.

[0072] The first source register and the second source register in the embodiment of the present invention can be designated by the control module and notified to the code stream generating module and the corresponding code stream monitoring module.

[0073] Since the retimer switches to loopback mode so that the output end and input end of the physical layer module are connected, the retimer cannot complete the detection operation of the opposite device (detect operation). In order to improve the problem, the embodiment of the present invention also provides an optional implementation method. Please refer to the following for details.

[0074] The control module is used to turn on the bypass resistor detection (detect_bypass) function in the retimer, so that the first physical layer module and the second physical layer module in the retimer skip operations such as detecting the operation of the opposite device and power switching, thereby enabling the normal operation of the retimer in the detection mode.

[0075] Based on the above, the embodiment of the present invention further provides an optional implementation, please refer to the following: The control module is further configured to configure the rate register and the equalization parameter register in the second physical layer module according to the test requirements.

[0076] Update the value in the rate register to the target rate corresponding to the test requirement, and update the value in the equalization parameter register to the equalization parameter value corresponding to the target rate (preset value, related to signal transmission quality). After receiving the handshake signal feedback from the second physical layer module, confirm that the register is successful, that is, complete the rate switching configuration of the retimer.

[0077] Configure the rate register and equalization parameter register according to the test requirements to meet different test scenarios.

[0078] Optionally, the control module is further configured to send a target trigger signal to the bit stream generating module according to the target rate.

[0079] The code stream generating module is used to add a target sequence to the code stream data generated by it according to the target trigger signal.

[0080] When the target rate is greater than or equal to a preset level (which may be, but is not limited to, Gen3), the target sequence is the Electrical Idle Exit Sequence (EIE sequence). When the target rate is less than the preset level, the target sequence is the Start of Frame Identifier Sequence (COM code sequence). Gen3 can refer to a high-speed serial computer expansion bus (Peripheral Component Interconnect Express, or PCIe) with a rate of 8 Gbps per lane.

[0081] It's important to note that the target sequence is added to the bitstream data to allow the data lock module to accurately complete delimitation. When the bitstream generator module generates a pseudo-random bitstream, a synchronization header is also added to the pseudo-random bitstream to facilitate accurate parsing by the backend modules. This facilitates the internal modules in the retimer to correctly parse the bitstream.

[0082] In order to further improve the accuracy of the timer detection result, the embodiment of the present invention also provides an optional implementation method, please refer to Figure 3 , Figure 3 This is a third structural diagram of a retimer provided in an embodiment of the present invention. The retimer further includes an error injection module, the output of which is connected to the input of any one of the first stream detection module, the second stream detection module, and the third stream detection module, and the input of which is connected to the output of the second data decoding module, the output of the second data descrambling module, and the output of the first data scrambling module.

[0083] exist Figure 3 In the example, the error injection module is provided at the input of the first bitstream detection module. The input of the error injection module is connected to the output of the second data decoding module, and the output of the error injection module is connected to the first bitstream detection module. Other deployment methods of the error injection module are not described here.

[0084] The error injection module is used to inject errors into the received code stream data and transmit the error injected code stream data to the back-end code stream detection module.

[0085] The back-end code stream detection module is used to detect the received error-injected code stream data to determine whether it matches the error-injection rule.

[0086] By injecting errors into the received bitstream data, the correctness of the backend bitstream detection module is verified. It should be noted that the maximum error injection amount corresponding to the error injection module is the maximum data bit width per beat, so that all data that the bitstream detection module can detect has errors.

[0087] It should be noted that after the retimer is configured for rate switching, the receiving side requires the bitstream to perform bit lock (implemented by the physical layer module) and data delimiter lock (symbol lock, implemented by the data lock module). Therefore, when sending pseudo-random data, some data may be initially lost, making it impossible for the detection module to effectively detect it. To address this issue, the present invention also provides an optional implementation, which is described below.

[0088] The first code stream detection module is used to determine the first standard code stream data corresponding to the current clock according to the historical code stream data and the first source data information received at the previous clock.

[0089] The first code stream detection module is used to compare the current code stream data received at the current clock with the first standard code stream data to determine whether there is a code error.

[0090] When bit errors exist, the number of error bits may be further obtained, and the bit error rate may be determined based on the current number of checked bits and the number of error bits.

[0091] In an optional implementation, after detecting the data header of the pseudo-random digital stream, the first code stream detection module starts to compare the current code stream data received at the current clock with the corresponding first standard code stream data to confirm whether there is a bit error.

[0092] Optionally, when the service code stream is a TS1 code stream or a TS2 code stream, the second code stream detection module is configured to determine the second standard code stream data corresponding to the current clock according to the current clock and the second source data information.

[0093] The second code stream detection module is used to compare the current code stream data received at the current clock with the second standard code stream data to determine whether there is a code error.

[0094] When bit errors exist, the number of error bits may be further obtained, and the bit error rate may be determined based on the current number of checked bits and the number of error bits.

[0095] Optionally, by comparing the current code stream data with the second standard code stream data, the bit error position may also be determined.

[0096] Optionally, when the service code stream is a data code stream, the second code stream detection module is used to compare the current code stream data received at the current clock with the third standard code stream data (for example, all 0s or all 1s) to confirm whether there is a code error.

[0097] When bit errors exist, the number of error bits may be further obtained, and the bit error rate may be determined based on the current number of checked bits and the number of error bits.

[0098] An embodiment of the present invention further provides an electronic device including the above-mentioned retimer.

[0099] In summary, the embodiment of the present invention provides a retimer and electronic device, wherein the output end of the first branch is connected to the second physical layer module, and the input end of the second branch is connected to the second physical layer module; the first output end of the code stream generation module is connected to the input end of the first data encoding module in the first branch, and the input end of the first code stream detection module is connected to the output end of the second data decoding module in the second branch; when the retimer enters the error detection mode, the retimer switches to the loopback mode to connect the output end and input end of the second physical layer module; when performing the preliminary test, the code stream generation module generates a pseudo-random digital stream based on the first source data information in the first source register and transmits the pseudo-random digital stream to the first data encoding module; the first code stream detection module verifies the output code stream of the second data decoding module based on the first source data information to confirm whether there is a code error. By generating and transmitting the pseudo-random digital stream, it is determined whether a code error occurs during the link transmission between the first data encoding module, the second physical layer module, and the second data decoding module in the retimer. If a code error occurs, the module that may have failed can be determined, thereby locating the code error fault and facilitating repair by the staff.

[0100] The foregoing description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the present invention.

[0101] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above and that the invention can be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered in all respects as illustrative and non-restrictive, and the scope of the invention is defined by the appended claims, not the foregoing description, and all variations within the meaning and range of equivalents of the claims are intended to be included therein. Any reference sign in a claim should not be construed as limiting the claim to which it relates.

Claims

1. A retimer, characterized in that: The retimer includes: a code stream generation module, a first code stream detection module, a first branch, a second branch, a first physical layer module, and a second physical layer module, wherein the input end of the first branch is connected to the first physical layer module, the output end of the first branch is connected to the second physical layer module, the input end of the second branch is connected to the second physical layer module, and the output end of the first branch is connected to the first physical layer module; The first output end of the code stream generation module is connected to the input end of the first data encoding module in the first branch, and the input end of the first code stream detection module is connected to the output end of the second data decoding module in the second branch; When the retimer enters the error detection mode, the retimer switches to the loopback mode to connect the output terminal and the input terminal of the second physical layer module; During the preliminary test, the code stream generating module is used to generate a pseudo-random code stream according to the first source data information in the first source register, and transmit the pseudo-random code stream to the first data encoding module; The first code stream detection module is used to verify the output code stream of the second data decoding module according to the first source data information to confirm whether there is a code error.

2. The retimer of claim 1, wherein: The retimer further includes a second code stream detection module, the second output end of the code stream generation module is connected to the first data scrambling module in the first branch, and the input end of the second code stream detection module is connected to the output end of the second data descrambling module in the second branch; When performing the secondary test, the code stream generating module is used to generate a service code stream according to the second source data information in the second source register, and transmit the service code stream to the first data scrambling module; The second code stream detection module is used to verify the output code stream of the second data descrambling module according to the second source data information to confirm whether there is a code error.

3. The retimer of claim 2, wherein: The retimer further includes a third code stream detection module, wherein an input end of the third code stream detection module is connected to an output end of the first data scrambling module in the first branch; The third code stream detection module is used to verify the output code stream of the first data scrambling module according to the second source data information to confirm whether there is a code error.

4. The retimer according to any one of claims 1 to 3, wherein: The retimer further includes a control module; The control module is connected to the second physical layer module; When the retimer enters the error detection mode, the control module is used to control the retimer to switch to the loopback mode, so that the output end and the input end of the second physical layer module are connected.

5. The retimer of claim 4, wherein: The control module is used to turn on the bypass resistance detection function in the retimer; The control module is further configured to configure the rate register and the equalization parameter register in the second physical layer module according to test requirements.

6. The retimer of claim 4, wherein: The retimer further includes an error injection module, wherein an output end of the error injection module is connected to an input end of any one of the first code stream detection module, the second code stream detection module, and the third code stream detection module; The error injection module is used to inject errors into the received code stream data and transmit the injected error code stream data to the back-end code stream detection module; The back-end code stream detection module is used to detect the received error-injected code stream data to determine whether it matches the error-injection rule.

7. The retimer of claim 3, wherein: The first code stream detection module is configured to determine the first standard code stream data corresponding to the current clock based on the historical code stream data and the first source data information received at the previous clock; The first code stream detection module is used to compare the current code stream data received at the current clock with the first standard code stream data to determine whether there is a code error.

8. The retimer of claim 3, wherein: When the service code stream is a TS1 code stream or a TS2 code stream, the second code stream detection module is used to determine the second standard code stream data corresponding to the current clock according to the current clock and the second source data information; The second code stream detection module is used to compare the current code stream data received at the current clock with the second standard code stream data to determine whether there is a code error.

9. The retimer of claim 3, wherein: When the service code stream is a data code stream, the second code stream detection module is used to compare the current code stream data received at the current clock with the third standard code stream data to confirm whether there is a code error.

10. An electronic device, characterized in that: A retimer comprising the retimer according to any one of claims 1 to 9.

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