Neural network circuit containing homogeneous ReLU activation function

By designing a neural network circuit with a homogeneous ReLU activation function and implementing the circuit using three integral channels and an inverse ReLU function, the circuit structure is simplified, the number of components is reduced, the problem of high complexity of traditional neural network circuits is solved, and low-cost and efficient neural network calculations are achieved.

CN120633736APending Publication Date: 2025-09-12JIANGSU UNIV OF TECH
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Patent Information

Application Number
CN202510800586.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-16
Publication Date
2025-09-12

AI Technical Summary

Technical Problem

Traditional neural network circuits have complex structures and large computational workloads, making it difficult to meet the design requirements of large-scale integrated circuits and low-power computing units. In addition, existing homogeneous ReLU activation function circuits have a large number of components and high resource consumption.

Method used

A neural network circuit with a homogeneous ReLU activation function is designed. Three integral channels with the same structure are used. Each channel includes an input resistor network, an integral capacitor and an operational amplifier. The circuit performs signal processing through the inverse ReLU function, and multi-channel dynamic feedback coupling is achieved through a coupling network to reduce the number of circuit elements.

Benefits of technology

It achieves low-cost, low-complexity computing of neural networks, reduces the number of circuit elements by more than 50%, is suitable for large-scale integration and low-power applications, and has higher efficiency and performance.

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Abstract

The invention belongs to the field of circuit design technology and application, and particularly relates to a neural network circuit containing a homogeneous ReLU activation function, which comprises three integral channels which have the same structure and are mutually coupled, and is characterized in that each integral channel comprises an integral unit consisting of an input resistance network, an integral capacitor and an operational amplifier, the output end of each integral channel is connected with a reverse ReLU function implementation circuit; the three integral channels receive direct current excitation signals and alternating current excitation signals introduced through an external input end respectively, output signals of all the channels are input to other channels respectively, and dynamic feedback coupling among multiple channels is achieved. The reverse ReLU function implementation circuit comprises a one-way limiting unit composed of an operational amplifier and a diode, and is used for carrying out reverse ReLU nonlinear processing on an input signal. The circuit provided by the invention is simple in structure, the number of circuit elements is reduced by more than five percent compared with a traditional homogeneous Tanh activation function neural network circuit, and the whole circuit is low in manufacturing cost and convenient to integrate.
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Description

Technical Field

[0001] The present invention belongs to the field of circuit design technology and application, and in particular relates to a neural network circuit containing a homogeneous ReLU activation function. Background Art

[0002] As the fundamental unit of information processing and storage, neural networks play an indispensable role in neuromorphic computing. Their circuit implementation technology is a core research area driving the advancement of artificial intelligence and brain-inspired computing systems. The hardware circuit design of neural network models directly impacts the computational performance of neural networks and the efficiency of system integration. Traditional neural network circuits are mostly based on complex mathematical models, such as the Hodgkin-Huxley model and the Hindmarsh–Rose model. These models involve functions such as exponential and cubic terms, resulting in complex circuit structures and high computational complexity, making them difficult to meet the design requirements of large-scale integrated circuits and low-power computing units. In this context, neural network models with simple mathematical forms have become a cutting-edge technology for the hardware implementation of artificial neural networks.

[0003] The traditional homogeneous Tanh activation function neural network requires 17 circuit elements, while the inverse ReLU activation function only requires 5 circuit elements, which greatly simplifies the circuit resources. In addition, the homogeneous ReLU activation function neural network can also reduce the complexity of calculations and realize complex dynamic behaviors. In summary, the homogeneous ReLU activation function neural network can significantly reduce the demand for circuit design and hardware resources while maintaining the chaotic dynamic effects, realizing a low-cost, multiplier-free digital circuit with higher efficiency and performance. Based on this, the present invention proposes a neural network circuit scheme containing a homogeneous ReLU activation function, which realizes the periodicity and chaotic behavior of the neural network through an analog circuit design method, providing a more efficient and lightweight neural hardware implementation approach for the new generation of brain-like intelligence. Summary of the Invention

[0004] To overcome the current problems and defects, the present invention proposes a neural network circuit with a homogeneous ReLU activation function, including three integral channels with identical structures and mutual coupling, each integral channel including an integral unit consisting of an input resistor network, an integral capacitor and an operational amplifier, and the output end of each integral channel is connected to an inverse ReLU function implementation circuit;

[0005] The three integral channels receive DC excitation and AC excitation signals introduced through external input terminals respectively, and the output signals of each channel are input to other channels through a coupling network, thereby realizing dynamic feedback coupling among multiple channels;

[0006] The inverse ReLU function implementation circuit includes a unidirectional limiting unit composed of an operational amplifier and a diode, which is used to perform inverse ReLU nonlinear processing on the input signal.

[0007] Furthermore, the three integration channels are integration channel 1, integration channel 2 and integration channel 3 respectively.

[0008] Furthermore, the integration channel 1 includes a capacitor C1, resistors R1, R2, R3, R8, an operational amplifier U1, an operational amplifier U4, an inverse ReLU function implementation circuit F1 and an input terminal v a 、v b 、v DC ;

[0009] Among them, the input terminal v a Connect the left end of resistor R1 to resistor R8, and the input terminal v b The left end of the capacitor C1 is connected to the resistor R2; the right end of R1 and the right end of R2 are connected to the inverting input terminal of the operational amplifier U1 at the same time. The DC excitation signal v DC It is also directly connected to the inverting input terminal of U1 through resistor R3; the right end of resistor R8 and the right end of capacitor C1 are connected to the output terminal of U1, which is v1 terminal; v1 terminal is connected to the left end of the reverse ReLU function implementation circuit F1, and the right end output of F1 is v a ;v a The signal then passes through the inverter (through the resistor R 10 、R 11 and operational amplifier U4): R 10 Left end connected to v a , R 10 The right end is connected to R 11 The left end and the inverting input of U4, R 11 The right end is connected to the U4 output, which serves as the -v a The signal is output and serves as the input of integration channel 2; the non-inverting input terminals of operational amplifiers U1 and U4 are both grounded.

[0010] Furthermore, the integration channel 2 includes a capacitor C2, resistors R4, R5, R6, R9, R 10 、R 11 , operational amplifier U2, reverse ReLU function circuit F2 and input terminals -v0, -v a 、v c ;

[0011] Among them, the AC excitation signal -v0 is connected to the left end of the resistor R9 through the resistor R4, and the input terminal -v aConnect the left end of the capacitor C2 through the resistor R5; the right end of R4 and the right end of R5 are connected to the inverting input terminal of the operational amplifier U2 at the same time, and the left end of R9 and the left end of C2 are also connected to the inverting input terminal of U2 at the same time; the input terminal v c Connected to the inverting input terminal of U2 through resistor R6; the right end of resistor R9 and the right end of capacitor C2 are connected to the output terminal of U2, which is the v2 terminal; the v2 terminal is connected to the left end of the reverse ReLU function implementation circuit F2, and the right end output of F2 is v b , v b The signal is introduced as input into the integration channel 1 v b Input and integration channel 3 V b Input terminal: The non-inverting input terminal of U2 is grounded and the supply voltage is ±15V.

[0012] Furthermore, the integration channel 3 includes a capacitor C3, a resistor R7, and a 12 , operational amplifier U3 and, ReLU function implementation circuit F3 and input terminal vb;

[0013] Among them, v b The input terminal and the V of the integration channel 2 b Output terminal, V of integral channel 1 b The input terminal is connected to the left end of resistor R7; the right end of R7 is also connected to the resistor R 12 The left end of the capacitor C3 is connected to the inverting input of the operational amplifier U3, R 12 The right end of the capacitor C3 is directly connected to the output of U3 at the same time. The output of U3 is the v3 terminal. The v3 terminal is connected to the left end of the reverse ReLU function circuit F3. The right end of F3 is the v c Output, introduce the v of integral channel 2 c Input terminal; the non-inverting input terminal of U3 is grounded.

[0014] Furthermore, the input end of the reverse ReLU function circuit is connected through the resistor R 13 Connect to the inverting input terminal of the operational amplifier U5; the inverting input terminal of the operational amplifier U5 and the resistor R 14 The left end of the diode D1 is connected to the cathode of the diode D1; the anode of the diode D1 is connected to the output end of the operational amplifier U5 and the cathode of the diode D2; the resistor R 14 The right end is connected to the anode of diode D2 and serves as the output terminal v o ; The non-inverting input of U5 is grounded.

[0015] Furthermore, the supply voltages of the operational amplifiers U1, U2, U3, U4, and U5 are all ±15V.

[0016] Furthermore, the circuit is used to implement the differential equation described below:

[0017]

[0018] Among them, x is the average value of neuron cell potential, ReLU(.) is the activation function, which can be used as a nonlinear function to construct neurons, I AC =Asin(ωt) is the simulation of external time-varying stimulation, ω is the adjustable angular frequency, A is the adjustable amplitude, and I1=-6 is a constant stimulation.

[0019] Beneficial effects of the present invention:

[0020] This invention implements a neural network circuit with a homogeneous ReLU activation function, achieving typical nonlinear behavior of a neural network by simply adjusting the external excitation. Furthermore, the circuit structure is simple, reducing the number of circuit components by over 50% compared to traditional neural network circuits implementing the homogeneous Tanh activation function. This overall circuit is low-cost and easy to integrate, making it of great value for the hardware engineering and application of future large-scale brain-inspired neural networks. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0022] Figure 1 Main circuit structure for neural network with homogeneous ReLU activation function;

[0023] Figure 2 Implement the circuit structure for the inverse ReLU function;

[0024] Figure 3 (a) Phase diagram of the periodic attractor of the neural network with homogeneous ReLU activation function implemented on the x1–x2 plane simulated by MATLAB when the input AC excitation frequency is ω=1.5;

[0025] Figure 3 (b) The phase diagram of the periodic two-attractor of the neural network with homogeneous ReLU activation function implemented on the x1–x2 plane simulated by MATLAB when the input AC excitation frequency is ω=1.7;

[0026] Figure 3 (c) The phase diagram of the periodic four-attractor neural network with homogeneous ReLU activation function implemented on the x1–x2 plane simulated by MATLAB when the input AC excitation frequency is ω=1.9;

[0027] Figure 3(d) The chaotic attractor phase diagram of the neural network with homogeneous ReLU activation function implemented on the x1–x2 plane simulated by MATLAB when the input AC excitation frequency is ω=2.5;

[0028] Figure 4 (a) Phase diagram of the periodic attractor of a neural network with a homogeneous ReLU activation function implemented on the v1-v2 plane captured by Multisim circuit simulation software when the input AC excitation physical amplitude is A=1V and F=2.387kHz;

[0029] Figure 4 (b) The phase diagram of the periodic two-attractor of the neural network with homogeneous ReLU activation function implemented on the v1-v2 plane captured by Multisim circuit simulation software when the input AC excitation physical amplitude is A=1V and F=2.706kHz;

[0030] Figure 4 (c) The phase diagram of the periodic four-attractor neural network with homogeneous ReLU activation function on the v1-v2 plane captured by Multisim circuit simulation software when the input AC excitation physical amplitude is A=1V and F=3.024kHz;

[0031] Figure 4 (d) The chaotic attractor phase diagram of the neural network with homogeneous ReLU activation function implemented on the v1-v2 plane captured by Multisim circuit simulation software when the input AC excitation physical amplitude is A=1V and F=3.979kHz.

[0032] Figure 5 (a) Phase diagram of the attractor of the neural network with homogeneous ReLU activation function implemented on the v1-v2 plane captured by the hardware oscilloscope when the input AC excitation physical amplitude is A=1V and F=2.387kHz;

[0033] Figure 5 (b) The phase diagram of the periodic two-attractor of the neural network with homogeneous ReLU activation function implemented on the v1-v2 plane captured by the oscilloscope on the hardware when the input AC excitation physical amplitude is A=1V and F=2.706kHz;

[0034] Figure 5 (c) The phase diagram of the periodic four-attractor neural network with homogeneous ReLU activation function implemented on the v1-v2 plane captured by the oscilloscope on the hardware when the input AC excitation physical amplitude is A=1V and F=3.024kHz;

[0035] Figure 5 (d) is the phase diagram of the chaotic attractor of the neural network with homogeneous ReLU activation function implemented on the v1-v2 plane captured by the oscilloscope on the hardware when the input AC excitation physical amplitude is A=1V and F=3.979kHz. DETAILED DESCRIPTION

[0036] The present application is described below with reference to specific embodiments:

[0037] Example 1:

[0038] This embodiment provides a neural network circuit containing a homogeneous ReLU activation function, including three integral channels with identical structures and mutual coupling, each integral channel including an integral unit consisting of an input resistance network, an integral capacitor, and an operational amplifier, and the output end of each integral channel is connected to an inverse ReLU function implementation circuit; wherein, the three integral channels respectively receive DC excitation and AC excitation signals introduced through external input ends, and the output signals of each channel are respectively input to other channels through a coupling network, thereby realizing dynamic feedback coupling between multiple channels.

[0039] like Figure 1 As shown, the three integration channels are integration channel 1, integration channel 2 and integration channel 3;

[0040] Integration channel 1 includes capacitor C1, resistors R1, R2, R3, R8, operational amplifier U1, operational amplifier U4, reverse ReLU function implementation circuit F1 and input terminal v a 、v b 、v DC ; Among them, the input terminal v a Connect the left end of resistor R1 to resistor R8, and the input terminal v b The left end of the capacitor C1 is connected to the resistor R2; the right end of R1 and the right end of R2 are connected to the inverting input terminal of the operational amplifier U1 at the same time. The DC excitation signal v DC It is also directly connected to the inverting input terminal of U1 through resistor R3; the right end of resistor R8 and the right end of capacitor C1 are connected to the output terminal of U1, which is v1 terminal; v1 terminal is connected to the left end of the reverse ReLU function implementation circuit F1, and the right end output of F1 is v a ;v a The signal then passes through the inverter (through the resistor R 10 、R 11 and operational amplifier U4): R 10 Left end connected to v a , R 10 The right end is connected to R 11 The left end and the inverting input of U4, R 11 The right end is connected to the U4 output, which serves as the -v a The signal is output and serves as the input of integration channel 2; the non-inverting input terminals of operational amplifiers U1 and U4 are both grounded.

[0041] Integration channel 2 includes capacitor C2, resistors R4, R5, R6, R9, R 10 、R 11 , operational amplifier U2, reverse ReLU function circuit F2 and input terminals -v0, -v a 、v c ; Among them, the AC excitation signal -v0 is connected to the left end of the resistor R9 through the resistor R4, and the input terminal -v a Connect the left end of the capacitor C2 through the resistor R5; the right end of R4 and the right end of R5 are connected to the inverting input terminal of the operational amplifier U2 at the same time, and the left end of R9 and the left end of C2 are also connected to the inverting input terminal of U2 at the same time; the input terminal v c Connected to the inverting input terminal of U2 through resistor R6; the right end of resistor R9 and the right end of capacitor C2 are connected to the output terminal of U2, which is the v2 terminal; the v2 terminal is connected to the left end of the reverse ReLU function implementation circuit F2, and the right end output of F2 is v b , v b The signal is introduced as input into the integration channel 1 v b Input and integration channel 3 V b Input terminal: The non-inverting input terminal of U2 is grounded and the supply voltage is ±15V.

[0042] Integration channel 3 includes capacitor C3, resistor R7, R 12 , operational amplifier U3 and, ReLU function implementation circuit F3 and input terminal vb; where v b The input terminal and the V of the integration channel 2 b Output terminal, V of integral channel 1 b The input terminal is connected to the left end of resistor R7; the right end of R7 is also connected to the resistor R 12 The left end of the capacitor C3 is connected to the inverting input of the operational amplifier U3, R 12 The right end of the capacitor C3 is directly connected to the output of U3 at the same time. The output of U3 is the v3 terminal. The v3 terminal is connected to the left end of the reverse ReLU function circuit F3. The right end of F3 is the v c Output, introduce the v of integral channel 2 c Input terminal; the non-inverting input terminal of U3 is grounded.

[0043] The reverse ReLU function implementation circuit includes a unidirectional limiting unit composed of an operational amplifier and a diode, which is used to perform reverse ReLU nonlinear processing on the input signal. The reverse ReLU function implementation circuits F1, F2, and F3 have the same structure. Taking F1 as an example, Figure 2 As shown, its input terminal is connected to the resistor R 13 Connect to the inverting input terminal of the operational amplifier U5; the inverting input terminal of the operational amplifier U5 and the resistor R 14The left end of the diode D1 is connected to the cathode of the diode D1; the anode of the diode D1 is connected to the output end of the operational amplifier U5 and the cathode of the diode D2; the resistor R 14 The right end is connected to the anode of diode D2 and serves as the output terminal v o ;The non-inverting input of U5 is grounded.

[0044] The power supply voltage of each of the above operational amplifiers is ±15V.

[0045] Example 2:

[0046] This embodiment is based on the circuit structure of Example 1 and analyzes the implementation principle of its neural network from the perspective of modeling. The present invention is based on a homogeneous ReLU activation function neural network. In order to achieve rich dynamics of the neural network, the external stimulation frequency of the neural network is changed. In order to facilitate the analysis and implementation of this circuit, the model can be expressed as a set of differential equations:

[0047] (1)

[0048] Where x is the average potential of the neuron cell, ReLU(.) is the activation function, which can be used as a nonlinear function to construct neurons. AC =Asin(ωt) simulates the external time-varying stimulus, ω is the adjustable angular frequency, and A is the adjustable amplitude. I1=-6 is a constant stimulus. Therefore, the neural network model (1) with a homogeneous ReLU activation function can be regarded as a non-autonomous dynamic system.

[0049] The above model is numerically simulated based on the ODE23 algorithm of MATLAB software. Taking A=1 as an example, the dynamic behavior of the neural network numerical simulation under different ω is as follows: Figure 3 When ω is 1.5, model (1) behaves as a periodic attractor, as shown in Figure 3 (a); when ω is 1.7, model (1) behaves as a periodic two-attractor, as shown in Figure 3 (b); when ω is 1.9, model (1) behaves as a periodic four-attractor, as shown in Figure 3 (c); when ω is 2.5, model (1) behaves as a chaotic attractor, as shown in Figure 3 Therefore, the numerical simulation results of the four phase diagrams indicate the existence of chaotic attractors and periodic chaotic attractors.

[0050] For the circuit structure given in Example 1, when the time scale of the circuit satisfies t=RCτ(R=10kΩ, C=10nF), according to Figure 1 From the circuit schematic, we can derive the circuit equation as

[0051] (2)

[0052] Where v1, v2 and v3 are the three state variables of (2). By changing the frequency of V0=Asin(2πFτ)V, the dynamic behavior of the neural network with homogeneous ReLU activation function on the circuit can be realized. DC =6 V. According to model (2), the corresponding resistor configuration is R1=R2=R / 3=3.333 kΩ, R3=R4=R7=10 kΩ, R5=R / 9=1.111 kΩ, R6=R / 1.5=6.667 kΩ, and A=1 V.

[0053] In the reverse ReLU function implementation circuit module, the element value is fixed to R 13 =R 14 =10kΩ.

[0054] Physical simulation of the experimental attractor of the neural network model with homogeneous ReLU activation function Figure 4 As shown. By adjusting the frequency of the input signal, the phase diagram projected on the v1-v2 plane can be captured experimentally. When the input AC excitation physical frequency is F = 2.706kHz, model (2) behaves as a periodic attractor, as shown in Figure 4 (a); when the input AC excitation physical frequency is F = 3.024kHz, model (2) behaves as a periodic two-attractor, as shown in Figure 4 (b) When the input AC excitation physical frequency is F = 3.024kHz, model (2) behaves as a periodic four-attractor, as shown in Figure 4 (c) When the input AC excitation physical frequency is F = 3.979kHz, model (2) behaves as a chaotic attractor, as shown in Figure 4 (d) As shown in Figure 3, it can be seen that when some experimental errors are ignored, different attractors exist, and they are basically consistent with the numerical simulation results, which shows the effectiveness and correctness of the circuit design.

[0055] The above contents are verified by experiments. The present invention mainly studies the use of fewer analog components to conduct circuit experiments to realize multiplier-free electrical neurons.

[0056] The precision potentiometer, metal film resistor, monolithic ceramic capacitor and AD711KN operational amplifier with ±15V power supply are used to realize the following Figure 1 The above AC signal was provided by GWINSTEK AFG-2005, and the experimental phase diagram was acquired by GWINSTEK GDS-1104EP digital oscilloscope in XY mode.

[0057] The experimental attractor of the physical implementation of the ReLU activation function neural network model (2) is as follows Figure 5As shown. By adjusting the frequency of the input signal, the phase diagram projected on the v1–v2 plane can be captured experimentally. When the input AC excitation physical frequency is F = 2.387kHz, model (2) behaves as a periodic attractor, as shown in Figure 5 (a); when the input AC excitation physical frequency is F = 2.706kHz, model (2) behaves as a periodic two-attractor, as shown in Figure 5 (b) When the input AC excitation physical frequency is F = 3.024kHz, model (2) behaves as a periodic four-limit cycle, as shown in Figure 5 (c) When the input AC excitation physical frequency is F = 3.979kHz, model (2) behaves as a chaotic attractor, as shown in Figure 5 As shown in (d), it can be seen that, ignoring some experimental errors, there are periods and chaotic attractors that vary with frequency, and they are basically consistent with the numerical simulation results, which shows the effectiveness and correctness of the circuit design.

[0058] In the embodiment of the present invention, the operational amplifiers U1, U2, U3, U4 and U5 are of model AD711KN.

[0059] In the embodiment of the present invention, the diodes D1 and D2 are 1N4148.

[0060] In this embodiment of the present invention, the DC voltage source has a voltage of ±15V.

[0061] Therefore, the neural network circuit containing a homogeneous ReLU activation function constructed by the present invention has a scientific theoretical basis and physical feasibility, and can promote the neural network and its hardware implementation.

[0062] The results of implementing a neural network circuit with a homogeneous ReLU activation function show that:

[0063] a. The implementation circuit of the neural network with homogeneous ReLU activation function is only controlled by external excitation rather than resistance;

[0064] b. Adjusting the excitation frequency can realize single-cycle, multi-cycle and chaotic attractors of neural networks with homogeneous ReLU activation functions;

[0065] c. Only 34 circuit elements are required to implement a homogeneous ReLU activation function neural network circuit, which is more than 50% less than the 73 circuit elements required to implement a traditional homogeneous Tanh activation function neural network circuit.

[0066] It can be seen that the circuit design of the present invention can realize a neural network containing a homogeneous ReLU activation function.

[0067] The above are only preferred embodiments of the present invention and are not intended to limit the invention. Several improvements and modifications may be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

[0068] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

Claims

1. A neural network circuit with a homogeneous ReLU activation function, characterized in that: The invention comprises three integral channels with identical structures and mutual coupling, each integral channel comprising an integral unit consisting of an input resistance network, an integral capacitor and an operational amplifier, and the output end of each integral channel is connected to an inverse ReLU function implementation circuit; The three integral channels receive DC excitation and AC excitation signals introduced through external input terminals respectively, and the output signals of each channel are input to other channels respectively, thereby realizing dynamic feedback coupling among multiple channels; The inverse ReLU function implementation circuit includes a unidirectional limiting unit composed of an operational amplifier and a diode, which is used to perform inverse ReLU nonlinear processing on the input signal.

2. A neural network circuit containing a homogeneous ReLU activation function according to claim 1, characterized in that: The three integration channels are integration channel 1, integration channel 2 and integration channel 3 respectively.

3. A neural network circuit containing a homogeneous ReLU activation function according to claim 2, characterized in that: The integration channel 1 includes a capacitor C1, resistors R1, R2, R3, R8, an operational amplifier U1, an operational amplifier U4, an inverse ReLU function implementation circuit F1 and an input terminal v a 、v b 、v DC ; Among them, the input terminal v a Connect the left end of resistor R1 to resistor R8, and the input terminal v b The left end of the capacitor C1 is connected to the resistor R2; the right end of R1 and the right end of R2 are connected to the inverting input terminal of the operational amplifier U1 at the same time. The DC excitation signal v DC It is also directly connected to the inverting input terminal of U1 through resistor R3; the right end of resistor R8 and the right end of capacitor C1 are connected to the output terminal of U1, which is v1 terminal; v1 terminal is connected to the left end of the reverse ReLU function implementation circuit F1, and the right end output of F1 is v a ;v a The signal then passes through the inverter (through the resistor R 10 、R 11 and operational amplifier U4): R 10 Left end connected to v a , R 10 The right end is connected to R 11 The left end and the inverting input of U4, R 11 The right end is connected to the U4 output, which serves as the -v a The signal is output and serves as the input of integration channel 2; the non-inverting input terminals of operational amplifiers U1 and U4 are both grounded.

4. A neural network circuit containing a homogeneous ReLU activation function according to claim 3, characterized in that: Integration channel 2 includes capacitor C2, resistors R4, R5, R6, R9, R 10 、R 11 , operational amplifier U2, reverse ReLU function circuit F2 and input terminals -v0, -v a 、v c ; Among them, the AC excitation signal -v0 is connected to the left end of the resistor R9 through the resistor R4, and the input terminal -v a Connect the left end of the capacitor C2 through the resistor R5; the right end of R4 and the right end of R5 are connected to the inverting input terminal of the operational amplifier U2 at the same time, and the left end of R9 and the left end of C2 are also connected to the inverting input terminal of U2 at the same time; the input terminal v c Connected to the inverting input terminal of U2 through resistor R6; the right end of resistor R9 and the right end of capacitor C2 are connected to the output terminal of U2, which is the v2 terminal; the v2 terminal is connected to the left end of the reverse ReLU function implementation circuit F2, and the right end output of F2 is v b , v b The signal is introduced as input into the integration channel 1 v b Input and integration channel 3 V b Input terminal: The non-inverting input terminal of U2 is grounded and the supply voltage is ±15V.

5. A neural network circuit containing a homogeneous ReLU activation function according to claim 4, characterized in that: Integration channel 3 includes capacitor C3, resistor R7, R 12 , operational amplifier U3 and, ReLU function implementation circuit F3 and input terminal vb; Among them, v b The input terminal and the V of the integration channel 2 b Output terminal, V of integral channel 1 b The input terminal is connected to the left end of resistor R7; the right end of R7 is also connected to the resistor R 12 The left end of the capacitor C3 is connected to the inverting input of the operational amplifier U3, R 12 The right end of the capacitor C3 is directly connected to the output of U3 at the same time. The output of U3 is the v3 terminal. The v3 terminal is connected to the left end of the reverse ReLU function circuit F3. The right end of F3 is the v c Output, introduce the v of integral channel 2 c Input terminal; the non-inverting input terminal of U3 is grounded.

6. A neural network circuit containing a homogeneous ReLU activation function according to claim 5, characterized in that: The input end of the circuit is connected to the resistor R 13 Connect to the inverting input terminal of the operational amplifier U5; the inverting input terminal of the operational amplifier U5 and the resistor R 14 The left end of the diode D1 is connected to the cathode of the diode D1; the anode of the diode D1 is connected to the output end of the operational amplifier U5 and the cathode of the diode D2; the resistor R 14 The right end is connected to the anode of diode D2 and serves as the output terminal v o ; The non-inverting input of U5 is grounded.

7. A neural network circuit containing a homogeneous ReLU activation function according to claim 6, characterized in that: The power supply voltages of the operational amplifiers U1, U2, U3, U4 and U5 are all ±15V.

8. A neural network circuit containing a homogeneous ReLU activation function according to any one of claims 1 to 7, characterized in that: The circuit is used to implement the differential equation described below: ; Among them, x is the average value of neuron cell potential, ReLU(.) is the activation function, which can be used as a nonlinear function to construct neurons, I AC =Asin(ωt) is the simulated external time-varying stimulus, ω is the adjustable angular frequency, A is the adjustable amplitude, and I1=-6 is a constant stimulus.