An image recognition method and system based on a photonic differentiable logic gate network model, a terminal and a storage medium

Abstract

The application relates to the technical field of image processing, and discloses an image recognition method, system, terminal and storage medium based on a photonic differentiable logic gate network model, the method comprising the following steps: acquiring gray matrix data of an input image, converting the gray matrix data according to a preset optical power mapping rule to obtain an optical power signal; performing optical calculation and processing on the optical power signal through a plurality of logic gate processing units of the photonic differentiable logic gate network model to obtain an optical power signal matrix, and converting the optical power signal matrix to obtain an image feature representation graph; performing classification processing on the image feature representation graph to obtain a plurality of classification features, and identifying all the classification features according to a preset classification rule to obtain an image recognition result. The photonic differentiable logic gate network model is used for training optical logic gates and recognizing images, so that optical calculation and accurate classification and recognition of image features are realized.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of image processing, in particular to an image recognition method and system based on a photonic differentiable logic gate network model, a terminal and a computer readable storage medium. BACKGROUND

[0002] In recent years, the rapid development of artificial intelligence and big data technology has promoted the wide application of neural network models in the fields of computer vision, natural language processing, etc. The demand for efficient computing power is increasingly urgent, but the traditional electronic computing is facing the problem that the size of transistors is approaching the atomic level, the increase speed of Moore's law is slowing down, the energy efficiency and speed of electronic chips are difficult to break through, and the von Neumann architecture has defects, resulting in "memory wall" and "power wall", and the data transmission energy consumption accounts for more than 60% of the total system energy consumption.

[0003] However, the existing optical logic gate is mostly based on fixed function design, lacking programmability and trainability, and it is difficult to directly adapt to the dynamic parameter optimization demand required by deep learning. Although the Differentiable Logic Gate Networks provides a theoretical breakthrough for embedding discrete logic operations into the gradient descent framework, its electronic implementation is still limited by the physical limit of traditional hardware. If the neural network directly uses optical logic gate, the existing neural network cannot realize high-speed and low-energy computing and recognition of images, which is a problem to be solved at present.

[0004] Therefore, the prior art still needs to be improved and developed. SUMMARY

[0005] The main purpose of the present application is to provide an image recognition method and system based on a photonic differentiable logic gate network model, a terminal and a computer readable storage medium, which aims to solve the problem that the existing optical logic gate lacks trainability, resulting in the inability of the neural network to train the optical logic gate and further to efficiently recognize images when the neural network uses the optical logic gate.

[0006] To achieve the above purpose, the present application provides an image recognition method based on a photonic differentiable logic gate network model, which comprises the following steps:

[0007] Obtain the gray matrix data of the input image, convert the gray matrix data according to a preset optical power mapping rule to obtain an optical power signal;

[0008] input the optical power signal to a photonic differentiable logic gate network model, perform optical calculation processing on the optical power signal by a plurality of logic gate processing units of the photonic differentiable logic gate network model, obtain an optical power signal matrix, and convert the optical power signal matrix to obtain an image feature representation graph;

[0009] perform classification processing on the image feature representation graph to obtain a plurality of classification features, and identify all the classification features according to a preset classification rule to obtain an image recognition result.

[0010] Optionally, the image recognition method based on the photonic differentiable logic gate network model, wherein the preset optical power mapping rule includes a threshold power rule.

[0011] The method further includes: obtaining a gray matrix data of the input image, and converting the gray matrix data according to a preset optical power mapping rule to obtain an optical power signal, and the conversion includes:

[0012] obtaining a data set and a gray value of the input image, encoding the data set according to the gray value to obtain the gray matrix data.

[0013] mapping the gray matrix data according to the threshold power rule to obtain a plurality of optical power values, and dividing all the optical power values according to a preset interval to obtain the optical power signal.

[0014] Optionally, the image recognition method based on the photonic differentiable logic gate network model, wherein the inputting of the optical power signal to the photonic differentiable logic gate network model, the optical calculation processing of the optical power signal by the plurality of logic gate processing units of the photonic differentiable logic gate network model, the obtaining of the optical power signal matrix, and the conversion of the optical power signal matrix to obtain the image feature representation graph include:

[0015] inputting the optical power signal to the photonic differentiable logic gate network model, performing logic operation on the optical power signal by a basic photonic logic gate of each of the plurality of logic gate processing units of the photonic differentiable logic gate network model based on a spatial cross-phase modulation method to obtain a plurality of diffraction information.

[0016] performing optical calculation processing on all the diffraction information by the plurality of logic gate processing units to obtain an optical power signal matrix, and converting the optical power signal matrix to obtain an image feature representation graph.

[0017] Optionally, the image recognition method based on the photonic differentiable logic gate network model, wherein the inputting of the optical power signal into the photonic differentiable logic gate network model is based on a spatial cross-phase modulation method, and the optical power signal is subjected to logical operation by basic photonic logic gates of a plurality of logic gate processing units of the photonic differentiable logic gate network model to obtain a plurality of diffraction information, and the method specifically comprises:

[0018] The inputting of the optical power signal into the photonic differentiable logic gate network model is based on a spatial cross-phase modulation method, and the optical power signal is subjected to modulation to obtain a target optical power signal;

[0019] The target optical power signal is subjected to logical operation by basic photonic logic gates of a plurality of logic gate processing units of the photonic differentiable logic gate network model to obtain a plurality of diffraction information.

[0020] The logical operation includes any one of an AND gate operation, an OR gate operation, an AND NOT gate operation, an OR NOT gate operation, an XOR gate operation, a XNOR gate operation, and a NOT gate operation.

[0021] Optionally, the image recognition method based on the photonic differentiable logic gate network model, wherein the optical computing and processing of all the diffraction information by the plurality of logic gate processing units to obtain an optical power signal matrix, and the conversion of the optical power signal matrix to obtain an image feature representation map, specifically comprises:

[0022] The optical computing and processing of all the diffraction information by the plurality of logic gate processing units to obtain first optical power data.

[0023] The training of the first optical power data by the plurality of logic gate processing units to obtain second optical power data.

[0024] The target position data of the second optical power data is eliminated to obtain a plurality of matrix data, and the arrangement of all the matrix data to obtain an optical power signal matrix, and the conversion of the optical power signal matrix to obtain an image feature representation map.

[0025] The diffraction information includes a diffraction spot and a diffraction ring.

[0026] Optionally, the image recognition method based on the photonic differentiable logic gate network model, wherein the classification processing of the image feature representation map to obtain a plurality of classification features, and the identification of all the classification features according to a preset classification rule to obtain an image recognition result, specifically comprises:

[0027] The classification processing of the image feature representation map according to the diffraction spot and the diffraction ring to obtain a plurality of classification features.

[0028] According to the preset classification rule and the optical power signal matrix, position information of all the classification features is determined to obtain a recognition result.

[0029] Optionally, the image recognition method based on the photonic differentiable logic gate network model, wherein the determining of the position information of all the classification features according to the preset classification rule and the optical power signal matrix to obtain the recognition result specifically comprises:

[0030] According to the preset classification rule and the optical power signal matrix, position information of all the classification features is determined to obtain a recognition result.

[0031] It is determined whether the label information of the target position information is target label information of the optical power signal matrix.

[0032] If the label information is the target label information, binary recognition is performed on the target label information to obtain a recognition result.

[0033] In addition, to achieve the above-mentioned purpose, the present application further provides an image recognition system based on a photonic differentiable logic gate network model, wherein the image recognition system based on the photonic differentiable logic gate network model:

[0034] The signal conversion module is configured to obtain a gray matrix data of an input image, convert the gray matrix data according to a preset optical power mapping rule, and obtain an optical power signal.

[0035] The image feature representation graph generation module is configured to input the optical power signal into a photonic differentiable logic gate network model, perform optical calculation and processing on the optical power signal through a plurality of logic gate processing units of the photonic differentiable logic gate network model, obtain an optical power signal matrix, and convert the optical power signal matrix to obtain an image feature representation graph.

[0036] The image recognition module is configured to perform classification processing on the image feature representation graph to obtain a plurality of classification features, and perform recognition on all the classification features according to a preset classification rule to obtain an image recognition result.

[0037] In addition, to achieve the above-mentioned purpose, the present application further provides a computer readable storage medium, wherein the computer readable storage medium stores an image recognition program based on a photonic differentiable logic gate network model, and the image recognition program based on the photonic differentiable logic gate network model is executed by a processor to implement the steps of the image recognition method based on the photonic differentiable logic gate network model as described above.

[0038] In the present application, the gray matrix data of the input image is obtained, the gray matrix data is converted according to a preset optical power mapping rule to obtain an optical power signal; the optical power signal is input into a photonic differentiable logic gate network model, the optical power signal is processed by optical calculation through a plurality of logic gate processing units of the photonic differentiable logic gate network model to obtain an optical power signal matrix, and the optical power signal matrix is converted to obtain an image feature representation graph; the image feature representation graph is classified to obtain a plurality of classification features, and all the classification features are identified according to a preset classification rule to obtain an image recognition result. The photonic differentiable logic gate network model is used for training optical logic gates and identifying images, so that optical calculation and accurate classification and identification of image features are realized. BRIEF DESCRIPTION OF DRAWINGS

[0039] Figure 1 is a flowchart of a preferred embodiment of the image recognition method based on the photonic differentiable logic gate network model of the present application;

[0040] Figure 2 is a structural diagram of a preferred embodiment of the image recognition method based on the photonic differentiable logic gate network model of the present application;

[0041] Figure 3 is a schematic diagram of an SXPM optical path of a preferred embodiment of the image recognition method based on the photonic differentiable logic gate network model of the present application;

[0042] Figure 4 is a structural diagram of a photonic device of a preferred embodiment of the image recognition method based on the photonic differentiable logic gate network model of the present application;

[0043] Figure 5 is a schematic diagram of a logic gate processing framework of a preferred embodiment of the image recognition method based on the photonic differentiable logic gate network model of the present application;

[0044] Figure 6 is a flowchart of handwritten digit classification of a preferred embodiment of the image recognition method based on the photonic differentiable logic gate network model of the present application;

[0045] Figure 7 is a schematic diagram of a change of a screen light spot in an SXPM of a preferred embodiment of the image recognition method based on the photonic differentiable logic gate network model of the present application;

[0046] Figure 8 is a schematic diagram of a Mnist confusion matrix of a preferred embodiment of the image recognition method based on the photonic differentiable logic gate network model of the present application;

[0047] Figure 9A schematic diagram of a CIFAR-10 confusion matrix of a preferred embodiment of the image recognition method based on a photonic differentiable logic gate network model of the present application;

[0048] Figure 10 A schematic diagram of Mnist and CIFAR-10 task accuracy of a preferred embodiment of the image recognition method based on a photonic differentiable logic gate network model of the present application;

[0049] Figure 11 A structural diagram of a preferred embodiment of the image recognition system based on a photonic differentiable logic gate network model of the present application;

[0050] Figure 12 A structural diagram of a preferred embodiment of the terminal of the device of the present application. DETAILED DESCRIPTION

[0051] In order to make the purpose, technical scheme and advantages of the present application more clear and explicit, the present application will be further described in detail below with reference to the drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present application and do not limit the present application.

[0052] As a new computing paradigm, photonic neural networks have received extensive attention in recent years. Compared with traditional electronic neural networks, photonic neural networks have significant advantages such as low delay, low energy consumption, high bandwidth and high parallelism, and are expected to play an important role in future computing. As a new type of neural network architecture, photonic differentiable logic gate neural network replaces the neurons of traditional neural network with optical logic gates, not only retaining the strong learning ability of neural network, but also greatly reducing the energy consumption. At the same time, using photons instead of electrons makes it have higher computing effect. However, existing optical logic gates are mostly based on fixed function design, lacking programmability and trainability, and are difficult to directly adapt to the dynamic parameter optimization requirements needed by deep learning. Although the Differentiable Logic Gate Networks provides a theoretical breakthrough for embedding discrete logic operations into the gradient descent framework, its electronic implementation is still limited by the physical limits of traditional hardware. If the neural network directly uses optical logic gates, the existing neural network is difficult to realize high-speed and low-energy consumption computing and recognition of images. Therefore, a kind of image recognition method based on photonic differentiable logic gate network model is needed, which trains the optical logic gate through the neural network, and then efficiently recognizes the image.

[0053] The image recognition method based on a photonic differentiable logic gate network model according to the preferred embodiment of the present application, as shown in Figure 1 and Figure 2 The image recognition method based on a photonic differentiable logic gate network model includes the following steps:

[0054] Step S10: Obtain grayscale matrix data of an input image, and convert the grayscale matrix data according to a preset optical power mapping rule to obtain an optical power signal.

[0055] The step S10 includes:

[0056] Step S11, obtaining a data set and grayscale values ​​of an input image, encoding the data set according to the grayscale values ​​to obtain grayscale matrix data;

[0057] Step S12: Mapping the grayscale matrix data according to the threshold power rule to obtain a plurality of optical power values, and dividing all the optical power values ​​in sequence according to preset intervals to obtain an optical power signal.

[0058] Specifically, the data set and grayscale value of the input image are obtained, and the data set is encoded according to the grayscale value to obtain grayscale matrix data (the neural network converts the grayscale matrix data into grayscale matrix data when recognizing the number). Figure 2 The digital "0" grayscale image of the 800*800 pixel points in the data set is encoded into a grayscale value matrix (grayscale matrix data) according to the grayscale value size. Each grayscale value of the grayscale matrix data corresponds to an optical power value. For example, among the grayscale values ​​0-255, 128 corresponds to the spatial cross-phase modulation (SXPM, Scanning X-ray Fluorescence Microscopy) threshold power, and 64 corresponds to half the threshold power). The grayscale matrix data is mapped according to the threshold power rule to obtain multiple optical power values. All the optical power values ​​are divided in sequence according to preset intervals to obtain an optical power signal (the optical power corresponding to the grayscale value matrix is ​​used as the input value of the 64,000 logic gates of the photon differentiable logic gate network in every 10 values, the logic gate processing unit (LPU, Logic Processing Unit), and further to the information acquisition device (CCD, Charge-Coupled Device) to collect the shape and intensity, the output generation unit output, obtain a process record (recording image information and output optical power information), and the process record is fed back to the program counter (PC, Program Counter).

[0059] In this embodiment, if Figure 2 As shown, process 1: convert the 10 values ​​of the grayscale value matrix into optical power and use them as the input optical power of the first layer of laser. Process 2: input the CCD output results of the first layer (the number of diffraction rings and the optical power of the diffraction rings) into the computer, and then the second layer of laser uses the same optical power as the output diffraction ring of the first layer to output.

[0060] Step S20, input the optical power signal into the photonic differentiable logic gate network model, perform optical calculation processing on the optical power signal by a plurality of logic gate processing units of the photonic differentiable logic gate network model, obtain an optical power signal matrix, and convert the optical power signal matrix to obtain an image feature representation graph.

[0061] The step S20 includes:

[0062] Step S21, input the optical power signal into the photonic differentiable logic gate network model, perform logic operation on the optical power signal by a plurality of logic gate processing units of the photonic differentiable logic gate network model based on a spatial cross-phase modulation method, obtain a plurality of diffraction information;

[0063] Step S22, perform optical calculation processing on all the diffraction information by a plurality of the logic gate processing units, obtain an optical power signal matrix, and convert the optical power signal matrix to obtain an image feature representation graph.

[0064] Specifically, as shown in Figure 3 the optical power signal is input into the photonic differentiable logic gate network model, logic operation is performed on the optical power signal by a plurality of logic gate processing units of the photonic differentiable logic gate network model based on a spatial cross-phase modulation method, a plurality of diffraction information (the threshold of spatial cross-phase modulation (SXPM, Scanning X-ray Fluorescence Microscopy) is the laser power at which the laser beam just becomes a diffraction spot, below this power, the receiving screen is a diffraction spot; above this power, the receiving screen is a diffraction ring, the diffraction information includes a diffraction ring and a diffraction spot, the diffraction spot is a signal "0", and the diffraction ring is a signal "1") is obtained, optical calculation processing is performed on all the diffraction information by a plurality of the logic gate processing units, an optical power signal matrix is obtained, and the optical power signal matrix is converted to obtain an image feature representation graph (processing and classification results of a photonic neural network on two handwritten digital images ("0" and "9"): each row corresponds to the recognition result of a handwritten digital: each handwritten digital is processed into 800*800, i.e. 640000 gray values, there are 64000 logic gate processing units, i.e. each logic gate processing unit processes 10 gray values in order, i.e. after two optical calculation processes, 10 diffraction ring images are finally output in each row, and whether the row is correct or not for image recognition is judged according to the diffraction ring images finally output in each row. The output results of all 64000 rows are the accuracy of the digital image judgment, and through two layers of image feature representation graphs, it can be directly observed how the photonic neural network extracts and utilizes the image feature representation graphs to realize accurate classification).

[0065] In this embodiment, as shown in Figure 3 The laser 1 is a 532 nm laser, and the laser 2 is a 671 nm laser. The 671 nm laser emitted by the laser 2 passes through a 50:50 non-polarization beam splitting cube, and the 532 nm laser emitted by the laser 1 passes through a beam splitting cube at a small angle to be combined. After passing through a focusing lens, the combined light is incident on a photonic device located 5 mm in front of the focal point. The photonic device can move back and forth along the optical axis. A dichroic mirror is placed at the rear end to split the 532 nm and 671 nm beams. A receiving screen is placed at the spot of each beam. When the 532 nm and 672 nm beams with different wavelengths are simultaneously incident on a material with the SXPM characteristic at a small angle, the intensity of the 532 nm laser is ensured to be below the threshold of the SXPM. By increasing the intensity of the 671 nm laser, it can be observed on the receiving screen that as the intensity of the 671 nm laser increases, the diffraction spot of the 532 nm laser on the receiving screen changes into a diffraction ring, and the number of rings gradually increases. Figure 3 Z in the formula (1) represents a longitudinal axis in a spatial coordinate system, indicating the direction of light propagation or the thickness direction of the device.

[0066] The step S21 comprises:

[0067] In step S211, the optical power signal is input to the photonic differentiable logic gate network model, and the optical power signal is modulated based on the spatial cross-phase modulation method to obtain a target optical power signal.

[0068] In step S212, the target optical power signal is subjected to logic operation by the basic photonic logic gate of the plurality of logic gate processing units of the photonic differentiable logic gate network model to obtain a plurality of diffraction information.

[0069] Specifically, the logic operation includes any one of AND gate operation, OR gate operation, NAND gate operation, NOR gate operation, XOR gate operation, XNOR gate operation, and NOT gate operation. The optical power signal is input to the photonic differentiable logic gate network model, and the optical power signal is modulated based on the spatial cross-phase modulation method to obtain a target optical power signal (based on the spatial cross-phase modulation method, a suitable light source and a spatial light modulator (SLM, Spatial Light Modulator) are selected to realize the processing of data into optical power information, i.e. the target optical power signal). The target optical power signal is subjected to logic operation by the basic photonic logic gate of the plurality of logic gate processing units of the photonic differentiable logic gate network model to obtain a plurality of diffraction information (as the input information of each logic gate processing unit, a plurality of logic gate processing units are used to realize the calculation process to obtain a plurality of diffraction information).

[0070] In this embodiment, as Figure 3 and Figure 4As shown, (1) AND gate: the photonic device (consisting of copper wire, indium tin oxide (ITO) glass, high-entropy (HE-Mxene) solution and acrylic double-sided tape) is normally placed in the SXPM optical path, the input power of 532 nm is set to "1", the input power of 671 nm is set to "1", at this time the light intensity of the two beams is greater than the SXPM threshold light intensity, the SXPM diffraction ring of 532 nm can be observed on the rear-end observation screen, and the diffraction ring of 532 nm laser is formed, at this time the logic relationship "1+1=1" is realized, the photonic device is charged with +0.4V voltage for 10 minutes and then placed in the SXPM optical path, the input power of 532 nm is set to "1" and the input power of 671 nm is set to "0", at this time the diffraction spot of 532 nm laser is formed on the rear-end observation screen, and the diffraction ring of 532 nm laser is not formed, at this time the logic relationship "1+0=0" is realized, the photonic device is charged with +0.4V voltage for 10 minutes and then placed in the SXPM optical path, the input power of 532 nm is set to "0" and the input power of 671 nm is set to "1", at this time the diffraction ring of 532 nm laser is not formed on the rear-end observation screen, at this time the logic relationship "0+1=0" is realized, and the uncharged photonic device is placed in the SXPM optical path, the input power of 532 nm is set to "0"; (2) OR gate: the photonic device is normally placed in the SXPM optical path, the input power of 532 nm is set to "1" and the input power of 671 nm is set to "1", the diffraction ring of 532 nm laser can be observed on the rear-end observation screen, at this time the logic relationship "1+1=1" is realized, the input power of 532 nm is set to "1" and the input power of 671 nm is set to "0", at this time the SXPM diffraction ring of 532 nm is formed on the rear-end observation screen, at this time the logic relationship "1+0=1" is realized, the input power of 532 nm is set to "0" and the input power of 671 nm is set to "1", at this time the SXPM diffraction ring of 532 nm is formed on the rear-end observation screen, at this time the logic relationship "0+1=1" is realized, the input power of 532 nm is set to "0" and the input power of 671 nm is set to "0", at this time the light power of the two beams is less than the SXPM threshold power, the SXPM diffraction ring of 532 nm is not observed on the rear-end observation screen, and the output is 0, at this time the logic relationship "0+0=0" is realized; (3) NAND gate: the photonic device is normally placed in the SXPM optical path, the input power of 532 nm is set to "1" and the input power of 671 nm is set to "1", a positive voltage +0.After 10 minutes of 4V charging, a bright spot at 532nm can be observed on the rear viewing screen. No SXPM diffraction ring is formed, indicating an output signal of "0." This is when the logical relationship "1+1=0" is achieved. An uncharged photonic device is placed in the SXPM optical path, and the 532nm input power is set to "1" and the 671nm input power is set to "0." An SXPM diffraction ring at 532nm can be formed on the rear viewing screen, achieving the logical relationship "1+0=1." When the 532nm input power is set to "0" and the 671nm input power is set to "1," an SXPM diffraction ring at 532nm can also be formed on the rear viewing screen, achieving the logical relationship "0+1=1." When both the 532nm and 671nm laser inputs are set to "0" and the photonic device is repositioned toward the focal point, as shown in the following example. Figure 3 As shown in the figure, a 532nm SXPM diffraction ring is formed on the rear viewing screen, and the output signal is "1". At this time, the logical relationship "0+0=1" is realized; (4) NOR gate: Place the photonic device normally in the SXPM optical path, set the 532nm input power to "1", the 671nm input power to "1", apply a forward voltage of +0.4V to it, and charge it for 10 minutes. After that, a bright spot at 532nm can be observed on the rear viewing screen. No SXPM diffraction ring is formed, which means the output signal is "0". At this time, the logical relationship "1+1=0" is realized; the charged The photonic device is placed in the SXPM optical path, and the 532nm input power is set to "1" and the 671nm input power is set to "0". At this time, the 532nm green light is a bright spot on the rear observation screen, and no SXPM diffraction ring is formed. At this time, the logical relationship "1+0=0" is realized; switch the setting of the 532nm input power to "0" and the 671nm input power to "1". At this time, no 532nm SXPM diffraction ring can be formed on the rear observation screen. At this time, the logical relationship "0+1=0" is realized; set the 532nm input power to "0" and the 671nm input power to "0". Figure 3As shown, the uncharged photonic device is translated to the side of the plano-convex lens until the 532 nm SXPM diffraction ring can be seen on the rear observation screen, output signal "1", at this time the logic relationship "0+0=1" is realized; (5) XOR: the photonic device is normally placed in the SXPM light path, set the 532 nm input power "1", 671 nm input power "1", after applying a forward voltage of +0.4V for 10 minutes, a 532 nm bright spot can be observed on the rear observation screen, no SXPM diffraction ring is formed, which is the output signal "0", at this time the logic relationship "1+1=0" is realized, the uncharged photonic device is placed in the SXPM light path, set the 532 nm input power "1", 671 nm input power "0", at this time the 532 nm SXPM diffraction ring can be formed on the rear observation screen, at this time the logic relationship "1+0=1" is realized, set the 532 nm input power "0", 671 nm input power "1", at this time the 532 nm SXPM diffraction ring can also be formed on the rear observation screen, at this time the logic relationship "0+1=1" is realized, when the 532 nm input power is set to "0" and the 671 nm input power is set to "0", at this time the 532 nm SXPM diffraction ring cannot be formed on the rear observation screen, the output signal is "0", at this time the logic relationship "0+0=0" is realized; (6) XNOR: the photonic device is normally placed in the SXPM light path, set the input power of the two beams to "1", a 532 nm SXPM diffraction ring can be observed on the rear observation screen, which is the output signal "1", at this time the logic relationship "1+1=1" is realized, the charged photonic device is placed in the SXPM light path, set the 532 nm input power "1", 671 nm input power "0", at this time the 532 nm green light on the rear observation screen is a bright spot, no SXPM diffraction ring is formed, at this time the logic relationship "1+0=0" is realized, switch the 532 nm input power to "0" and the 671 nm input power to "1", at this time the 532 nm SXPM diffraction ring cannot be formed on the rear observation screen, at this time the logic relationship "0+1=0" is realized, set the 532 nm input power to "0" and the 671 nm input power to "0", the uncharged photonic device is translated to the focal point side and repositioned, a 532 nm SXPM diffraction ring is formed on the rear observation screen, the output is signal "1", at this time the logic relationship "0+0=1" is realized; (7) NOT: the photonic device is charged with +0.4V voltage for 10 minutes and then placed in the SXPM experimental light path, when the input power is "1" (optical power is 20.1 mW), the rear end cannot form a SXPM diffraction ring, the output is signal "0"; when the input power is "0" (optical power is 10 mW), the uncharged photonic device is moved from the initial position A to the position B closer to the focal point of the light beam, the diffraction ring can be formed, the output is signal "1".

[0071] The step S22 comprises:

[0072] Step S221, optical computing processing all the diffraction information by multiple logical gate processing units to obtain first optical power data;

[0073] Step S222, training the first optical power data by multiple logical gate processing units to obtain second optical power data;

[0074] Step S223, eliminating the target position data of the second optical power data to obtain multiple matrix data, arranging according to all the matrix data to obtain an optical power signal matrix, and converting the optical power signal matrix to obtain an image feature representation graph.

[0075] Specifically, as shown in Figure 2 obtaining first optical power data by multiple logical gate processing units, obtaining second optical power data by multiple logical gate processing units training the first optical power data, eliminating the target position data of the second optical power data to obtain multiple matrix data, arranging according to all the matrix data to obtain an optical power signal matrix, and converting the optical power signal matrix to obtain an image feature representation graph (by integrating a photonic differentiable logic gate network model into each layer of a neural network, efficient feature extraction and classification of an input image can be achieved, a photonic differentiable logic gate network model (PDLGN, Photonic Differentiable Logic Gate Network) network structure includes an input layer, a hidden layer composed of a logical gate processing framework of multiple logical gate processing units (LPU, Logic Processing Unit), and an output layer, and each layer of data operation process is performed by a logical gate processing unit), as shown in Figure 5 Figure 5 a single-layer logical gate processing framework is composed of Figure 2 ​The plurality of logic gate processing units (LPUs, Logic Processing Unit) in the plurality of logic gate processing units (LPUs, Logic Processing Unit) are connected in parallel, wherein the training process: 10 digital images of 0-9 are input in sequence for optical calculation processing, for example, input "1", and the output result is the highest accuracy by switching 7 logic gate processing units; continue to input "2", and the output result is the highest accuracy by switching 7 logic gate processing units, and the sequence is looped "0-9" input training, so that the recognition accuracy of "0-9" digital images reaches the highest.

[0076] In the embodiment, each row corresponds to the recognition result of a handwritten digit: each handwritten digit is processed into 800*800, that is, 640000 gray values, and there are 64000 logic gate processing units (LPUs) in the LPU. Figure 2 The LPU in the LPU) that is, each logic gate processing unit processes 10 gray values distributed in sequence, that is, after two optical calculation processes, 10 diffraction ring images are finally output in each row, and whether the row is correct or not is judged according to the diffraction ring image finally output in each row, and the output results of all 64000 rows are the accuracy of the digital image judgment.

[0077] Step S30, classifying the image feature representation graph to obtain a plurality of classification features, and identifying all the classification features according to a preset classification rule to obtain an image recognition result.

[0078] The step S30 includes:

[0079] Step S31, classifying the image feature representation graph according to the diffraction spot and the diffraction ring to obtain a plurality of classification features;

[0080] Step S32, determining the position information of all the classification features according to a preset classification rule and the optical power signal matrix to obtain a recognition result.

[0081] Specifically, as shown in Figure 6 and Figure 7 Classifying the image feature representation graph according to the diffraction spot and the diffraction ring to obtain a plurality of classification features (for the diffraction spot with the label "0", all elements in the output matrix are 0, indicating that the network does not detect other classification features except "0", and for the image with the label "9", the element corresponding to the position in the output matrix is the diffraction ring with the label "1", and the remaining elements are 0, which indicates that the network successfully recognizes and classifies the image as "9"), and determining the position information of all the classification features according to a preset classification rule and the optical power signal matrix to obtain a recognition result (for example, Figure 4As shown, in the output 3*3 matrix, all 0s are classified as the recognized digital image "0", the first number 1 in the 3*3 matrix is classified as the recognized digital image "1", the second number 1 in the 3*3 matrix is classified as the recognized digital image "2", and so on. Only all 0s and only one 1 are accepted in the output 3*3 matrix.

[0082] The step S32 comprises:

[0083] The step S321 comprises: performing position recognition on the position information of all the classification features according to a preset classification rule and the optical power signal matrix to obtain target position information.

[0084] The step S322 comprises: judging whether the label information of the target position information is target label information of the optical power signal matrix.

[0085] The step S323 comprises: if the label information is the target label information, performing binary recognition on the target label information to obtain a recognition result.

[0086] Specifically, the position information of all the classification features is recognized according to a preset classification rule and the optical power signal matrix to obtain target position information. It is judged whether the label information of the target position information is target label information of the optical power signal matrix (judging the diffraction spot of the label information "0" or the diffraction ring of the label information "1" of this layer). If the label information is the target label information, binary recognition is performed on the target label information to obtain a recognition result (wherein each element corresponds to a possible classification label. For each input image, at most one element in the output matrix of the network is 1, and the rest are 0, which accurately indicates the classification result).

[0087] As shown in Figure 8 and Figure 9 , the confusion matrix in Figure 8 and Figure 9 shows that the image classification task on the Mnist and CIFAR-10 data sets is achieved, and the classification (blind-testing model accuracy) accuracy rates are 97.7% and 50.7%, respectively, as shown in Figure 10As shown, the architecture achieves correct prediction rates of over 96% for all classes of the Mnist dataset, with the accuracy of digits "0" and "1" reaching up to 99%, indicating that the model has strong feature extraction capabilities for simple structured images. For the CIFAR-10 dataset, the average classification accuracy is 50%, and the prediction accuracy of some classes is significantly higher than that of other classes, but the recognition of complex textures and multi-target scenes still faces challenges. This result shows that although the photonic neural network has a lower accuracy when facing more complex image classification tasks, it can still adapt to and process diverse image data. By comparing the classification results on the two datasets, it can be seen that the PDLGN performs very well on simple tasks (such as Mnist handwritten digit recognition), and when dealing with more complex image classification tasks (such as CIFAR-10), although the accuracy decreases, it still shows good adaptability and robustness. These results verify the potential and application prospects of photonic neural networks in different types of image recognition tasks.

[0088] Further, as Figure 11 shown, based on the above image recognition method based on the photonic differentiable logic gate network model, the present application also correspondingly provides an image recognition system based on the photonic differentiable logic gate network model, wherein the image recognition system based on the photonic differentiable logic gate network model comprises:

[0089] A signal conversion module 51 is configured to obtain a gray matrix data of an input image, convert the gray matrix data according to a preset optical power mapping rule, and obtain an optical power signal;

[0090] An image feature representation graph generation module 52 is configured to input the optical power signal into a photonic differentiable logic gate network model, perform optical calculation and processing on the optical power signal through a plurality of logic gate processing units of the photonic differentiable logic gate network model, obtain an optical power signal matrix, and convert the optical power signal matrix to obtain an image feature representation graph;

[0091] An image recognition module 53 is configured to perform classification processing on the image feature representation graph to obtain a plurality of classification features, and perform recognition on all the classification features according to a preset classification rule to obtain an image recognition result.

[0092] Further, as Figure 12 shown, based on the above image recognition method based on the photonic differentiable logic gate network model and system, the present application also correspondingly provides a terminal, which comprises a processor 10, a memory 20 and a display 30. Figure 12 Only part of the components of the terminal are shown, but it should be understood that all the shown components are not required to be implemented, and more or fewer components can be alternatively implemented.

[0093] The memory 20 can be an internal storage unit of the terminal in some embodiments, such as a hard disk or a memory of the terminal. The memory 20 can also be an external storage device of the terminal in other embodiments, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the terminal. Further, the memory 20 can include both the internal storage unit and the external storage device of the terminal. The memory 20 is used to store application software and various data installed on the terminal, such as program codes of the terminal, etc. The memory 20 can also be used to temporarily store data that has been output or will be output. In an embodiment, the memory 20 stores an image recognition program 40 based on a photonic differentiable logic gate network model, which can be executed by the processor 10 to implement the image recognition method based on the photonic differentiable logic gate network model in the present application.

[0094] The processor 10 can be a central processing unit (CPU), a microprocessor or other data processing chip in some embodiments, which is used to run program codes or process data stored in the memory 20, such as to execute the image recognition method based on the photonic differentiable logic gate network model, etc.

[0095] The display 30 can be an LED display, a liquid crystal display, a touch liquid crystal display, an OLED (Organic Light-Emitting Diode) touch, etc. in some embodiments. The display 30 is used to display information of the terminal and to display a visualized user interface. The terminal communicates with each other through a system bus.

[0096] In an embodiment, the following steps are implemented when the processor 10 executes the image recognition program 40 based on the photonic differentiable logic gate network model in the memory 20:

[0097] Obtain the gray matrix data of the input image, convert the gray matrix data according to a preset optical power mapping rule to obtain an optical power signal;

[0098] Input the optical power signal into a photonic differentiable logic gate network model, perform optical calculation and processing on the optical power signal through a plurality of logic gate processing units of the photonic differentiable logic gate network model, obtain an optical power signal matrix, and convert the optical power signal matrix to obtain an image feature representation graph;

[0099] The image feature representation graph is classified to obtain a plurality of classification features, and all the classification features are identified according to a preset classification rule to obtain an image recognition result;

[0100] The preset optical power mapping rule includes a threshold power rule.

[0101] The gray matrix data of the input image is obtained, and the gray matrix data is converted according to a preset optical power mapping rule to obtain an optical power signal, specifically including:

[0102] The data set and the gray value of the input image are obtained, and the data set is encoded according to the gray value to obtain the gray matrix data.

[0103] The gray matrix data is mapped according to the threshold power rule to obtain a plurality of optical power values, and all the optical power values are divided according to a preset interval to obtain an optical power signal.

[0104] The optical power signal is input into the photonic differentiable logic gate network model, the optical power signal is optically calculated and processed by a plurality of logic gate processing units of the photonic differentiable logic gate network model to obtain an optical power signal matrix, and the optical power signal matrix is converted to obtain an image feature representation graph, specifically including:

[0105] The optical power signal is input into the photonic differentiable logic gate network model, and the optical power signal is logically operated by a plurality of logic gate processing units of the photonic differentiable logic gate network model based on a spatial cross-phase modulation method to obtain a plurality of diffraction information.

[0106] All the diffraction information is optically calculated and processed by a plurality of logic gate processing units to obtain an optical power signal matrix, and the optical power signal matrix is converted to obtain an image feature representation graph.

[0107] The optical power signal is input into the photonic differentiable logic gate network model, and the optical power signal is logically operated by a plurality of logic gate processing units of the photonic differentiable logic gate network model based on a spatial cross-phase modulation method to obtain a plurality of diffraction information, specifically including:

[0108] The optical power signal is input into the photonic differentiable logic gate network model, and the optical power signal is modulated based on a spatial cross-phase modulation method to obtain a target optical power signal.

[0109] The basic photonic logic gates of the plurality of logic gate processing units of the photonic differentiable logic gate network model perform logical operations on the target optical power signal to obtain a plurality of diffraction information;

[0110] The logical operation includes any one of an AND gate operation, an OR gate operation, an NAND gate operation, an NOR gate operation, an XOR gate operation, an XNOR gate operation, and a NOT gate operation.

[0111] The optical computing and processing of all the diffraction information by the plurality of logic gate processing units obtains an optical power signal matrix, and the optical power signal matrix is converted to obtain an image feature representation graph, specifically including:

[0112] The optical computing and processing of all the diffraction information by the plurality of logic gate processing units obtains first optical power data;

[0113] The training of the first optical power data by the plurality of logic gate processing units obtains second optical power data;

[0114] The target position data of the second optical power data is eliminated to obtain a plurality of matrix data, and the matrix data is arranged to obtain an optical power signal matrix, and the optical power signal matrix is converted to obtain an image feature representation graph;

[0115] The diffraction information includes a diffraction spot and a diffraction ring.

[0116] The classification processing of the image feature representation graph obtains a plurality of classification features, and the classification features are identified according to a preset classification rule to obtain an image recognition result, specifically including:

[0117] The classification processing of the image feature representation graph according to the diffraction spot and the diffraction ring obtains a plurality of classification features;

[0118] The position information of the classification features is determined according to a preset classification rule and the optical power signal matrix to obtain a recognition result.

[0119] The determination of the position information of the classification features according to a preset classification rule and the optical power signal matrix to obtain a recognition result specifically includes:

[0120] The position information of the classification features is position-identified according to a preset classification rule and the optical power signal matrix to obtain target position information;

[0121] It is judged whether the label information of the target position information is target label information of the optical power signal matrix;

[0122] If the label information is the target label information, binary recognition is performed on the target label information to obtain a recognition result.

[0123] The application further provides a computer readable storage medium, wherein the computer readable storage medium stores an image recognition program based on a photonic differentiable logic gate network model, and the image recognition program based on the photonic differentiable logic gate network model implements the steps of the image recognition method based on the photonic differentiable logic gate network model when executed by a processor.

[0124] In summary, the application provides an image recognition method, system, terminal and storage medium based on a photonic differentiable logic gate network model, and the method comprises the following steps: acquiring a gray matrix data of an input image, converting the gray matrix data according to a preset optical power mapping rule to obtain an optical power signal; inputting the optical power signal into a photonic differentiable logic gate network model, performing optical calculation and processing on the optical power signal through a plurality of logic gate processing units of the photonic differentiable logic gate network model to obtain an optical power signal matrix, and converting the optical power signal matrix to obtain an image feature representation graph; performing classification processing on the image feature representation graph to obtain a plurality of classification features, and identifying all the classification features according to a preset classification rule to obtain an image recognition result. The optical logic gate is trained by the photonic differentiable logic gate network model, and the image is recognized, so that optical calculation and accurate classification and recognition of image features are realized.

[0125] It should be noted that in this document, the terms "comprising", "including", or any other variant thereof are intended to cover non-exclusive inclusion, so that processes, methods, articles or terminal systems including a series of elements not only include those elements, but also include other elements not explicitly listed, or include elements inherent to such processes, methods, articles or terminal systems. Without more limitations, the element defined by the statement "including a" does not exclude the presence of another identical element in the process, method, article or terminal system including the element.

[0126] Of course, those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by a computer program instructing related hardware (such as a processor, a controller, etc.) to complete, and the program can be stored in a computer readable computer readable storage medium, and the program can include the processes of the above-mentioned method embodiments when executed. The computer readable storage medium can be a memory, a disk, an optical disk, etc.

[0127] It is to be understood that the application is not limited to the examples described above, which can be modified or adapted in several ways by those skilled in the art without departing from the scope of the present application, as defined by the appended claims.

Claims

1. An image recognition method based on a photonic differentiable logic gate network model, characterized in that, The image recognition method based on the photonic differentiable logic gate network model comprises: Obtaining the gray matrix data of the input image, converting the gray matrix data according to a preset optical power mapping rule to obtain an optical power signal; Inputting the optical power signal into a photonic differentiable logic gate network model, performing optical calculation and processing on the optical power signal by a plurality of logic gate processing units of the photonic differentiable logic gate network model to obtain an optical power signal matrix, and converting the optical power signal matrix to obtain an image feature representation graph; Classifying the image feature representation graph to obtain a plurality of classification features, and identifying all the classification features according to a preset classification rule to obtain an image recognition result; The method for inputting the optical power signal into the photonic differentiable logic gate network model, performing optical calculation and processing on the optical power signal by a plurality of logic gate processing units of the photonic differentiable logic gate network model to obtain an optical power signal matrix, and converting the optical power signal matrix to obtain an image feature representation graph, specifically comprises: Inputting the optical power signal into the photonic differentiable logic gate network model, performing logic operation on the optical power signal by a plurality of logic gate processing units of the photonic differentiable logic gate network model based on a spatial cross-phase modulation method to obtain a plurality of diffraction information; Performing optical calculation and processing on all the diffraction information by a plurality of logic gate processing units to obtain an optical power signal matrix, and converting the optical power signal matrix to obtain an image feature representation graph; The method for performing optical calculation and processing on all the diffraction information by a plurality of logic gate processing units to obtain an optical power signal matrix, and converting the optical power signal matrix to obtain an image feature representation graph, specifically comprises: Performing optical calculation and processing on all the diffraction information by a plurality of logic gate processing units to obtain first optical power data; Training the first optical power data by a plurality of logic gate processing units to obtain second optical power data; Performing optical calculation and processing on all the diffraction information by a plurality of logic gate processing units to obtain an optical power signal matrix, and converting the optical power signal matrix to obtain an image feature representation graph; The diffraction information comprises diffraction spots and diffraction rings. 2.The image recognition method based on the photonic differentiable logic gate network model according to claim 1, wherein, The preset optical power mapping rule comprises a threshold power rule; The method for obtaining the gray matrix data of the input image, converting the gray matrix data according to a preset optical power mapping rule to obtain an optical power signal, specifically comprises: Obtaining a data set and a gray value of the input image, encoding the data set according to the gray value to obtain gray matrix data; Mapping the gray matrix data according to the threshold power rule to obtain a plurality of optical power values, and dividing all the optical power values according to a preset interval to obtain an optical power signal. 3.The image recognition method based on the photonic differentiable logic gate network model according to claim 1, wherein, The light power signal is input into the photonic differentiable logic gate network model, and the light power signal is modulated based on a spatial cross-phase modulation method to obtain a target light power signal. The light power signal is input into the photonic differentiable logic gate network model, and the light power signal is modulated based on a spatial cross-phase modulation method to obtain a target light power signal. The light power signal is input into the photonic differentiable logic gate network model, and the light power signal is modulated based on a spatial cross-phase modulation method to obtain a target light power signal. The logic operation includes any one of an AND gate operation, an OR gate operation, an NAND gate operation, an NOR gate operation, an XOR gate operation, a XNOR gate operation, and a NOT gate operation.

4. The image recognition method based on the photonic differentiable logic gate network model according to claim 1, characterized in that, The image feature representation graph is classified and processed according to the diffraction light spot and the diffraction ring to obtain a plurality of classification features. The position information of all the classification features is determined according to the preset classification rule and the light power signal matrix to obtain an identification result. The position information of all the classification features is determined according to the preset classification rule and the light power signal matrix to obtain an identification result.

5. The image recognition method based on the photonic differentiable logic gate network model according to claim 4, characterized in that, The position information of all the classification features is determined according to the preset classification rule and the light power signal matrix to obtain an identification result. The position information of all the classification features is determined according to the preset classification rule and the light power signal matrix to obtain an identification result. The image recognition system based on the photonic differentiable logic gate network model is applied to the image recognition method based on the photonic differentiable logic gate network model in any one of claims 1-5. The signal conversion module is configured to obtain grayscale matrix data of an input image, and convert the grayscale matrix data according to a preset light power mapping rule to obtain a light power signal.

6. An image recognition system based on a photonic differentiable logic gate network model, characterized in that, The image feature representation graph generation module is configured to input the light power signal into a photonic differentiable logic gate network model, perform optical calculation processing on the light power signal through a plurality of logic gate processing units of the photonic differentiable logic gate network model to obtain a light power signal matrix, and convert the light power signal matrix to obtain an image feature representation graph. The image recognition module is configured to classify and process the image feature representation graph to obtain a plurality of classification features, and identify all the classification features according to a preset classification rule to obtain an image recognition result. ​ ​ 7. A terminal, characterized by comprising: The terminal comprises a memory, a processor, and a photonic differentiable logic gate network model-based image recognition program stored on the memory and executable on the processor, and the photonic differentiable logic gate network model-based image recognition program, when executed by the processor, implements the steps of the photonic differentiable logic gate network model-based image recognition method according to any one of claims 1-5.

8. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a photonic differentiable logic gate network model-based image recognition program, and the photonic differentiable logic gate network model-based image recognition program, when executed by the processor, implements the steps of the photonic differentiable logic gate network model-based image recognition method according to any one of claims 1-5.

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