Row shift frame rotation driving method for sequentially driving micro LED display panel
By adopting the color update scheduling method of row shifting and frame rotation in the micro LED display, the color separation phenomenon is solved and the display effect and stability of the display are improved.
Patent Information
- Application Number
- CN202510020167.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-03-12
- Filing Date
- 2025-01-07
- Publication Date
- 2025-09-12
AI Technical Summary
Color breakup (CBU) occurs in micro-LED displays, causing multiple slightly offset images of an object to appear in different sub-frame colors, affecting the display effect.
A color update scheduling method using row shifting and frame rotation is used to process display data through a frame buffer and a bit plane generator to adjust the brightness and color update mode of the micro-LED display to reduce or eliminate color separation.
It effectively reduces or eliminates the color separation phenomenon and improves the display quality and stability of micro LED displays.
Smart Images

Figure CN120636302A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates generally to the design of micro light emitting diode (micro LED) displays, and more particularly to micro LED displays with a color update schedule that eliminates color separation. Background Art
[0002] Micro-LED displays are widely used in augmented / mixed reality (AR / MR), virtual reality (VR), large video displays, TVs and monitors, automotive displays, mobile phones, smartwatches and wearables, tablets, laptops, and other applications. The technology used to manufacture micro-LED displays continues to advance rapidly. For example, the demand for micro-LED displays with smaller pixels that are closer together for better image quality is driving the further miniaturization and integration of micro-LEDs in display devices.
[0003] Micro-LED screens are made up of micron-sized LED lights. These lights are used to directly create colored pixels. By having thousands or more LED lights, high-quality images and videos can be displayed without the need for backlighting.
[0004] In some applications, micro-LEDs exhibit an undesirable phenomenon known as color breakup (CBU). CBU is caused by the human eye detecting the presence of different subframe colors and the associated spatial offset of objects being displayed. The resulting image can appear as multiple slightly offset images of the object, each with a different subframe color. Therefore, there is a need for systems and methods for improving the appearance of objects on micro-LED displays. Summary of the Invention
[0005] In one aspect, the present disclosure relates to a micro-LED display panel comprising: a pixel array including a plurality of pixels arranged in a plurality of rows and columns, wherein each pixel of the pixel array includes a blue LED, a green LED, and a red LED; a frame buffer; and a bit plane generator configured to receive display data from the frame buffer and output a color update schedule according to the display data, the color update schedule updating the brightness and color of the display data for each pixel in the pixel array during each of a plurality of time intervals defining a frame time of a frame, wherein the color update schedule performs row shifting and frame rotation on at least one row of the frame. BRIEF DESCRIPTION OF THE DRAWINGS
[0006] Non-limiting and non-exclusive embodiments of the disclosed subject matter are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified.
[0007] Figure 1 is an example of a micro-LED display system according to the present technology;
[0008] Figure 2A is a circuit diagram of a pixel circuit system of a micro-LED display according to the present technology;
[0009] Figure 2B is Figure 1 a representation of a bit plane generated by a bit plane generator of a display system;
[0010] Figure 2C yes Figure 1 another representation of the output of the bit plane generator;
[0011] Figure 2D yes Figure 1 A graph of the conventional color update schedule for the bitplane generator;
[0012] Figure 2E Display-driven Figure 1 Display system Figure 2D Color update schedule;
[0013] Figure 2F Display basis Figure 2D The color update system displays the color on the display at time t1;
[0014] Figure 2G Display basis Figure 2D The color update system displays the color on the display at time t2;
[0015] Figure 3A yes Figure 1 an example of a color update schedule for a display system, wherein the color update schedule implements row shifting according to an embodiment of the disclosed subject matter;
[0016] Figure 3B is similar to Figure 3A another instance of a color update schedule of a color update schedule, wherein the color update schedule further implements a frame rotation according to another embodiment of the disclosed subject matter;
[0017] Figure 3C Display-driven Figure 1 Display system Figure 3B Color update schedule;
[0018] Figure 3D Display basis Figure 3B The color update system displays the color on the display at time t1;
[0019] Figure 3E Display basis Figure 3B The color update system displays the color on the display at time t2;
[0020] Figure 4A yes Figure 1 Another example of a color update schedule for a display system, wherein the color update schedule implements row shifting according to another embodiment of the disclosed subject matter;
[0021] Figure 4B is similar to Figure 4A another instance of a color update schedule of a color update schedule, wherein the color update schedule further implements a frame rotation according to another embodiment of the disclosed subject matter;
[0022] Figure 5A yes Figure 1 Another example of a conventional color update schedule for a bitplane generator;
[0023] Figure 5B is similar to Figure 5A Another example of a color update schedule of a color update schedule, wherein the color update schedule implements row shifting and frame rotation according to another embodiment of the disclosed subject matter;
[0024] Figure 5C It is driven Figure 5B Color update scheduler for partitioned thermometer coded PWM instances;
[0025] Figure 6A yes Figure 1 Another example of a conventional color update schedule for a bitplane generator of ; and
[0026] Figure 6B is similar to Figure 6A another instance of a color update schedule of a color update schedule of , wherein the color update schedule implements row shifting and frame rotation according to another embodiment of the disclosed subject matter; and
[0027] Corresponding reference characters indicate corresponding components throughout the several views of the drawings. Those skilled in the art will appreciate that the elements in the drawings are illustrated for simplicity and clarity and are not necessarily drawn to scale. For example, the dimensions of some elements in the drawings may be exaggerated relative to other elements to help improve understanding of the various embodiments of the present invention. Furthermore, common but well-understood elements that are useful or necessary in commercially feasible embodiments are often not depicted to facilitate a less obstructed view of these various embodiments of the present invention. DETAILED DESCRIPTION
[0028] Disclosed are micro-LED displays, and in particular, micro-LED displays with row-shift and frame-rotation color update schedules. In the following description, numerous details are set forth to provide a thorough understanding of the examples. However, one skilled in the art will recognize that the techniques described herein can be practiced without one or more of these specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring certain aspects.
[0029] Reference throughout this specification to "one example" or "one embodiment" means that a particular feature, structure, or characteristic described in connection with the example is included in at least one example of the present invention. Thus, appearances of the phrases "in one example" or "in one embodiment" in various places throughout this specification are not necessarily all referring to the same example. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more examples.
[0030] For ease of description, spatially relative terms such as "below," "beneath," "below," "above," "upper," and the like may be used herein to describe the relationship of one element or feature illustrated in the figures to another element or feature. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures were turned over, an element described as being "below," "beneath," or "below" other elements or features would be oriented "above" the other elements or features. Thus, the exemplary terms "below" and "below" can encompass both orientations of above and below. The device may be otherwise oriented (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein interpreted accordingly. Additionally, it will be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.
[0031] In light of the foregoing, it will be appreciated that specific embodiments of the present technology have been described herein for illustrative purposes, but that various modifications may be made without departing from the present disclosure. Furthermore, while various advantages and features associated with certain embodiments have been described above in the context of those embodiments, other embodiments may also exhibit such advantages and / or features, and not all embodiments must exhibit such advantages and / or features to fall within the scope of the present technology. Where a method is described, the method may comprise more, fewer, or other steps. Additionally, the steps may be performed in any suitable order. Accordingly, the present disclosure may encompass other embodiments not expressly shown or described herein. In the context of the present disclosure, the terms "about," "approximately," and the like mean + / - 5% of the stated value.
[0032] Throughout this specification, several technical terms are used. These terms have their ordinary meanings in the fields from which they are derived, unless explicitly defined herein or the context of their use clearly indicates otherwise. It should be noted that element names and symbols (e.g., Si versus silicon) may be used interchangeably throughout this document; however, they all have the same meaning.
[0033] Briefly, embodiments of the present technology relate to a micro LED display having a color update schedule with row-shifting (or "row-shift") and / or frame-rotation (or "frame-rotate"). Inclusion of row-shifting and / or frame rotation reduces or eliminates CBU during color updates. In some embodiments, the micro LED display includes a frame buffer that transmits display data to a bit plane generator.
[0034] Figure 1 2 is an example micro light emitting diode (microLED) display system 200 according to the present technology. MicroLED display 200 includes a frame buffer 220, a bit plane generator 225, a microLED display panel 230, a timing controller 207, and a word line gate driver 235. MicroLED display panel 230 includes an NxM array of pixels 204[0][0] ... 204[N-1][M-1]. In the illustrated example, the indices n and m correspond to rows and columns of pixel circuits in the pixel circuit array. For an NxM pixel circuit array, these indices range from 0 to N-1 for index n and from 0 to M-1 for index m.
[0035] Each column 204[0][m] ... 204[N-1][m] of pixels 204 includes a corresponding data line 226[m] (also referred to herein as a bit line). Each row 204[n][0] ... 204[n][M-1] of pixels 204 includes a corresponding scan line 240[n] (also referred to herein as a word line).
[0036] The timing controller 207 is configured to transmit a control signal (CS) to the frame buffer 220, the bit plane generator 225, and the word line gate driver 235. The frame buffer 220 receives and stores display data.
[0037] In display operation, the frame buffer 220 then transmits the display data 205[0] ... 205[M-1] row by row to the bit plane generator 225. In some embodiments, the display data for each pixel is an 8-bit binary number; however, it will be understood that the display data can be a 10-bit binary number or any other suitable bit width. The frame buffer 220 can be a static random access memory (SRAM), a dynamic random access memory (DRAM), or other type of memory element. The frame buffer 220 can transmit data representing all pixels 204[0][0] ... 204[N-1][M-1] in the complete display panel 230.
[0038] The bit plane generator 225 converts the display data into an image signal or video signal that can be displayed on a monitor, screen, or other display. The bit plane generator 225 receives the display data 205[0]...205[M-1] from the frame buffer 220. The display data 205[0]...205[M-1] is the grayscale of each pixel on the display panel 230. The grayscale guides the bit plane generator 225 to adjust the brightness of one or more LEDs for each pixel 204 in the display panel 230. The bit plane generator 225 is configured to generate a bit plane, such as Figure 2B All the generated bit planes in a frame period form a pulse width modulation (PWM) of all pixels 204 on the display panel 230.
[0039] Conventionally, each micro-LED in the micro-LED display 200 requires an optimal current to drive in order to achieve maximum (quantum) efficiency. The display 200 includes a constant current source to generate the optimal current, and then uses PWM (e.g., a GPWM signal generated by a bit-plane generator 225) to control the brightness of the 8-bit grayscale of the display data 205[0]...205[M-1].
[0040] To display an image or video, the bit plane generator 225 sequentially reads all rows of data (e.g., 1024 rows) from the frame buffer 220 and switches all bit lines 226[0] ... 226[M-1] to sequentially write the bit plane data to each row of the pixel array. Conventionally, due to the impedance of the bit lines 226[0] ... 226[M-1], after adjusting the brightness of the 8-bit grayscale using the bit plane generator 225, there is not enough time to switch the bit lines 226[0] ... 226[M-1] quickly enough to accommodate 10-bit dimming. This becomes more difficult for displays with higher resolutions and higher frame rates. Switching the bit lines 226[0] ... 226[M-1] also consumes a lot of power.
[0041] In operation, the frame buffer 220 provides display data to the bit plane generator 225. The word lines 240[0] ... 240[N-1] select a row of pixels 204[0][0] ... 204[N-1][M-1] for writing to the bit lines 226[0] ... 226[M-1]. In some embodiments, the bit plane generator 225 outputs a binary 8-bit grayscale pulse width modulation (GPWM) signal for each pixel on the micro LED display panel 230 via a plurality of bit planes, such as Figure 2B In this way, each pixel 204 of the micro LED display panel 230 is turned on or off according to its value on the bit plane, and the brightness of the 8-bit grayscale of each pixel is adjusted.
[0042] The full display operation is as follows. The timing controller 207 controls the overall display operation of the display system 200. The timing controller can also control when and what data is written to the pixel circuit 204. The timing controller 207 outputs a control signal CS (row address, row address enable, clock) to the word line gate driver 235, which turns on (or enables) a row of pixel circuits 204[n][0]…204[n][M-1] via scan lines (or word lines) 240[0]…240[N-1] for writing display data on data lines 226[0]…226[M-1]. At the same time, the timing controller 207 also outputs a control signal CS (clock, output enable) to the bit plane generator 225 (or source driver if the display panel 230 is analog driven) to output display data to the data lines 226[0]…226[M-1]. The grayscale (or display data) on the data lines 226[0] ... 226[M-1] is written to the pixel circuits 204[0][0] ... 204[N-1][M-1] selected by the scan lines 240[0] ... 240[N-1]. The gate driver 235 turns off (or disables) the row of pixel circuits 204[0][0] ... 204[N-1][M-1] after writing the bit-plane data to the selected row of pixel circuits 204[0][0] ... 204[N-1][M-1] and before removing the bit-plane data on the data lines 226[0] ... 226[M-1]. The display operation is repeated for the next row of pixel circuits until the last row of pixel circuits of the display panel 230 is reached.
[0043] Figure 2AFIG2 is a circuit diagram of a pixel 204 of a micro-LED display. Pixel 204 may include pixel circuitry including a driver 212 having a programmable current source 206 and a PWM generator 210. The pixel circuitry may also include three micro-LEDs 215A (e.g., LED_G), 215B (e.g., LED_R), and 215C (e.g., LED_B). In some embodiments, the three LEDs are arranged in an array. In some embodiments, current source 206 includes a transistor 209 and a capacitor 208. In some embodiments, PWM generator 210 includes a pair of transistors 242 and a pair of inverters 244.
[0044] Based on the output PWM signal, the brightness of each LED 215A, 215B, and 215C can be adjusted. The at least three LEDs 215A, 215B, and 215C can correspond to a green LED 215A, a red LED 215B, and a blue LED 215C, respectively. Each of the at least three LEDs 215A, 215B, and 215C can be independently controlled. In response to the voltage of the positive power supply voltage VDD_LED from the programmable current source 206, each LED is turned on. VREF is a reference voltage for all pixel circuits on the panel. Specifically, VREF is used to control the current value generated by transistor T1. Each LED outputs a color signal (EN_G[n], EN_R[n], EN_B[n]) when turned on (enabled).
[0045] Figure 2B is Figure 1 2. A representation of a bit plane 227 generated by the bit plane generator 225 of FIG. 2. In the illustrated embodiment, the bit plane 227 has a 3-bit sub-color depth and includes red, green, and blue sub-frames of uniform size. Binary PWM drives 16 rows of micro-LEDs or pixel circuits on the display panel.
[0046] The illustrated embodiment is based on the following assumptions: (a) the R, G, and B subframes are the same size; (b) the subcolors are 3-bit deep; (c) binary PWM is used; and (d) the micro LED panel includes 16 rows. Because the illustrated embodiment is based on binary PWM and 3-bit subcolor depth, the number of bit planes is also three. Those skilled in the art will appreciate that the aforementioned assumptions may vary in different embodiments. Bit plane 227 includes a plurality of sequentially generated subframes 228xy, where x is a letter representing the color of the subframe (r = red, g = green, and b = blue), and y is a 3-bit display date corresponding to a number (0, 1, 2, etc.) representing the sequential order of the subframes for a particular color. Because PWM is binary and bit plane 227 has a 3-bit subcolor depth, each color includes three subframes.
[0047] Initially, a first blue subframe 228b0 is generated and displayed within time interval Tb1. Successive blue subframes 228b1 and 228b2 are generated continuously within time intervals Tb2 and Tb3. For example, time intervals Tb1, Tb2, and Tb3 may have their respective durations corresponding to powers of 2, since 2 time units are the duration of Tb1, 4 time units are the duration of Tb2, and 8 time units are the duration of Tb3. After the blue subframe is displayed, green subframes 228g0, 228g1, and 228g2 are generated within successive time intervals Tg1, Tg2, and Tg3, respectively. After the green subframe is displayed, red subframes 228r0, 228r1, and 228r2 are displayed continuously within time intervals Tr1, Tr2, and Tr3, respectively.
[0048] Figure 2C is an example of a PWM signal for a pixel circuit located at coordinates [0][m-1], where pixel coordinates [n][m] correspond to a pixel circuit on a micro-LED with rows ranging from 0 to N-1 and columns ranging from 0 to M-1. In the illustrated embodiment, the display data for blue is 3'b0101, the display data for green is 3'b101, and the display data for red is 3'b101.
[0049] The LED color signals (EN_B, EN_G, EN_R) are binary signals that indicate whether the corresponding LED is enabled or disabled. In the illustrated embodiment, the blue, green, and red LEDs are sequentially enabled to produce corresponding color values of blue (b0, b1, b2), green (g0, g1, g2), and red (r0, r1, r2) for the corresponding subframes. Binary PWM data is written to the corresponding drivers for the LEDs. In the illustrated example, the first bit, b0, receives an on or "1" signal, while the second bit, b1, receives an off or "0" signal. Thereafter, the third bit, b2, receives an on or "1" signal. Similar PWM data is subsequently written for the green and red LED subframes. In this way, the color of each pixel of the pixel array can be adjusted for each bit in the frame. In different examples, other distributions of PWM data are possible.
[0050] Figure 2D is based on Figure 12 and 3. The illustrated schedule 300 is for a display having 16 rows of pixels on the display, but it should be understood that the micro LED display may have any other suitable number of pixel rows. The entire frame time is divided into red, green and blue subframes of equal size. Each subframe has a 3-bit color depth and a subframe time that is divided into 14 equal segments (2tau+4tau+8tau) of duration tau. For each row, a binary PWM signal controls the timing of writing the 3-bit color values into the driver at the first, third and seventh segments of the subframe of the corresponding color. For example, in the blue subframe, the blue values (b0, b1, b2) are written to the driver at times tau#0, tau#2 and tau#6, respectively. These blue values b0, b1, b2 can be 0 or 1. During the remaining time (i.e., Figure 2D During the time indicated by the blank box in FIG, the update schedule is idle, that is, the value of the PWM signal does not change. Similar analysis applies to the binary PWM signals of the green and red sub-frames.
[0051] Figure 2E Display according to Figure 2D The color update schedule shown in Figure 1 shows the color updates of the micro-LED display during an update. Different shades indicate different micro-LED colors. Time t_tau is the period during which all rows of colors are updated. That is, the rows are updated sequentially, and therefore, the amount of time t_tau elapses between the update of the first row and the update of the last row.
[0052] Still refer to Figure 2E , updates the first row at the beginning of the frame time (in Figure 2D (designated as row #0 in
[0045] ). All subsequent rows are updated during an initial time t_tau of the frame time. The delay t_tau between the first row being updated and the last row being updated continues throughout each sub-frame time and throughout the entire frame time being updated. After the initial t_tau time delay, all rows continue to be updated with the first sub-frame color through time T1. At the beginning of time T2, the first row begins to be updated with the second sub-frame color, and each of the remaining rows continues to be updated with the first sub-frame color until the first sub-frame is complete. As each row completes the first sub-frame color update, that row begins the second sub-frame color update. Thus, during time T2, some rows are updating the second sub-frame while the remaining rows are completing their first sub-frame updates.
[0053] During time T3, all rows are updating their second subframe. During time T4, some rows have finished updating their second subframe and have begun updating their third subframe, while the remaining rows have finished updating their second subframe. During time T5, all rows are updating their third subframe. When the first row finishes updating its third subframe, time T5 ends, and the remaining rows sequentially complete updating their third subframe. As the remaining rows complete updating their third subframe, the rows that have completed their subframe updates remain idle until the next update sequence begins.
[0054] During most of the frame time (i.e., T1, T3, and T5), all rows display the same subframe color. Figure 2F As shown in , all rows display the first subframe color at time t1. Figure 2G , at time t2, the upper portion of the screen displays the second sub-frame color, while the bottom portion of the screen displays the first sub-frame color.
[0055] The traditional color update schedule continuously alternates between displaying one subframe color and displaying two subframe colors. Figure 2E The color update schedule causes the display to alternate between displaying one subframe color (during times T1, T3, and T5) and two subframe colors (during times T2 and T4). The continuous switching between displaying one subframe color and displaying two subframe colors combined with the lag between the first row being updated and the last row being updated causes CBU.
[0056] Figures 3A to 3E An embodiment of a color update schedule that eliminates CBUs is shown. As will be explained in further detail, the color update schedule includes "row shifting" and "frame rotation" to minimize and / or eliminate detectable CBUs.
[0057] refer to Figure 3A , a diagram showing an embodiment of a color update schedule 400A for a micro LED display according to aspects of the present disclosure. The color update schedule 400A is similar to Figure 2D , but includes a "row shift." For the first row (row #0), the PWM data for b0 is written to the corresponding driver of the LED at time tau #0. For the second row (row #1), the PWM data for b0 is written to the corresponding driver of the LED at time tau #3. That is, the writing of the PWM data for b0 (and b1 and b2) for the second row is delayed relative to the writing of the PWM data for b0 for the first row. In the illustrated embodiment, the delay is 3tau, i.e., Figure 3A3 blocks or 3 time units in the diagram. It will be appreciated that the delay can be greater or less than the illustrated 3 blocks. As a result of the 3tau delay in applying the PWM values to a row of micro-LEDs, the writing of the PWM data for b0 of a subsequent row to the corresponding LED drivers is delayed relative to the writing of the PWM data for b0 of the previous row. These delays accumulate from one row of micro-LEDs to the next.
[0058] Figure 3B A diagram showing an embodiment of a color update schedule 400B for a micro-LED display according to aspects of the present disclosure. Color update schedule 400B is similar to color update schedule 400A, except that color update schedule 400B also includes frame rotation. As previously described, row shifting delays the writing of PWM data for b0 (as well as b1 and b2) for a given row relative to the previous row. For each row, frame rotation rotates the PWM data from the end of the frame time (corresponding to a different color LED, in the illustrated case, a red LED) back to tau #0 to fill the remaining idle time before PWMing the PWM data for b0 into the corresponding driver for the LED. For example, in the second row (row #1), the PWM data for b0 is written to the corresponding driver for the LED at time tau #3. Frame rotation fills tau #0-2 with a portion of the red subframe PWM data that would otherwise be part of the next frame.
[0059] Figure 3C Display according to Figure 3B The actual update of the micro-LED display during the update is shown in the color update schedule 400B shown in FIG. As before, different shading indicates different colors of the micro-LEDs (e.g., red, blue, green). For each row, frame shifting delays the initial writing of the PWM data for b0 to the corresponding driver of the LED relative to the previous row. The frame rotation process shifts the writing of the PWM data, which would have occurred after the frame time, to the beginning of the frame time, allowing the entire frame (e.g., the micro-LED values for the entire display panel) to be written during the frame time.
[0060] As a result of frame shifting and frame rotation, the display panel displays more than one color at any given moment. For example, Figure 3D and 3E Shown separately as Figure 3C The display panel colors at times t1 and t2 are indicated in FIG. In the illustrated embodiment, all three subframe colors are displayed on at least some rows and at any moment during the frame time. Thus, the color shift caused by Figure 3A The color update scheduler 400A leads to the CBU.
[0061] Figure 4AFIG2 is a diagram of another embodiment of a color update schedule 500A for a micro-LED display according to aspects of the present disclosure. It is known that the luminous efficiency of an LED (i.e., how effectively the LED produces visible light) varies depending on the color of the LED. To account for varying LED efficiencies, the color update schedule can vary the subframe size for different colors, such that more efficient LEDs have shorter subframe times, while less efficient LEDs have longer subframe times.
[0062] Figure 4A The color update schedule shown in 500A is similar to Figure 3A , differs only in the subframe times for the red, green, and blue subframes. In some embodiments, the length of each subframe time is inversely proportional to the luminous efficiency of the corresponding LED. In some embodiments, the lengths of the two subframe times are equal to each other and different from the length of the subframe time for the third LED. In some embodiments, the subframe time for each LED is any suitable length and can be the same or different from the subframe time for any other LED. In the illustrated embodiment, the total blue subframe time is 7 tau (blue subframes of 1 tau, 2 tau, and 4 tau), the total green subframe time is 14 tau (green subframes of 2 tau, 4 tau, and 8 tau), and the total red subframe time is 28 tau (red subframes of 4 tau, 8 tau, and 16 tau).
[0063] Figure 4B A diagram illustrating an embodiment of a color update schedule 500B for a micro LED display according to aspects of the present disclosure. The color update schedule 500B is similar to the color update schedule 500A, except that the color update schedule 500B also includes frame rotation. The color update schedule 500B is also similar to the color update schedule 500A. Figure 3B , except that color update schedule 500B also includes subframe times of different lengths. Specifically, in the illustrated embodiment, the blue subframe time is X tau long, the green subframe time is Y tau long, and the red subframe time is Z tau long.
[0064] Figure 5A is a diagram of another conventional color update schedule 600A for a Micro LED display. The color update schedule 600A includes blue, green, and red subframes of equal size and 4-bit color depth. Figure 5C Demonstrates driveability Figure 5A6. Example of a zoned thermometer-encoded PWM waveform for color update schedule 600A. The illustrated PWM is a 4-bit binary number 4'b0110, which uses the LSB 2-bit value to determine how many bp0 time periods will have a value of 1. The PWM uses the MSB 2-bit value to determine how many bp1 time periods will have a value of 1. In some embodiments, the PWM signal is a grayscale pulse width modulation (GPWM) signal.
[0065] Now go to Figure 5B , a diagram showing an embodiment of a color update schedule 600B for a micro LED display according to aspects of the present disclosure. Color update schedule 600B is similar to color update schedule 600A, except that color update schedule 600B also includes frame shift and frame rotation.
[0066] Figure 6A is a diagram of an embodiment of a color update schedule 700A for a micro LED display. The color update schedule 700A is similar to Figure 5A , but includes an interleaving of the sub-colors. That is, the display of each sub-color is not limited to a specific sub-frame having only that sub-color. Instead, the sub-colors are shuffled throughout the frame period.
[0067] Figure 6B A diagram showing an embodiment of a color update schedule 700B for a micro LED display according to aspects of the present disclosure. Color update schedule 700B is similar to color update schedule 700A, except that color update schedule 700B also includes frame shifting and frame rotation.
Claims
1. A micro light emitting diode display panel comprising: a pixel array comprising a plurality of pixels arranged in a plurality of rows and columns, wherein each pixel of the pixel array comprises a blue light emitting diode, a green light emitting diode, and a red light emitting diode; Frame buffer; and A bit plane generator is configured to receive display data from the frame buffer and output a color update schedule according to the display data, the color update schedule updating the brightness and color of the display data for each pixel in the pixel array during each of a plurality of time intervals defining a frame time of a frame, wherein the color update schedule performs a row shift and a frame rotation on at least one row of the frame.
2. The micro light emitting diode display panel of claim 1 , wherein the color update schedule shifts each row from a next row in the plurality of rows to a last row in the plurality of rows relative to a corresponding previous row in the plurality of rows. 3 . The micro light emitting diode display panel according to claim 2 , wherein frame rotation is performed on each row shifted row. 4 . The micro light emitting diode display panel according to claim 2 , wherein each shifted row is frame rotated according to the number of time units of the corresponding row shift. The micro light emitting diode display panel according to claim 2 , wherein the frame comprises a blue sub-frame, a green sub-frame, and a red sub-frame. 6 . The micro light emitting diode display panel according to claim 5 , wherein the blue sub-frame, the green sub-frame, and the red sub-frame include an equal number of the plurality of time intervals. 7 . The micro light emitting diode display panel according to claim 5 , wherein at least two of the blue sub-frame, the green sub-frame, and the red sub-frame include different numbers of the plurality of time intervals.
8. The micro light emitting diode display panel according to claim 5, wherein at least two of the blue sub-frame, the green sub-frame, and the red sub-frame are displayed during each time interval of the frame.
9. The micro light emitting diode display panel according to claim 5, wherein each of the blue sub-frame, the green sub-frame, and the red sub-frame is displayed during each time interval of the frame.
10. The micro light emitting diode display panel according to claim 2, wherein the bit plane generator is configured to output a pulse width modulation signal according to the display data. The micro light emitting diode display panel according to claim 10 , wherein the pulse width modulation signal is a binary grayscale pulse width modulation.
12. The micro light emitting diode display panel according to claim 10, wherein the pulse width modulation signal is a zoned thermometer coded pulse width modulation.
13. The micro light emitting diode display panel of claim 10, wherein the color update schedule comprises a 4-bit sub-color depth. The micro light emitting diode display panel according to claim 11 , wherein the sub-colors in the frame are interlaced.
15. The micro light emitting diode display panel of claim 10, wherein the color update schedule comprises a 3-bit sub-color depth, and the pulse width modulation signal is binary.
16. The micro light emitting diode display panel according to claim 2, wherein each shifted row is shifted by two time intervals.
17. The micro light emitting diode display panel according to claim 2, wherein each shifted row is shifted by at least three time intervals.