Display panel, driving method thereof and display device

By alternately outputting control signals in the OLED display panel and utilizing the first and second control switch groups and wiring groups, the brightness unevenness problem caused by the ELVDD power bus is solved, achieving brightness uniformity and improving display effects.

CN120636326APending Publication Date: 2025-09-12HKC CORP LTD
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Patent Information

Application Number
CN202510896527.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-30
Publication Date
2025-09-12

AI Technical Summary

Technical Problem

In OLED display panels, the line impedance of the ELVDD power bus causes uneven brightness between the near-end and far-end areas, affecting the optical performance of the display panel.

Method used

By setting the first and second control switch groups and wiring groups on the display panel, the first and second control signals are alternately output, so that the voltage signal is alternately transmitted between different wiring groups, achieving a brightness integration effect and reducing the impact of voltage drop on brightness uniformity.

Benefits of technology

The brightness of the display panel is uniformed, the display effect is improved, and the influence of voltage drop on brightness uniformity is reduced.

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Abstract

The invention discloses a display panel, a driving method thereof and a display device, and relates to the technical field of display. The display panel comprises a control unit, a first control switch group, a second control switch group, a first wiring group and a second wiring group, wherein the control unit outputs a first control signal and a second control signal; the first wiring group and the second wiring group are respectively arranged on two sides of the scanning line and are symmetrically arranged; when the control unit outputs a first control signal, a first output port of the first control switch group and a third output port of the second control switch group output voltage signals, and when the control unit outputs a second control signal, a second output port of the first control switch group and a fourth output port of the second control switch group output voltage signals. According to the display panel, the first control signal and the second control signal are alternately output, so that the brightness of the display panel is uniform, and the influence of voltage drop in the display panel on display uniformity is reduced.
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Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel, a driving method thereof, and a display device. Background Art

[0002] In the field of OLED (Organic Light-Emitting Diode) display technology, performance optimization of display panels has always been a focus of industry research. An ELVDD (Emitter-Line Power Supply Voltage for Organic Light-Emitting Diode) power bus is usually set up inside the display panel. This bus is arranged along the display panel frame. Its main function is to provide a stable power supply for the sub-pixel circuits within the panel. The ELVDD power bus is connected to the VDD power node of each row of sub-pixels in turn, using row drive units as units, thus building a complete power transmission network.

[0003] However, due to the inherent line impedance of the ELVDD power bus, a voltage drop (IR drop) occurs during power transmission. This physical characteristic results in a significant potential difference between the ELVDD power supply voltages near and far ends of the display panel. When the panel displays an image, pixels near the end have a higher driving voltage, which increases the drive current of the light-emitting device, resulting in higher brightness in that area. Conversely, pixels far from the end have a lower driving voltage, which reduces the drive current, resulting in lower brightness in that area. This ultimately creates regional brightness unevenness.

[0004] Actual test data shows that in a typical pure white 255-grayscale display scenario, the brightness difference between the near and far ends of the display panel can reach nits. This significant brightness unevenness seriously affects the optical performance of the display panel. Brightness uniformity is a key assessment item in the quality acceptance criteria for high-end display products; therefore, addressing the issue of display panel brightness variation is urgent. Summary of the Invention

[0005] The purpose of this application is to provide a display panel, a driving method thereof, and a display device, which can uniformize the brightness of the display panel by alternately outputting a first control signal and a second control signal, thereby reducing the impact of voltage drop in the display panel on display uniformity.

[0006] The present application discloses a display panel, comprising scan lines and data lines sequentially arranged on the display panel, and further comprising a control unit, a first control switch group, a second control switch group, a first routing group, and a second routing group, wherein the control unit outputs a first control signal and a second control signal; the first control switch group is connected to the control unit and comprises a first output port and a second output port; the second control switch group is connected to the control unit and comprises a third output port and a fourth output port; the first routing group comprises a first routing group and a second routing group, wherein the second routing group is arranged proximate to the scan line and the first routing group is arranged on a side of the second routing group away from the scan line; the first routing group and the second routing group are connected; the first output port is connected to the first routing group and the second output port is connected to the second routing group; the second routing group comprises a third routing group and a fourth routing group, wherein the third routing group is arranged proximate to the scan line and the fourth routing group is arranged on a side of the third routing group away from the scan line; the third routing group and the fourth routing group are connected; the third output port is connected to the third routing group and the fourth output port is connected to the fourth routing group;

[0007] Wherein, the first wiring group and the second wiring group are respectively arranged on both sides of the scanning line and are symmetrical to each other;

[0008] When the control unit outputs a first control signal, the first output port of the first control switch group and the third output port of the second control switch group output a voltage signal; when the control unit outputs a second control signal, the second output port of the first control switch group and the fourth output port of the second control switch group output a voltage signal.

[0009] Optionally, the first control switch group includes a first control switch and a second control switch, the first output port is set at the output end of the first control switch, the second output port is set at the output end of the second control switch, the second control switch group includes a third control switch and a fourth control switch, the third output port is set at the output end of the third control switch, and the fourth output port is set at the output end of the fourth control switch;

[0010] When the control unit outputs a first control signal, the first control switch and the third control switch are turned on; when the control unit outputs a second control signal, the second control unit and the fourth control unit are turned on.

[0011] Optionally, the first control switch and the third control switch are N-type MOS transistors, and the second control switch and the fourth control switch are P-type MOS transistors; or /

[0012] The first control switch and the third control switch are P-type MOS transistors, and the second control switch and the fourth control switch are N-type MOS transistors.

[0013] Optionally, within the display time, the duration of the first control signal is equal to the duration of the second control signal.

[0014] Optionally, the first routing line and the fourth routing line have the same length, and the second routing line and the third routing line have the same length;

[0015] The first routing line, the second routing line, the third routing line and the fourth routing line are all arranged in parallel with the data line.

[0016] Optionally, the control unit includes a timing control chip, and the timing control chip outputs the first control signal and the second control signal to the first control switch group and the second control switch group.

[0017] Optionally, the first routing line, the second routing line, the third routing line and the fourth routing line are arranged on the same layer.

[0018] Optionally, the first routing line and the fourth routing line are arranged on the same layer, the second routing line and the third routing line are arranged on the same layer, the first routing line and the second routing line are connected through a via, and the third routing line and the fourth routing line are connected through a via.

[0019] The present application also discloses a driving method, which is applied to the display panel as described above. The driving method comprises the following steps:

[0020] Receiving a first control signal, the first output port of the first control switch group and the third output port of the second control switch group output a voltage signal;

[0021] receiving a second control signal, and causing the second output port of the first control switch group and the fourth output port of the second control switch group to output a voltage signal;

[0022] Repeat the above steps until the display panel pauses;

[0023] The duration of the first control signal is the same as the duration of the second control signal.

[0024] The present application also discloses a display device, which includes a driving circuit and the display panel as described above, wherein the driving circuit is used to drive the display panel.

[0025] The display panel of the present application alternately outputs a first control signal and a second control signal through a control unit, so that when a user views the picture displayed on the display panel, the picture has a cumulative brightness integration effect, so as to neutralize the display brightness, make the brightness of the display panel uniform, improve the display effect, and reduce the impact of the voltage drop (IRdrop) in the display panel on the display uniformity. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The included drawings are used to provide a further understanding of the embodiments of the present application, which constitute a part of the specification, are used to illustrate the implementation methods of the present application, and together with the text description, explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without inventive work. In the drawings:

[0027] Figure 1 is a structural schematic diagram of a display panel according to the first embodiment of the present application;

[0028] Figure 2 This is a schematic structural diagram of a first control switch group, a second control switch group, and a control unit in a display panel according to the first embodiment of the present application;

[0029] Figure 3 This is a schematic structural diagram of a display panel according to the first embodiment of the present application when outputting a first control signal;

[0030] Figure 4 This is a schematic diagram of screen brightness of a display panel according to the first embodiment of the present application when outputting a first control signal;

[0031] Figure 5 This is a schematic structural diagram of a display panel according to the first embodiment of the present application when outputting a second control signal;

[0032] Figure 6 This is a schematic diagram of screen brightness of a display panel according to the first embodiment of the present application when outputting a second control signal;

[0033] Figure 7 is a schematic diagram of the screen brightness integration system of the display panel of the first embodiment of the present application;

[0034] Figure 8 is a flowchart of the steps of a driving method according to the second embodiment of the present application;

[0035] Figure 9 It is a structural schematic diagram of a display device according to the third embodiment of the present application.

[0036] Among them, 100, display panel; 110, control unit; 120, first control switch group; 130, second control switch group; 140, first routing group; 150, second routing group; 200, drive circuit; 300, display device; first routing L1; second routing L2; third routing L3; fourth routing L4; first control signal S1; second control signal S2; first control switch Q1; second control switch Q2; third control switch Q3; fourth control switch Q4; first output port P1; second output port P2; third output port P3; fourth output port P4. DETAILED DESCRIPTION

[0037] It should be understood that the terms used herein, the specific structures and functional details disclosed are only for describing specific embodiments and are representative. However, the present application can be implemented in many alternative forms and should not be construed as being limited to the embodiments described herein.

[0038] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate relative importance or implicitly specify the quantity of the technical features indicated. Therefore, unless otherwise specified, a feature specified as "first" or "second" may explicitly or implicitly include one or more of such features; "plurality" means two or more. The term "comprising" and any variations thereof are intended to be non-exclusive inclusion, and one or more other features, integers, steps, operations, units, components, and / or combinations thereof may be present or added.

[0039] In addition, terms indicating orientation or positional relationships such as “center,” “lateral,” “up,” “down,” “left,” “right,” “vertical,” “horizontal,” “top,” “bottom,” “inside,” and “outside” are described based on the orientation or relative positional relationships shown in the accompanying drawings. They are merely simplified descriptions for the convenience of describing the present application, and do not indicate that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they should not be understood as limitations on the present application.

[0040] Furthermore, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood broadly, and may refer to fixed, detachable, or integral connections; mechanical or electrical connections; direct or indirect connections through an intermediary; or internal communication between two components. Those skilled in the art will understand the specific meanings of these terms in this application based on specific circumstances.

[0041] The present application is described in detail below with reference to the accompanying drawings and optional embodiments. It should be noted that, under the premise of no conflict, the embodiments or technical features described below can be arbitrarily combined to form new embodiments.

[0042] like Figure 1 and Figure 2 As shown, as a first embodiment of the present application, a display panel 100 is disclosed, wherein the display panel 100 includes scan lines and data lines sequentially arranged on the display panel 100, and the display panel 100 further includes a control unit 110, a first control switch group 120, a second control switch group 130, a first routing group 140 and a second routing group 150, wherein the control unit 110 outputs a first control signal S1 and a second control signal S2, the first control switch group 120 and the second control switch group 130 are both connected to the control unit 110, and the first control switch group 120 includes a first output port P1 and a second output port P2. Port P2, the second control switch group 130 includes a third output port P3 and a fourth output port P4, the first routing group 140 includes a first routing L1 and a second routing L2, the second routing L2 is arranged close to the scan line, the first routing L1 is arranged on the side of the second routing L2 away from the scan line, the first routing L1 and the second routing L2 are connected, the first output port P1 is connected to the first routing L1, the second output port P2 is connected to the second routing L2, the second routing group 150 includes a third routing L3 and a fourth routing L4, the third routing L3 is close to the scan line The fourth line L4 is set on the side of the third line L3 away from the scan line, the third line L3 and the fourth line L4 are connected, the third output port P3 is connected to the third line L3, and the fourth output port P4 is connected to the fourth line L4. The first line group 140 and the second line group 150 are respectively set on both sides of the scan line and are symmetrical to each other. When the control unit 110 outputs the first control signal S1, the first output port P1 of the first control switch group 120 and the third output port P3 of the second control switch group 130 output a voltage signal to the first line. Line L1 and the third line L3, when the control unit 110 outputs the second control signal S2, the second output port P2 of the first control switch group 120 and the fourth output port P4 of the second control switch group 130 output voltage signals to the second line L2 and the fourth line L4; it should be noted that the first control switch group 120 and the second control switch group 130 are both connected to the ELVDD module in the display panel 100, and the ELVDD module provides a voltage signal to the first control switch group 120 and the second control switch group 130 to be input into the first line L1, the second line L2, the third line L3 or the fourth line L4.

[0043] When the display panel 100 of the present application is in use, the control unit 110 outputs the first control signal S1 or the second control signal S2. When the control unit 110 outputs the first control signal S1, after the first control switch group 120 and the second control switch group 130 receive the first control signal S1, the first output port P1 of the first control switch group 120 and the third output port P3 of the second control switch group 130 output voltage signals, so that the first line L1 connected to the first output port P1 and the third line L1 connected to the third output port P3 are connected. L3 inputs a voltage signal, and the first line L1 is set away from the scan line, and the third line L3 is set close to the scan line. The voltage signal input into the first line L1 will be input into the second line L2 after passing through the first line L1, and will be input into the second line L2 from the end of the second line L2 close to the last scan line, and will be sequentially input into the display panel 100 along the direction from the last scan line to the first scan line. The third line L3 will be sequentially input into the display panel 100 along the direction from the first scan line to the last scan line. The current direction is as follows: Figure 3 As shown, the side of the display panel 100 close to the first line L1 is bright near the position of the last scan line and dark near the position of the first scan line. The side of the display panel 100 close to the third line L3 is dark near the position of the last scan line and bright near the position of the first scan line. Figure 4 As shown; when the control unit 110 outputs the second control signal S2, after the first control switch group 120 and the second control switch group 130 receive the second control signal S2, the second output port P2 of the first control switch group 120 and the fourth output port P4 of the second control switch group 130 output voltage signals, so that the second line L2 connected to the second output port P2 and the fourth line L4 connected to the fourth output port P4 input voltage signals, and the second line L2 is set close to the scan line, and the fourth line L4 is set away from the scan line, then the voltage signal input into the fourth line L4 will be input into the third line L3 after passing through the fourth line L4, and will be input into the third line L3 from one end of the third line L3 close to the last scan line, and will be sequentially input into the display panel 100 along the direction from the last scan line to the first scan line, and the second line L2 will be sequentially input into the display panel 100 along the direction from the first scan line to the last scan line, and its current direction is as shown in FIG. Figure 5 As shown, the side of the display panel 100 near the fourth line L4 is bright near the last scan line and dark near the first scan line. The side of the display panel 100 near the second line L2 is dark near the last scan line and bright near the first scan line. Figure 6 As shown;.

[0044] In general, the display panel 100 of the present application alternately outputs the first control signal S1 and the second control signal S2 through the control unit 110, so that the picture displayed by the display panel 100 has a brightness integration effect when the user views it, so as to neutralize the brightness of the display. Figure 7 As shown, the brightness of the display panel 100 is uniform, the display effect is improved, and the influence of the voltage drop (IR drop) in the display panel 100 on the display uniformity is reduced.

[0045] like Figure 2 The first control switch group 120 includes a first control switch Q1 and a second control switch Q2, the first output port P1 is set at the output end of the first control switch Q1, and the second output port P2 is set at the output end of the second control switch Q2, the second control switch group 130 includes a third control switch Q3 and a fourth control switch Q4, the third output port P3 is set at the output end of the third control switch Q3, and the fourth output port P4 is set at the output end of the fourth control switch Q4; when the control unit 110 outputs the first control signal S1, the first control switch Q1 and the third control switch Q3 are turned on; when the control unit 110 outputs the second control signal S2, the second control unit 110 and the fourth control unit 110 are turned on; specifically, the first control switch Q1 and the The third control switch Q3 can be an N-type MOS transistor, and the second control switch Q2 and the fourth control switch Q4 can be P-type MOS transistors; alternatively, the first control switch Q1 and the third control switch Q3 can be P-type MOS transistors, and the second control switch Q2 and the fourth control switch Q4 can be N-type MOS transistors. Thus, when the first control signal S1 is output, the first control switch Q1 of the first control switch group 120 and the third control switch Q3 of the second control switch group 130 are in an on state, and when the second control signal S2 is output, the second control switch Q2 of the first control switch group 120 and the fourth control switch Q4 of the second control switch group 130 are in an on state. The first control switch Q1 and the third control switch Q3 and the second control switch Q2 and the fourth control switch Q4 can be staggered in conduction. The first control signal S1 can be a high-level signal, and the second control signal S2 can be a low-level signal, or the first control signal S1 can be a low-level signal and the second control signal S2 can be a high-level signal, or the first control signal S1 and the second control signal S2 can be signals of opposite levels.

[0046] The following description is made by taking the first control signal S1 as a high-level signal, the second control signal S2 as a low-level signal, the first control switch Q1 and the third control switch Q3 as N-type MOS transistors, and the second control switch Q2 and the fourth control switch Q4 as P-type MOS transistors as an example:

[0047] When the control unit 110 outputs a first control signal S1 of a high level, the first control switch Q1 of the first control switch group 120 and the third control switch Q3 of the second control switch group 130 are in an on state, while the second control switch Q2 of the first control switch group 120 and the fourth control switch Q4 of the second control switch group 130 are in an off state. At this time, the first output port P1 and the third output port P3 output voltage signals, so that the first line L1 connected to the first output port P1 and the third line L3 connected to the third output port P3 input voltage signals. The voltage signal input into the first line L1 will be input into the second line L2 after passing through the first line L1, and will be input into the second line L2 from the end of the second line L2 close to the last scan line, and will be sequentially input into the display panel 100 along the direction from the last scan line to the first scan line, and the third line L3 will be sequentially input into the display panel 100 along the direction from the first scan line to the last scan line. Its current direction is as follows: Figure 3 As shown, the side of the display panel 100 close to the first line L1 is bright near the position of the last scan line, and dark near the position of the first scan line. The side of the display panel 100 close to the third line L3 is dark near the position of the last scan line, and bright near the position of the first scan line. Figure 4 As shown; when the control unit 110 outputs a second control signal S2 of a low level, the second control switch Q2 of the first control switch group 120 and the fourth control switch Q4 of the second control switch group 130 are in the on state, while the first control switch Q1 of the first control switch group 120 and the third control switch Q3 of the second control switch group 130 are in the off state. At this time, the second output port P2 and the fourth output port P4 output voltage signals, so that the second line L2 connected to the second output port P2 and the fourth line L4 connected to the fourth output port P4 input voltage signals. The voltage signal input into the second line L2 is sequentially input into the display panel 100 along the direction from the first row of scan lines to the last row of scan lines. The voltage signal input into the fourth line L4 is input into the third line L3 after passing through the fourth line L4. It is input into the third line L3 from an end of the third line L3 close to the last row of scan lines and is sequentially input into the display panel 100 along the direction from the last row of scan lines to the first row of scan lines. Its current flow is as shown in FIG. Figure 5As shown, the side of the display panel 100 close to the second line L2 is bright near the first scan line and dark near the last scan line. The side of the display panel 100 close to the fourth line L4 is dark near the first scan line and bright near the last scan line. Figure 6 As shown; when the control unit 110 outputs the first control signal S1 and the second control signal S2, the image displayed by the display panel 100 is in a complementary state. When the user is watching, the image of the display panel 100 when the first control signal S1 is output and the image of the display panel 100 when the second control signal S2 is output are accumulated in a brightness integration effect to neutralize the display brightness, so that the brightness of the display panel 100 is uniform, thereby improving the display effect of the display panel 100;

[0048] It should be noted that, during the display time, the duration of the first control signal S1 is equal to the duration of the second control signal S2, so that the image of the display panel 100 when the first control signal S1 is output and the image of the display panel 100 when the second control signal S2 is output are substantially equal when the brightness integral effect is accumulated. In this embodiment, the control unit 110 may be a timing control chip, which outputs the first control signal S1 and the second control signal S2 to the first control switch group 120 and the second control switch group 130. Of course, it may also be other control chips, and it is only necessary to keep the duration of the first control signal S1 and the second control signal S2 substantially the same. No further details will be given here.

[0049] Furthermore, the lengths of the first line L1 and the fourth line L4 are equal, the lengths of the second line L2 and the third line L3 are equal, and the first line L1, the second line L2, the third line L3, and the fourth line L4 are all arranged in parallel with the data line. Thus, the resistance values ​​of the first line L1 and the fourth line L4 are equal, and the resistance values ​​of the second line L2 and the third line L3 are equal, so that when a voltage signal is input to the first line L1 or the fourth line L4, the voltage drop it passes through when it passes through the first line L1 to the second line L2 and then to the display panel 100 is almost the same as the voltage drop it passes through when it passes through the fourth line L4 to the third line L3 and then to the display panel 100, thereby avoiding the difference in brightness integration effect between the image of the display panel 100 when the first control signal S1 is output and the image of the display panel 100 when the second control signal S2 is output due to the difference in the lines.

[0050] Furthermore, the first line L1, the second line L2, the third line L3 and the fourth line L4 are arranged on the same layer to avoid the problem of resistance difference during use caused by the different layer settings between the first line L1, the second line L2, the third line L3 and the fourth line L4, which brings the problem of different voltage drops.

[0051] Of course, the first line L1 and the fourth line L4 can also be set to the same layer, and the second line L2 and the third line L3 can be set to the same layer. The first line L1 and the second line L2 are connected through vias, and the third line L3 and the fourth line L4 are connected through vias. In this way, it is ensured that the voltage signal after passing through the first line L1 and the second line L2 is almost the same as the voltage signal after passing through the fourth line L4 and the third line L3. Moreover, compared with the solution of setting the first line L1, the second line L2, the third line L3 and the fourth line L4 on the same layer, the area occupied by the first line L1, the second line L2, the third line L3 and the fourth line L4 in the display panel 100 can be reduced to a certain extent, which is conducive to reducing the non-display area of ​​the display panel 100.

[0052] like Figure 8 As shown, as a second embodiment of the present application, a driving method is disclosed. The driving method is applied to the display panel as described in the above embodiment, and the driving method includes the steps of:

[0053] Receiving a first control signal, the first output port of the first control switch group and the third output port of the second control switch group output a voltage signal;

[0054] receiving a second control signal, and causing the second output port of the first control switch group and the fourth output port of the second control switch group to output a voltage signal;

[0055] Repeat the above steps until the display panel pauses;

[0056] The duration of the first control signal is the same as the duration of the second control signal.

[0057] The driving method of the present application alternately outputs a first control signal and a second control signal so that when a user views the image displayed on the display panel, the image exhibits a cumulative brightness integration effect, thereby neutralizing the display brightness, thereby uniformizing the brightness of the display panel, improving the display effect, and reducing the impact of a voltage drop (IR drop) in the display panel on display uniformity.

[0058] like Figure 9As described above, as a third embodiment of the present application, a display device 300 is disclosed. The display device 300 includes a driving circuit 200 and the display panel 100 described in the above embodiment. The driving circuit 200 is used to drive the display panel 100.

[0059] The display device of the present application alternately outputs a first control signal and a second control signal through a control unit, so that when a user views the picture displayed on the display panel, the picture has a cumulative brightness integration effect, so as to neutralize the display brightness, make the brightness of the display panel uniform, improve the display effect, and reduce the impact of the voltage drop (IRdrop) in the display panel on the display uniformity.

[0060] It should be noted that the limitations on the steps involved in this solution do not limit the order of the steps without affecting the implementation of the specific solution. The steps written in front can be executed first, later, or even simultaneously. As long as this solution can be implemented, it should be deemed to fall within the scope of protection of this application.

[0061] It should be noted that the inventive concept of this application can form a large number of embodiments, but the length of the application document is limited and it is impossible to list them one by one. Therefore, under the premise of no conflict, the various embodiments or technical features described above can be arbitrarily combined to form new embodiments. After the various embodiments or technical features are combined, the original technical effects will be enhanced.

[0062] The above content is a further detailed description of the present application in conjunction with specific optional implementation methods, and the specific implementation of the present application cannot be considered to be limited to these descriptions. For ordinary technicians in the technical field to which the present application belongs, they can make several simple deductions or substitutions without departing from the concept of the present application, which should be considered to fall within the scope of protection of the present application.

Claims

1. A display panel comprising scan lines and data lines sequentially arranged on the display panel, characterized in that: Also includes: a control unit, outputting a first control signal and a second control signal; A first control switch group, connected to the control unit, including a first output port and a second output port; a second control switch group, connected to the control unit, comprising a third output port and a fourth output port; a first routing group, comprising a first routing line and a second routing line, wherein the second routing line is arranged close to the scan line, the first routing line is arranged on a side of the second routing line away from the scan line, the first routing line and the second routing line are connected, the first output port is connected to the first routing line, and the second output port is connected to the second routing line; a second routing group including a third routing line and a fourth routing line, wherein the third routing line is arranged close to the scan line, and the fourth routing line is arranged on a side of the third routing line away from the scan line, the third routing line and the fourth routing line are connected, the third output port is connected to the third routing line, and the fourth output port is connected to the fourth routing line; Wherein, the first wiring group and the second wiring group are respectively arranged on both sides of the scanning line and are symmetrical to each other; When the control unit outputs a first control signal, the first output port of the first control switch group and the third output port of the second control switch group output a voltage signal; when the control unit outputs a second control signal, the second output port of the first control switch group and the fourth output port of the second control switch group output a voltage signal.

2. The display panel according to claim 1, wherein: The first control switch group includes a first control switch and a second control switch, the first output port is set at the output end of the first control switch, the second output port is set at the output end of the second control switch, the second control switch group includes a third control switch and a fourth control switch, the third output port is set at the output end of the third control switch, and the fourth output port is set at the output end of the fourth control switch; When the control unit outputs a first control signal, the first control switch and the third control switch are turned on; when the control unit outputs a second control signal, the second control unit and the fourth control unit are turned on.

3. The display panel according to claim 2, wherein: The first control switch and the third control switch are N-type MOS transistors, and the second control switch and the fourth control switch are P-type MOS transistors; or / The first control switch and the third control switch are P-type MOS transistors, and the second control switch and the fourth control switch are N-type MOS transistors.

4. The display panel according to claim 2, wherein: During the display time, the duration of the first control signal is equal to the duration of the second control signal.

5. The display panel according to claim 1, wherein: The first routing line and the fourth routing line have the same length, and the second routing line and the third routing line have the same length; The first routing line, the second routing line, the third routing line and the fourth routing line are all arranged in parallel with the data line.

6. The display panel according to claim 1, wherein: The control unit includes a timing control chip, and the timing control chip outputs a first control signal and a second control signal to the first control switch group and the second control switch group.

7. The display panel according to claim 1, wherein: The first routing line, the second routing line, the third routing line, and the fourth routing line are arranged on the same layer.

8. The display panel according to claim 1, wherein: The first routing line and the fourth routing line are provided on the same layer, the second routing line and the third routing line are provided on the same layer, the first routing line and the second routing line are connected through a via, and the third routing line and the fourth routing line are connected through a via.

9. A driving method, applied to the display panel according to any one of claims 1 to 8, characterized in that: The driving method comprises the steps of: Receiving a first control signal, the first output port of the first control switch group and the third output port of the second control switch group output a voltage signal; receiving a second control signal, and causing the second output port of the first control switch group and the fourth output port of the second control switch group to output a voltage signal; Repeat the above steps until the display panel pauses; The duration of the first control signal is the same as the duration of the second control signal.

10. A display device, characterized in that: The display device comprises a driving circuit and the display panel according to any one of claims 1 to 8, wherein the driving circuit is used to drive the display panel.