Start-up control method applied to semiconductor process equipment and semiconductor process equipment
By disabling hardware soft interlock alarms and performing self-tests before power-on, the problem of ignition failure caused by hardware abnormalities in the RF ignition process was solved, realizing automated ignition control and improving the production efficiency of semiconductor process equipment.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
- Filing Date
- 2024-03-11
- Publication Date
- 2026-07-24
AI Technical Summary
During the RF ignition process, ignition failure can occur due to hardware malfunctions or unstable chamber environment, affecting production capacity. Existing technologies cannot effectively solve this problem, forcing the process to be stopped, resulting in poor timeliness and operability.
Before powering on, the hardware soft interlock alarm is disabled, and it is determined whether the actual power applied by the power supply to the process chamber meets the ignition conditions. If not, the power supply is turned off for self-test. Only after ensuring that the target hardware is in normal condition can the ignition process step be entered. The automated process avoids manual intervention.
It improves the timeliness of the start-up process, reduces process interruptions caused by hardware malfunctions, increases production capacity, and saves time when the start-up process needs to be re-executed.
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Figure CN120637190B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, specifically to a ignition control method and semiconductor process equipment applied to semiconductor process equipment. Background Technology
[0002] Currently, in the RF start-up process, RF power is fed into the cavity to excite the gas inside the cavity to generate plasma. In related technologies, during the RF start-up process, due to hardware malfunctions or unstable cavity environments, start-up failures may occasionally occur. Re-attempts are not performed, forcing the process to stop. This requires user intervention to re-execute the start-up process, resulting in poor timeliness and operability, thus impacting production capacity. Summary of the Invention
[0003] This application discloses a start-up control method and semiconductor process equipment for use in semiconductor process equipment, in order to solve the problem that occasional abnormalities in the target hardware cause start-up failures, forcing the process to be stopped and affecting production capacity.
[0004] In a first aspect, this application discloses a ignition control method for semiconductor process equipment, the ignition control method comprising:
[0005] Before power is turned on, the hardware soft interlock alarm is disabled. The hardware soft interlock alarm includes: stopping the start-up process when the status signal of the target hardware is detected to be abnormal; the target hardware includes the hardware in the semiconductor process equipment that participates in the start-up process.
[0006] Turn on the power supply to apply power to the process chamber of the semiconductor process equipment;
[0007] Determine whether the actual power applied by the power supply to the process chamber meets the ignition condition. If yes, execute the ignition process step; otherwise, turn off the power supply, perform a self-test on the target hardware, and if the self-test of the target hardware is normal, return to the step of turning on the power supply to apply power to the process chamber of the semiconductor process equipment.
[0008] In some exemplary embodiments, after determining that the actual power applied by the power supply to the process chamber meets the ignition condition, and before executing the ignition process step, the ignition control method further includes:
[0009] Determine whether the status signal of the target hardware is normal; if so, release the shielding of the hardware soft interlock alarm.
[0010] In some exemplary embodiments, the ignition process step includes:
[0011] The start-up process is timed, and when the preset duration is reached, the subsequent semiconductor process steps are initiated.
[0012] In some exemplary embodiments, before performing a self-test on the target hardware, the method further includes:
[0013] The process involves retrying the ignition process, counting the number of retries, and proceeding to a self-test of the target hardware if the count is less than or equal to a threshold. If the count exceeds the threshold, the ignition process is terminated.
[0014] In some exemplary embodiments, the self-test of the target hardware includes:
[0015] The status signals of the target hardware are detected based on a preset configuration order;
[0016] When an abnormal status signal is detected in the target hardware, the target hardware is reset;
[0017] The status signal of the reset target hardware is judged a second time. If the status signal of the target hardware is abnormal, the ignition process is stopped.
[0018] In some exemplary embodiments, detecting the status signal of the target hardware based on a preset configuration order includes:
[0019] The target hardware is numbered sequentially according to the preset configuration order;
[0020] The status signal of the target hardware is determined according to the numbering order. If the status signal of the target hardware corresponding to the current number is normal, the status signal of the target hardware corresponding to the next number is then determined.
[0021] In some exemplary embodiments, resetting the target hardware when an abnormal status signal is detected includes:
[0022] When the status signal of the target hardware corresponding to the current number is abnormal, a hardware reset action corresponding to the status signal of the target hardware is determined. The hardware reset action is used to represent the operation of resetting the target hardware when the status signal of the target hardware is abnormal.
[0023] Perform a hardware reset action on the target hardware corresponding to the current number.
[0024] In some exemplary embodiments, the target hardware includes a matcher.
[0025] In some exemplary embodiments, the ignition control method further includes, before the power is turned on:
[0026] Obtain the process formula, and control the process parameters of the semiconductor process equipment to meet preset parameters according to the process formula.
[0027] In a second aspect, this application discloses a semiconductor process apparatus, including a process chamber, a power supply, and a controller, characterized in that the controller includes at least one memory and at least one processor, the memory storing a computer program, and the processor executing the computer program to implement the ignition control method described in the first aspect.
[0028] The ignition control method and semiconductor process equipment provided in this application, by shielding hardware soft interlock alarms before power-on, i.e. before formally entering the ignition process stage, eliminate the step of suspending the ignition process when an abnormal status signal of the target hardware is detected at this stage, thus avoiding process interruption caused by occasional abnormalities of the target hardware at this stage. Then, the power is turned on to load power into the process chamber of the semiconductor process equipment. It is determined whether the actual power loaded into the process chamber by the power supply meets the ignition conditions. If so, the ignition process steps are executed; otherwise, the power is turned off, and a self-test is performed on the target hardware to detect whether there is a real abnormality. When the target hardware status self-test is normal, the process returns to the step of turning on the power to load power into the process chamber of the semiconductor process equipment, thus automatically executing the formal ignition process. This saves the process of re-executing the ignition process through user recovery, resulting in high efficiency and improved production capacity. Attached Figure Description
[0029] To more clearly illustrate the technical solutions in the embodiments of this application or the background art, the accompanying drawings used in the embodiments of this application or the background art will be described below.
[0030] Figure 1 This is a flowchart illustrating a ignition control method for semiconductor process equipment, provided as an embodiment of this application.
[0031] Figure 2 A flowchart of a ignition control method for semiconductor process equipment provided in another embodiment of this application.
[0032] Figure 3 A flowchart of a ignition control method for semiconductor process equipment provided in another embodiment of this application.
[0033] Figure 4 A flowchart of a ignition control method for semiconductor process equipment provided in another embodiment of this application.
[0034] Figure 5 This is a schematic diagram of the structure of a semiconductor process equipment provided in an embodiment of this application. Detailed Implementation
[0035] The technical solutions of the embodiments of this application will now be described with reference to the accompanying drawings. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0036] Physical Vapor Deposition (PVD), a thin film deposition technology, is mainly used for the deposition of various functional thin films and is widely used in the semiconductor field, including integrated circuits, solar cells, and LEDs. PVD is primarily used under vacuum conditions, employing low-voltage, high-current arc discharge technology. It utilizes gas discharge to evaporate the target material, causing both the evaporated material and the gas to ionize and glow. Under the acceleration of the electric field, the evaporated material and its reaction products are deposited on the workpiece (usually a wafer). This technology has been widely applied in integrated circuits (ICs), light-emitting diodes (LEDs), photovoltaics, flat panel displays, and other fields.
[0037] Taking PVD (Polyvinyl Dioxide) process as an example, the PVD process is generally divided into 5 process flows, which include several process steps executed sequentially. The 5 process flows are: the start process (which mainly involves condition testing, such as vacuum testing and temperature testing), the gas inlet process, the ignition process, the deposition process, and the end process. Of course, this process flow can also be applied to other process technologies.
[0038] In related technologies, the ignition process can be further divided into a pre-ignition stage and a formal ignition stage. In the pre-ignition stage, no power is fed into the process chamber, and no plasma is generated. In the formal ignition stage, power is fed into the process chamber to excite the gas within the chamber to generate plasma. Before entering the formal ignition stage, due to occasional hardware malfunctions (such as power supplies, matching circuits, temperature sensors, etc.) or unstable chamber environments, ignition failures may occur. Re-attempts are not performed, forcing the process to stop. Related technologies cannot resolve occasional hardware malfunctions, leading to hardware soft interlock alarms and process stoppages, thus impacting production capacity.
[0039] To address the aforementioned technical problems, as an optional implementation of the disclosure in this application, an embodiment of this application discloses a ignition control method applied to semiconductor process equipment. For example... Figure 1 As shown, Figure 1A flowchart of a ignition control method for semiconductor process equipment provided in one embodiment of this application is included. The ignition control method includes:
[0040] Step S110: Before powering on, disable the hardware soft interlock alarm. The hardware soft interlock alarm includes: stopping the start-up process when the status signal of the target hardware is detected to be abnormal; the target hardware includes the hardware in the semiconductor process equipment that participates in the start-up process.
[0041] In related technologies, during the transition from the pre-ignition process to the formal ignition process in semiconductor process equipment, the status signals of the hardware participating in the ignition process are monitored, i.e., the status signals of the target hardware. The status signals of the target hardware are identified at regular intervals, such as 500ms. If the status signal of the target hardware is abnormal (e.g., displaying "Abnormal"), indicating a potential problem with the hardware participating in the ignition process, a hardware soft interlock alarm is triggered, thus halting the ignition process. In other words, in related technologies, as long as the hardware soft interlock alarm is active, the control program monitors it, and the ignition process is halted whenever an alarm is triggered. Therefore, to avoid occasional abnormalities in the hardware participating in the ignition process causing the halt, the hardware soft interlock alarm is masked before power-on, i.e., during the transition from the pre-ignition process to the formal ignition process.
[0042] For example, the power supply can be a DC power supply or an RF power supply, such as an RF power supply. For example, for a preset time before the RF power supply is turned on, the hardware soft interlock alarm can be disabled, thereby avoiding the occurrence of occasional abnormal problems of the target hardware causing the interruption of the start-up process when the start-up process is officially entered.
[0043] For example, the hardware soft interlock alarm can be blocked by blocking the step of detecting the status signal of the target hardware, or the hardware soft interlock alarm can be blocked by blocking the step of identifying the status signal of the target hardware, or the hardware soft interlock alarm can be set to a blocked state by directly not responding to it.
[0044] Step S120: Turn on the power to apply power to the process chamber of the semiconductor process equipment.
[0045] In this step, after the hardware soft interlock alarm is disabled, the power is turned on to apply power to the process chamber of the semiconductor process equipment, which is the step of entering the formal start-up process, such as turning on the RF power supply to apply power to the process chamber of the semiconductor process equipment.
[0046] Step S130: Determine whether the actual power applied by the power supply to the process chamber meets the ignition condition. If yes, proceed to step S140; otherwise, proceed to step S150.
[0047] Step S140: Perform the ignition process.
[0048] Step S150: Turn off the power and perform a self-test on the target hardware. If the self-test of the target hardware is normal, return to step S120 (turn on the power to apply power to the process chamber of the semiconductor process equipment).
[0049] In step S130, after a preset time period following the activation of the RF power supply, the actual power applied to the process chamber by the RF power supply can be acquired. Then, based on the actual power applied to the process chamber by the RF power supply, it can be determined whether the ignition condition has been met. The ignition condition, for example, is that the actual power applied to the process chamber by the RF power supply is at least greater than a preset percentage of a set value. The preset percentage range is, for example, 60%-85%. The set value is a preset control of the RF power supply's output power, with a range of, for example, 200W-1000W. Both the set value and the preset percentage can be configured according to actual conditions. The preset percentage can also be set based on the actual test results of the process chamber; no specific limitations are imposed here.
[0050] For example, with a set value of 500W and a preset ratio of 60%, the actual power loaded by the RF power supply into the process chamber can be compared with 60% * 500W. When the actual power loaded by the RF power supply into the process chamber is greater than 60% * 500W, the actual power loaded by the RF power supply into the process chamber meets the ignition condition; otherwise, the actual power loaded by the RF power supply into the process chamber does not meet the ignition condition.
[0051] When it is determined that the actual power applied by the RF power supply to the process chamber meets the ignition conditions, step S140 can be entered, i.e., the ignition process step is executed. When it is determined that the actual power applied by the RF power supply to the process chamber does not meet the ignition conditions, step S150 is executed, i.e., the power is turned off and the target hardware is self-tested. If the self-test of the target hardware status is normal, the process returns to step S120, i.e., the power is turned on to apply power to the process chamber of the semiconductor process equipment. This eliminates the possibility that the ignition failure is caused by a problem with the target hardware and automatically starts the formal ignition process stage, avoiding manual intervention that delays the process time and thus improving production capacity.
[0052] The ignition control method for semiconductor process equipment provided in this application disables hardware soft interlock alarms before power-on, i.e., before formally entering the ignition process stage. This eliminates the step of suspending the ignition process when an abnormal status signal of the target hardware is detected, thus avoiding process interruptions caused by occasional hardware malfunctions at this stage. Then, the power is turned on to load power into the process chamber of the semiconductor process equipment. It is determined whether the actual power loaded into the process chamber meets the ignition conditions. If so, the ignition process steps are executed; otherwise, the power is turned off, and a self-test is performed on the target hardware to detect any actual malfunctions. When the target hardware's status self-test is normal, the process returns to power-on to load power into the process chamber, automatically executing the formal ignition process. This eliminates the need for user-recovery re-execution of the ignition process, improving efficiency and increasing production capacity.
[0053] As an optional implementation of the disclosure in this application, an embodiment of this application discloses a ignition control method applied to semiconductor process equipment. For example... Figure 2 As shown, Figure 2 A flowchart of a ignition control method provided in another embodiment of this application is provided, the ignition control method comprising:
[0054] Step S210: Obtain the process recipe and control the process parameters of the semiconductor process equipment to meet the preset parameters according to the process recipe.
[0055] This step can be considered as the pre-ignition process stage before power is turned on, that is, the beginning stage of the ignition process. In this stage, some necessary preparatory work for the ignition process needs to be performed. In this step, the process formula can be obtained. The process formula includes multiple process actions and multiple process parameters to be performed in the process steps. For example, the process formula may include process position formula, vacuum system valve formula, gas path formula, power supply formula, etc.
[0056] For example, the set values of process parameters related to the process chamber can be obtained from the process recipe and compared with the current values of the chamber parameters to determine whether the process conditions of the process chamber match. When the current values of the chamber parameters do not match the set values of the process parameters, the current values of the chamber parameters can be adjusted to the set values of the process parameters. For example, regarding the process position of the process chamber, a base can be set in the process chamber, and a substrate such as a wafer can be placed on the base. The base has a process position in the process chamber. When the start-up process is performed in the process chamber, the base can move the substrate to the process position. For example, in the set values of the process recipe, the process position can be selected as ProcessPos1 and ProcessPos2, representing process position 1 and process position 2, respectively. If the process position in the process recipe is ProcessPos1 during the start-up process stage, it can be detected whether the current process position of the base is ProcessPos1. If it is, no other operation is required; if not, the base is controlled to move to ProcessPos1.
[0057] For example, for vacuum system valves, the valve position can typically be set to Full Open, Mid Open, or Close in the valve formulation settings, representing fully open, partially open, and closed, respectively. If, during the start-up process, the valve position in the vacuum system valve formulation is set to Mid Open, then it's possible to detect whether the valve is currently in Mid Open. If it is, no further action is needed; otherwise, the valve is moved to Mid Open.
[0058] For example, regarding the gas path, this setting in the gas path formula can be configured based on the gas path flow rate range. For instance, if the gas path flow rate is 0-500 sccm (sccm is standard cubic centimeters, a unit of volumetric flow rate), then this range can be set in the gas path formula. If, during the ignition process, the gas path flow rate in the formula is, for example, 350 sccm, then it can be checked whether the current gas path flow rate is 350 sccm. If it is, no further action is required; if not, the current gas path flow rate should be adjusted.
[0059] For example, regarding RF power supplies, since the setting value of the RF power supply in the start-up process stage is different from the setting value of the RF power supply in the previous process stage, the setting value of the RF power supply in the start-up process stage can be adjusted according to the power supply formula. The setting value range is, for example, 200W to 1000W.
[0060] In this step, after controlling the process parameters of the semiconductor process equipment and the ignition process to meet the preset parameters according to the process formula, the semiconductor process equipment meets the ignition process conditions, that is, the pre-ignition process stage is completed.
[0061] Step S220: Disable hardware soft interlock alarm.
[0062] A hardware soft interlock alarm shielding step is added between the pre-ignition process stage and the formal ignition process stage. This step shields the process from stopping the ignition process when the state of the hardware involved in the semiconductor process equipment participating in the ignition process is detected to be abnormal, thus avoiding process interruption caused by occasional problems with the target hardware.
[0063] Step S230: Turn on the power to apply power to the process chamber of the semiconductor process equipment.
[0064] In this step, the process can be regarded as entering the formal start-up process stage. For example, power can be directly applied to the process chamber of the semiconductor process equipment according to the setting value of the RF power supply in the process recipe, so as to control the output power of the RF power supply to reach the set value, thereby feeding RF power into the process chamber.
[0065] Step S240: Determine whether the actual power applied by the power supply to the process chamber meets the ignition conditions.
[0066] Taking the power supply as an example of an RF power supply, when the RF power supply loads power into the process chamber, as the actual power loaded into the process chamber by the RF power supply gradually increases, the actual power loaded into the process chamber by the RF power supply can be detected after a period of time to determine whether the actual power loaded into the process chamber by the RF power supply has reached the ignition condition. If the ignition condition is reached, ignition is successful.
[0067] When the actual power applied by the RF power supply to the process chamber meets the ignition condition, step S250 is executed. When the actual power applied by the RF power supply to the process chamber does not meet the ignition condition, step SS310 is executed.
[0068] Step S250: Determine whether the status signal of the target hardware is normal.
[0069] In this step, when the actual power applied to the process chamber by the RF power supply meets the ignition condition, to rule out occasional abnormalities in the target hardware even after successful ignition, the status signal of the target hardware is checked again before executing the ignition process step. If the status signal of the target hardware is normal, step S260 is executed. If the status signal of the target hardware is abnormal, step S310 is executed.
[0070] Step S260: Disable the hardware soft interlock alarm.
[0071] In this step, after successful ignition and when the hardware status signal is normal, the hardware soft interlock alarm is deactivated so that it can be enabled normally in subsequent process steps. This allows the process to be stopped in other processes when the status signal of the target hardware is detected to be abnormal.
[0072] Step S270: Perform the ignition process.
[0073] The start-up process includes timing the start-up process according to the process formula. When the timing reaches a preset duration, the process proceeds to the subsequent semiconductor process steps, such as the deposition process. The preset duration is, for example, 1 second.
[0074] In this ignition control method, when the actual power applied by the RF power supply to the process chamber does not meet the ignition conditions, step S310 is executed.
[0075] Step S310: Proceed to the retry ignition step and count the number of retries.
[0076] In this step, if the actual power applied to the process chamber by the RF power supply does not meet the ignition conditions, it means that the ignition has failed. Therefore, a retry ignition step is performed, and the number of retries is counted. For example, the retry ignition process can involve first turning off the RF power supply, then turning it back on after a preset time period to reapply power to the RF power supply and perform a second ignition process. For example, the number of times the RF power supply is turned off or on can be recorded as the number of retries.
[0077] Step S320: Determine whether the number of counts is greater than the threshold.
[0078] For example, the number of times the RF power is turned off is recorded as the number of retry attempts. In this step, during the retry attempt process, after turning off the RF power, it can be determined whether the current count is greater than a threshold to determine whether the retry attempt limit has been reached. When the count is less than or equal to the threshold (e.g., 3 times), it means the retry attempt limit has not been reached, and step S330 is executed. When the count is greater than the threshold, it means the retry attempt limit has been reached, and step S340 is executed.
[0079] Step S330: Perform a self-test on the target hardware.
[0080] The target hardware refers to the hardware in the semiconductor process equipment that participates in the ignition process. Examples of target hardware include matching devices, RF power supplies, and sensors. Since the ignition failure may be due to an intermittent malfunction of the target hardware, causing the actual power applied by the RF power supply to the process chamber to fail to meet the ignition conditions, a self-test can be performed on each piece of target hardware to determine if the ignition failure is due to a problem with the target hardware itself. When the self-test of the target hardware is normal, it means that the hardware itself is not faulty, and the process returns to step S230 (the step of turning on the power to apply power to the process chamber of the semiconductor process equipment), automatically re-entering the ignition process stage.
[0081] Step S340: Abort the ignition process.
[0082] In this step, after counting the number of retries to ignite, each time the retries to ignite are executed, it is determined whether the count has reached the upper limit. When the retries to ignite have reached the upper limit, it means that ignition has failed after multiple retries. Therefore, an alarm can be issued to the user to indicate that there is a real problem with the hardware involved in the ignition process, and the process can be stopped, requiring manual intervention.
[0083] In this embodiment, a hardware self-test process is added after the retry ignition step. After ignition failure, a self-test is performed on the target hardware to determine whether the cause of the ignition failure is actually a problem with the target hardware itself. If the self-test result of the target hardware is normal, it means that the target hardware itself is not the problem. No manual intervention is required, and the formal ignition process stage is executed automatically. This is highly efficient and can improve production capacity to a certain extent.
[0084] As an optional implementation of the disclosure in this application, an embodiment of this application discloses a ignition control method applied to semiconductor process equipment. For example... Figure 3 As shown, Figure 3 A flowchart of a ignition control method for semiconductor process equipment, provided in another embodiment of this application, is shown below. Figure 3 The method provided in this embodiment is Figure 2 Based on the method shown, this paper mainly describes an optional implementation of self-testing of the target hardware. For example... Figure 3 As shown, the method in this embodiment may include:
[0085] Step S410: Detect the status signals of the target hardware based on the preset configuration sequence.
[0086] In this step, since there is more than one piece of hardware involved in the ignition process in the semiconductor process equipment, that is, there are multiple target hardware, the self-test sequence can be used according to the preset configuration sequence to detect the status signals of the target hardware in turn.
[0087] Step S420: When the status signal of the target hardware is detected to be abnormal, the target hardware is reset.
[0088] In this step, if the status signal of the target hardware is detected to be abnormal, it indicates that among the multiple target hardwares participating in the ignition process, a target hardware with an abnormal problem has been found. Therefore, the target hardware can be reset in an attempt to restore its status signal to normal.
[0089] Step S430: Perform a second judgment on the status signal of the reset target hardware. If the status signal of the target hardware is abnormal, stop the ignition process.
[0090] In this step, if the status signal of the target hardware is still abnormal after the second judgment and reset, it means that the operation of restoring the status signal of the target hardware with abnormal problems to normal has failed. This indicates that there is indeed a problem with the target hardware and manual intervention is required. Therefore, the ignition process is stopped.
[0091] As an optional implementation of the disclosure in this application, an embodiment of this application discloses a ignition control method applied to semiconductor process equipment. For example... Figure 4 As shown, Figure 4 This is a flowchart illustrating a ignition control method for semiconductor process equipment according to another embodiment of this application, with reference to... Figure 4 The method provided in this embodiment is Figure 2 Based on the method shown, this paper mainly describes another optional implementation method for performing self-testing on the target hardware. For example... Figure 4 As shown, the method in this embodiment may include:
[0092] Step S510: Number the target hardware sequentially according to the preset configuration order.
[0093] Specifically, multiple target hardware devices can be numbered according to a preset configuration order so that they can be self-tested sequentially according to their numbers. For example, the target hardware device is numbered i, i = 1, 2, 3...N, where N is the number of target hardware devices.
[0094] Step S520: Determine whether the current number is less than the target number of hardware.
[0095] The numbering order can be considered as the self-testing order for multiple target hardwares. Therefore, the status signal of each target hardware can be checked sequentially according to the numbering order. For example, in step S520, it is necessary to determine whether the current number i is less than the number N of target hardwares, where i is the number of the target hardware currently being tested. When i < N, it indicates that the target hardware corresponding to the current number i is not the last target hardware to be tested, so the process continues to execute step S530. When i > N, it indicates that multiple target hardwares have been tested, and step S590 is executed: the self-testing hardware process ends.
[0096] Step S530: Determine whether the status signal of the target hardware corresponding to the current number is normal.
[0097] The status signals of multiple target hardware devices are sequentially checked according to their numbers. If the status signal of the target hardware device corresponding to the current number is normal, it indicates that there is no abnormality in the target hardware device corresponding to the current number, and step S540 is executed. If the status signal of the target hardware device corresponding to the current number is abnormal, it indicates that there is an abnormality in the target hardware device corresponding to the current number, and step S550 is executed.
[0098] Step S540: Determine the status signal of the target hardware corresponding to the next number.
[0099] In this step, after determining that there is no abnormality in the target hardware corresponding to the current number, the status signal of the next target hardware corresponding to the number i+1 is determined in sequence, and then the process returns to step S520 until the hardware status signals of all target hardware corresponding to all numbers are normal. This indicates that the status signals of all target hardware are normal, and therefore, the multiple hardware components involved in the ignition process in the semiconductor process equipment are all without problems.
[0100] Step S550: Determine the hardware reset action corresponding to the hardware status signal of the target hardware.
[0101] In this step, the hardware reset action represents the operation of resetting the target hardware when its status signal is abnormal. For example, if the status signal of the target hardware corresponding to the current number i is abnormal, the corresponding target hardware can be reset to reset its status. In this step, the reset status signal of the target hardware can be used to reset its status. For example, if the target hardware is a matcher, a capacitor matching error may occur during the cold cavity matching stage, resulting in a mismatch and an abnormal matcher status. Cold cavity matching occurs when there is no plasma generated in the process chamber. In this case, the matcher may match the capacitor to other hardware in the chamber (such as the upper electrode or the cavity body), resulting in a mismatch. Similarly, during the cold cavity matching stage, if the matcher's current exceeds the limit, its status signal will be abnormal. Therefore, a reset status signal command corresponding to the abnormal status can be sent to the matcher to restore its status signal to normal. The reset time can also be set during this process, ranging from 0-60000ms, typically set to 2000ms. In the case of a capacitor mismatch during cold cavity matching, the time to eliminate the abnormal state is approximately 1500ms, allowing the capacitor position to be restored to the preset state for the next matching.
[0102] Step S560: Perform a hardware reset action on the target hardware corresponding to the current number.
[0103] For target hardware with abnormal issues, a hardware reset action is performed in an attempt to change the target hardware's status signal from abnormal to normal.
[0104] Step S570: Secondary determination of whether the status signal of the target hardware corresponding to the current number is normal.
[0105] When the target hardware's status signal is normal, it indicates that the status signal has changed from abnormal to normal after a hardware reset, thus resolving the intermittent abnormality issue. Therefore, step S540 can be executed to continue judging the next target hardware with the corresponding number. If the target hardware's hardware status signal is still abnormal, it indicates that the hardware itself has a problem. An alarm can be triggered to interrupt the current process, awaiting manual inspection, and step S580 can be executed.
[0106] Step S580: Abort the ignition process.
[0107] In this embodiment, the status of the target hardware is detected during the self-test hardware process, and the occasional abnormality of the target hardware is automatically eliminated by the hardware reset action through self-testing, so as to determine whether the target hardware really has a problem. The detection efficiency is high and it is beneficial to improve production capacity.
[0108] As an optional implementation of the disclosure in this application, an embodiment of this application discloses a semiconductor process apparatus. For example... Figure 5 As shown, Figure 5 The diagram shown is a schematic diagram of a semiconductor process apparatus according to an embodiment of this application.
[0109] like Figure 5 As shown, the semiconductor process equipment 200, for example, is a PVD equipment, and may include a process chamber 10, a power supply (not shown), and a controller (not shown). The controller includes at least one processor and at least one memory, in which a computer program is stored. When the computer program is executed by the processor, it implements the ignition control method of any of the above embodiments.
[0110] For example, the semiconductor process equipment 200 may have a target 20 disposed at the top of the process chamber 10, the target 20 being electrically connected to a DC power supply or an RF power supply (not shown); and a base 40 disposed inside the process chamber 10, below the target 20, for supporting the workpiece 30 (such as a wafer) and heating the workpiece 30 to reach the temperature required for the process. Furthermore, an exhaust port 50 is disposed at the bottom of the process chamber 10, and an exhaust system (not shown) evacuates the process chamber 10 via the exhaust port 50. For example, during the deposition of a thin film, a reactive gas can be introduced into the process chamber 10 and the RF power supply can be turned on.
[0111] For example, the controller can be a host computer or a slave computer. The controller can open the valve of the air intake assembly (not shown in the figure) to introduce the corresponding process gas into the process chamber 10; the controller can also control the opening degree of the valve of the air intake assembly to control the flow rate of the process gas.
[0112] The semiconductor process equipment provided in this application employs the ignition control method described in the above embodiments. Before power-on, i.e., before formally entering the ignition process stage, hardware soft interlock alarms are disabled. This eliminates the step of suspending the ignition process when an abnormal status signal of the target hardware is detected, thus avoiding process interruptions caused by occasional abnormalities in the target hardware at this stage. Then, the power is turned on to load power into the process chamber of the semiconductor process equipment. It is determined whether the actual power loaded into the process chamber meets the ignition conditions. If so, the ignition process steps are executed; otherwise, the power is turned off, and a self-test is performed on the target hardware to detect whether an abnormality actually exists. When the target hardware's status self-test is normal, the process returns to the step of turning on the power to load power into the process chamber of the semiconductor process equipment, automatically executing the formal ignition process. This saves the process of re-executing the ignition process through user recovery, resulting in high efficiency and improved production capacity.
[0113] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0114] The above embodiments are merely illustrative of several implementation methods described in detail, but they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this specification, and these all fall within the scope of protection of this specification. Therefore, the scope of protection of this patent should be determined by the appended claims.
Claims
1. A ignition control method for semiconductor process equipment, characterized in that, The ignition control method includes: Before power is turned on, the hardware soft interlock alarm is disabled. The hardware soft interlock alarm includes: stopping the start-up process when the status signal of the target hardware is detected to be abnormal; the target hardware includes the hardware in the semiconductor process equipment that participates in the start-up process. Turn on the power supply to apply power to the process chamber of the semiconductor process equipment; The method determines whether the actual power applied by the power supply to the process chamber meets the ignition condition. If yes, the ignition process step is executed; otherwise, the power supply is turned off, and the target hardware undergoes a self-test. If the self-test of the target hardware is normal, the method returns to the step of turning on the power supply to apply power to the process chamber of the semiconductor process equipment. After determining that the actual power applied by the power supply to the process chamber meets the ignition condition, but before executing the ignition process step, the ignition control method further includes: determining whether the status signal of the target hardware is normal; if yes, the shielding of the hardware soft interlock alarm is released.
2. The ignition control method according to claim 1, characterized in that, The ignition process steps include: The start-up process is timed, and when the preset duration is reached, the subsequent semiconductor process steps are initiated.
3. The ignition control method according to claim 1 or 2, characterized in that, Before performing a self-test on the target hardware, the following is also included: The process involves retrying the ignition process, counting the number of retries, and proceeding to a self-test of the target hardware if the count is less than or equal to a threshold. If the count exceeds the threshold, the ignition process is terminated.
4. The ignition control method according to claim 1 or 2, characterized in that, The self-test of the target hardware includes: The status signals of the target hardware are detected based on a preset configuration order; When an abnormal status signal is detected in the target hardware, the target hardware is reset; The status signal of the reset target hardware is judged a second time. If the status signal of the target hardware is abnormal, the ignition process is stopped.
5. The ignition control method according to claim 4, characterized in that, Detecting the status signals of the target hardware based on a preset configuration order includes: The target hardware is numbered sequentially according to the preset configuration order; The status signal of the target hardware is determined according to the numbering order. If the status signal of the target hardware corresponding to the current number is normal, the status signal of the target hardware corresponding to the next number is then determined.
6. The ignition control method according to claim 5, characterized in that, When an abnormal status signal is detected in the target hardware, resetting the target hardware includes: When the status signal of the target hardware corresponding to the current number is abnormal, a hardware reset action corresponding to the status signal of the target hardware is determined. The hardware reset action is used to represent the operation of resetting the target hardware when the status signal of the target hardware is abnormal. Perform a hardware reset action on the target hardware corresponding to the current number.
7. The ignition control method according to claim 1 or 2, characterized in that, The target hardware includes a matcher.
8. The ignition control method according to claim 1 or 2, characterized in that, Before the power is turned on, the ignition control method further includes: Obtain the process formula, and control the process parameters of the semiconductor process equipment to meet preset parameters according to the process formula.
9. A semiconductor process apparatus, comprising a process chamber, a power supply, and a controller, characterized in that, The controller includes at least one memory and at least one processor, the memory storing a computer program, and the processor executing the computer program to implement the ignition control method according to any one of claims 1 to 8.
Citation Information
Patent Citations
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CN111725091A