Software radio spectrum analysis detection method based on FPGA

The FPGA-based software radio spectrum analysis method solves the problems of large data transmission volume and processing delay caused by the high sampling rate of broadband signals, achieves efficient spectrum analysis and detection processing, and reduces resource consumption.

CN120639201APending Publication Date: 2025-09-12成都华日通讯技术股份有限公司
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Patent Information

Application Number
CN202510800529.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-16
Publication Date
2025-09-12

AI Technical Summary

Technical Problem

In radio monitoring, the high sampling rate of broadband signals leads to large data transmission volumes, resulting in problems such as packet loss and processing delays. Traditional computer software also struggles to efficiently complete spectrum detection processing.

Method used

The FPGA-based software radio spectrum analysis method is used to realize signal spectrum analysis and detection through data acquisition, digital down-conversion, FFT processing, iterative operation and result output, thereby reducing data transmission volume and improving processing efficiency.

Benefits of technology

It effectively reduces the amount of data transmission, improves data processing efficiency, reduces back-end resource consumption, and enhances the processing capability of spectrum analysis.

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Abstract

The invention discloses a software radio spectrum analysis detection method based on an FPGA, and the method comprises the steps: receiving a signal in a specified frequency band through a receiver, and obtaining broadband intermediate frequency data; performing orthogonal decomposition, digital down conversion and FFT processing on the broadband intermediate frequency data to obtain spectrum data; performing iterative operation on each frame of spectrum data according to the selected detection mode; and finally outputting the detected data. The problem that traditional broadband spectrum analysis detection processing occupies too many hardware resources is solved, the processing efficiency is high, FPGA implementation is easy, and the real-time processing requirement is met.
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Description

Technical Field

[0001] The present invention relates to the technical field of radio communication and radio spectrum monitoring, and in particular to a software radio spectrum analysis and detection method based on FPGA. Background Art

[0002] Currently, spectrum analysis is an effective method for detecting and analyzing vibration signals in domestic radio monitoring, helping to understand their composition, causes, and characteristics. Spectrum analysis requires first detecting signals within the broadband measurement frequency band to determine whether the target signal exists within the current frequency band. Subsequently, a narrowband, high-precision scanning mode is used for identification and demodulation analysis. During broadband signal scanning, the sampling rate is often very high. Transmitting excessive amounts of data can lead to packet loss. Handing off signal detection to the backend can also result in significant processing delays. FPGAs, as programmable logic devices, can effectively process streaming data. Their flexible logic design allows the module to switch between multiple detection modes based on control, making spectrum detection much easier than with computer software. Shifting detection calculations within the FPGA can significantly improve data processing efficiency, significantly reduce data transmission volume, and significantly reduce backend resource consumption. Summary of the Invention

[0003] To solve the problems existing in the prior art, the purpose of the present invention is to provide a software radio spectrum analysis and detection method based on FPGA, which improves data processing efficiency, reduces data transmission volume, and can also effectively reduce back-end resource consumption.

[0004] To achieve the above object, the present invention adopts a technical solution: a software radio spectrum analysis and detection method based on FPGA, comprising the following steps:

[0005] Step 1: The data acquisition module collects input signal data and sends it to the data processing module;

[0006] Step 2: In the data processing module, the data collected by AD in step 1 is subjected to digital down-conversion and FFT processing in sequence to obtain spectrum data, which is then sent to the data iteration module;

[0007] Step 3: In the data iteration module, according to the preset detection mode, the data of the set length is iterated continuously within the set number of iterations, and the iterated data is output to the result output module;

[0008] Step 4: In the result output module, the output data of step 3 is processed according to the detection mode and the detected signal is output.

[0009] As a further improvement of the present invention, the step 2 specifically includes the following steps:

[0010] a. Based on the AD data collected in step 1, the I(n) and Q(n) signals are separated into two paths through the orthogonal decomposition module according to the digital down-conversion frequency.

[0011] b. According to the target sampling rate, the IQ signals I(n) and Q(n) are respectively sent to the filter module to complete the DDC processing and obtain the baseband IQ data I of the required specific sampling rate. DDC (n) and Q DDC (n);

[0012] c. I DDC (n) and Q DDC (n) Perform windowing processing to obtain the windowed data I window (n) and Q window (n);

[0013] d. I window (n) and Q window (n) inputs the FFT module to obtain data FFT(n);

[0014] e. Perform logarithmic processing on the FFT(n) data to obtain the required spectrum data D(n).

[0015] As a further improvement of the present invention, the step 3 specifically includes the following steps:

[0016] A. Based on the N-point spectrum data obtained in one sampling period according to step 2, at the beginning of detection, the N-point spectrum data D1(n) input in the first frame is first stored in the buffer as iterative data S1(n) according to the detection mode;

[0017] When the detection mode is: positive peak detection, negative peak detection, normal detection, sampling detection, average detection, the iterative data calculation method is:

[0018] S1(n)=D1(n)

[0019] When the detection mode is RMS detection, the iterative data is calculated as follows:

[0020] S1(n)=(D1(n)) 2

[0021] Wherein, the value range of n is 1≤n≤N, and n is an integer;

[0022] B. When receiving the xth frame data D x (n), the N point data S in the FPGA buffer area x-1(n) are taken out in sequence, and the iterative operation of each corresponding point of the N point data is performed according to the detection mode to obtain the new data N x (n), and store the threshold in the cache to replace the last iteration data in the cache;

[0023] When the detection mode is positive peak detection, the iterative data is calculated as follows:

[0024] S x (n)=MAX(S x-1 (n), D x (n))

[0025] When the detection mode is negative peak detection, the iterative data is calculated as follows:

[0026] S x (n) = MIN(S x-1 (n), D x (n))

[0027] When the detection mode is normal detection, the iterative data calculation method is:

[0028]

[0029] When the detection mode is sampling detection, the iterative data calculation method is:

[0030] S x (n) = S x-1 (n)

[0031] When the detection mode is: average detection, the iterative data calculation method is:

[0032] S x (n) = S x-1 (n)+D x (n)

[0033] When the detection mode is RMS detection, the iterative data is calculated as follows:

[0034] S x (n) = S x-1 (n)+(D x (n)) 2

[0035] Wherein, the value range of n is 1≤n≤N, and n is an integer;

[0036] C. Repeat step B. When the number of iterations reaches the set maximum number of detection times X, the final iterative data S X (n) Send to the result output module:

[0037] SOUT(n)=S X (n)

[0038] As a further improvement of the present invention, step 4 specifically includes the following steps:

[0039] 1) Calculate the final result of the input iterative data;

[0040] When the detection mode is: positive peak detection, negative peak detection, normal detection, sampling detection, iterative data calculation method:

[0041] DOUT(n)=SOUT(n)

[0042] When the detection mode is: average detection, the iterative data calculation method is:

[0043]

[0044] When the detection mode is RMS detection, the iterative data is calculated as follows:

[0045]

[0046] 2) According to different detection modes, the simultaneous and last frame input signal D X The frame start and end signals input together with (n) are delayed and become the frame start and end signals of the output signal DOUT(n).

[0047] The beneficial effects of the present invention are:

[0048] The present invention mainly performs down-conversion and FFT on the software radio signal to obtain a spectrum signal, performs iterative calculations on the spectrum signal according to the detection mode in the data iteration module, and obtains the output result of the corresponding detection mode when the data is output. The above three steps can obtain the detected signal and reduce the data volume to one-half of the number of iterations, thereby reducing the data transmission pressure and the resource occupation of traditional broadband spectrum analysis and detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1 This is a principle block diagram of an embodiment of the present invention;

[0050] Figure 2 4 is a flow chart of signal detection in an embodiment of the present invention. DETAILED DESCRIPTION

[0051] In order to make the purpose, technical solutions and advantages of this application more clearly understood, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0052] On the contrary, this application covers any alternatives, modifications, equivalents, and solutions made within the spirit and scope of this application as defined by the claims. Furthermore, to facilitate a better understanding of this application, certain specific details are described in detail below in the detailed description of this application. Those skilled in the art will be able to fully understand this application without these details.

[0053] The following is a detailed description of a channel extraction method based on tetra cluster signal features involved in an embodiment of the present application.

[0054] like Figure 1 and Figure 2 As shown, a software radio spectrum analysis and detection method based on FPGA is shown. This embodiment mainly uses the broadband intermediate frequency data received by the receiver's single-frequency measurement function for detection. In this embodiment, the number of data points per frame N, the digital down-conversion frequency, the target sampling rate, the detection mode, and the maximum number of detection times X are obtained. The specific steps are as follows:

[0055] (1) Broadband spectrum data acquisition: Use the receiver's single-frequency measurement function to collect broadband intermediate frequency data, convert the intermediate frequency data clock domain into the working clock domain, and each frame of data has N data samples.

[0056] (2) Input the intermediate frequency data into the data processing module to obtain the spectrum data. The specific steps are as follows:

[0057] a. According to the digital down-conversion frequency, the data is passed through the orthogonal decomposition module to obtain the IQ two-way signals I(n) and Q(n);

[0058] b. According to the target sampling rate, the IQ signals I(n) and Q(n) are respectively sent to the filter module to complete the DDC processing and obtain the baseband IQ data I of the required specific sampling rate. DDC (n) and Q DDC (n);

[0059] c. I DDC (n) and Q DDC (n) Perform windowing processing to obtain the windowed data I window (n) and Q window (n);

[0060] d. I window (n) and Q window (n) inputs the FFT module to obtain data FFT(n);

[0061] e. Perform logarithmic processing on the FFT(n) data to obtain the required spectrum data D(n).

[0062] (3) The spectrum data is input into the data iteration module, which selects the corresponding iteration method according to the selected detection mode. When the number of iterations reaches the maximum value X, the iteration ends and the data is output. The specific steps are as follows:

[0063] A. At the beginning of the detection, the corresponding iteration method is selected according to the detection mode, and the N-point spectrum data D1(n) input in the first frame is stored in the buffer as the iteration data S1(n);

[0064] When the detection mode is: positive peak detection, negative peak detection, normal detection, sampling detection, average detection, the iterative data calculation method is:

[0065] S1(n)=D1(n)

[0066] When the detection mode is RMS detection, the iterative data is calculated as follows:

[0067] S1(n)=(D1(n)) 2

[0068] Wherein, the value range of n is 1≤n≤N, and n is an integer;

[0069] B. When receiving the xth frame data D x (n), the N point data S in the FPGA buffer area x-1 (n) are taken out in sequence, and the iterative operation of each corresponding point of the N point data is performed according to the detection mode to obtain the new data N x (n), and store the threshold in the cache to replace the last iteration data in the cache;

[0070] When the detection mode is positive peak detection, the iterative data is calculated as follows:

[0071] S x (n)=MAX(S x-1 (n), D x (n))

[0072] When the detection mode is negative peak detection, the iterative data is calculated as follows:

[0073] S x (n)=MIN(S x-1 (n), D x (n))

[0074] When the detection mode is normal detection, the iterative data calculation method is:

[0075]

[0076] When the detection mode is sampling detection, the iterative data calculation method is:

[0077] Sx (n) = S x-1 (n)

[0078] When the detection mode is: average detection, the iterative data calculation method is:

[0079] S x (n) = S x-1 (n)+D x (n)

[0080] When the detection mode is RMS detection, the iterative data is calculated as follows:

[0081] S x (n) = S x-1 (n)+(D x (n)) 2

[0082] Wherein, the value range of n is 1≤n≤N, and n is an integer;

[0083] C. Repeatedly receive frame data and iteratively calculate. When the number of iterations reaches the set maximum detection number X, the iteration result is sent to the result output module:

[0084] SOUT(n)=S X (n)

[0085] In actual engineering applications, if you want the detection module to output all frame data instead of detection data, you can set the detection mode to any non-RMS detection mode and set the maximum number of iterations X to 1 to output the original input frame data.

[0086] (4) After receiving the iterative data for which calculation results are required, the result output module will perform final calculation processing on the data according to the currently selected detection mode and output the results. The specific steps are as follows:

[0087] 1) Calculate the final result of the input iterative data;

[0088] When the detection mode is: positive peak detection, negative peak detection, normal detection, sampling detection, iterative data calculation method:

[0089] DOUT(n)=SOUT(n)

[0090] When the detection mode is: average detection, the iterative data calculation method is:

[0091]

[0092] When the detection mode is RMS detection, the iterative data is calculated as follows:

[0093]

[0094] 2) According to different detection modes, the simultaneous and last frame input signal D X The frame start and end signals input together with (n) are delayed and become the frame start and end signals of the output signal DOUT(n).

[0095] When automatic peak detection is required on the system, two groups of this embodiment can be generated in the FPGA code Figure 1 In the data iteration module and result output module, each group is calculated as positive peak detection and negative peak detection respectively, and the positive peak detection and negative peak detection outputted at the same time are automatic peak detection.

[0096] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A software radio spectrum analysis and detection method based on FPGA, characterized in that: The detection method comprises a data acquisition module, a data processing module, a data iteration module, and a result output module connected in sequence, and the detection method comprises the following steps: Step 1: The data acquisition module collects input signal data and sends it to the data processing module; Step 2: In the data processing module, the data collected by AD in step 1 is subjected to digital down-conversion and FFT processing in sequence to obtain spectrum data, which is then sent to the data iteration module; Step 3: In the data iteration module, according to the preset detection mode, the data of the set length is iterated continuously within the set number of iterations, and the iterated data is output to the result output module; Step 4: In the result output module, the output data of step 3 is processed according to the detection mode and the detected signal is output.

2. The FPGA-based software radio spectrum analysis and detection method according to claim 1, characterized in that: The step 2 specifically includes the following steps: a. Based on the AD data collected in step 1, the I(n) and Q(n) signals are separated into two paths through the orthogonal decomposition module according to the digital down-conversion frequency. b. According to the target sampling rate, the IQ signals I(n) and Q(n) are respectively sent to the filter module to complete the DDC processing and obtain the baseband IQ data I of the required specific sampling rate. DDC (n) and Q DDC (n); c. I DDC (n) and Q DDC (n) Perform windowing processing to obtain the windowed data I window (n) and Q window (n); d. I window (n) and Q window (n) inputs the FFT module to obtain data FFT(n); e. Perform logarithmic processing on the FFT(n) data to obtain the required spectrum data D(n).

3. The FPGA-based software radio spectrum analysis and detection method according to claim 1, wherein: The step 3 specifically includes the following steps: A. Based on the N-point spectrum data obtained in one sampling period according to step 2, at the beginning of detection, the N-point spectrum data D1(n) input in the first frame is first stored in the buffer as iterative data S1(n) according to the detection mode; When the detection mode is: positive peak detection, negative peak detection, normal detection, sampling detection, average detection, the iterative data calculation method is: S1(n)=D1(n) When the detection mode is RMS detection, the iterative data is calculated as follows: S1(n)=(D1(n)) 2 Wherein, the value range of n is 1≤n≤N, and n is an integer; B. When receiving the xth frame data D x (n), the N point data S in the FPGA buffer area x-1 (n) are taken out in sequence, and the iterative operation of each corresponding point of the N point data is performed according to the detection mode to obtain the new data N x (n), and store the threshold in the cache to replace the last iteration data in the cache; When the detection mode is positive peak detection, the iterative data is calculated as follows: S x (n)=MAX(S x-1 (n),D x (n)) When the detection mode is negative peak detection, the iterative data is calculated as follows: S x (n)=MIN(S x-1 (n), D x (n)) When the detection mode is normal detection, the iterative data calculation method is: When the detection mode is sampling detection, the iterative data calculation method is: S x (n)=S x-1 (n) When the detection mode is: average detection, the iterative data calculation method is: S x (n)=S x-1 (n)+D x (n) When the detection mode is RMS detection, the iterative data is calculated as follows: S x (n)=S x-1 (n)+(D x (n)) 2 Wherein, the value range of n is 1≤n≤N, and n is an integer; C. Repeat step B. When the number of iterations reaches the set maximum number of detection times X, the final iterative data S X (n) Send to the result output module: SOUT(n)=S X (n)。 4. The FPGA-based software radio spectrum analysis and detection method according to claim 1, wherein: The step 4 specifically includes the following steps: 1) Calculate the final result of the input iterative data; When the detection mode is: positive peak detection, negative peak detection, normal detection, sampling detection, iterative data calculation method: DOUT(n)=SOUT(n) When the detection mode is: average detection, the iterative data calculation method is: When the detection mode is RMS detection, the iterative data is calculated as follows: 2) According to different detection modes, the simultaneous and last frame input signal D X The frame start and end signals input together with (n) are delayed and become the frame start and end signals of the output signal DOUT(n).

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