Methods, devices, and systems for clock recovery

Abstract

The application provides a clock recovery method, device and system. The method can be applied to an optical transport network. The method comprises the following steps: receiving a first optical transport network (OTN) frame data stream, obtaining a service layer clock and phase difference information carried by a second OTN frame from the first OTN frame data stream, and then adjusting a reference clock of the second OTN frame according to the service layer clock and the phase difference information, wherein the reference clock of the second OTN frame is used for recovering a clock of the second OTN frame. The clock recovery method provided by the application can improve the accuracy of clock recovery of the OTN frame, thereby achieving the purpose of improving system performance.

Description

[0001] This application is a divisional application of the original application with the application number 202310601034.5 and the original filing date of May 24, 2023, and the entire contents of the original application are incorporated herein by reference. TECHNICAL FIELD

[0002] The present application relates to the field of optical transmission technology, and more particularly, to a clock recovery method, device and system. BACKGROUND

[0003] An optical transport network (OTN) can provide greater transmission rate, higher transmission efficiency and better operations, administration and maintenance (OAM) capability based on wavelength division multiplexing technology, and has become the mainstream technology of backbone transmission network.

[0004] An OTN system not only transmits various types of service data, but also transmits timing information (mainly clock synchronization frequency) corresponding to each service. One of the core technologies is how to map different types and rates of service data to OTN data frames and recover service data and clock information in OTN equipment. SUMMARY

[0005] Embodiments of the present application provide a clock recovery method, device and system, which enable a destination device to accurately recover a service layer clock, thereby achieving the purpose of improving system performance.

[0006] In a first aspect, embodiments of the present application provide a clock recovery method. The method can be executed by a destination device or by a component (such as a chip or a chip system, etc.) of the destination device, which is not limited in the present application. The method comprises: receiving a first optical transport network (OTN) frame data stream; obtaining a service layer clock from the first OTN frame data stream; obtaining phase difference information carried by a second OTN frame borne by the first OTN frame data stream from the first OTN frame data stream. The phase difference information is the sum of the phase differences of one or more groups of adjacent two upstream devices in the destination device or one or more upstream devices through which the second OTN frame passes. The phase difference of the one or more groups of adjacent two upstream devices is an integer number of reference clock periods. Adjusting a reference clock of the second OTN frame according to the service layer clock and the phase difference information, the reference clock of the second OTN frame being used to recover a clock of the second OTN frame.

[0007] In some embodiments, the period of the overhead area carrying the phase difference information carried by the second OTN frame is less than or equal to 1 / 2 of the period of the second OTN frame. Exemplarily, it can be 1 / 4 or 1 / 3, etc.

[0008] Based on the above scheme, the destination device adjusts the reference clock of the second OTN frame of the destination device by obtaining the accumulation of the phase difference of each two adjacent devices in the upstream devices of the destination device, compared with adjusting the reference clock of the second OTN frame of the destination device by using the reference clock of the second OTN frame of each device in the system, the process avoids the process of extracting the reference clock of the second OTN frame of each device in the system, reduces the complexity and high overhead of clock recovery. Since the phase difference accumulation can realize the lossless estimation of the reference clock of the second OTN frame, the scheme of the present application can improve the accuracy of adjusting the reference clock of the second OTN frame of the destination device, and thus realize the purpose of improving the system performance.

[0009] With reference to the first aspect, in some implementations of the first aspect, adjusting the reference clock of the second OTN frame according to the phase difference information and the service layer clock comprises: generating a phase difference between the destination device and an adjacent upstream device of the destination device according to the service layer clock, the phase difference between the destination device and the adjacent upstream device of the destination device being an integer number of reference clock periods; generating a frequency deviation according to the phase difference information and the phase difference between the destination device and the adjacent upstream device of the destination device; and adjusting the reference clock of the second OTN frame according to the frequency deviation.

[0010] With reference to the first aspect, in some implementations of the first aspect, a period T of generating the phase difference between the destination device and the adjacent upstream device of the destination device is greater than a period of the overhead area carrying the phase difference information.

[0011] With reference to the first aspect, in some implementations of the first aspect, a frequency F of the reference clock of the second OTN frame is greater than or equal to a rate of the second OTN frame.

[0012] With reference to the first aspect, in some implementations of the first aspect, the frequency F and the period T satisfy: (F*T*20ppm) < 10.

[0013] Based on the above scheme, by limiting the period T of the phase difference and / or the frequency F of the reference clock of the second OTN frame of each device, the instantaneous phase error introduced in the phase difference accumulation process can be eliminated, thereby improving the accuracy of the phase difference information obtained by the destination device, and further improving the accuracy of recovering the clock of the second OTN frame, and realizing the purpose of improving the system performance.

[0014] With reference to the first aspect, in some implementations of the first aspect, the period T is greater than 3 ms and less than 6 ms, for example, 4 ms. In some embodiments, the period T is a value around 4 ms, i.e., approximately equal to 4 ms, and can be slightly less than 4 ms or slightly greater than 4 ms, for example, the period T is 4.1 ms or 3.9 ms, etc.

[0015] With reference to the first aspect, in some implementations of the first aspect, the frequency F ranges from 10 MHz to 1 GHz.

[0016] With reference to the first aspect, in some implementations of the first aspect, the period of the overhead area carrying the phase difference information is 3 ms. In some embodiments, the period of the overhead area carrying the phase difference information is a value around 3 ms, i.e., approximately equal to 3 ms, and can be slightly less than 3 ms or slightly greater than 3 ms, for example, 2.1 ms or 3.9 ms, etc.

[0017] With reference to the first aspect, in some implementations of the first aspect, the error of the recovered service layer clock of the second OTN frame is less than or equal to 40 ns. Based on this scheme, the phase error introduced in the phase difference calculation in the clock recovery scheme provided by the embodiments of the present application satisfies the G.813 template.

[0018] With reference to the first aspect, in some implementations of the first aspect, the phase difference information is carried in a plurality of overhead areas of the second OTN frame. Based on this scheme, by carrying the phase difference information in the overhead area of the second OTN frame, the destination device can obtain the phase difference information in time after receiving the second OTN frame, thereby reducing the time delay of clock recovery.

[0019] With reference to the first aspect, in some implementations of the first aspect, each of the plurality of overhead areas carries one byte of the phase difference information.

[0020] With reference to the first aspect, in some implementations of the first aspect, the second OTN frame is an optical service unit (OSU) frame.

[0021] With reference to the first aspect, in some implementations of the first aspect, the first OTN frame is an optical data unit (ODU) frame, and the ODU frame is an ODUk frame or an ODUflex frame.

[0022] With reference to the first aspect, in some implementations of the first aspect, the reference clock of the second OTN frame is generated by a constant temperature crystal oscillator, and the frequency of the reference clock of the second OTN frame varies within a preset range. Based on this scheme, the reference clock of the second OTN frame of each device is generated by a constant temperature crystal oscillator, which can ensure the stability of the reference clock of the second OTN frame, thereby improving the accuracy of clock recovery and further improving the system performance.

[0023] In some implementations of the first aspect, the adjusting the reference clock of the second OTN frame according to the phase difference information comprises: adjusting the reference clock of the second OTN frame according to the phase difference information within a time period T c , T c satisfies: T c ≥ T / (20ppm). Since the phase difference information received by the target device is the cumulative result of the phase difference between devices, when the phase difference between adjacent devices is calculated in some devices, the phase difference calculation error may occur. In order to eliminate the error when the device calculates the phase difference, the target device does not adopt instantaneous compensation when recovering the clock according to the phase difference information, but uses all the phase difference information received within the time period T c to slowly recover the clock within the time period T c , thereby improving the accuracy of clock recovery.

[0024] In some implementations of the first aspect, the method further comprises: periodically increasing or decreasing the phase difference between the target device and the adjacent upstream device of the target device with a first period T1, the first period T1 satisfies: T1=(F*T*T / D1), D1 is the phase difference between the target device and the adjacent upstream device of the target device. Based on this scheme, by controlling the phase difference generated by the target device with the first period, the jitter of the phase difference can be reduced, thereby improving the accuracy of clock recovery.

[0025] In the second aspect, the embodiments of the present application provide a clock recovery method, which can be executed by a first device or a component (such as a chip or a chip system) of the first device. The method comprises: receiving a first optical transport network (OTN) frame data stream. Obtaining a service layer clock from the first OTN frame data stream. Generating a phase difference between the first device and an adjacent upstream device of the first device according to the service layer clock. Obtaining first phase difference information carried by a second OTN frame in the first OTN frame data stream, the first phase difference information being the sum of the phase difference between a group or multiple groups of adjacent two upstream devices of the first device. The phase difference between the group or multiple groups of adjacent two upstream devices is an integer number of reference clock periods. Generating second phase difference information, the second phase difference information being the sum of the phase difference between the first device and the adjacent upstream device of the first device and the first phase difference information. Sending the second phase difference information, the second phase difference information being used to adjust the reference clock of the second OTN frame, the reference clock of the second OTN frame being used to recover the clock of the second OTN frame.

[0026] It should be noted that the first device is a device other than the sending device and the destination device. In other words, the first device is any one of the intermediate devices between the sending device and the destination device. It should be understood that when the first device is a downstream intermediate device adjacent to the sending device, since the sending device does not generate a phase difference, the first phase difference information received by the first device is 0. At this time, the value of the second phase difference information sent by the first device corresponds to the phase difference generated by the first device and the sending device.

[0027] It should also be noted that due to the difference of the devices generating the OTN frame, the second OTN frame carrying the first phase difference information received by the first device is different from the second OTN frame carrying the second phase difference information sent by the first device. However, it should be understood that the overhead area of the second OTN frame carrying the first phase difference information and the overhead area of the second OTN frame carrying the first phase difference information are located at the same position of the respective second OTN frame. In other words, in the embodiments of the present application, the position of the overhead area carrying the phase difference information in the second OTN frame is fixed. When the first device extracts the first phase difference information sent by the upstream device in the overhead area, it will record the second phase difference information generated by the device in the overhead area at the same position of the new second OTN frame generated by the device.

[0028] In some embodiments, the period of the overhead area carrying the first phase difference information and the period of the overhead area carrying the second phase difference information of the second OTN frame are the same, the period of the overhead area carrying the first phase difference information of the second OTN frame is less than or equal to 1 / 2 of the period of the second OTN frame, and the period of the overhead area carrying the second phase difference information of the second OTN frame is less than or equal to 1 / 2 of the period of the second OTN frame.

[0029] Based on the scheme, the intermediate device calculates the phase difference between the device and the adjacent upstream device, accumulates the received first phase difference information and the phase difference information generated by the device, generates the second phase difference information for the recovery destination device and sends it. That is, the destination device adjusts the reference clock of the second OTN frame through the accumulation of the phase difference sent by the intermediate node, avoids the process of extracting the reference clock of the second OTN frame of each device in the system, and reduces the complexity and high overhead of clock recovery. Since the phase difference accumulation can realize the lossless estimation of the reference clock of the second OTN frame, the scheme of the present application can improve the accuracy of the adjustment of the reference clock of the second OTN frame of the destination device, and then improve the accuracy of the recovered clock of the second OTN frame, and realize the purpose of improving the system performance. In combination with the second aspect, in some implementation manners of the second aspect, the period T of the phase difference between the first device and the upstream device adjacent to the first device is greater than the period of the overhead area carrying the first phase difference information or the second phase difference information.

[0030] In combination with the second aspect, in some implementation manners of the second aspect, the frequency F of the reference clock of the second OTN frame is greater than or equal to the rate of the second OTN frame.

[0031] In combination with the second aspect, in some implementation manners of the second aspect, the frequency F, the period T satisfy: (F*T*20ppm)<10.

[0032] In combination with the second aspect, in some implementation manners of the second aspect, the period T is greater than 3ms and less than 6ms, for example, 4ms. In some embodiments, the period T is a value near 4ms, that is, approximately equal to 4ms, which can be slightly less than 4ms or slightly greater than 4ms, for example, the period T is 3.1ms or 4.9ms, etc.

[0033] In combination with the second aspect, in some implementation manners of the second aspect, the frequency F ranges from 10MHz to 1GHz.

[0034] In combination with the second aspect, in some implementation manners of the second aspect, the period of the overhead area carrying the first phase difference information of the second OTN frame is 3ms.

[0035] In combination with the second aspect, in some implementation manners of the second aspect, the period of the overhead area carrying the second phase difference information of the second OTN frame is 3ms. In some embodiments, the period of the overhead area carrying the first phase difference information or the period of the overhead area carrying the second phase difference information is a value near 3ms, that is, approximately equal to 3ms, which can be slightly less than 3ms or slightly greater than 3ms, for example, 2.1ms or 3.9ms, etc.

[0036] With reference to the second aspect, in some implementations of the second aspect, the first phase difference information is carried in a plurality of overhead areas of the second OTN frame.

[0037] With reference to the second aspect, in some implementations of the second aspect, the second phase difference information is carried in a plurality of overhead areas of the second OTN frame.

[0038] With reference to the second aspect, in some implementations of the second aspect, each of the plurality of overhead areas carries the first phase difference information with a byte number of 1.

[0039] With reference to the second aspect, in some implementations of the second aspect, the second OTN frame is an Optical Service Unit, OSU, frame.

[0040] With reference to the second aspect, in some implementations of the second aspect, the first OTN frame is an ODUk frame or an ODUflex frame.

[0041] With reference to the second aspect, in some implementations of the second aspect, a reference clock of the second OTN frame is generated by a constant temperature crystal oscillator, and a frequency of the reference clock of the second OTN frame varies in a preset range.

[0042] With reference to the second aspect, in some implementations of the second aspect, the method further includes periodically increasing or decreasing the phase difference between the first device and an upstream device adjacent to the first device with a second period T2, the second period T2 satisfying T2=(F*T*T / D2), and D2 being the phase difference between the first device and the upstream device adjacent to the first device. Based on this scheme, the phase difference generated by the first device is regulated with a second period, which can reduce the jitter of the phase difference, thereby improving the accuracy of clock recovery.

[0043] In a third aspect, an embodiment of the present application provides a method for clock recovery. The method can be performed by a destination device or by a component (such as a chip or a chip system, etc.) of the destination device, which is not limited in the present application. The method comprises: receiving a first OTN frame data stream. Obtaining a service layer clock from the first OTN frame data stream. Obtaining first phase difference information carried by a second OTN frame carried by the first OTN frame data stream from the first OTN frame data stream, the first phase difference information being a sum of phase differences of one or more groups of adjacent two upstream devices in one or more upstream devices of the destination device, the phase difference of the one or more groups of adjacent two upstream devices being an integer number of nominal clock periods, wherein the nominal clock period is less than or equal to 10 ns. Generating a local phase difference according to a reference clock of a second OTN frame of the destination device and the service layer clock. Accumulating the local phase difference to the first phase difference information to generate second phase difference information. The reference clock of the second OTN frame of the destination device is used to recover a clock of the second OTN frame. Adjusting the reference clock of the second OTN frame of the destination device according to the second phase difference information.

[0044] In combination with the third aspect, in some implementations of the third aspect, the adjusting the reference clock of the second OTN frame of the destination device according to the second phase difference information comprises: generating a frequency offset according to the second phase difference information, the frequency offset being a product of the number of the nominal clock corresponding to the second phase difference information and the nominal clock. Adjusting the reference clock of the local second OTN frame according to the frequency offset.

[0045] In combination with the third aspect, in some implementations of the third aspect, the adjusting the reference clock of the local second OTN frame according to the second phase difference information comprises: generating a clock control signal for adjusting the reference clock of the second OTN frame of the destination device according to the second phase difference information. Adjusting the reference clock of the local second OTN frame according to the clock control signal.

[0046] In combination with the third aspect, in some implementations of the third aspect, a period T of the generating the local phase difference is greater than a period of an overhead area of the second OTN frame carrying the first phase difference information.

[0047] In combination with the third aspect, in some implementations of the third aspect, a frequency F of the nominal clock is greater than or equal to a rate of the second OTN frame.

[0048] In combination with the third aspect, in some implementations of the third aspect, the frequency F and the period T satisfy: (F×T×20ppm)<64.

[0049] In some embodiments, the period of the overhead area carrying the phase difference information is a value around 3ms, i.e., approximately equal to 3ms, can be slightly less than 3ms or slightly greater than 3ms, for example, 2.1ms or 3.9ms, etc.

[0050] In some embodiments, the frequency F is in the range of 100MHz-1GHz.

[0051] In some embodiments, the period of the overhead area carrying the phase difference information is a value around 3ms, i.e., approximately equal to 3ms, can be slightly less than 3ms or slightly greater than 3ms, for example, 2.1ms or 3.9ms, etc.

[0052] In some embodiments, the period of the overhead area carrying the phase difference information is a value around 3ms, i.e., approximately equal to 3ms, can be slightly less than 3ms or slightly greater than 3ms, for example, 2.1ms or 3.9ms, etc.

[0053] In some embodiments, the error of the recovered service layer clock of the second OTN frame is less than or equal to 100ns.

[0054] In some embodiments, the first phase difference information is carried in multiple overhead areas of the second OTN frame.

[0055] In some embodiments, each of the multiple overhead areas carries the same first phase difference information. When there is a bit error in the system, the first phase difference information carried in some of the multiple overhead areas can be erroneous. Therefore, in this scheme, when there is a bit error in the system, the receiving device can determine the correct first phase difference information according to the multiple phase difference information received, thereby improving the performance of the system.

[0056] In some embodiments, when the first phase difference information generated by the upstream device exceeds the maximum capacity of the resource carrying the phase difference information, for example, when the resource carrying the phase difference information is 1 byte, when the first phase difference information cannot be carried by 1 byte, the first phase difference information can be divided into multiple partial phase difference information and carried in different overhead areas (for example, adjacent overhead areas), i.e., each of the multiple overhead areas carries a part of the first phase difference information, that is, the total of the phase difference information carried in the multiple overhead areas is the first phase difference information.

[0057] In some embodiments, the number of bytes of the first phase difference information carried in each of the multiple overhead areas is 1.

[0058] In some implementations of the third aspect, each of the plurality of overhead areas carries a plurality of the first phase difference information. Based on this scheme, a device that acquires the plurality of first phase difference information can employ an algorithm such as majority decision to determine the correct first phase difference information to improve system error.

[0059] In some implementations of the third aspect, the frequency of the reference clock of the second OTN frame of the destination device varies over time with an amplitude within a range of ±20ppm.

[0060] In some implementations of the third aspect, adjusting the reference clock of the local second OTN frame based on the second phase difference information comprises adjusting the reference clock of the local second OTN frame over a time period T c based on the second phase difference information, T c satisfies: T c ≥ T / (20ppm).

[0061] In the fourth aspect, an embodiment of the present application provides a method for clock recovery. The method can be performed by an intermediate device or by a component (such as a chip or a chip system, etc.) of the intermediate device, which is not limited in the present application. The method comprises: receiving a first optical transport network (OTN) frame data stream; obtaining a service layer clock from the first OTN frame data stream; obtaining first phase difference information carried by a second OTN frame from the first OTN frame data stream, the first phase difference information being a sum of phase differences of one or more groups of adjacent two upstream devices of the intermediate device or one or more upstream devices of the intermediate device, the phase difference of the one or more groups of adjacent two upstream devices being an integer number of nominal clock periods, wherein the nominal clock period is less than or equal to 10ns; generating a local phase difference based on a clock of the intermediate device and the service layer clock; accumulating the local phase difference to the first phase difference information to generate second phase difference information; and sending the second phase difference information to an adjacent downstream device.

[0062] In some implementations of the fourth aspect, the method further comprises: when an absolute value of the second phase difference information is greater than a preset threshold, splitting the second phase difference information into a plurality of partial phase difference information, the plurality of partial phase difference information being carried in a plurality of overhead areas of a second OTN frame sent by the intermediate device.

[0063] Based on the above scheme, the second phase difference information generated by the intermediate device is split and added to the at least two overhead areas. For example, when the second phase difference information exceeds one range (such as one byte), the second phase difference information can be added to multiple overhead areas multiple times, so as to ensure that each overhead area does not overflow, to reduce the jitter of the phase difference, and to improve the accuracy of clock recovery.

[0064] In a fifth aspect, the embodiments of the present application provide a clock recovery method, which can be executed by an intermediate device or by a component (such as a chip or a chip system) of the intermediate device, and the present application does not limit this. The method comprises: receiving a first optical transport network (OTN) frame data stream. Obtaining a service layer clock from the first OTN frame data stream. Obtaining first phase difference information carried by a second OTN frame from the first OTN frame data stream, the first phase difference information being a sum of phase differences of one or more groups of adjacent two upstream devices in one or more upstream devices of the intermediate device, the phase difference of the one or more groups of adjacent two upstream devices being an integer number of nominal clock periods, wherein the nominal clock period is less than or equal to 10 ns. Generating a local phase difference according to a clock of the intermediate device and the service layer clock. Generating first information, the first information comprising second phase difference information or fault information, the second phase difference information being generated by accumulating the local phase difference to the first phase difference information, the second phase difference information being used to adjust a reference clock of the second OTN frame, the reference clock of the second OTN frame being used to recover a clock of the second OTN frame, the fault information indicating that the intermediate device has a clock abnormality. Sending the first information to a neighboring downstream device.

[0065] Based on the above scheme, when a device in the system finds that an upstream service layer clock is abnormal or a local clock of a local device is abnormal when calculating phase difference information, no new phase difference information is generated, but fault information is sent to a downstream device, so that a target device finally receiving the fault information no longer performs clock recovery, avoiding service sending failure and the like caused by clock recovery error, and improving the performance of the system.

[0066] In combination with the fifth aspect, in some implementations of the fifth aspect, the generating a local phase difference according to a clock of the intermediate device and the service layer clock comprises: when it is confirmed that the first phase difference information is received, recording a number N1 of periods of the nominal clock corresponding to the clock of the intermediate device, and recording a number N2 of periods of the nominal clock corresponding to the service layer clock; and calculating a difference between N1 and N2 as the local phase difference.

[0067] With reference to the fifth aspect, in some implementations of the fifth aspect, the confirming that the first phase difference information is received is determined by identifying a frame header of the second OTN frame.

[0068] With reference to the fifth aspect, in some implementations of the fifth aspect, the generating the local phase difference according to the clock of the intermediate device and the service layer clock comprises: determining a faster clock or a slower clock or an average clock as a reference clock according to a speed of the clock of the intermediate device and the service layer clock; and generating the local phase difference according to the reference clock.

[0069] With reference to the fifth aspect, in some implementations of the fifth aspect, when a time point of triggering the calculation of the local phase difference is met, a number N1 of periods of the nominal clock corresponding to the clock of the intermediate device and a number N2 of periods of the nominal clock corresponding to the service layer clock are recorded, the time point of triggering the calculation of the local phase difference is a time point at which a number of periods of the nominal clock corresponding to the clock of the intermediate device and a number of periods of the nominal clock corresponding to the service layer clock are equal to a preset expected period N, or the time point of triggering the calculation of the local phase difference is a time point at which a number of periods of the nominal clock corresponding to the clock of the intermediate device and a number of periods of the nominal clock corresponding to the service layer clock are equal to the preset expected period N, and the local phase difference is a difference between N1 and N2.

[0070] Based on the above scheme, when the local phase difference is calculated, the intermediate device can select a faster second OTN frame reference clock or a slower second OTN frame reference clock as a local reference clock by meeting the time point of triggering the calculation of the local phase difference, so as to improve the accuracy of clock recovery.

[0071] With reference to the fifth aspect, in some implementations of the fifth aspect, N=F×T, where F is a frequency of the nominal clock, and T is a period of generating the local phase difference.

[0072] With reference to the fifth aspect, in some implementations of the fifth aspect, the method further comprises: determining the nominal clock corresponding to the clock of the intermediate device as a reference clock according to the time point of triggering the calculation of the local phase difference, the reference clock being used to determine a detection period, or determining the nominal clock corresponding to the service layer clock as a reference clock according to the time point of triggering the calculation of the local phase difference.

[0073] With reference to the fifth aspect, in some implementations of the fifth aspect, the method further comprises: when an absolute value of the second phase difference information is greater than a preset threshold, splitting the second phase difference information into a plurality of partial phase difference information, the plurality of partial phase difference information being carried in a plurality of overhead areas of the second OTN frame sent by the intermediate device.

[0074] In some implementations of the fifth aspect, the method further comprises: obtaining a plurality of phase difference information of a plurality of bytes of each of a plurality of overhead areas of the second OTN frame. The first phase difference information is obtained according to the plurality of phase difference information.

[0075] In some implementations of the fifth aspect, the generating the fault information comprises: recording a number N1 of cycles of the nominal clock corresponding to the clock of the intermediate device. Recording a number N2 of cycles of the nominal clock corresponding to the service layer clock. When N1 is not in a preset interval, and / or, N2 is not in a preset interval, the fault information is generated.

[0076] In some implementations of the fifth aspect, the preset interval is [N×(1-20ppm), N×(1+20ppm)].

[0077] In some implementations of the fifth aspect, the generating the fault information comprises: recording a number N1 of cycles of the nominal clock corresponding to the clock of the intermediate device. Recording a number N2 of cycles of the nominal clock corresponding to the service layer clock. When a difference between N1 and N2 is not equal to -1, 0 or 1 within a preset time, the fault information is generated.

[0078] In some implementations of the fifth aspect, the preset time is T Nominal ×1 / (40ppm), or T Nominal ×25000, T Nominal is a cycle of the nominal clock.

[0079] In some implementations, the generating the fault information can be generated when the time of triggering the calculation of the local phase difference is met. That is, when the time of triggering the calculation of the local phase difference is met, the values of N1 and N2 are recorded, and when N1 is not in a preset interval, and / or, N2 is not in a preset interval, the fault information is generated. And / or, when a difference between N1 and N2 is not equal to -1, 0 or 1 within a preset time, the fault information is generated.

[0080] In some implementations of the fifth aspect, the first information is carried in an overhead area of a second OTN frame sent by the intermediate device, the first information occupies at least one byte, and at least one bit in the at least one byte is used to indicate that the information included in the first information is the second phase difference information or the fault information.

[0081] In some implementations of the fifth aspect, the first information includes fault information, and the fault information includes a number of nodes of the intermediate device that has failed from a destination device.

[0082] In a possible implementation of the fifth aspect, the number of nodes of the failed intermediate device from the destination device is carried by at least five bits in at least one byte occupied by the first information.

[0083] In a sixth aspect, an embodiment of the present application provides a system for clock recovery. The system includes a sending device and a destination device. Alternatively, the system includes a sending device, a destination device and at least one first device (also referred to as an intermediate device). The destination device is configured to perform the method in the first aspect or any possible implementation of the first aspect. Alternatively, the destination device is configured to perform the method in the third aspect or any possible implementation of the third aspect. The first device is configured to perform the method in the second aspect or any possible implementation of the second aspect. Alternatively, the first device is configured to perform the method in the fourth aspect or any possible implementation of the fourth aspect. Alternatively, the first device is configured to perform the method in the fifth aspect or any possible implementation of the fifth aspect.

[0084] In a seventh aspect, an embodiment of the present application provides an optical transport network (OTN) device. The device is configured to perform the method in any one of the first aspect to the sixth aspect. Specifically, the OTN device can include units and / or modules for performing the method in the first aspect or any possible implementation of the first aspect, or the OTN device can include units and / or modules for performing the method in the second aspect or any possible implementation of the second aspect, such as a processing module and a transceiver module, or the OTN device can include units and / or modules for performing the method in the third aspect or any possible implementation of the third aspect, such as a processing module and a transceiver module, or the OTN device can include units and / or modules for performing the method in the fourth aspect or any possible implementation of the fourth aspect, such as a processing module and a transceiver module, or the OTN device can include units and / or modules for performing the method in the fifth aspect or any possible implementation of the fifth aspect, such as a processing module and a transceiver module.

[0085] In an implementation, the OTN device can include units and / or modules for performing the method in the first aspect or any possible implementation of the first aspect, or units and / or modules for performing the method in the third aspect or any possible implementation of the third aspect, for a receiving end device. The transceiver can be a transceiver circuit, or an input / output interface. The processing module can be at least one processor. Optionally, the transceiver can be a transceiver circuit. Optionally, the input / output interface can be an input / output circuit.

[0086] Alternatively, the optical transport network OTN apparatus is a chip, a chip system or a circuit in a receiving device. The transceiver module can be an input / output interface, an interface circuit, an output circuit, an input circuit, a pin or related circuit on the chip, the chip system or the circuit, etc. The processing module can be at least one processor, a processing circuit or a logic circuit, etc.

[0087] In another implementation manner, the optical transport network OTN apparatus can include units and / or modules for performing the method provided by the second aspect or any of the implementation manners of the second aspect, or units and / or modules for performing the method provided by the fourth aspect or any of the implementation manners of the fourth aspect, or units and / or modules for performing the method provided by the fifth aspect or any of the implementation manners of the fifth aspect, for a transmitting device. The transceiver module can be a transceiver, or an input / output interface. The processing module can be at least one processor. Optionally, the transceiver can be a transceiver circuit. Optionally, the input / output interface can be an input / output circuit.

[0088] Alternatively, the optical transport network OTN apparatus is a chip, a chip system or a circuit in a transmitting device. The transceiver module can be an input / output interface, an interface circuit, an output circuit, an input circuit, a pin or related circuit on the chip, the chip system or the circuit, etc. The processing module can be at least one processor, a processing circuit or a logic circuit, etc.

[0089] In the eighth aspect, an embodiment of the present application provides a processor for executing the method provided by the above aspects. For the transmitting and acquiring / receiving operations of the processor, if there is no special description, or if it does not contradict the actual role or inherent logic in the related description, it can be understood as the processor output and receive, input, etc. operations, and can also be understood as the transmitting and receiving operations performed by the radio frequency circuit and the antenna, which are not limited by the present application.

[0090] In the ninth aspect, an embodiment of the present application provides a computer readable storage medium. The computer readable storage medium stores program code for execution by a device, and the program code includes code for executing the method provided by any of the implementation manners of the first aspect or the second aspect or the third aspect or the fourth aspect or the fifth aspect.

[0091] In the tenth aspect, an embodiment of the present application provides a computer program product containing instructions. When the computer program product runs on a computer, the computer is caused to execute the method provided by any of the implementation manners of the first aspect or the second aspect or the third aspect or the fourth aspect or the fifth aspect.

[0092] In an eleventh aspect, an embodiment of the present application provides a chip. The chip comprises a processor and a communication interface. The processor reads instructions stored on a memory through the communication interface, and executes the method provided in any one of the implementation manners of the first aspect or the second aspect or the third aspect or the fourth aspect or the fifth aspect.

[0093] Optionally, as an implementation manner, the chip further comprises a memory, and the memory stores a computer program or instructions. The processor is configured to execute the computer program or instructions stored on the memory, and when the computer program or instructions are executed, the processor is configured to execute the method provided in any one of the implementation manners of the first aspect or the second aspect or the third aspect or the fourth aspect or the fifth aspect.

[0094] The beneficial effects brought by the third aspect to the eleventh aspect can refer to the description of the beneficial effects of the first aspect or the second aspect or the fifth aspect, and will not be described here. BRIEF DESCRIPTION OF DRAWINGS

[0095] Figure 1 A schematic diagram of an OTN optical network system applicable to an embodiment of the present application.

[0096] Figure 2 A schematic diagram of a possible network device hardware structure.

[0097] Figure 3 A schematic diagram of a frame structure of an OTN frame applicable to an embodiment of the present application.

[0098] Figure 4 A schematic flowchart of a clock recovery method 400 provided by an embodiment of the present application.

[0099] Figure 5 A schematic diagram of a mapping relationship between a first OTN frame and a second OTN frame applicable to an embodiment of the present application.

[0100] Figure 6 A schematic diagram of a method for calculating a phase difference between two adjacent devices provided by an embodiment of the present application.

[0101] Figure 7 A schematic diagram of a first second OTN frame structure provided by an embodiment of the present application.

[0102] Figure 8 A schematic diagram of a second second OTN frame structure provided by an embodiment of the present application.

[0103] Figure 9 A schematic diagram of a third second OTN frame structure provided by an embodiment of the present application.

[0104] Figure 10A flowchart of a process of generating frequency offset by a target device is provided for embodiments of the present application.

[0105] Figure 11 A diagram of fluctuation of phase difference information over time is provided for embodiments of the present application.

[0106] Figure 12 A diagram of phase difference information received by a target device under a constraint is provided for embodiments of the present application.

[0107] Figure 13 A flowchart of a calculation process of the first frequency offset calculation module 1021.

[0108] Figure 14 A flowchart of a calculation process of the second frequency offset calculation module 1022.

[0109] Figure 15 A schematic flowchart of a method 1500 of clock recovery is provided for embodiments of the present application.

[0110] Figure 16 A flowchart of a processing process of an intermediate device is provided for embodiments of the present application.

[0111] Figure 17 A flowchart of a processing process of a target device is provided for embodiments of the present application.

[0112] Figure 18 A schematic flowchart of a method 1800 of clock recovery is provided for embodiments of the present application.

[0113] Figure 19 A diagram of a structure of the first information when a number of bytes occupied by the first information is one byte.

[0114] Figure 20 A schematic flowchart of a method 2000 of clock recovery is provided for embodiments of the present application.

[0115] Figure 21 A flowchart of a first process of calculating phase difference.

[0116] Figure 22 A flowchart of a second process of calculating phase difference.

[0117] Figure 23 Simulation comparison results of an intermediate device using a local clock as a reference clock and an embodiment of the present application using a unified faster or slower clock as a reference clock.

[0118] Figure 24 Simulation comparison results of an intermediate device using a local clock as a reference clock and an embodiment of the present application using a unified faster or slower clock as a reference clock.

[0119] Figure 25 Simulation results for the case where the intermediate device adopts a uniform faster or slower clock as the reference clock when the frequency offset is at the extreme (±20ppm).

[0120] Figure 26 A structure schematic diagram of an OTN device 1500 provided by an embodiment of the present application.

[0121] Figure 27 A structure schematic diagram of a possible OTN device provided by an embodiment of the present application.

[0122] Figure 28 A third flowchart of calculating the phase difference provided by an embodiment of the present application.

[0123] Figure 29 For Figure 28 Three possible types of time instants for triggering the calculation of the local phase difference.

[0124] Figure 30 A fourth flowchart of calculating the phase difference provided by an embodiment of the present application.

[0125] Figure 31 Clock performance obtained by simulating the scheme of calculating the phase difference when the intermediate device confirms the receipt of the first phase difference information. DETAILED DESCRIPTION

[0126] The technical solutions in the present application will be described below with reference to the accompanying drawings.

[0127] In order to facilitate the understanding of the embodiments of the present application, the following explanations are made.

[0128] First, the terms "first", "second", and the like as well as various numerical designations in the textual descriptions or the accompanying drawings of the embodiments of the present application shown below are only for the convenience of description, and do not have to be used to describe a specific order or sequence, and do not limit the scope of the embodiments of the present application. For example, different phase difference information is distinguished.

[0129] Second, the term "comprise" and any variations thereof in the embodiments of the present application shown below are intended to cover the non-exclusive inclusion, for example, a process, method, system, product or device comprising a series of steps or units does not have to be limited to only those steps or units clearly listed, but can include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0130] Third, in the embodiments of the present application, the word "exemplary" or "for example" is used to represent an example, an illustration or description, and the embodiment or design scheme described as "exemplary" or "for example" should not be interpreted as more preferred or more advantageous than other embodiments or design schemes. The word "exemplary" or "for example" is intended to present the relevant concept in a specific manner and facilitate understanding.

[0131] Fourth, in the embodiments of the present application, service data refers to services that can be carried by an optical transport network. For example, it can be an Ethernet service, a packet service, a wireless backhaul service, etc. Service data can also be referred to as service signal, customer data or customer service data. It should be understood that the type of service data is not limited in the embodiments of the present application.

[0132] Fifth, in the present application, "for indicating" includes direct indication and indirect indication. When describing that a certain information is used to indicate A, it includes that the information directly indicates A or indirectly indicates A, and does not mean that A must be carried in the information.

[0133] Sixth, in the embodiments of the present application shown below, only OTN frames in an optical transport network (OTN) are taken as examples to describe the embodiments, and it should be understood that the present application is also applicable to other carrying OTN frames, or metro transport network (MTN) frames, or new types of OTN frames and MTN frames that can be defined as the OTN technology and the MTN technology develop.

[0134] Seventh, in the embodiments of the present application, a device can also be referred to as a node or a node device, and a sending device can be referred to as a sending node, a sending end or a source node. Similarly, a receiving device can be referred to as a receiving end device, a receiving end or a destination device or a sink node. An intermediate device can be referred to as an intermediate node.

[0135] Eighth, in the embodiments of the present application, "at least one" means one or more, and "multiple" means two or more. The association relationship of the associated objects is described by "and / or", which means that there can be three kinds of relationships. For example, A and / or B can represent the following cases: A exists alone, A and B exist together, and B exists alone, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after it. "At least one of the following" or similar expressions means any combination of these items, including any combination of single item or multiple items. For example, at least one of a, b and c can represent: a, or b, or c, or a and b, or a and c, or b and c, or a, b and c, where a, b and c can be single or multiple.

[0136] Ninth, in the embodiments of the present application, the preset can include a predefinition, for example, a protocol definition. The "predefinition" can be implemented by pre-storing corresponding codes, tables or other means for indicating relevant information in the device, and the specific implementation manner is not limited in the present application.

[0137] Figure 1 A schematic diagram of an OTN optical network system applicable to the embodiments of the present application. Generally, the OTN optical network is connected by a plurality of devices through optical fibers, and different topological types such as linear, ring and mesh can be formed according to specific needs. Figure 1 In the OTN 100 shown, eight OTN devices 101, i.e., devices A-H, are included. The 102 indicates an optical fiber, which is used to connect two devices, and the 103 indicates a customer service interface, which is used to receive or send customer service data. As shown in the figure, Figure 1 The OTN 100 is used to transmit service data for customer devices 1-3. The customer devices are connected to the devices of the OTN through the customer service interface. For example, Figure 1 In the figure, the customer devices 1-3 are connected to the OTN devices A, H and F, respectively. In the figure, Figure 1 In the figure, when the customer device 1 needs to communicate with the customer device 3, it can send service data through the OTN devices A-F. For example, the OTN device A is a sending device, the OTN devices B-E are intermediate devices, and the OTN device F is a receiving device.

[0138] Generally, the OTN devices are divided into optical layer devices, electrical layer devices and optical-electrical hybrid devices. The optical layer device refers to a device capable of processing optical layer signals, for example, an optical amplifier (also known as an optical line amplifier) and an optical add-drop multiplexer. The optical amplifier is used to amplify the optical signal to support transmission over a longer distance while ensuring the specific performance of the optical signal. The optical add-drop multiplexer is used to transform the optical signal in space so that it can be output from different output ports (sometimes also referred to as directions). The electrical layer device refers to a device capable of processing electrical layer signals, for example, a device capable of processing OTN signals. The optical-electrical hybrid device refers to a device capable of processing optical layer signals and electrical layer signals. It should be noted that according to specific integration needs, an OTN device can integrate multiple different functions. The technical solutions provided by the present application are applicable to OTN devices containing electrical layer functions in different forms and integration degrees.

[0139] It should be noted that the data frame structure used by the OTN device in this application embodiment is the OTN frame, which is used to carry various service data and provide rich management and monitoring functions. The OTN frame can be an optical data unit frame (ODUk), ODUn, ODUflex, optical transport unit frame (OTUk), OTUn, or flexible OTN (FlexO) frame, etc. The difference between ODU and OTU frames is that an OTU frame includes both the ODU frame and OTU overhead. k represents different rate levels; for example, k=1 represents 2.5Gbps, k=4 represents 100Gbps; Cn represents a variable rate, specifically a positive integer multiple of 100Gbps. Unless otherwise specified, an ODU frame refers to any one of ODUk, ODUn, or ODUflex, and an OTU frame refers to any one of OTUk, OTUn, or FlexO. As OTN technology develops, new types of OTN frames may be defined, which will also apply to this application.

[0140] Figure 2 This is a schematic diagram of a possible network device hardware architecture. For example, Figure 1 Device A in the diagram. Specifically, OTN device 200 includes a tributary board 201, a cross-connect board 202, a circuit board 203, and an optical layer processing board (…). Figure 2 (Not shown) and system control and communication boards 204. The type and number of boards included in a network device may vary depending on the needs. For example, a network device acting as a core node may not have tributary boards 201. Alternatively, a network device acting as an edge node may have multiple tributary boards 201, or no optical cross-connect board 202. Furthermore, a network device that only supports electrical layer functions may not have an optical layer processing board.

[0141] The branch board 201, the cross board 202 and the line board 203 are used to process the electrical layer signal of the OTN. The branch board 201 is used to realize the receiving and sending of various customer services, such as SDH service, packet service, Ethernet service and front-haul service, etc. Further, the branch board 201 can be divided into a customer side optical transceiver module and a signal processor. The customer side optical transceiver module can also be referred to as an optical transceiver, which is used to receive and / or send service data. The signal processor is used to realize the mapping and demapping processing of the service data to the data frame. The cross board 202 is used to realize the switching of the data frame, and complete the switching of one or more types of data frames. The line board 203 mainly realizes the processing of the line side data frame. Specifically, the line board 203 can be divided into a line side optical module and a signal processor. The line side optical module can also be referred to as an optical transceiver, which is used to receive and / or send the data frame. The signal processor is used to realize the multiplexing and demultiplexing, or mapping and demapping processing of the line side data frame. The system control and communication type single board 204 is used to realize the system control. Specifically, information can be collected from different single boards, or control instructions can be sent to the corresponding single boards. It should be noted that, unless otherwise specified, a specific component (such as a signal processor) can be one or more, and the present application does not make any limitation. It should be noted that, the type of single board included in the device, and the functional design and number of the single board, are not limited by the present application. It should be noted that, in a specific implementation, the above two single boards can also be designed as one single board. In addition, the network device can also include a standby power supply, a fan for heat dissipation, etc.

[0142] Figure 3 A schematic diagram of the frame structure of the OTN frame suitable for the embodiments of the present application is shown. As shown in Figure 3 , the OTN frame is a 4-row and multi-column frame structure, including an overhead area and a payload area. In a possible example, the payload area of the OTN frame is divided into a plurality of payload blocks (PBs). Each PB occupies a fixed length (which can also be referred to as size) position in the payload area, for example, 128 bytes. Figure 3 In the OTN frame structure shown in Figure 3 , the first 4 rows and 16 columns are the overhead area of the OTU / ODU / optical payload unit (OPU) (used to carry ODUk overhead, OPU overhead, etc.), and the following is the OPU payload area. Specifically, the OTN frame structure can refer to the related description in the current protocol, which will not be described here.

[0143] As one of the key technologies in OTN technology, optical service unit (OSU) is mainly used to carry 10M-100Gbps rate customer service. Through OSU, low-speed small-particle service signals are carried, and then the OSU is mapped into ODUk / ODUflex, which can reduce the transmission delay of the service and solve the problem of low efficiency of carrying low-speed small-particle service in the original OTN technology. Since the correct service layer clock information recovered by the destination device in the OTN system depends on the correct mapping and demapping process between the OTN data frame and the service. At the same time, due to the division of low-speed small-particle services, the number of ports carrying services in the OTN system has increased dramatically. If each intermediate device directly recovers the service data loaded by each OSU data frame and regenerates the clock information corresponding to the device, this process will introduce extremely high processing complexity and huge overhead. Therefore, simplifying the clock recovery of the OSU service is a technical problem to be solved.

[0144] To solve the above problems, the application provides a clock recovery method. The phase difference information obtained by accumulating the phase difference (PD) generated between adjacent devices is used to make the destination device recover the clock of the OTN frame through the phase difference information. This method avoids the process of extracting the clock information of each device in the communication link, simplifies the processing flow of clock recovery, and realizes high-reliability clock recovery.

[0145] The clock recovery method provided by the application will be described in detail below with reference to the accompanying drawings.

[0146] Figure 4 A schematic flowchart of a clock recovery method 400 provided by an embodiment of the application is shown in FIG. 4. As shown in FIG. 4, the method 400 is a schematic flowchart from the perspective of device interaction, wherein the sending device can be an OTN device, or executed by a component (such as a chip or a chip system, etc.) of the OTN device. The receiving device can be an OTN device, or executed by a component (such as a chip or a chip system) of the OTN device. Figure 4

[0147] It should be understood that in the clock recovery method provided by the embodiment, there can be one or more intermediate devices, and of course in some scenarios, there can be no intermediate device. For the sake of simplicity of description, the clock recovery method process provided by the embodiment of the application will be described below by taking one intermediate device (i.e. intermediate device #1) as an example.

[0148] Specifically, Figure 4 As shown in FIG. 4, the method 400 includes the following steps.

[0149] S410, the sending device sends a first OTN frame data stream.​

[0150] Specifically, when the sending device is to transmit service data to the destination device, the sending device sends a first OTN frame data stream to the destination device. The first OTN frame data stream carries first phase difference information carried by a second OTN frame. The first OTN frame data stream refers to a frame format of the data stream being an OTN frame format.

[0151] For example, the first OTN frame is an ODU frame, for example, an ODUk frame or an ODUflex frame. The second OTN frame is an OSU frame. As shown, n OSU frames are interleaved and mapped in a payload area of one ODU frame. When each OSU frame includes 4N bytes, for any one time slot of the ODU frame, a part of the ODU frame is used to carry information of the n OSU frames. For example, for the first time slot of the ODU frame, the first byte of each of the n OSU frames can be used to carry information. The information carried by each byte of the OSU frame can be service data or padding. Figure 5

[0152] It should be noted that in the embodiments of the present application, the phase difference information carried by the second OTN frame (including the first phase difference information and the second phase difference information below) refers to a sum of phase differences of one or more groups of adjacent two devices in all devices passed by the second OTN frame.

[0153] In an implementable manner, the phase difference of the adjacent two devices (hereinafter taken the first device and the second device as an example, wherein the first device is an adjacent upstream device of the second device) is obtained by subtracting the period number of the reference clock of the second OTN frame of the two adjacent devices. It should be understood that when the phase difference is obtained in this manner, the phase difference is an integer, indicating an integer number of periods of deviation between the reference clocks of the second OTN frames of the adjacent two devices, which can be a positive integer, a negative integer or 0. For example, when the second device calculates the phase difference with the first device, the second device can obtain the period number of the reference clock of the second OTN frame of the first device and the period number of the local reference clock of the second OTN frame, and subtract the period number of the reference clock of the second OTN frame of the first device from the period number of the local reference clock of the second OTN frame to obtain the phase difference.

[0154] It should be noted that in the embodiments of the present application, the frequency interval used when calculating the period number of the reference clock of the second OTN frame is referred to as a nominal clock, that is, the frequency of the reference clock of the second OTN frame when the period number of the reference clock of the second OTN frame increases by 1. For example, the nominal clock can be 10 MHz, 78.125 MHz, 100 MHz or 300 MHz, etc. It should be understood that for each device, the nominal clock is the same.

[0155] ​Exemplarily, the reference clock of the second OTN frame of the first device acquired by the second device is obtained by dividing the service layer clock by a fixed multiple X, which can be preset in each device and is the same for each device. In other words, for each device, the ratio of the service layer clock corresponding to the first OTN frame data stream sent by the device to the reference clock of the local second OTN frame is the same fixed multiple, i.e., in a proportional relationship. Therefore, when the second device receives the first OTN frame data stream from the first device, the service layer clock can be acquired according to the first OTN frame data stream, and the reference clock of the second OTN of the first device can be obtained by dividing the acquired service layer clock by the fixed multiple X. The reference clock of the second OTN frame of the second device acquired by the second device can be the local crystal oscillator clock or the ratio of the local crystal oscillator clock and a fixed multiple Y. For example, when the order of magnitude of the local crystal oscillator clock and the reference clock of the second OTN frame is the same, the reference clock of the second OTN frame of the second device acquired by the second device can be the local crystal oscillator clock. It should be understood that, since the phase difference between adjacent devices is obtained by subtracting the period number of the reference clock of the adjacent device, the reference clock of the second OTN frame of the adjacent device is of the same order of magnitude, e.g., the same order of magnitude as the nominal clock. At this time, the fixed multiple X can be obtained by the multiple relationship of the service layer clock and the nominal clock, and similarly, the fixed multiple Y can be obtained by the multiple relationship of the local crystal oscillator clock of the second device and the nominal clock.

[0156] It should be noted that the service layer clock corresponding to the first OTN frame data stream refers to the sending period or sending frequency of the first OTN frame data stream.

[0157] It should be understood that, for first OTN frames of different rates, the service layer clock of the corresponding first OTN frame data stream is different. Therefore, when the ratio with the reference clock of the locally configured second OTN frame of the same is taken, different fixed multiples will be generated.

[0158] It should be understood that the period number of the reference clock of the second OTN frame of the first device and the second device is calculated with respect to the same preset time period. Exemplarily, as shown in Figure 6 , after the second device acquires the service layer clock, the period number n1 of the reference clock of the second OTN frame of the first device is calculated within a preset time; at the same time, the period number n2 of the reference clock of the local second OTN frame within the same time is calculated, and then the phase difference between the second device and the first device is obtained by subtracting n1 from n2. The phase difference between the second device and the first device can be n1-n2 or n2-n1, which is not limited by the present application.

[0159] But it should be understood that the calculation rule of the phase difference is uniform for any device through which the second OTN frame passes, that is, each device calculates the phase difference between the device and the adjacent upstream device by subtracting the number of cycles of the reference clock of the second OTN frame of the adjacent upstream device from the number of cycles of the reference clock of the second OTN frame of the device. Alternatively, each device calculates the phase difference between the device and the adjacent upstream device by subtracting the number of cycles of the reference clock of the second OTN frame of the device from the number of cycles of the reference clock of the second OTN frame of the adjacent upstream device.

[0160] It should be noted that the preset time can be understood as the period T in which the second device generates the phase difference between the first device or the period T in which the second device calculates the phase difference, which can be referred to as the phase difference calculation period T or the phase difference generation period T. In other words, the second device generates or calculates the phase difference once every period T.

[0161] In addition, it should be noted that, in order to make the frequency of the reference clock of the second OTN frame of each device more stable, the reference clock of the second OTN frame of each device is generated by a constant temperature crystal oscillator in the embodiments of the present application. It should be understood that the frequency of the reference clock of the second OTN frame generated by the constant temperature crystal oscillator is a stable frequency, which means that the frequency of the reference clock of the second OTN frame generated by the constant temperature crystal oscillator changes within a preset range over time.

[0162] Alternatively, the phase difference information carried by the second OTN frame is carried in the overhead area of the second OTN frame. For example, when the second OTN frame is an OSU frame, the phase difference information is carried in the overhead area of the OSU frame and occupies at least one byte in the overhead area of the OSU frame. For example, the phase difference information can be carried in the justification control (JC) overhead in the OSU frame and occupy one byte or multiple bytes of the JC overhead.

[0163] It should be understood that when the phase difference information carried by the second OTN frame occupies multiple bytes, the multiple bytes carry the same phase difference information, and the multiple bytes can be consecutive bytes or non-consecutive bytes. In some embodiments, when the phase difference information carried by the second OTN frame occupies multiple bytes, the receiving device can determine the phase difference information sent by the upstream device based on the multiple phase difference information through an algorithm such as majority decision. Through this scheme, the correction of the phase difference information can be realized when the system has an error code, thereby improving the anti-error code performance of the system.

[0164] It should be understood that, for the transmitting device, since the transmitting device is the one transmitting the first OTN frame data stream, the transmitting device does not generate a phase difference. Accordingly, the overhead area in the second OTN frame used to carry phase difference information does not carry any information. In other words, when the transmitting device transmits the first OTN frame, the first phase difference information carried in the first OTN frame can be understood as 0.

[0165] In some embodiments, the period of the overhead region carrying the phase difference information carried by the second OTN frame is less than or equal to half the period of the second OTN frame. For example, the period of the overhead region carrying the phase difference information carried by the second OTN frame can be half, one-third, or one-quarter of the period of the second OTN frame, etc., and this application does not limit this. In other words, in a second OTN frame, there can be multiple discontinuous overhead regions for phase difference information, and the time interval between two adjacent overhead regions can be called one period of the overhead region. The period of the overhead region carrying the phase difference information carried by the second OTN frame can be called the period of the overhead region of the second OTN frame, or the period of the phase difference information. This can be understood as the device acquiring the phase difference information carried by the second OTN frame acquiring the period of the phase difference information carried by the second OTN frame within the overhead region of the second OTN frame, etc.

[0166] Figure 7 This is a schematic diagram of a first type of second OTN frame structure provided in an embodiment of this application, wherein the period of the overhead region of the second OTN frame is equal to 1 / 2 of the period of the second OTN frame. For example... Figure 7 As shown, the transmission period of the second OTN frame is 2n time slots. After the first overhead area of ​​the second OTN frame is transmitted, the second overhead area is transmitted after n time slots. It should be understood that... Figure 7 The two overhead regions shown in the transmission period of the second OTN frame are merely examples and not limitations. That is, this application does not limit the number of overhead regions included in the transmission period of the second OTN frame.

[0167] Figure 8 This is a schematic diagram of a second type of second OTN frame structure provided in an embodiment of this application, wherein the period of the overhead region of the second OTN frame is equal to 1 / 3 of the period of the second OTN frame. For example... Figure 8 As shown, the transmission period of the second OTN frame is 3n time slots. After the first overhead area of ​​the second OTN frame is transmitted, the second overhead area is transmitted after n time slots. It should be understood that... Figure 8 The number of overhead regions included in the transmission period of the second OTN frame shown is for illustrative purposes only and is not a limitation.

[0168] Figure 9 This is a schematic diagram of a third type of second OTN frame structure provided in an embodiment of this application, wherein the period of the overhead region of the second OTN frame is equal to 1 / 4 of the period of the second OTN frame.Figure 9 As shown, the sending period of the second OTN frame is 4n time slots, and after the first overhead area of the second OTN frame is sent, the second overhead area is sent after n time slots. It should be understood that, Figure 9 The number of overhead areas contained in the sending period of the second OTN frame shown is only for illustration and not limitation.

[0169] In addition, in the embodiments of the present application, the service data refers to services that can be carried by OTN, including but not limited to: constant bit rate (CBR) services, variable bit rate (VBR) services, etc. CBR is encoded in a constant bit rate manner. As an example but not limitation, CBR services can include but are not limited to multimedia stream services, such as video stream services, virtual reality (VR) services, augmented reality (AR) services, etc. VBR is to determine the bit rate used at the moment according to the complexity of the service data. As an example but not limitation, VBR services can include voice services and / or video services, etc.

[0170] S420, the intermediate device #1 obtains the service layer clock and the first phase difference information of the second OTN frame from the first OTN frame data stream.

[0171] Specifically, after the intermediate device #1 receives the first OTN frame data stream, the service layer clock from the sending device is obtained from the payload area of the first OTN frame, and the second OTN frame is obtained by demapping, and the first phase difference information sent by the sending device is obtained from the overhead area of the second OTN frame. The first phase difference information is 0.

[0172] Specifically, the above-mentioned service layer clock can be that the sending device reads the service data stream according to the service layer clock at the sending device, and then encapsulates the read service data stream into the OTN frame payload area according to the service layer clock. After the intermediate device #1 receives the first OTN frame data stream, the service layer clock is obtained from the first OTN frame.

[0173] It should be understood that when there are multiple intermediate devices in the system, for other intermediate devices, such as intermediate device #N (N is not equal to 1), the first OTN frame data stream received by the intermediate device #N comes from the upstream intermediate device adjacent to the intermediate device #N. At this time, the intermediate device #N acquires the service layer clock sent by the upstream device adjacent thereto, and acquires the phase difference information of the second OTN frame, which is the sum of the phase difference of one or more groups of adjacent two upstream devices in one or more upstream devices of the intermediate device #N. Exemplarily, when the intermediate device #N is the intermediate device #3, at this time, there are also intermediate device #1 and intermediate device #2 between the sending device and the intermediate device #3, therefore, the first OTN frame data stream received by the intermediate device #3 comes from the intermediate device #2, and the service layer clock acquired at the same time is the service layer clock sent by the intermediate device #2. The phase difference information acquired by the intermediate device #3 is the sum of the phase difference between the intermediate device #1 and the sending device and the phase difference between the intermediate device #2 and the intermediate device #1.

[0174] S430, the intermediate device #1 generates the phase difference between the intermediate device #1 and the sending device according to the service layer clock.

[0175] Specifically, the intermediate device #1 calculates the reference clock of the second OTN frame of the sending device according to the service layer clock, and generates the phase difference by using the reference clock of the second OTN frame of the sending device and the reference clock of the local second OTN frame. The method of generating the phase difference can refer to the related description in S410 described above, for example, the phase difference between the intermediate device #1 and the sending device is calculated by using the difference of the number of cycles.

[0176] It should be understood that when there are multiple intermediate devices in the system, for other intermediate devices #N (N is not equal to 1), when the intermediate device #N calculates the phase difference with the upstream device adjacent thereto, the reference clock of the second OTN frame of the adjacent upstream device is also calculated according to the service layer clock, and the phase difference is calculated by using the difference of the number of cycles of the reference clock.

[0177] S440, the intermediate device #1 generates the second phase difference information.

[0178] Specifically, after the intermediate device #1 acquires the first phase difference information and calculates the phase difference between the intermediate device #1 and the sending device, the first phase difference information and the phase difference between the intermediate device #1 and the sending device are added to obtain the second phase difference information.

[0179] It should be understood that when the first phase difference information is carried in the overhead area of the second OTN frame, the second phase difference information generated by the intermediate device #1 is also carried in the overhead area of the second OTN frame.

[0180] It should be understood that when there are multiple intermediate devices in the network, for other intermediate device N (N is not equal to 1), after the intermediate device N calculates the phase difference between the intermediate device N and the upstream device adjacent to the intermediate device N, the new phase difference information is obtained by adding the phase difference information obtained from the first OTN frame data stream, and the new phase difference information is carried in the second OTN frame (for example, carried in the overhead area of the second OTN frame) and sent to the downstream device of the intermediate device N.

[0181] S450, the intermediate device #1 sends the first OTN frame data stream.

[0182] Specifically, when the intermediate device #1 generates the second phase difference information, the second phase difference information is carried in the second OTN frame, and at the same time, the second OTN frame is mapped into the first OTN frame, and the first OTN frame data stream is sent to the destination device (i.e. the downstream device of the first intermediate device #1).

[0183] It should be noted that since the intermediate device #1 processes the information carried in the first OTN frame data stream, for example, the intermediate device #1 sends the phase difference information carried in the second OTN frame carried in the first OTN frame data stream sent by the sending device in S410, which is the updated phase difference information of the phase difference information carried in the second OTN frame carried in the first OTN frame data stream sent by the sending device, so the first OTN frame data stream sent by the intermediate device #1 is different from the first OTN frame data stream sent by the sending device, but the frame format of the corresponding first OTN frame is the same. Similarly, the second OTN frame carrying the first phase difference information is different from the second OTN frame carrying the second phase difference information, but the frame format is the same, both of which are the second OTN frame format.

[0184] It should be understood that when the second phase difference information is carried in the overhead area of the second OTN frame, the period of the overhead area carrying the second phase difference information of the second OTN frame is less than or equal to 1 / 2 of the period of the second OTN frame.

[0185] When the destination device receives the first OTN data stream from the intermediate device #1, the destination device adjusts the reference clock of the second OTN frame according to the second phase difference information obtained from the first data stream and the service layer clock obtained from the first OTN data stream.

[0186] S460, the destination device obtains the service layer clock and the second phase difference information of the second OTN frame from the first OTN frame data stream.

[0187] Specifically, after receiving the first OTN frame data stream sent by the intermediate device #1, the destination device acquires the service layer clock from the first OTN frame data stream, and obtains the second OTN frame by demapping, and acquires the second phase difference information from the second OTN frame (for example, in the overhead area of the second OTN frame).

[0188] S470, the destination device adjusts the reference clock of the second OTN frame according to the service layer clock and the second phase difference information.

[0189] Specifically, after the destination device acquires the service layer clock, the destination device first calculates the reference clock of the second OTN frame of the intermediate device #1 according to the service layer clock, calculates the phase difference by comparing the reference clock of the second OTN frame of the intermediate device #1 with the reference clock of the second OTN frame of the destination device, and then sums the acquired second phase difference information and the calculated phase difference (which can be referred to as third phase difference information), and adjusts the reference clock of the second OTN frame through the third phase difference information, so that the adjusted reference clock of the second OTN frame of the destination device is within the preset error range of the reference clock of the second OTN frame sent by the sending device.

[0190] Wherein, when the destination device calculates the phase difference with the intermediate device #1, the difference between the number of cycles of the reference clock of the second OTN frame of the intermediate device #1 and the number of cycles of the reference clock of the second OTN frame of the destination device within a preset time can be obtained.

[0191] It should be understood that when the reference clock of the second OTN frame adjusted by the destination device is within the above-mentioned preset error range of the reference clock of the second OTN frame sent by the sending device, it can be considered that the destination device adjusts the reference clock of the second OTN frame to be consistent with the reference clock of the second OTN frame sent by the sending device.

[0192] Exemplarily, when the destination device adjusts the reference clock of the second OTN frame of the destination device according to the phase difference information (including the second phase difference information and the third phase difference information), the destination device first generates a frequency deviation according to the phase difference information, and adjusts the reference clock of the second OTN frame according to the frequency deviation.

[0193] In a possible implementation, the flowchart of the destination device generating the frequency deviation is as follows Figure 10The PD calculation module 101, the frequency calculation module 102 and the summation module 103 are modules in the destination device. Specifically, the PD calculation module is configured to input the service layer clock obtained by the destination device from the first OTN frame and output the phase difference between the destination device and the intermediate device #1. The summation module 103 is configured to sum the phase difference between the destination device and the intermediate device #1 output by the PD calculation module 101 and the second phase difference information obtained by the destination device from the second OTN frame and output third phase difference information. The frequency calculation module 102 is configured to calculate the frequency deviation according to the second phase difference information or the third phase difference information.

[0194] For example, it is assumed that the period in which the destination device calculates the phase difference between the destination device and the intermediate device #1 according to the obtained service layer clock (i.e., the period in which the destination device generates the phase difference) is a first period. Meanwhile, the period in which the destination device obtains the second phase difference information (for example, the period of the overhead area of the second OTN frame carrying the second phase difference information) is a second period. When the second period is less than the first period, there are some time instants at which the frequency deviation calculation module 102 of the destination device only obtains the second phase difference information when calculating the frequency deviation, at which time, the phase difference calculated by the destination device can be considered as 0, i.e., the third phase difference information input by the frequency deviation calculation module 102 is the sum of the second phase difference information and 0. When the frequency deviation calculation module 102 obtains the second phase difference information at the same time as obtaining the phase difference between the destination device and the intermediate device #1, the frequency deviation calculation module 102 simultaneously inputs the second phase difference information and the phase difference between the destination device and the intermediate device #1. Alternatively, when the frequency deviation calculation module 102 of the destination device only obtains the second phase difference information when calculating the frequency deviation, it can be considered that the frequency deviation calculation module 102 only calculates the frequency deviation according to the second phase difference information.

[0195] It should be understood that when the calculation module 102 calculates the frequency deviation according to the second phase difference information or the third phase difference information, the calculation is performed by multiplying the second phase difference information or the third phase difference information by the nominal clock.

[0196] Based on the above scheme, the method for restoring the clock provided by the embodiments of the present application uses the calculation of the phase difference of each device to replace the calculation of the frequency difference between adjacent devices to adjust the reference clock of the second OTN frame of the destination device, so as to restore the clock of the second OTN frame. The scheme of the present application can realize lossless estimation of the reference clock of the second OTN frame through phase difference accumulation, thereby being capable of improving the accuracy of the adjustment of the reference clock of the second OTN frame of the destination device, and further improving the accuracy of the restoration of the clock of the second OTN frame, and achieving the purpose of improving the system performance.

[0197] It should be noted that, with the accumulation of the transmission time of the service data stream, the phase difference between the destination device and the intermediate device #1 is accumulated, and the phase difference between the destination device and the intermediate device #1 is accumulated. Figure 11As shown, the third phase difference information generated at the destination device approaches 0, meaning the sum of phase differences received by the destination device from upstream devices tends to 0 over time. However, uneven fluctuations can be observed in local PDs. These fluctuations indicate the presence of low-frequency system noise in the accumulated sum of phase differences, i.e., systematic phase jitter exists when using the aforementioned phase information to recover the clock. To eliminate this systematic noise, the embodiments of this application uniformly design the parameters for each device, enabling the destination device to eliminate such systematic noise and phase jitter from the acquired sum of phase differences from upstream devices.

[0198] In one possible implementation, the frequency F of the reference clock for the second OTN frame of each device in the system is set to be greater than or equal to the rate of the second OTN frame, for example, it could be 10MHz-1GHz. Exemplarily, when the second OTN frame is an OSU frame, the frequency F of the reference clock for the second OTN frame of each device can be set to a minimum of 10MHz.

[0199] In another possible implementation, the period T of the phase difference information in the system is set to be greater than the period of the second OTN frame, for example, 3ms-6ms. That is, the period T of the phase difference information generated by each device with its upstream device is greater than the period of the second OTN frame. For example, when the second OTN frame is an OSU frame, the period T of the phase difference information generated by each device with its upstream device can be set to approximately 4ms. The period T of the phase difference information can be referred to the relevant explanations above, and will not be repeated here.

[0200] In another possible implementation, the frequency F of the reference clock for the second OTN frame of each device in the system and the period T of the phase difference information are set to satisfy the following relationship:

[0201] (F*T*20ppm)<10.

[0202] ppm stands for parts per million.

[0203] Figure 12 This application provides a phase difference distribution diagram under parameter constraints, as an embodiment of the present application. Figure 12 As shown, when the frequency F of the reference clock of the second OTN frame of each device is at least 10MHz, the period T of the phase difference information is 4ms, and the period of the overhead region carrying the phase difference information is 3ms, the phase difference information jitters in a symmetrical and sparse manner. That is, through the above constraint parameters, the systematic phase difference jitter can be regularized, so that the systematic noise can be optimized through natural phase correction.

[0204] In one feasible approach, to eliminate systematic phase jitter, combined with Figure 10 The module of the target device shown, Figure 13 This is a schematic diagram of the calculation process for the first type of frequency deviation calculation module 1021. (See diagram below.) Figure 13 As shown, when the frequency deviation calculation module 102 receives the input phase difference information, it can divide the phase difference information into two paths. One path uses a moving average (MA) algorithm to absorb the instantaneous phase difference fluctuations caused by quantization errors and natural recovery. The other path first accumulates the phase difference information (ACC), for example, through an accumulator, to generate the final phase difference value, and then uses a moving average algorithm to eliminate the fluctuations caused by the accumulated phase difference. Therefore, the frequency deviation output by the frequency deviation calculation module 102 is the result of multiplying the two outputs by their corresponding coefficients (including α and β) and then superimposing them.

[0205] It should be noted that the length of the moving average algorithm and the corresponding coefficient values ​​of the two paths can be designed to meet the target template specification, such as the G.813 template specification.

[0206] In one feasible way Figure 14 This is a schematic diagram of the calculation process for the second type of frequency deviation calculation module 1022. (See diagram below.) Figure 14 As shown, the frequency deviation calculation module 1022 first performs a nonlinear (NL) processing on the input phase difference information. This process reduces the nonlinear noise carried in the phase difference information. The result after nonlinear noise reduction is then divided into two paths. One path uses a moving average algorithm to absorb instantaneous phase difference fluctuations caused by quantization errors and natural recovery. The other path first accumulates the phase difference information (e.g., using an accumulator) to generate the final phase difference value, and then uses a moving average algorithm to eliminate fluctuations caused by the accumulated phase difference. The frequency deviation output by the frequency deviation calculation module 102 is the result of multiplying the two outputs by their corresponding coefficients and then summing them.

[0207] Optionally, the NL processing can constrain the maximum absolute value N of each phase difference information. For example, when N is 10, if the phase difference is negative, the phase difference is limited to being less than 0 and greater than -10. If the phase difference is positive, the phase difference is limited to being greater than 0 and less than 10. For example, assuming the phase difference information received by the target device is 20, -19, 5, 0, 11, the constrained phase difference information obtained after this nonlinear processing is 10, -10, 5, 0, 10.

[0208] For example, N can be selected with the goal of minimizing clock recovery error, such as making the error of the service layer clock of the recovered second OTN frame less than or equal to 40 ns.

[0209] Based on the above scheme, by nonlinear processing of the phase difference information, limiting the maximum or minimum value of each phase difference, the system nonlinear noise carried in the phase difference information can be reduced, thereby improving the accuracy of clock recovery.

[0210] It should be noted that, whether the intermediate device or the destination device calculates the phase difference with the adjacent device, an error will occur in the process of calculating the phase difference, but such error will not occur for a long time, therefore, in order to eliminate the jitter of the phase difference, in the embodiments of the present application, the destination device can use slow compensation to eliminate such error. For example, the reference clock of the second OTN frame can be adjusted in a time period T c , wherein T c satisfies: T c ≥T / (20ppm). Exemplarily, assuming that the period of the reference clock of the second OTN frame is 100ns, when the phase difference information received by the destination device is 1, the destination device can divide the period of 1 reference clock corresponding to the phase difference information of 1 into n equally spaced small periods, and the interval of the n small periods is calculated by T c / 100, that is, the destination device can compensate the received phase difference information once every T c / 100ns.

[0211] In addition, in order to reduce the jitter of the phase difference, in the embodiments of the present application, the intermediate device or the destination device can periodically increase or decrease the generated phase difference with a certain period T i . The period T i satisfies T i =(F*T*T / D i ), wherein i is equal to 1 or 2. When i is equal to 1, T1 corresponds to the period of the destination device, and D1 is the phase difference generated by the destination device with the adjacent upstream device. When i is equal to 2, T2 corresponds to the period of any intermediate device, and D2 is the phase difference generated by the arbitrary intermediate device with the adjacent upstream device. Exemplarily, the process is described by taking any intermediate device as an example. Assuming that the phase difference generated by the arbitrary intermediate device is 11, the intermediate device can first divide 11 into 10+1, and when generating the phase difference information, use 10 to generate the phase difference information sent to the downstream device, and then send 1 to the downstream device every period T2, and after sending n times, do not send 1 in the subsequent n*T2 time.

[0212] Figure 15 A schematic flowchart of a clock recovery method 1500 provided in the embodiments of the present application is shown in FIG. 15. As shown in FIG. 15, the method 1500 comprises the following steps. Figure 15As shown, the method 1500 is a schematic flowchart shown from the perspective of device interaction, wherein the sending device, the intermediate device (including any one of the intermediate device #1 to the intermediate device #N) and the destination device can be OTN devices or be executed by components (such as chips or chip systems, etc.) of the OTN devices.

[0213] Specifically, Figure 15 As shown, the method 1500 includes the following steps.

[0214] S1501, the sending device sends a first OTN frame data stream.

[0215] Specifically, when the sending device wants to transmit service data to the destination device, the sending device sends the first OTN frame data stream to the destination device. Wherein the first OTN frame data stream refers to the frame format of the data stream is the first OTN frame format.

[0216] S1502, the intermediate device #1 obtains the service layer clock and the first phase difference information of the second OTN frame from the first OTN frame data stream.

[0217] Specifically, the intermediate device #1 receives the first OTN frame data stream sent by the sending device, and obtains the service layer clock and the first phase difference information of the second OTN frame from the first OTN frame data stream.

[0218] Wherein, the service layer clock refers to the sending period or sending frequency of the first OTN frame data stream. That is, the sending device reads the service data stream according to the service layer clock, then encapsulates the read service data stream into the first OTN frame payload area according to the service layer clock, and sends the first OTN frame data stream to the intermediate device #1, so that the intermediate device #1 can obtain the service layer clock from the first OTN frame data stream after receiving the first OTN frame data stream. At the same time, the intermediate device #1 receives the first OTN frame data stream, obtains the second OTN frame by demapping, and obtains the first phase difference information from the obtained second OTN frame.

[0219] In some embodiments, the first phase difference information is carried in at least one overhead area of the second OTN frame. For example, when the second OTN frame contains a plurality of overhead areas, one first phase difference information can be carried in each of the plurality of overhead areas contained in the second OTN frame. The first phase difference information carried in the plurality of overhead areas can be the first phase difference information generated at the same time by the sending device or the phase difference information generated at different times by the sending device. If the first phase difference information carried in the plurality of overhead areas is the first phase difference information generated at the same time by the sending device, the sending device can carry the first phase difference information generated at the same time in different overhead areas sent at different times, so that the intermediate device #1 can more accurately determine the first phase difference information by majority decision or other algorithm based on the first phase difference information carried in the plurality of overhead areas of the second OTN frames received continuously. In addition, the plurality of bytes can be non-consecutive bytes to further improve the system error code performance. If the first phase difference information carried in the plurality of overhead areas is the phase difference information generated at different times by the sending device, since the plurality of overhead areas of the second OTN frame are sent to the intermediate device #1 at different times by the sending device, the sending device can carry the first phase difference information generated at different times in the overhead areas sent at different times, so that the intermediate device #1 can obtain the first phase difference information sent by the sending device at different times from the overhead areas of the second OTN frames received at different times.

[0220] In other embodiments, the first phase difference information can occupy at least one byte in the overhead area of the second OTN, i.e., the first phase difference information is carried in a plurality of bytes in the overhead area of the second OTN frame.

[0221] For example, if the number of bytes occupied by the first phase difference information is 1, the at least one byte in the overhead area of the second OTN occupied by the first phase difference information can mean that 1 byte is used to carry 1 first phase difference information or a plurality of bytes are used to carry a plurality of same first phase difference information. When a plurality of bytes are used to carry a plurality of first phase difference information, a plurality of bytes can be used to repeatedly transmit the same first phase difference information in at least one overhead area of the second OTN frame, so that the intermediate device #1 can obtain a plurality of first phase difference information from one overhead area of the second OTN frame. By using this kind of multiple retransmission mode, the situation that the first phase difference information obtained by the intermediate device #1 is inaccurate when the system generates an error code can be avoided. For example, the intermediate device #1 can determine more accurate first phase difference information by majority decision or other algorithm based on the plurality of first phase difference information obtained from one overhead area of the second OTN frame.

[0222] If the first phase difference information occupies multiple bytes, the first phase difference information can occupy at least one byte in the overhead area of the second OTN. This can mean that one first phase difference information is carried by multiple bytes or multiple same first phase difference information is carried by multiple bytes. If one first phase difference information is carried by multiple bytes, it can be agreed that the number of bytes carrying the first phase difference information in an overhead area is multiple.

[0223] Specifically, the first phase difference information is the sum of phase differences of one or more groups of adjacent two upstream devices in the intermediate device #1, wherein the phase difference of one or more groups of adjacent two upstream devices is an integer number of nominal clock periods, and the nominal clock period is less than or equal to 10 ns.

[0224] It should be understood that since the upstream devices of the intermediate device #1 are only sending devices, there is no sum of phase differences of one or more groups of adjacent two upstream devices in the intermediate device #1. At this time, the first phase difference information can be considered as 0.

[0225] In some embodiments, when the first phase difference information is carried in the overhead area of the second OTN, the sending device can record 0 in the overhead area of the second OTN and send it to the intermediate device #1, or the sending device does not record any phase difference information in the overhead area of the second OTN.

[0226] S1503, the intermediate device #1 generates a local phase difference according to the clock of the intermediate device #1 and the service layer clock.

[0227] Specifically, the intermediate device records the number N1 of periods of the nominal clock corresponding to the clock of the intermediate device #1 and the number N2 of periods of the nominal clock corresponding to the service layer clock, and obtains the local phase difference by subtracting N1 from N2.

[0228] It should be noted that for the intermediate device #1, there is a physical crystal oscillator clock, which is the clock of the intermediate device #1, also known as the local clock of the intermediate device #1. When the intermediate device #1 obtains the upstream service layer clock, the intermediate device #1 takes the period of the nominal clock as the time interval, calculates the time experienced when the period of the local clock reaches the expected period N, and at the same time calculates the number of periods of the service layer clock in the time, and obtains the local phase difference by subtracting the two period numbers. Wherein, the expected period N is a preset period number.

[0229] S1504, the intermediate device #1 accumulates the local phase difference to the first phase difference information to generate the second phase difference information.

[0230] In particular, the intermediate device #1 sums the generated local phase difference with the acquired first phase difference information to obtain second phase difference information.

[0231] S1505, the intermediate device #1 sends the first OTN frame data stream to the adjacent downstream intermediate device.

[0232] In particular, when the intermediate device #1 generates the second phase difference information, the intermediate device #1 carries the second phase difference information in the second OTN frame, maps the second OTN frame into the first OTN frame, and sends the first OTN frame data stream to the adjacent downstream device of the first intermediate device #1.

[0233] It should be noted that the intermediate device #1 processes the information carried by the received first OTN frame data stream, and therefore, the first OTN frame data stream sent by the intermediate device #1 is not completely the same as the first OTN frame data stream sent by the sending device. That is, the data contents carried in the two data streams are different, but the frame formats of the corresponding first OTN frames are the same. Similarly, the second OTN frame carried by the first OTN frame data stream sent by the sending device is different from the second OTN frame carried by the first OTN frame data stream sent by the intermediate device #1, the former is the second OTN frame carrying the first phase difference information, and the latter is the second OTN frame carrying the second phase difference information, that is, the contents carried by the two second OTN frames are different, but the frame formats are the same, both are the second OTN frame format.

[0234] It should be understood that when the first phase difference information is carried in the overhead area of the second OTN frame, the second phase difference information generated by the intermediate device #1 is also carried in the overhead area of the second OTN frame.

[0235] It should be understood that in S1502, the intermediate device #1 acquires the service layer clock and the first phase difference information of the second OTN frame from the first OTN frame data stream only for the purpose of illustrating that the information that the intermediate device needs to acquire from the first OTN frame data stream includes the service layer clock and the first phase difference information of the second OTN frame, and it cannot be represented that the service layer clock and the first phase difference information of the second OTN frame are acquired at the same time. Similarly, in S1503, the intermediate device #1 generates the local phase difference according to the local clock of the intermediate device #1 and the service layer clock can be before or after the intermediate device #1 acquires the first phase difference information of the second OTN frame, which is not limited by the present application.

[0236] S1506, the intermediate device #N receives the first OTN frame data stream from the adjacent upstream intermediate device.

[0237] S1507, the intermediate device #N acquires the service layer clock and the first phase difference information of the second OTN frame from the first OTN frame data stream.

[0238] It should be understood that the service layer clock obtained by the intermediate device #N is the transmission period or transmission frequency of the first OTN frame data stream sent by the adjacent upstream intermediate device of the intermediate device #N, and the first phase difference information of the second OTN frame obtained by the intermediate device #N is the first phase difference information carried in the second OTN frame carried in the first OTN frame data stream sent by the adjacent upstream intermediate device of the intermediate device #N. The first phase difference information is the sum of the phase differences of all upstream devices of the intermediate device #N and the phase difference of a plurality of adjacent two upstream devices, including the phase difference calculated by the intermediate device #1 and the transmission device (also referred to as the local phase difference of the intermediate device #1), the phase difference calculated by the intermediate device #2 and the intermediate device #1 (also referred to as the local phase difference of the intermediate device #2), the phase difference calculated by the intermediate device #3 and the intermediate device #3 (also referred to as the local phase difference of the intermediate device #3) … The sum of the phase difference calculated by the intermediate device # (N-1) and the intermediate device # (N-2) (also referred to as the local phase difference of the intermediate device # (N-1) ). It should be understood that the phase difference of the plurality of adjacent two upstream devices is an integer number of nominal clock periods. The nominal clock period is less than or equal to 10 ns.

[0239] S1508, the intermediate device #N generates a local phase difference according to the clock of the intermediate device #N and the service layer clock.

[0240] S1509, the intermediate device #N accumulates the local phase difference to the first phase difference information to generate the second phase difference information.

[0241] S1510, the intermediate device #N sends the first OTN frame data stream to the destination device.

[0242] It should be noted that the second phase difference information generated by the intermediate device #N is carried in the overhead area of the second OTN frame carried in the first OTN frame data stream sent by the intermediate device #N to the destination device.

[0243] In some embodiments, the second phase difference information is carried in at least one overhead area of the second OTN frame, i.e., the second phase difference information is carried in a plurality of overhead areas of the second OTN frame. Exemplarily, when the second OTN frame contains a plurality of overhead areas, one second phase difference information can be carried in each of the plurality of overhead areas contained in the second OTN frame. The second phase difference information carried in the plurality of overhead areas can be the second phase difference information sent by the intermediate device #N at the same time or the second phase difference information sent by the intermediate device #N at different times. If the second phase difference information carried in the plurality of overhead areas is the second phase difference information sent by the intermediate device #N at the same time, the intermediate device #N can carry the second phase difference information generated at the same time in different overhead areas sent at different times, at this time, the destination device can determine more accurate second phase difference information by majority decision algorithm or the like by the second phase difference information carried in the overhead areas of the plurality of second OTN frames received continuously. If the second phase difference information carried in the plurality of overhead areas is the phase difference information sent by the intermediate device #N at different times, the intermediate device #N can carry the second phase difference information generated at different times in the overhead areas sent at different times, so that the destination device obtains the second phase difference information sent by the intermediate device #N at different times in the overhead areas of the second OTN frames received at different times.

[0244] In some embodiments, the second phase difference information can occupy at least one byte in the overhead area of the second OTN. For example, if the second phase difference information occupies one byte, the at least one byte in the overhead area of the second OTN can mean that one byte is used to carry one second phase difference information or multiple bytes are used to carry multiple same second phase difference information. When multiple bytes are used to carry multiple second phase difference information, the multiple bytes in the at least one overhead area of the second OTN frame can be used to repeatedly transmit the same second phase difference information. In this way, the destination device can obtain multiple second phase difference information from one overhead area of the second OTN frame. In this way, the system can avoid the situation that the second phase difference information obtained by the destination device is inaccurate when the system generates an error code. For example, the destination device can determine more accurate second phase difference information by using majority decision algorithm or the like on the multiple second phase difference information obtained from one overhead area of the second OTN frame. In addition, the multiple bytes can be non-continuous bytes to further improve the anti-error code performance of the system. If the second phase difference information occupies multiple bytes, the at least one byte in the overhead area of the second OTN can mean that when the second phase difference information cannot be completely carried by one byte, multiple bytes in at least two adjacent overhead areas are used to carry the second phase difference information. That is, the destination device needs to continuously receive multiple overhead areas to obtain the complete second phase difference information. This is because, as the phase difference information accumulates, the absolute value of the second phase difference information will become larger, so that the byte originally used to carry the second phase difference information cannot completely carry the correct second phase difference information because the absolute value of the second phase difference information exceeds the preset threshold. At this time, the intermediate device #N can split the second phase difference information into multiple partial phase difference information and carry the complete second phase difference information by using multiple bytes in one overhead area. That is, the second phase difference information can occupy at least one byte in the overhead area of the second OTN, that is, the second phase difference information is carried in multiple overhead areas of the overhead area of the second OTN frame. It should be understood that multiple overhead areas can also be used to carry multiple second phase difference information occupying multiple bytes at the same time or multiple second phase difference information occupying multiple bytes at different times.

[0245] It should be understood that other related descriptions of S1507-S1510 can refer to the above S1502-S1505, which will not be described here.

[0246] S1511, the destination device obtains the service layer clock and the first phase difference information of the second OTN frame from the first OTN frame data stream.

[0247] Specifically, the destination device receives the first OTN frame data stream sent by the intermediate device #N, and obtains the service layer clock and the first phase difference information of the second OTN frame from the first OTN frame data stream.

[0248] It should be understood that the service layer clock obtained by the destination device is the sending period or frequency of the intermediate device #N sending the first OTN frame data stream, and the first phase difference information of the second OTN frame obtained by the destination device is the first phase difference information carried in the second OTN frame carried in the first OTN frame data stream sent by the intermediate device #N. The first phase difference information is the sum of the phase difference of a plurality of adjacent two upstream devices of all upstream devices of the intermediate device #N, including the phase difference calculated by the intermediate device #1 with the sending device (also referred to as the local phase difference of the intermediate device #1), the phase difference calculated by the intermediate device #2 with the intermediate device #1 (also referred to as the local phase difference of the intermediate device #2), the phase difference calculated by the intermediate device #3 with the intermediate device #3 (also referred to as the local phase difference of the intermediate device #3), and the phase difference calculated by the intermediate device #N with the intermediate device #(N-1) (also referred to as the local phase difference of the intermediate device #N). It should be understood that the phase difference of the plurality of adjacent two upstream devices is an integer number of nominal clock periods. The nominal clock period is less than or equal to 10 ns.

[0249] Other related descriptions of S1511 can be referred to S1502 described above, which will not be described here.

[0250] In S1512, the destination device generates a local phase difference according to the reference clock of the second OTN frame of the destination device and the service layer clock.

[0251] The related description of the process can be referred to S1503 described above, or can be referred to S1508 described above, which will not be described here. The reference clock of the second OTN frame of the destination device can be referred to as the reference clock of the local second OTN frame of the destination device, which can be obtained by the local clock of the destination device.

[0252] It should be understood that the intermediate device generates the phase difference of the intermediate device by using the local clock of the intermediate device, and the local clock of the intermediate device does not distinguish the second OTN frame service. In other words, when the intermediate device generates the local phase difference of the intermediate device, one phase difference corresponds to all the second OTN frames in the first OTN frame. When the destination device performs clock recovery, the clock of each second OTN frame needs to be recovered, therefore, when the destination device calculates the local phase difference, the reference clock of the second OTN frame of the destination device needs to be used, and the reference clock of the second OTN frame of the destination device is realized by a digital method, for example, the local crystal oscillator clock of the destination device is divided into different clocks according to different second OTN frames.

[0253] S1513, the destination device accumulates the local phase difference to the first phase difference information to generate second phase difference information.

[0254] The related description of the process can refer to S1504 described above, or can refer to S1509 described above, which will not be described here.

[0255] S1514, the destination device adjusts the clock control signal of the reference clock of the second OTN frame of the destination device according to the second phase difference information.

[0256] Specifically, when the destination device adjusts the reference clock of the second OTN frame of the destination device, the reference clock of the second OTN frame of the destination device is adjusted to be consistent with the reference clock of the second OTN frame of the sending device (it can be understood that it is within the preset range), when the reference clock of the second OTN frame of the destination device is adjusted to be consistent with the reference clock of the second OTN frame of the sending device, the second phase difference information should be 0, so the destination device can determine the offset of the reference clock of the second OTN frame of the destination device according to the second phase difference information, and generate the control signal in the opposite direction of the offset. Exemplarily, when the second phase difference information is positive, for example, 1, it means that the reference clock of the second OTN frame of the destination device is faster than the reference clock of the second OTN frame of the sending device, at this time the control signal is -1.

[0257] S1515, the destination device adjusts the reference clock of the second OTN frame according to the clock control signal.

[0258] Specifically, the destination device adjusts the reference clock of the second OTN frame through the clock control signal, so that the adjusted reference clock of the second OTN frame of the destination device is within the preset error range with the reference clock of the second OTN frame sent by the sending device.

[0259] It should be understood that when the adjusted reference clock of the second OTN frame of the destination device is within the above-mentioned preset error range with the reference clock of the second OTN frame sent by the sending device, it can be considered that the destination device adjusts the reference clock of the second OTN frame to be consistent with the reference clock of the second OTN frame sent by the sending device.

[0260] It should be noted that in the above-mentioned method 1500 of the embodiments of the present application, the first phase difference information can be understood as the phase difference information received by any one device other than the sending device or the phase difference information sent by the sending device, and the second phase difference information is understood as the phase difference information generated by the any one device other than the sending device. It should be understood that for different devices, the first phase difference information received is different, and the second phase difference information generated is also different. That is, when understanding the first phase difference information and the second phase difference information in the embodiments of the present application, it is necessary to understand the receiving device of the first phase difference information and the generating device of the second phase difference information.

[0261] It should be noted that the processing procedure of other intermediate devices not shown in the above embodiments can refer to the processing procedure of the intermediate device #1 or the intermediate device #N, which will not be described herein. Figure 15 It should be noted that the processing procedure of other intermediate devices not shown in the above embodiments can refer to the processing procedure of the intermediate device #1 or the intermediate device #N, which will not be described herein.

[0262] It should be understood that, in the embodiments of the present application, when any one of the intermediate devices or the destination device calculates the local phase difference, the service layer clock obtained by the device is the service layer clock sent by the adjacent upstream device, i.e., the service layer clock used for calculating the local phase difference is the upstream service layer clock. For the intermediate device, when the second phase difference information is generated and sent to the downstream device through the first OTN frame data stream, the first OTN frame data stream is encapsulated into the first OTN frame by using the local service layer clock of the intermediate device generating the second phase difference information for sending. In other words, for any one of the intermediate devices, the service layer clock corresponding to the input first OTN frame data stream is not the same as the service layer clock corresponding to the sent first OTN frame data stream.

[0263] It should be noted that, in the embodiments of the present application, the overhead area used for carrying the phase difference information (including the first phase difference information and the second phase difference information) can be the reserved bytes in the original overhead area of the multiplexed second OTN frame, or the bytes divided from the original payload area of the second OTN frame for carrying the phase difference information.

[0264] In some embodiments, the first OTN frame can be an ODU frame, for example, can be an ODUk frame or an ODUflex frame. The second OTN frame can be an OSU frame.

[0265] Figure 16 The processing procedure of the intermediate device provided in the embodiments of the present application is shown in the figure. Specifically, the intermediate device receives the ODU data stream from the adjacent upstream device, and demaps the OSU from the ODU data stream to obtain the service layer clock and the first phase difference information. The intermediate device calculates the period number of the nominal clock corresponding to the service layer clock and the period number of the nominal clock corresponding to the clock of the intermediate device, respectively, and obtains the local phase difference by subtracting the period number of the nominal clock corresponding to the clock of the intermediate device from the period number of the nominal clock corresponding to the service layer clock. At the same time, the intermediate device sums the first phase difference information and the local phase difference to obtain the second phase difference information, and records the second phase difference information in the switched OSU frame. Subsequently, the intermediate device maps the recorded second phase difference information in the OSU frame into the ODU frame to generate the ODU frame data stream, and sends the ODU frame data stream to the adjacent downstream device.

[0266] Figure 17The processing flow schematic diagram of the target device provided in the embodiments of the present application is shown. Specifically, the target device receives the ODU frame data stream from the upstream adjacent device, and demaps the OSU frame from the ODU frame data stream, and obtains the service layer clock and the first phase difference information. The target device calculates the number of cycles of the nominal clock corresponding to the service layer clock and the number of cycles of the nominal clock corresponding to the reference clock of the OSU frame of the target device (obtained through the local clock of the target device) respectively, and obtains the local phase difference by subtracting the number of cycles of the nominal clock corresponding to the reference clock of the OSU frame of the target device from the number of cycles of the nominal clock corresponding to the service layer clock. Meanwhile, the target device sums the first phase difference information and the local phase difference to obtain the second phase difference information. Subsequently, the target device generates the control signal according to the second phase difference information, and performs clock recovery on each OSU frame service data stream in the ODU frame data stream by using the control signal, and outputs the OSU frame data stream. The OSU frame data stream output by the target device can be understood as the data information of the OSU frame, including the service data and the overhead.

[0267] In the method for recovering the clock provided in the embodiments of the present application, the intermediate device only needs to record the phase difference information representing the local clock offset of the intermediate device, and transmit the phase difference information to the target device. The target device adjusts the reference clock of the second OTN frame by using the obtained phase difference information, so as to achieve the purpose of recovering the clock of the second OTN frame. This scheme does not require the intermediate device to recover the clock of the second OTN frame, and at the same time, by quantifying the clock offset by using the phase difference information, the error (caused by the fact that only real numbers can be transmitted when the frequency difference is transmitted) that cannot be corrected when the clock offset is quantified by using the frequency can be avoided. Therefore, the clock recovery method provided in the embodiments of the present application can simplify the clock recovery process, and at the same time, can improve the accuracy of adjusting the reference clock of the second OTN frame, and thus achieve the purpose of improving the system performance.

[0268] In some scenarios, when the reference clock of the OTN device in the system is suddenly abnormal, the calculation of the phase difference information will be wrong. In order to ensure the accuracy of the phase difference information, and at the same time, avoid the waste of resources caused by transmitting the wrong phase difference information, the embodiments of the present application propose a method for recovering the clock. When a device in the system finds that the obtained service clock is abnormal, or the local clock of the device is abnormal, the device no longer generates new phase difference information, but transmits the fault information to the downstream device through the overhead area of the second OTN frame, so that the target device that finally receives the fault information no longer performs clock recovery, and avoids the situation that the service transmission fails due to the clock recovery error, and thus achieves the purpose of improving the performance of the system. The method is executed by the intermediate device in the system or by the components of the intermediate device.

[0269] In the following, the embodiments of the present application are described in combination with Figure 18 , and in the following Figure 15The clock recovery method 1800 provided by the embodiments of the present application is executed by any one of the intermediate devices in the system. The following takes the intermediate device #1 as an example for illustration. As shown in Figure 18 The method includes the following steps.

[0270] S1801, receiving a first OTN frame data stream.

[0271] S1802, obtaining a service layer clock and first phase difference information of a second OTN frame from the first OTN frame data stream.

[0272] S1803, generating a local phase difference according to the clock of the intermediate device #1 and the service layer clock.

[0273] Specifically, the intermediate device #1 records the number N1 of cycles of the nominal clock corresponding to the clock of the intermediate device #1, and records the number N2 of cycles of the nominal clock corresponding to the service layer clock, and calculates the difference between N1 and N2 as the local phase difference.

[0274] The other related descriptions in S1801 to S1803 above can be referred to S1501 to S1503 in the method 1500 shown in Figure 15 The method 1500 shown in

[0275] S1804, generating first information.

[0276] The first information includes the second phase difference information or fault information.

[0277] Specifically, when the number N1 of cycles of the nominal clock corresponding to the clock of the intermediate device #1 recorded by the intermediate device #1 and the number N2 of cycles of the nominal clock corresponding to the service layer clock recorded by the intermediate device #1 belong to a preset interval, and when the difference between N1 and N2 is equal to -1, 0 or 1 within a preset time, the intermediate device #1 accumulates the local phase difference to the first phase difference information to generate the second phase difference information. When at least one of the following conditions is met, the intermediate device #1 generates the fault information: the number N1 of cycles of the nominal clock corresponding to the clock of the intermediate device #1 recorded by the intermediate device #1 does not belong to the preset interval, the number N2 of cycles of the nominal clock corresponding to the service layer clock recorded by the intermediate device #1 does not belong to the preset interval, and the difference between N1 and N2 is not equal to -1, 0 or 1 within the preset time. The preset interval is:

[0278] [N×(1-20ppm), N×(1+20ppm)],

[0279] The preset time is T Nominal ×1 / (40ppm), or T Nominal ×25000, T NominalThe period of the nominal clock.

[0280] It should be noted that in the OTN network, the actual frequency deviation of the device is usually ± 20ppm, and the above preset interval is used to detect abnormal frequency deviation outside ± 20ppm of the system, and the preset time is used to detect the burst frequency deviation of the device.

[0281] S1805, sending first information.

[0282] It should be noted that when the intermediate device #1 detects that no fault occurs, the first information is second phase difference information, and when the intermediate device #1 detects that a fault occurs, the first information is fault information. It should be understood that the first information is carried in at least one overhead of the second OTN frame. The number of bytes occupied by the first information is at least one byte, wherein at least one bit in the at least one byte is used to indicate that the information included in the first information is second phase difference information or fault information. Exemplarily, Figure 19 The structure diagram of the first information when the number of bytes occupied by the first information is one byte. Wherein, when the highest bit of the one byte is 0, it is used to indicate that the information included in the first information is second phase difference information, and the second information is carried on the other 7 bits. The highest bit is 1 to indicate that the information included in the first information is fault information.

[0283] Optionally, when the first information is fault information, the fault information includes the number of devices that have failed, i.e. the number of nodes of the intermediate device #1 that have failed from the destination device. The number of devices that have failed can be indicated by a plurality of bits in the remaining 7 bits, such as Figure 19 As shown, it can be indicated by the lower 5 bits. Exemplarily, when the intermediate device #1 determines that the clock of the intermediate device #1 is abnormal, the fault information is generated, 1 is recorded in the indication domain for indicating the number of devices that have failed (such as the above Figure 19 5 bits) and the fault information recording the number of fault devices is sent to the downstream device. When the downstream device receives the fault information, the indication domain indicating the number of fault devices can be counted in sequence, so that the destination device can determine the position of the intermediate device #1 that has failed according to the number recorded in the indication domain after receiving the fault information.

[0284] Optionally, the first information can also include confirmation information, which is used to indicate that the downstream device confirms that the first information is fault information. As Figure 19As shown, the second higher bit can be used to indicate. For example, when the downstream intermediate device of the intermediate device #1, such as the intermediate device #2, receives the first information sent by the intermediate device #1 as the fault information, the intermediate device #2 can confirm again that the current OTN system is faulty by calculating whether there is a system frequency offset or a device burst frequency offset, and fill 1 on the second bit. Through twice confirmation, the error alarm caused by some recoverable abnormal jitter of the OTN system can be avoided, so as to ensure the performance stability of the system.

[0285] Similarly, when the first information is the second phase difference information, the plurality of first information can be carried in a plurality of bytes in the overhead area of the second OTN, and when the plurality of continuous or discontinuous bytes, the error code resistance performance of the system can be improved.

[0286] It should be understood that Figure 19 For example only and not limitation, in the embodiments of the present application, the bit positions occupied by the fault indication, confirmation information, and the number of fault devices, i.e. the number of bit positions, are not limited to Figure 19 As shown. Other simple changes based on Figure 19 As shown, for example, using the last bit to indicate that the first information includes the second phase difference information or the fault information, etc., are all within the protection scope of the present application.

[0287] In addition, the above method 1800 is only described by taking the intermediate device #1 as an example, and it should be understood that for other intermediate devices, the second phase difference information is the accumulation of the local phase difference and the obtained first phase difference. The number of devices that occur fault contained in the fault information is the number of devices from the intermediate device to the destination device.

[0288] Based on the above scheme, when the phase difference information calculated by the intermediate device does not satisfy the preset condition, the fault information is sent by the intermediate device, which avoids the calculation of the phase difference information by the downstream device, saves the resources of the system, and improves the performance of the system.

[0289] It should be noted that in the above method for clock recovery provided by the embodiments of the present application, the local clock of the device is used as the reference for calculation, that is, the time elapsed when the nominal clock corresponding to the local clock reaches the preset expected period number is calculated first, and the period number of the nominal clock corresponding to the upstream service layer clock in the same time is calculated, and then the expected period number and the period number of the nominal clock corresponding to the upstream service layer clock are subtracted to obtain the local phase difference. However, in some scenarios, for example, when there are some intermediate devices with large frequency offset in the network system, the phase difference information obtained by the target device will have slow low-frequency phase drift, which cannot be eliminated by the clock recovery loop, and ultimately reduces the performance of clock recovery, so as to fail to meet the requirements of the current standard template (G.813). In order to solve the above problem, the embodiments of the present application provide a method 2000 for clock recovery, which sets the trigger time for calculating the local phase difference, so as to always select a faster reference clock or a slower reference clock for all intermediate devices to reduce the error caused by using the local clock as the reference clock, thereby realizing more accurate clock recovery effect.

[0290] In the following, the method 2000 for clock recovery provided by the embodiments of the present application will be described in detail with reference to the intermediate device #1 in the network system 1000 in Figure 20 , and the method 2000 for clock recovery provided by the embodiments of the present application will be described in detail with reference to the intermediate device #1 in the network system 1000 in Figure 15 . Figure 20 As shown in FIG. 20, the method 2000 for clock recovery provided by the embodiments of the present application includes the following steps.

[0291] S2001, receiving a first OTN frame data stream.

[0292] S2002, obtaining the service layer clock and the first phase difference information of the second OTN frame from the first OTN frame data stream.

[0293] The above S2001-S2002 can refer to S1501-S1502 in the method 1500 shown in Figure 15 , which will not be described here again.

[0294] S2003, when the time for triggering the calculation of the local phase difference is met, generating the local phase difference according to the local clock and the service layer clock of the intermediate device.

[0295] Specifically, when the time for triggering the calculation of the local phase difference is met, the intermediate device #1 records the period number N1 of the nominal clock corresponding to the local clock of the intermediate device #1, at the same time, the intermediate device #1 records the period number N2 of the nominal clock corresponding to the service layer clock, and calculates the difference between N1 and N2 as the local phase difference.

[0296] When the faster clock between the local clock and the service layer clock is selected as the reference clock, the time when the local phase difference is triggered to be calculated is the time when the cycle number of the nominal clock corresponding to the local clock first equals the expected cycle, or the cycle number of the nominal clock corresponding to the service layer clock first equals the expected cycle, i.e. the time when the cycle number of the nominal clock corresponding to the local clock and the cycle number of the nominal clock corresponding to the service layer clock first equals the expected cycle. For example, if the preset expected cycle is N, the time when N1 equals N is the first time interval, and the time when N2 equals N is the second time interval, when the local clock is faster than the service layer clock, i.e. the first time interval is less than the second time interval, in other words, the cycle number of the nominal clock corresponding to the local clock will first step to the expected cycle, at this time, the intermediate device #1 will trigger the process of calculating the local phase difference. Or, when the service layer clock is faster than the local clock, i.e. the second time interval is less than the first time interval, the cycle number of the nominal clock corresponding to the service layer clock will first step to the expected cycle, at this time, the intermediate device #1 will trigger the process of calculating the local phase difference. The expected cycle can be set by N=F×T, wherein F is the frequency of the nominal clock, and T is the cycle for generating the local phase difference.

[0297] Similarly, when the slower clock between the local clock and the service layer clock is selected as the reference clock, the time when the local phase difference is triggered to be calculated is the time when the cycle number of the nominal clock corresponding to the local clock and the cycle number of the nominal clock corresponding to the service layer clock first equals the expected cycle. For example, when the local clock is slower than the service layer clock, i.e. the first time interval is greater than the second time interval, the cycle number of the nominal clock corresponding to the local clock will step to the expected cycle later than the nominal clock corresponding to the service layer clock, therefore, when the cycle number of the nominal clock corresponding to the local clock equals the expected cycle, the intermediate device #1 will trigger the process of calculating the local phase difference. Or, when the service layer clock is slower than the local clock, i.e. the second time interval is greater than the first time interval, the cycle number of the nominal clock corresponding to the service layer clock will step to the expected cycle later than the nominal clock corresponding to the local clock, therefore, when the cycle number of the nominal clock corresponding to the service layer clock equals the expected cycle, the intermediate device #1 will trigger the process of calculating the local phase difference.

[0298] In a possible implementation manner, Figure 21 The first process of calculating the phase difference is shown in the schematic diagram. Figure 21 As shown in the schematic diagram, the counter A and the counter B count the cycle number of the nominal clock corresponding to the local clock and the cycle number of the nominal clock corresponding to the service layer clock of the sending device respectively, wherein N is the expected cycle number.

[0299] For example, in one scenario, assuming a faster clock is used as the reference clock, if the nominal clock cycle number corresponding to the local clock of intermediate device #1 reaches the expected cycle N first (i.e., A = N & PD ≥ 0 is true first), an OR gate is triggered, and the AB subtractor calculates the phase difference as N - the cycle number B recorded by counter B. In this case, the reference clock of intermediate device #1 is set as the local clock. Alternatively, if the nominal clock cycle number corresponding to the service layer clock reaches the expected cycle N first (i.e., B = N & PD < 0 is true first), an OR gate is triggered, and the AB subtractor calculates the phase difference as the cycle number AN recorded by counter A. In this case, the service layer clock is set as the reference clock of intermediate device #1.

[0300] For example, in another scenario, assuming a slower clock is used as the reference clock, when the nominal clock cycle number corresponding to the local clock of intermediate device #1 reaches the expected period N first (i.e., A = N & PD ≥ 0 is true first), the OR gate is not triggered. Instead, it waits for the nominal clock cycle number corresponding to the service layer clock to reach the expected period N before triggering the OR gate. The AB subtractor calculates the phase difference at this time as the number of cycles AN recorded by counter A. In this case, the reference clock of intermediate device #1 is set as the service layer clock. Alternatively, when the nominal clock cycle number corresponding to the local clock of intermediate device #1 reaches the expected period N later than the nominal clock cycle number corresponding to the service layer clock (i.e., when A = N & PD ≥ 0 is true), the OR gate is triggered, and the AB subtractor calculates the phase difference at this time as N - the number of cycles B recorded by counter B. In this case, the local clock of intermediate device #1 is set as the reference clock of intermediate device #1.

[0301] After the AB subtractor calculates the phase difference, it stores the phase difference calculation result in the PD register (also known as the phase detection register) and resets counters A and B (for example, by sending an indication message to counters A and B to indicate that counters A and B are zero). At the same time, the PD register feeds back the calculated phase difference to two condition modules (including A = N & PD ≥ 0 and B = N & PD < 0).

[0302] In one possible implementation, Figure 22 This is a schematic diagram of the second method for calculating the phase difference. (Example) Figure 22 As shown, counters A and B count the number of cycles of the nominal clock corresponding to the local clock and the number of cycles of the nominal clock corresponding to the service layer clock, respectively, where N is the desired number of cycles.

[0303] For example, in one scenario, assuming a faster clock is used as the reference clock, when the nominal clock cycle number corresponding to the local clock of intermediate device #1 reaches the desired cycle N first, i.e., A = A Reg+N is established first, the OR gate is triggered, and the A-B subtractor calculates the phase difference as the number of periods recorded by the counter B at this time, while the counter A and the counter B record the values of A and B at this time, respectively, A Reg and B Reg At this time, the reference clock of the intermediate device #1 is set as the local clock. Alternatively, when the number of periods of the nominal clock corresponding to the service layer clock reaches the expected period N first, i.e., B = B Reg +N is established first, the OR gate is triggered, and the A-B subtractor calculates the phase difference as the number of periods recorded by the counter A at this time, while the counter A and the counter B record the values of A and B at this time, respectively, A Reg and B Reg At this time, the service layer clock is set as the reference clock of the intermediate device #1.

[0304] Exemplarily, in another scenario, assuming that a slower clock is used as the reference clock, when the number of periods of the nominal clock corresponding to the local clock of the intermediate device #1 reaches the expected period N first, i.e., A = A Reg +N is established first, the OR gate is triggered, and the A-B subtractor calculates the phase difference as the number of periods recorded by the counter A at this time, while the counter A and the counter B record the values of A and B at this time, respectively, A Reg +N is established first, the OR gate is triggered, and the A-B subtractor calculates the phase difference as the number of periods recorded by the counter A at this time, while the counter A and the counter B record the values of A and B at this time, respectively, A Reg and B Reg At this time, the service layer clock is set as the reference clock of the intermediate device #1.

[0305] When the A-B subtractor finishes calculating the phase difference, the phase difference calculation result is stored into a PD register (which can also be referred to as a phase detection register).

[0306] It should be understood that, for each calculation process, A Reg and B Reg are the values of A and B recorded by the counter A and the counter B when the phase difference is calculated last time.

[0307] It should be noted that, in the embodiments of this application, the reference clock can be understood as the clock used to determine the detection period (also known as the detection window). For example, when a faster clock is used as the reference clock, the process can be understood as selecting the time elapsed when the nominal clock corresponding to the faster clock in the intermediate device or the upstream service layer clock reaches the expected number of periods N as the detection period, and calculating the number of periods of the nominal clock corresponding to the other relatively slower clock within that detection period.

[0308] It should also be noted that, due to the fact that Figure 22 The calculation flow shown simplifies the process by eliminating the need to reset the counters. However, counters A and B have finite bit widths, meaning they have a maximum storage capacity. When counters A and B reach their maximum countable value, they must restart counting. This introduces abrupt errors into the difference between the calculated cycle numbers A and B. To address this issue, two implementation methods exist. One feasible method involves introducing a PD correction module before the PD memory. When the absolute value of the phase difference calculated by the AB subtractor exceeds a threshold, the phase difference is corrected to the difference between the threshold and the absolute value of the phase difference. This threshold is a preset range for the counter cycle, such as half of the counter cycle (i.e., the maximum value the counter can store). For example, if the storage limit of counters A and B is 10000, when the calculation of the local phase difference is triggered, since the period A recorded by counter A is greater than 10000, counter A will recount to 2, while the period B recorded by counter B is 9998. At this time, the absolute value of the phase difference calculated by the AB subtractor is 9996, which exceeds 5000. Therefore, the phase difference is corrected to 10000-9996=4. In another implementation, the problem of counter overflow can be solved by utilizing the properties of bit arithmetic itself. Counters A and B need to be represented using signed bit sequences. Assuming the bit sequence width of the counter is one byte, when A counts to 127 (01111111), and B counts to 120 (01111000), A continues to count and overflows to -128 (10000000), while B becomes (01111001). At this point, the result of AB is 7 (10000000-01111001=00000111), which is still a correct value. In fact, as long as the target counting period is less than half the size of the counter value range, this method is always valid.

[0309] Based on this scheme, the phase difference can be corrected after the counter reaches the counter cycle, thereby ensuring the accuracy of the phase difference calculation and further improving the accuracy of clock recovery.

[0310] Figure 23 The simulation comparison results of taking the local clock as the reference clock for the intermediate devices and taking the unified faster or slower clock as the reference clock provided in the embodiment of the application are as follows. The simulation parameters are set as follows: the destination device is a host end open loop, the period of the overhead start area carrying the phase difference information is 3.435 ms, the nominal clock frequency is 78.125 MHz, and the frequency offsets of the 11 devices are [0, 9.05, -0.005, 18.23, -8.59, -9.58, -3.46, 12.99, -6.36, -19.01, 0] ppm. The vertical coordinate PD_ACC represents the phase difference information received by the destination device from the overhead area. As shown in FIG. 6, when the local clock is taken as the reference clock for the intermediate devices, the phase difference information recorded by the destination device has a slow drift, and the low-frequency drift cannot be eliminated by the clock recovery loop, and finally reduces the clock recovery performance, so that the clock template requirement cannot be met. The scheme provided in the embodiment of the application can effectively eliminate the low-frequency phase offset, so that the phase error of the clock recovery is greatly reduced, and the clock recovery performance is improved. Figure 23

[0311] Figure 24 The simulation comparison results of taking the local clock as the reference clock for the intermediate devices and taking the unified faster or slower clock as the reference clock provided in the embodiment of the application are as follows. The simulation parameters are set as follows: the loop bandwidth of the destination device is about 1 Hz, the period of the overhead start area carrying the phase difference information is 3.435 ms, the nominal clock frequency is 78.125 MHz, and the frequency offsets of the 11 devices are [0, 9.05, -0.005, 18.23, -8.59, -9.58, -3.46, 12.99, -6.36, -19.01, 0] ppm. The vertical coordinate is the difference between the clock recovered by the destination device and the clock sent by the sending device, which can represent the clock recovery performance. As shown in FIG. 7, when the local clock is taken as the reference clock for the intermediate devices, the clock recovered by the destination device has a jitter of about 50 ns and a local high-frequency oscillation, which cannot meet the clock template requirement. The scheme provided in the embodiment of the application greatly reduces the phase error of the clock recovery and improves the clock recovery performance, and meets the G.813 clock performance template under the condition of a higher host end loop bandwidth. Figure 24

[0312] Figure 25 ​​The simulation results of using a unified faster or slower clock as the reference clock when all intermediate devices are at extreme frequency offset (±20ppm). In the simulation, the loop bandwidth of the destination device is about 1 Hz, the period of the overhead section carrying phase difference information is 3.435 ms, the nominal clock frequency is 78.125 MHz, and the frequency offsets of the 11 devices are [-20, 20, -20, 20, -20, 20, -20, 20, -20, 20, -20] ppm as shown in FIG. 7. Since all intermediate devices always select a reference clock in one direction to remove the difference between the basic clocks, the phase deviation after clock recovery is reduced to 0. Figure 22

[0313] To reduce the frequency offset jitter of the intermediate devices and achieve more accurate clock recovery, in another implementation, an average clock can be selected for all intermediate devices to reduce the error caused by using the local clock as the reference clock. In some embodiments, the average clock is in any time interval between the first time interval and the second time interval. Similarly, the first time interval is the time elapsed when N1 is equal to N, and the second time interval is the time elapsed when N2 is equal to N, and N is a preset expected period (also referred to as expected period number). For example, when the first time interval is 3 ms and the second time interval is 3.00006 ms, the average clock period can be selected as an integer number of clock periods corresponding to 3.00003 ms. In other embodiments, the average clock period is the average of the first time interval and the second time interval, which can be rounded down, rounded up, or rounded to the nearest integer, etc. For example, when the average of the first time interval and the second time interval is 3.00003 ms, the average clock period can be determined by rounding down to 3 ms. Or, when the average of the first time interval and the second time interval is 3.50000 ms, the average clock period can be determined by rounding to the nearest integer to 4 ms. When the local clock of the intermediate device and the service layer clock have both passed the period of the average clock, the integer number of periods between the nominal clock corresponding to the local clock and the nominal clock corresponding to the service layer clock is the local phase difference.

[0314] Figure 28 A third flowchart for calculating the phase difference is provided for the embodiments of the present application. Specifically, in Figure 28 , the counter A and the counter B always count the number of periods of the nominal clock corresponding to the local clock and the number of periods of the nominal clock corresponding to the service layer clock of the sending device, respectively, the storage unit A Reg and B Reg ​respectively, to store the cycle number of the counter A and the counter B when calculating the local phase difference each time, to obtain the difference between the cycle number stepped by the counter A and the counter B since the last time of triggering when calculating the local phase difference next time. Specifically, when the time of triggering to calculate the local phase difference is met, the subtracter calculates the difference between the cycle number stepped by the counter A and the counter B since the last time of triggering, i.e. (A-A Reg ) and (B-B Reg ). At the same time, the subtracter enables the storage unit A Reg and B Reg to store the cycle value of the counter A and the counter B at this time, i.e. the storage unit A Reg updates the stored cycle value to the value of the counter A at the time of triggering, and the storage unit B Reg updates the stored cycle value to the value of the counter B at the time of triggering. After the subtracter calculates the phase difference, the generated phase difference is stored in the PD storage after being corrected by the PD correction module.

[0315] Figure 29 The three possible types of the time of triggering to calculate the local phase difference in Figure 28 are shown in FIG. 4. Specifically, in Figure 29 , the time of triggering to calculate the local phase difference can be expressed as A≥A Reg +M. Wherein, M can be selected according to the corresponding rules. Specifically, when a faster clock is selected as the reference clock, M is expressed as type 1 in Figure 29 ; when a slower clock is selected as the reference clock, M is expressed as type 2 in Figure 29 ; and when an average clock is selected as the reference clock, M is expressed as type 3 in Figure 29 . Wherein, type 1, type 2 and type 3 are respectively expressed as the following formulas (1)-(3):

[0316]

[0317] It should be noted that, in the time of triggering to calculate the local phase difference shown in Figure 29 , only the counter A is monitored to determine whether the time of triggering to calculate the local phase difference is met. It can be understood that the time of triggering to calculate the local phase difference can also be replaced by B≥B Reg +M. In addition, the average clock in Figure 29 only shows one form of rounding down. Exemplarily, rounding up or rounding off can also be adopted, which is not limited in the present application.

[0318] It can be known from Figure 28 and Figure 29 that, when type 1 in Figure 29When triggering the calculation of the local phase difference, the system can monitor whether the corresponding trigger moment for calculating the local phase difference is met, based solely on the current cycle count recorded by counter A or the cycle count recorded by counter B. Compared to the above... Figure 21 or Figure 22 This process is simpler and more reliable than monitoring the periodic values ​​of two counters simultaneously.

[0319] In one possible implementation, Figure 30 This is a schematic diagram illustrating the fourth method for calculating the phase difference provided in an embodiment of this application. Figure 30 As shown, counters A and B count the number of cycles of the nominal clock corresponding to the local clock and the number of cycles of the nominal clock corresponding to the service layer clock, respectively.

[0320] Specifically, in Figure 30 In the illustrated scenario, when the intermediate device confirms receipt of the first phase difference information, it triggers the calculation of the current local phase difference. In some embodiments, when the data frame carrying the first phase difference information is a second OTN frame, the intermediate device confirms receipt of the first phase difference information by identifying the frame header of the second OTN frame. At this time, when the intermediate device identifies the frame header of the second OTN frame carrying the first phase difference information, or once the intermediate device identifies the frame header of the second OTN frame carrying the first phase difference information, the intermediate device will trigger the process of calculating the local phase difference.

[0321] It is understandable that, since the process of the intermediate device obtaining the first phase difference information from the second OTN frame takes time, in some other embodiments, the moment when the intermediate device triggers the calculation of the local phase difference can be understood as any time between the moment the frame header of the second OTN frame is identified and the moment the first phase difference information carried in the overhead area of ​​the second OTN frame is obtained.

[0322] Specifically, the process by which the intermediate device calculates the local phase difference is the same as described above. Figure 28 The process is the same: when the intermediate device triggers the calculation, it records the current values ​​of counter A and counter B, and combines them with the value of A stored in the storage unit after the previous local phase difference calculation. Reg and B Reg Calculate the step value of the nominal clock cycle number corresponding to the local clock and the nominal clock cycle number corresponding to the service layer clock since the last local phase difference calculation, i.e., (AA) Reg ) and (BB) Reg The local phase difference is calculated using the step values ​​of counters A and B. Simultaneously, the subtractor enables memory unit A. Reg and B Reg The period value at that moment is stored separately for the next calculation, i.e., storage unit A. RegThe stored period value is updated as the value of the trigger time counter A, and the storage unit B Reg The stored period value is updated as the value of the trigger time counter B. After the phase difference is calculated by the subtractor, the generated phase difference is stored in the PD storage after being corrected by the PD correction module. In fact, Figure 23 The schematic diagram is Figure 30 A special case of the above-mentioned scheme, that is, the faster clock is always selected as the reference clock in the local clock and the service layer clock, that is, the time when the local phase difference is calculated is the time when any one of the local clock and the service layer clock counts to the expected period first.

[0323] Figure 31 The clock performance simulated for the scheme of calculating the phase difference when the first phase difference information is confirmed to be received by the intermediate device. In the simulation, the simulation parameters are set as follows: the destination device is a closed loop of a host end phase-locked loop (PLL), the period of the overhead area carrying the phase difference information is 3.2768 ms, the nominal clock frequency is 312.5 MHz, and the frequency deviation of the 21 intermediate devices is randomly distributed within the range of ±20 ppm. The maximum time interval error (MTIE) and time deviation (TDEV) simulation results show that the scheme provided in the embodiments of the present application can bring better clock recovery performance and meet the G.813 clock performance template under the condition of a higher host end loop bandwidth.

[0324] Table 1 shows the possible values of each parameter based on the first OTN frame for ODU2 according to the embodiments of the present application.

[0325] Table 1

[0326]

[0327] Specifically, in Table 1, F is the frequency of the nominal clock, fODU2 is the frequency of ODU2 (10.0372739240506 GHz), Tnominal is the period of the nominal clock, N is the number of nominal clock periods within the 3.188 ms measurement time T, and ΔN is the deviation value of N under the deviation of ±20 ppm. In some embodiments, when the time of calculating the local phase difference is triggered by confirming the receipt of the first phase difference information, T is the period of the overhead area carrying the first phase difference information (or the time interval of the overhead area carrying the first phase difference information), for example, about 3 ms.

[0328] Considering that each overhead section carries 1 byte of phase difference information, and that at least one bit is used to indicate whether the first information includes the second phase difference information or the fault information, there are 7 bits available to record ΔN. Thus, the range of ΔN needs to be controlled at ±63. Thus, F needs to be within 1000 MHz (or 1 GHz).

[0329] Considering that the G.813 clock template requires the drift of clock phase to be within about 100 ns. Since different nodes can use different reference clocks, which can cause an error of one nominal clock period, the smaller the nominal clock period, the smaller the error. Considering that there can be about ten devices (nodes) on a link, the nominal clock period needs to be less than or equal to 10 ns (nanoseconds).

[0330] Based on the above two points, the range of the nominal clock frequency F needs to be 100 MHz-1 GHz.

[0331] If the number of nominal clock periods in the phase difference measurement time period is assumed to be N equal to 1000000, the service layer clock frequency, the local clock frequency of each device, the nominal clock frequency, the nominal clock period, the phase difference measurement time period, and the OSU frame period can be designed as follows.

[0332] Service layer clock frequency: fserver=fODU2=10.0372739240506 GHz

[0333] Local clock frequency: flocal=fODU2 / 32=313.6648 MHz

[0334] Nominal clock frequency: F=fODU2 / 32=313.6648 MHz

[0335] Nominal clock period: Tnominal=1 / fnominal=3.1881166 ns

[0336] Number of nominal clock periods in the phase difference measurement time period: N=F·T=1,000,000

[0337] Phase difference measurement time period: T=N·Tnominal=3.1881166 ms

[0338] OSU frame period: 11.7533 ms

[0339] Period of the overhead area carrying the phase difference information: 1 / 4 OSU frame period, i.e. 2.9383ms, which satisfies the period T greater than the period of the overhead area carrying the phase difference information. When the time of calculating the local phase difference triggered by confirming the receipt of the first phase difference information, T is the period of the overhead area carrying the first phase difference information (or the time interval of the overhead area carrying the first phase difference information), for example, about 3ms.

[0340] Figure 26 A schematic block diagram of an OTN device 1500 is provided for an embodiment of the present application. The device 1500 includes a receiving module 1501, which can be configured to perform the corresponding receiving function. The receiving module 1501 can also be referred to as a receiving unit.

[0341] The device 1500 further includes a processing module 1502, which can be configured to perform the corresponding processing function.

[0342] The device 1500 further includes a sending module 1503, which can be configured to perform the corresponding sending function. The sending module 1503 can also be referred to as a sending unit.

[0343] Optionally, the device 1500 further includes a storage unit, which can be configured to store at least one of instructions, data and other configuration parameters. The processing unit 1502 can read the content stored in the storage unit, so that the device implements the actions of the related device in the foregoing various method embodiments.

[0344] The device 1500 can be configured to perform the actions performed by the destination device or the sending device or the intermediate device in the foregoing various method embodiments. In this case, the device 1500 can be a component of the destination device or the sending device or the intermediate device. The receiving module 1501 is configured to perform the receiving-related operations of the destination device or the sending device or the intermediate device in the foregoing method embodiments. The processing module 1502 is configured to perform the processing-related operations of the destination device or the sending device or the intermediate device in the foregoing method embodiments. The sending module 1503 is configured to perform the sending-related operations of the destination device or the sending device or the intermediate device in the foregoing method embodiments.

[0345] It should be understood that the specific processes by which the modules perform the corresponding steps described above have been described in detail in the foregoing method embodiments. For brevity, they will not be described here again.

[0346] Figure 27 A structural schematic diagram of a possible OTN device 1150 is provided. The device is a destination device or a sending device or an intermediate device. As shown in FIG. 15, the device 1150 includes a receiving module 1151, a processing module 1152 and a sending module 1153. Figure 27As shown, the device 1150 includes a processor 1151, an optical transceiver 1152 and a memory 1153. Among them, the memory 1153 is optional. The device 1150 can be applied to both the sending side device (such as a sending device) and the receiving side device (such as the destination device described above).

[0347] When applied to the sending side device, the processor 1151 and the optical transceiver 1152 are used to implement the method performed by the sending device or the intermediate device as shown in the above-described figure. In the implementation process, the steps of the processing flow can be completed by the integrated logic circuit of the hardware in the processor 1151 or the instructions in the form of software to implement the method performed by the sending device in the above-described figure. The optical transceiver 1152 is used to receive the OTN frame processed for sending to the peer device (also called the receiving end device). Figure 4

[0348] When applied to the receiving side device, the processor 1151 and the optical transceiver 1152 are used to implement the method performed by the destination device or the intermediate device as shown in the above-described figure. In the implementation process, the steps of the processing flow can be completed by the integrated logic circuit of the hardware in the processor 1151 or the instructions in the form of software to implement the method performed by the receiving side device in the above-described figure. The optical transceiver 1152 is used to receive the OTN frame sent by the peer device (also called the sending end device) to the processor 1151 for subsequent processing. Figure 4

[0349] The memory 1153 is used to store instructions to enable the processor 1151 to perform the steps mentioned in the above-described figure. Alternatively, the memory 1153 can also be used to store other instructions to configure the parameters of the processor 1151 to implement the corresponding functions.

[0350] It should be noted that the processor 1151 and the memory 1153 in the above-described network device hardware structure diagram can be located in the branch board, or in the single board combining the branch and the line. Alternatively, the processor 1151 and the memory 1153 both include multiple ones, respectively located in the branch board and the line board, and the two boards cooperate to complete the method steps described above. Figure 2 It should be noted that,

[0351] The apparatus described above can also be used to perform the method steps involved in the above-described embodiment variants shown in the figures, which will not be described here. Figure 27

[0352] ​​​Based on the above embodiments, the embodiments of the present application further provide a computer readable storage medium. The storage medium stores a software program, which, when read and executed by one or more processors, can implement the method provided by any one or more of the above embodiments. The computer readable storage medium can include a U disk, a mobile hard disk, a read-only memory, a random access memory, a magnetic disk or an optical disk, and various media that can store program codes.

[0353] Based on the above embodiments, the embodiments of the present application further provide a chip. The chip includes a processor, which is used to implement the functions involved in any one or more of the above embodiments, such as obtaining or processing the OTN frame involved in the above method. Optionally, the chip further includes a memory, which is used to store the necessary program instructions and data for the processor. The chip can be composed of a chip, or can include a chip and other discrete devices.

[0354] Obviously, those skilled in the art can make various modifications and variations to the embodiments of the present application without departing from the scope of the embodiments of the present application. Thus, if these modifications and variations of the embodiments of the present application belong to the scope of the claims of the present application and their equivalent technologies, the present application also intends to include these modifications and variations.

[0355] It should be understood that the processor mentioned in the embodiments of the present application can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor.

[0356] It should also be understood that the memory mentioned in the embodiments of the present application can be a volatile memory and / or a non-volatile memory. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically EPROM (EEPROM) or a flash memory. The volatile memory can be a random access memory (RAM). For example, the RAM can be used as an external cache. As an example but not limitation, the RAM can include the following various forms: static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchlink DRAM (SLDRAM) and direct rambus RAM (DR RAM).

[0357] It should be noted that when the processor is a general processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic device, discrete hardware component, the memory (storage module) can be integrated in the processor.

[0358] Those of ordinary skill in the art can realize that the units and steps of the examples described in combination with the embodiments disclosed herein can be realized by electronic hardware, or a combination of computer software and electronic hardware. Whether the functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application; such implementation should not be considered beyond the scope of the present application.

[0359] In several embodiments provided in the present application, it should be understood that the disclosed apparatus and method can be implemented by other manners. For example, the apparatus embodiments described above are only illustrative, for example, the division of the units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units or components shown or discussed can be indirect coupling or communication connection through some interfaces, apparatuses or units, and can be electrical, mechanical or other forms.

[0360] In the above embodiments, all or part of the embodiments can be implemented by software, hardware, firmware or any combination thereof. When implemented by software, all or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network or other programmable devices. For example, the computer can be a personal computer, a server or a network device. The computer instructions can be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions can be transmitted from one website, computer, server or data center to another website, computer, server or data center through wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) mode. The computer readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. integrated with one or more available media. The available media can be magnetic media (such as floppy disk, hard disk, magnetic tape), optical media (such as DVD), or semiconductor media (such as solid state disk (SSD) and the like. For example, the foregoing available media can include but not limited to: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk or optical disk and various media that can store program codes.

[0361] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed in the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A method for clock recovery, characterized in that, Applied to the target device, including: Receive the first optical transport network (OTN) frame data stream; Obtain the service layer clock from the first OTN frame data stream; The first phase difference information carried by the second OTN frame carried by the first OTN frame data stream is obtained from the first OTN frame data stream. The first phase difference information is the sum of the phase differences of multiple sets of two adjacent upstream devices of the destination device through which the second OTN frame passes. A local phase difference is generated based on the reference clock of the second OTN frame of the destination device and the service layer clock, and the reference clock of the second OTN frame of the destination device is used to recover the clock of the second OTN frame; The local phase difference is added to the first phase difference information to generate the second phase difference information; The reference clock of the second OTN frame of the target device is adjusted according to the second phase difference information.

2. The method according to claim 1, characterized in that, The phase difference between two adjacent upstream devices in the multiple groups is an integer number of nominal clock cycles, wherein the nominal clock cycle is less than or equal to 10 ns.

3. The method according to claim 2, characterized in that, The step of adjusting the reference clock of the second OTN frame of the destination device according to the second phase difference information includes: A frequency deviation is generated based on the second phase difference information, wherein the frequency deviation is the product of the number of nominal clock cycles corresponding to the second phase difference information and the nominal clock cycle. The reference clock of the second OTN frame of the target device is adjusted according to the frequency deviation.

4. The method according to claim 1, characterized in that, The period T for generating the local phase difference is greater than the period of the overhead region of the second OTN frame carrying the first phase difference information.

5. The method according to claim 4, characterized in that, The period T is less than 6ms.

6. The method according to claim 2, characterized in that, The frequency F of the nominal clock is in the range of 100MHz-1GHz.

7. The method according to any one of claims 1 to 6, characterized in that, The first phase difference information is carried in multiple overhead regions of the second OTN frame.

8. The method according to claim 7, characterized in that, Each of the plurality of overhead regions carries 1 byte of the first phase difference information.

9. The method according to claim 7, characterized in that, Multiple bytes in the multiple overhead regions carry multiple identical first phase difference information.

10. The method according to any one of claims 1 to 6, 8, and 9, characterized in that, The first OTN frame is an optical data unit ODUk frame or an ODUflex frame.

11. A method for clock recovery, characterized in that, Applied to at least one intermediate device, including: Receive the first optical transport network (OTN) frame data stream; Obtain the service layer clock from the first OTN frame data stream; The first phase difference information carried by the second OTN frame carried by the first OTN frame data stream is obtained from the first OTN frame data stream. The first phase difference information is the sum of the phase differences of multiple sets of two adjacent upstream devices of the intermediate device through which the second OTN frame passes. A local phase difference is generated based on the clock of the intermediate device and the clock of the service layer; The local phase difference is added to the first phase difference information to generate the second phase difference information; The second phase difference information is sent to the adjacent downstream device.

12. The method according to claim 11, characterized in that, The phase difference between two adjacent upstream devices in the multiple sets is an integer number of nominal clock cycles, wherein the nominal clock cycle is less than or equal to 10 ns.

13. The method according to claim 11, characterized in that, The period T for generating the local phase difference is greater than the period of the overhead region of the second OTN frame carrying the first phase difference information.

14. The method according to claim 13, characterized in that, The period T is less than 6ms.

15. The method according to claim 12, characterized in that, The frequency F of the nominal clock is in the range of 100MHz-1GHz.

16. The method according to any one of claims 11 to 15, characterized in that, The first phase difference information is carried in multiple overhead regions of the second OTN frame.

17. The method according to claim 16, characterized in that, Each of the plurality of overhead regions carries 1 byte of the first phase difference information.

18. The method according to claim 16, characterized in that, The period of the overhead region carrying the first phase difference information is 1 / 4 of the period of the second OTN frame.

19. The method according to claim 16, characterized in that, The multiple bytes in the multiple overhead regions carry multiple identical first phase difference information.

20. The method according to any one of claims 11 to 15, 17 to 19, characterized in that, The first OTN frame is an Optical Data Unit (ODU) frame, which is either an ODUk frame or an ODUflex frame.

21. An optical transmission network (OTN) device, characterized in that, include: The memory is used to store instructions; A processor for retrieving and executing the instructions from the memory, causing the apparatus to perform the method of any one of claims 1 to 20.

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