Heterojunction cell, heterojunction cell preparation method and photovoltaic module

Abstract

The embodiment of the invention provides a heterojunction cell, a preparation method of the heterojunction cell and a photovoltaic module, and relates to the technical field of photovoltaics. The heterojunction cell comprises a substrate layer, the substrate layer is provided with a first surface and a second surface which are oppositely arranged, and an intrinsic amorphous silicon layer, a doped layer and a transparent conductive layer are sequentially stacked on each of the first surface and the second surface; the surface of the transparent conductive layer is pyramid-shaped, the surface of the transparent conductive layer comprises a plane area and a prism area, and the ratio of the D50 particle size of crystal grains in the plane area to the D50 particle size of crystal grains in the prism area is 1.00: 0.99-1.00: 0.91. The overall proportion fluctuation of the crystal grains in the transparent conductive layer is small, and the overall D50 particle size of the crystal grains is relatively uniform, so that the film layer of the transparent conductive layer grows more uniformly, the surface defects of the film layer are reduced, the resistance of the film layer is reduced, and the efficiency of the battery piece is further improved.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and in particular to a heterojunction battery, a method for preparing a heterojunction battery, and a photovoltaic module. Background Art

[0002] With the development of solar cell technology, the development of high-efficiency cells has received increasing attention. Among them, heterojunction solar cells are one of the key research directions. Heterojunction cells (HJT / HIT, Heterojunction with Intrinsic Thin-layer) are a type of high-efficiency solar cell that combines the advantages of crystalline silicon and amorphous silicon thin films. In the preparation of heterojunction solar cells, heating and light source methods are generally used for light injection treatment, which can effectively improve the interface and internal defects of photovoltaic cells, thereby improving the conversion efficiency of heterojunction cells. During the ITO deposition process, large and small grains and small holes exist in the film layer. For example, in the DH experiment, water vapor and acetic acid easily invade the holes and corrode the grain boundaries of large and small grains. On the one hand, holes and large and small grains will lead to an increase in series resistance, resulting in power consumption and affecting the photoelectric conversion efficiency. On the other hand, it will lead to a decrease in reliability.

[0003] Therefore, the film quality and cell efficiency of heterojunction cells in the prior art still need to be improved. Summary of the Invention

[0004] The present invention provides a heterojunction battery, a method for preparing a heterojunction battery, and a photovoltaic module, which can improve the quality of the film layer, reduce surface defects of the film layer, and further improve the efficiency of the battery cell.

[0005] The embodiments of the present invention can be implemented as follows:

[0006] An embodiment of the present invention provides a heterojunction battery, which includes a substrate layer, wherein the substrate layer has a first surface and a second surface arranged opposite to each other, and the first surface and the second surface are each sequentially stacked with an intrinsic amorphous silicon layer, a doped layer, and a transparent conductive layer; wherein the surface of the transparent conductive layer is pyramid-shaped, and the surface of the transparent conductive layer includes a planar region and a prismatic region, and the ratio of the D50 particle size of the grains in the planar region to the D50 particle size of the grains in the prismatic region is 1.00:0.99-1.00:0.91.

[0007] Optionally, the D50 particle size of the grains in the planar region is 30.73 nm-32.93 nm.

[0008] Optionally, the D50 particle size of the grains in the prism region is 30.51 nm-32.36 nm.

[0009] Optionally, the growth direction of the grains on any top to bottom connection line on the surface of the transparent conductive layer is consistent.

[0010] Optionally, the material of the transparent conductive layer is at least one of indium oxide, doped indium oxide or indium tin oxide.

[0011] Optionally, the heterojunction battery further includes a metal grid line, wherein the metal grid line is disposed on a surface of the transparent conductive layer away from the doping layer, and the metal grid line is in ohmic contact with the transparent conductive layer.

[0012] An embodiment of the present invention further provides a method for preparing a heterojunction battery, which is used to prepare a heterojunction battery. The method for preparing a heterojunction battery comprises:

[0013] preparing a transparent conductive layer;

[0014] preparing a gate line on a surface of the transparent conductive layer away from the doping layer;

[0015] Scanning the grid line area for the first time using a first laser;

[0016] The second laser is used to scan the same grid line area for the second time.

[0017] Optionally, the step of scanning the gate line area for the first time using the first laser further includes:

[0018] A first laser with a wavelength of 300nm-400nm is used to perform a first scan on the gate line area, and a forward bias voltage is applied to the battery cell.

[0019] Optionally, the step of scanning the same grid line area for a second time using a second laser includes:

[0020] A second laser with a wavelength of 1000nm-1200nm is used to scan the same gate line area for the second time, and a reverse bias voltage is applied to the battery cell.

[0021] Optionally, the step of scanning the same grid line region for the second time using a second laser with a wavelength of 1000 nm to 1200 nm further comprises:

[0022] After the first scan is completed, the second laser scans the same grid line area for the second time at an interval of 0.1s-1s.

[0023] An embodiment of the present invention further provides a photovoltaic module, comprising a plurality of heterojunction cells, or comprising a heterojunction cell manufactured by the heterojunction cell manufacturing method.

[0024] The beneficial effects of the heterojunction battery, heterojunction battery preparation method, and photovoltaic module according to the embodiments of the present invention include, for example:

[0025] The heterojunction cell includes a substrate layer having a first surface and a second surface disposed opposite each other, wherein an intrinsic amorphous silicon layer, a doped layer, and a transparent conductive layer are sequentially laminated on the first surface and the second surface. The transparent conductive layer has a pyramidal surface and includes a planar region and a prismatic region. The ratio of the D50 particle size of the grains in the planar region to the D50 particle size of the grains in the prismatic region is 1.00:0.99-1.00:0.91. During use, the transparent conductive layer of the heterojunction cell has a pyramidal surface and includes a planar region and a prismatic region. The ratio of the D50 particle size of the grains in the planar region to the D50 particle size of the grains in the prismatic region is 1.00:0.99-1.00:0.91. This means that the overall ratio of the grains in the transparent conductive layer has little fluctuation, and the overall D50 particle size of the grains is relatively uniform, resulting in more uniform film growth of the transparent conductive layer, reduced surface defects in the film layer, lowered film resistance, and thus improved cell efficiency.

[0026] This heterojunction preparation method is used to manufacture heterojunction batteries. It includes preparing a transparent conductive layer; forming grid lines on the surface of the transparent conductive layer away from the doped layer; performing a first scan of the grid line region using a first laser; and performing a second scan of the same grid line region using a second laser. During use, lasers of different wavelengths are used to perform light injection treatment on the surface of the transparent conductive layer, replacing traditional light injection methods with lasers, thereby reducing equipment costs.

[0027] The photovoltaic module includes a plurality of heterojunction cells and has all the above-mentioned beneficial effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0029] Figure 1 A schematic structural diagram of a heterojunction battery provided in this embodiment;

[0030] Figure 2 A first-view scanning electron microscope image of the transparent conductive layer provided in this embodiment;

[0031] Figure 3 A second-viewing angle scanning electron microscope image of the transparent conductive layer provided in this embodiment;

[0032] Figure 4A third-view scanning electron microscope image of the transparent conductive layer provided in this embodiment;

[0033] Figure 5 A scanning electron microscope image from a fourth viewing angle of the transparent conductive layer provided in this embodiment;

[0034] Figure 6 A first-view scanning electron microscope image of the transparent conductive layer provided for comparative example;

[0035] Figure 7 A second-viewing angle scanning electron microscope image of the transparent conductive layer provided for comparative example;

[0036] Figure 8 A third-viewing angle scanning electron microscope image of the transparent conductive layer provided for comparative example.

[0037] Icon: 100-heterojunction battery; 10-base layer; 20-intrinsic amorphous silicon layer; 30-doped layer; 40-transparent conductive layer; 50-metal grid line. DETAILED DESCRIPTION

[0038] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0039] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort are intended to fall within the scope of protection of the present invention.

[0040] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0041] In the description of the present invention, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. appear, the orientation or position relationship indicated is based on the orientation or position relationship shown in the accompanying drawings, or is the orientation or position relationship in which the product of the invention is usually placed when in use. It is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be understood as a limitation on the present invention.

[0042] In addition, the terms "first", "second", etc., if used, are merely used to distinguish and describe, and should not be understood as indicating or implying relative importance.

[0043] It should be noted that, in the absence of conflict, the features in the embodiments of the present invention may be combined with each other.

[0044] With the development of solar cell technology, the development of high-efficiency cells has received more and more attention. Among them, heterojunction solar cells are one of the key research directions. Heterojunction cells (HJT / HIT, Heterojunction with Intrinsic Thin-layer) are a type of high-efficiency solar cell that combines the advantages of crystalline silicon and amorphous silicon thin films. In the preparation of heterojunction solar cells, heating and light source methods are generally used for light injection treatment, which can effectively improve the interface and internal defects of photovoltaic cells, thereby improving the conversion efficiency of heterojunction cells. During the ITO deposition process, large and small grains and small holes exist in the film layer. For example, in the DH experiment, water vapor and acetic acid easily invade the holes and corrode the grain boundaries of large and small grains. On the one hand, holes and large and small grains will lead to an increase in series resistance, resulting in power consumption and affecting the photoelectric conversion efficiency. On the other hand, it will lead to a decrease in reliability.

[0045] Therefore, the film quality and cell efficiency of heterojunction batteries in related technologies still need to be improved.

[0046] Please refer to Figure 1-Figure 5 This embodiment provides a heterojunction cell 100, a method for preparing a heterojunction cell, and a photovoltaic module, which can effectively improve the above-mentioned technical problems, improve the quality of the film layer, reduce surface defects of the film layer, and further improve the efficiency of the cell.

[0047] Please refer to Figure 1 This embodiment further provides a method for preparing a heterojunction battery, which is used to prepare a heterojunction battery 100. The method for preparing a heterojunction battery includes:

[0048] S1: Textile making and cleaning.

[0049] Specifically, a pre-cleaning liquid is used to clean and polish both sides of the base layer 10 to remove organic matter and metal impurities on the surface of the base layer 10. The pre-cleaning liquid is 10%-18% hydrogen peroxide and 10%-15% alkaline solution.

[0050] Specifically, the base layer is N-type single-crystal silicon. A pre-cleaning solution is used to clean and polish both sides of the single-crystal silicon to remove organic and metallic impurities from the surface of the single-crystal silicon. The base layer has a first surface and a second surface disposed opposite each other. In this embodiment, the first surface of the base layer is the front surface, and the second surface of the base layer is the back surface.

[0051] S2: preparing an intrinsic amorphous silicon layer 20 .

[0052] Specifically, the intrinsic amorphous silicon layer 20 is deposited on the front and back surfaces of the base layer 10 by chemical vapor deposition (CVD) technology.

[0053] S3: preparing a doping layer 30 .

[0054] Specifically, an N-type doped layer 30, specifically a phosphorus-doped amorphous silicon layer, is deposited on the surface of the intrinsic amorphous silicon layer 20 on the front side of the base layer 10 away from the base layer 10 by chemical vapor deposition (CVD), thereby forming an electron transmission channel on the front side of the base layer 10.

[0055] A P-type doped layer 30 , specifically a boron-doped amorphous silicon layer, is deposited on the surface of the intrinsic amorphous silicon layer 20 on the back side of the base layer 10 away from the base layer 10 by chemical vapor deposition (CVD), thereby forming a hole transmission channel on the back side of the base layer 10 .

[0056] S4: preparing a transparent conductive layer 40 .

[0057] Specifically, a transparent conductive film is deposited by physical vapor deposition (PVD) on the surface of the N-type doped layer 30 away from the intrinsic amorphous silicon layer 20. Specifically, the transparent conductive film is made of indium tin oxide.

[0058] A transparent conductive film is deposited on the surface of the P-type doped layer 30 away from the intrinsic amorphous silicon layer 20 by physical vapor deposition (PVD). Specifically, the transparent conductive film is made of indium tin oxide.

[0059] S5: preparing a gate line on the surface of the transparent conductive layer 40 away from the doping layer 30 .

[0060] Specifically, the metal grid line 50 is formed on the surface of the transparent conductive layer 40 away from the doping layer 30 by screen printing.

[0061] S6: Use infrared continuous laser with a wavelength of 1200nm-1500nm at 0.5J / cm 2 -1.0J / cm 2 The energy density is used to preheat the grid lines of the battery cell, and the scanning speed of the infrared continuous laser is 5mm / s-20mm / s.

[0062] S7: Using a first laser with a wavelength of 300nm-400nm to scan the gate line area for the first time.

[0063] Specifically, a short-wave continuous laser module is used to output the first laser at 0.3 J / cm 2 -0.7J / cm 2 The grid line area is scanned with an energy density of 100 nm, wherein the spot overlap rate of the first laser is ≥ 85%. During the scanning process, the spot size of the first laser is 10 μm-30 μm, and the scanning speed of the first laser is 1 mm / s-10 mm / s.

[0064] In this embodiment, the wavelength of the first laser is 300nm-400nm, that is, the first laser is a short-wave laser. The wavelength distribution of the short-wave laser is narrower than that of ordinary white light in the prior art. The light source of the short-wave laser can be more effectively absorbed by the amorphous silicon film, thereby repairing the defective recombination centers in the amorphous silicon film layer and the film microstructure of the amorphous silicon film contact interface caused by the physical vapor deposition technology when preparing the amorphous silicon film. In addition, the short-wave laser can activate the diffusion of hydrogen atoms, thereby filling the interface dangling bonds to repair the film layer structure.

[0065] Furthermore, while the first laser is scanning the gate line area for the first time, a forward bias voltage of +0.5V-1.0V is applied to the cell, and the direction of the forward bias voltage is synchronously controlled with the scanning direction of the first laser. 2 -0.8J / cm 2 The grid line area is scanned with an energy density of 100 fs-1 ps. During the scanning process of the first laser, a forward bias voltage is applied to disconnect the bypass resistor inside the battery, driving the migration of hydrogen ions, repairing unstable dangling bonds into stable chemical bonds, and reducing carrier recombination.

[0066] S8: Use a second laser with a wavelength of 1000nm-1200nm to scan the same grid line area for a second time.

[0067] Specifically, at 0.8 J / cm 2 -1.5J / cm 2 The energy density of the second laser is used to perform line scanning on the same grid line area, wherein the pulse width of the second laser is 10ns-100ns, and the spot diameter of the second laser is 10μm-50μm.

[0068] In this embodiment, the wavelength of the second laser is 1000nm-1200nm, that is, the second laser is a long-wave laser. The long-wave laser is used to continuously perform line scanning on the same grid line area. Compared with the short-wave laser, the transparent conductive layer 40 is more likely to absorb the long-wave laser, and the photons in the long-wave laser are more easily absorbed by the transparent conductive layer 40, thereby stimulating the hydrogen ions and dangling bonds in the transparent conductive layer 40 to combine, which can induce the rearrangement of the grains in the transparent conductive layer 40, thereby optimizing the grain boundaries of the transparent conductive layer 40, reducing dangling bonds and defect states at the interface, changing the work function, improving the interface energy level matching, reducing the series resistance and thus improving the photoelectric conversion efficiency.

[0069] Furthermore, while the second laser scans the same gate line region for a second time, a reverse bias voltage of -1.0V to 2.0V is applied to the cell, with the direction of the reverse bias voltage being synchronized with the scanning direction of the second laser. Similarly, applying the reverse bias voltage during the second laser scan disconnects the bypass resistor within the cell, driving hydrogen ions to migrate, restoring unstable dangling bonds to stable chemical bonds and reducing carrier recombination.

[0070] In this embodiment, a bias voltage is applied to the cell by a voltage applying device. Specifically, the voltage applying device is connected to the front and back grid line regions of the cell through brush contacts, and the voltage output signal is synchronized with the laser scanning signal.

[0071] In this embodiment, there is a gradient difference between the energy density of the first laser scan for the first time and the energy density of the second laser scan for the second time, specifically 40%-60%.

[0072] Furthermore, a long-wave pulse laser module is used to output the second laser, and the repetition frequency is 10KHz-100KHz, and the angle between the laser scanning path and the direction of the metal grid line 50 is 0°-45°.

[0073] Specifically, the optical paths of the long-wave pulse laser module and the short-wave continuous laser module are coaxially integrated, and the numerical aperture of the laser focusing lens is 0.2-0.4.

[0074] Furthermore, after the first scan is completed, the second laser scans the same grid line area for the second time at an interval of 0.1s-1s, and the scanning paths of the first laser and the second laser are both synchronously controlled by the same galvanometer system.

[0075] In addition, the heterojunction preparation method can also add inert gases such as nitrogen during the laser treatment process, so that oxygen and grains are re-oxidized under the instantaneous high temperature of the laser, making the grains coarse, thereby affecting the crystallinity of the transparent conductive layer 40 and the energy level matching of the passivation layer.

[0076] This embodiment also provides a photovoltaic module, which includes a plurality of heterojunction cells 100, or includes a heterojunction cell manufactured by a heterojunction cell manufacturing method. Figure 1 The heterojunction cell 100 includes a base layer, and an intrinsic amorphous silicon layer 20, a doped layer 30, a transparent conductive layer 40, and a metal grid line 50 are sequentially stacked on the first and second surfaces of the base layer. The metal grid line 50 is arranged on the side of the transparent conductive layer 40 away from the doped layer 30, and the metal grid line 50 is in ohmic contact with the transparent conductive layer 40; wherein the surface of the transparent conductive layer 40 is pyramid-shaped, and the surface of the transparent conductive layer 40 includes a planar region and a prismatic region, and the ratio of the D50 particle size of the grains in the planar region to the D50 particle size of the grains in the prismatic region is 1.00:0.99-1.00:0.91.

[0077] Specifically, the transparent conductive layer 40 is subjected to a texturing process to form a pyramid-shaped textured structure on its surface to reduce light reflection and enhance light absorption. The texturing process can be performed using a NaOH solution or a KOH solution at a temperature of 70° C. to 85° C.

[0078] Please refer to Figure 2 and Figure 3 It should be noted that there are multiple prism regions, and the same ends of the multiple prism regions are connected to the same point. The triangular frame is a planar region, and the planar region is located between two adjacent prism regions. The growth direction of the grains on any top-to-bottom line on the surface of the transparent conductive layer 40 is consistent. This can be understood as arbitrarily selecting a line from the top to the bottom on the surface of the transparent conductive layer 40, and the growth directions of the grains on the same line are completely parallel or the overall growth trend of the grains is consistent. This is not specifically limited here.

[0079] In this embodiment, the D50 diameter of the grains in the planar region is 30.73 nm to 32.93 nm. Specifically, the D50 diameter of the grains in the planar region may be 30.73 nm, 31.48 nm, 32.12 nm, or 32.93 nm. In other embodiments, the D50 diameter of the grains in the planar region may also be 31.67 nm, 32.66 nm, etc., which are not specifically limited here.

[0080] In this embodiment, the D50 diameter of the grains in the prism region is 30.51 nm to 32.36 nm. Specifically, the D50 diameter of the grains in the prism region may be 30.51 nm, 32.03 nm, or 32.36 nm. In other embodiments, the D50 diameter of the grains in the prism region may also be 31.73 nm, 32.03 nm, etc., which are not specifically limited here.

[0081] Furthermore, the material of the transparent conductive layer 40 is indium oxide or doped indium oxide.

[0082] Please refer to Figure 2-Figure 5 , Figure 2-Figure 5 The microscopic morphology of the transparent conductive layer 40 of the cell after laser injection is shown. The surface of the transparent conductive layer 40 includes a planar area and a prismatic area, wherein there are four prismatic areas, and the same end points of the four prismatic areas are all connected to the top of the pyramid shape, and the four prismatic areas all diverge from the top of the pyramid shape to the bottom of the pyramid shape, and the area between two adjacent prismatic areas is a planar area. After laser injection, the overall grains of the transparent conductive layer 40 are columnar, and the grains are arranged in an orderly manner as a whole. The grains on the surface of the transparent conductive layer 40 are in the shape of a "pine cone", and the film growth of the transparent conductive layer 40 is relatively uniform. The standard deviation of the grain sample is 0.90nm, and the fluctuation of the particle size of the grains in the planar area and the grains in the prismatic area is small. The particle size of 68% of the grains is concentrated between 31.23nm and 33.03nm, with a fluctuation range of 2.54nm. And from Figure 3 It can be seen that the growth direction of the grains on any top-to-bottom line on the surface of the transparent conductive layer 40 is consistent. It can be understood that if a line is randomly selected from the top to the bottom on the surface of the transparent conductive layer 40, the growth direction of the grains on the same line is completely parallel or the overall growth trend of the grains is consistent. In other words, the growth direction of the grains in the transparent conductive layer 40 after laser injection is extremely consistent. Figure 5 It is locally marked in FIG. 4 , and it is found that the local fluctuation of the transparent conductive layer 40 after laser injection is large, with a range greater than 9 nm.

[0083] Please refer to Figure 6-Figure 8 , Figure 6-Figure 8 The microscopic morphology of the transparent conductive layer of the cell using the traditional light injection method in the prior art is shown. Figure 6-Figure 8 It can be seen that the traditional light injection method has no effect on the transparent conductive layer of the cell. The grains on the surface of the transparent conductive layer are flaky and randomly distributed. After the traditional light injection, the standard deviation of the grain sample is 15.31nm. The particle size of the grains on the surface of the transparent conductive layer fluctuates greatly, with a fluctuation range of 54.13nm. Figure 7 The local marking of the transparent conductive layer after conventional light injection shows a strong local fluctuation of the grain sample, with a range greater than 37nm. Figure 8 It can be seen from the figure that the growth direction of the grains on the surface of the transparent conductive layer 40 after conventional light injection presents an irregular trend. Figure 8 The growth direction of the grains marked by the yellow arrows is particularly obvious.

[0084] The heterojunction cell 100, heterojunction cell preparation method, and photovoltaic module provided in this embodiment have at least the following advantages:

[0085] The heterojunction battery preparation method replaces the continuous spectrum light source represented by halogen lamps or the injection of white light and LED light sources in the existing technology through laser processing, which reduces the processing time of light injection, reduces costs, and improves production line efficiency.

[0086] This heterojunction fabrication method uses laser thermal deposition to perform a simple annealing treatment on the transparent conductive layer 40, which can reduce surface defects in the film, promote grain growth, reduce film resistance, and thus improve cell efficiency. Laser treatment improves the microstructure of the transparent conductive layer 40, reduces film roughness, and improves contact with the slurry.

[0087] In summary, the embodiments of the present invention provide a heterojunction cell 100, a method for preparing a heterojunction cell, and a photovoltaic module. The heterojunction cell includes a substrate layer 10, the substrate layer 10 having a first surface and a second surface arranged opposite to each other, the first surface and the second surface are sequentially stacked with an intrinsic amorphous silicon layer 20, a doping layer 30, and a transparent conductive layer 40; wherein the surface of the transparent conductive layer 40 is pyramid-shaped, and the surface of the transparent conductive layer 40 includes a planar area and a prismatic area, and the ratio of the D50 particle size of the grains in the planar area to the D50 particle size of the grains in the prismatic area is 1.00:0.99-1.00:0.91. When in use, the surface of the transparent conductive layer 40 of the heterojunction battery 100 is pyramid-shaped, and the surface of the transparent conductive layer 40 includes a planar area and a prismatic area. The ratio of the D50 particle size of the grains in the planar area to the D50 particle size of the grains in the prismatic area is 1.00:0.99-1.00:0.91, that is, the overall ratio of the grains in the transparent conductive layer 40 has little fluctuation, and the overall D50 particle size of the grains is relatively uniform, so that the film layer of the transparent conductive layer 40 grows more uniformly, reduces surface defects of the film layer, reduces the film layer resistance, and thus improves the efficiency of the battery cell.

[0088] This heterojunction preparation method is used to prepare a heterojunction battery 100. The heterojunction battery preparation method includes preparing a transparent conductive layer 40; preparing gate lines on the surface of the transparent conductive layer 40 away from the doped layer 30; using a first laser with a wavelength of 300nm-400nm to perform a first scan of the gate line area; and using a second laser with a wavelength of 1000nm-1200nm to perform a second scan of the same gate line area. During use, lasers of different wavelengths are used to perform light injection treatment on the surface of the transparent conductive layer 40, replacing traditional light injection methods with lasers to reduce equipment costs. The first laser is a short-wave laser that can repair defect recombination centers in the amorphous silicon film layer; the second laser is a long-wave laser that can modify the transparent conductive layer 40, reducing dangling bonds and defect states at the interface, lowering film resistance, and thereby improving photoelectric conversion efficiency.

[0089] The photovoltaic module includes a plurality of heterojunction cells 100 and has all the above-mentioned beneficial effects.

[0090] Example 1

[0091] This embodiment provides a method for preparing a heterojunction battery, comprising:

[0092] S1: Textile making and cleaning.

[0093] S2: preparing an intrinsic amorphous silicon layer 20 .

[0094] S3: preparing a doping layer 30 .

[0095] S4: preparing a transparent conductive layer 40 .

[0096] S5: preparing a gate line on the surface of the transparent conductive layer 40 away from the doping layer 30 .

[0097] S6: Using infrared continuous laser with a wavelength of 1342nm and a power of 0.8J / cm 2 The energy density of the laser was used to preheat the grid lines on the back of the cell. The scanning speed of the infrared continuous laser was 10 mm / s and the spot size was 5 mm×5 mm. A 355 nm femtosecond pulse laser was used at 0.6 J / cm 2 The grid lines on the front of the cell are line-scanned with an energy density of , wherein the spot diameter is 20 μm and the scanning speed is 8 mm / s.

[0098] S7: Using a continuous laser with a wavelength of 355nm and a power of 0.4J / cm 2 The grid line area is scanned with an energy density of , wherein the spot size is 2 mm × 50 mm, the scanning speed is 15 mm / s, and the spot overlap rate is 90%.

[0099] S8: A nanosecond pulse laser with a wavelength of 1064 nm and a pulse width of 20 ns was used to deliver 1.2 J / cm 2 The same grid line area is scanned with an energy density of 50 kHz. The repetition frequency is 50 kHz, the spot diameter is 30 μm, the scanning speed is 5 mm / s, and the spot is parallel to the grid line (angle 0°).

[0100] Specifically, the interval between the two scans was 0.5 seconds, and the paths were synchronously controlled by the same galvanometer system.

[0101] Example 2

[0102] The method for preparing a heterojunction battery provided in this embodiment is carried out with reference to Example 1. The difference from Example 1 is that, when used, step S7 includes: using a femtosecond laser with a wavelength of 355 nm at 0.7 J / cm 2The energy density and pulse width of the laser are 300 fs, and the grid line area is scanned with a spot diameter of 25 μm and a scanning speed of 3 mm / s. While the first laser is scanning the grid line area for the first time, a forward bias voltage of +0.8 V is applied to the cell.

[0103] Step S8 includes: using a nanosecond pulse laser with a wavelength of 1064 nm and a pulse width of 50 ns at 1.0 J / cm 2 The energy density of the laser beam is used to perform line scanning on the same gate line area. While the second laser beam is performing a second scanning on the same gate line area, a reverse bias voltage of -1.5V is applied to the cell.

[0104] Comparative Example

[0105] Please refer to Figure 6-Figure 8 , refer to Example 1, this example provides a method for preparing a heterojunction battery, using traditional light methods to perform light injection and auxiliary heating processes on the battery cell.

[0106] Test Case

[0107] The transmittance, carrier concentration and carrier mobility of the front and back sides of the cells prepared by the heterojunction cell preparation methods of Example 1, Example 2 and the comparative example were tested, and the test results are shown in Table 1.

[0108]

[0109]

[0110] It can be seen from Table 1 that the performance of the battery cell obtained by the heterojunction battery preparation method provided in Example 1 is significantly better than that of the battery cell obtained by the heterojunction battery preparation method of the comparative example.

[0111] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A heterojunction battery, characterized in that: The invention comprises a base layer (10), wherein the base layer (10) has a first surface and a second surface arranged opposite to each other, wherein the first surface and the second surface are sequentially stacked with an intrinsic amorphous silicon layer (20), a doping layer (30) and a transparent conductive layer (40); wherein the surface of the transparent conductive layer (40) is pyramid-shaped, and the surface of the transparent conductive layer (40) comprises a plane region and a prism region, and the ratio of the D50 particle size of the grains in the plane region to the D50 particle size of the grains in the prism region is 1.00:0.99-1.00:0.

91.

2. The heterojunction battery according to claim 1, characterized in that The D50 particle size of the grains in the planar region is 30.73 nm to 32.93 nm.

3. The heterojunction battery according to claim 1, characterized in that The D50 particle size of the grains in the prism region is 30.51 nm to 32.36 nm.

4. The heterojunction battery according to claim 1, characterized in that The growth direction of the crystal grains on any top to bottom connection line on the surface of the transparent conductive layer (40) is consistent.

5. The heterojunction battery according to claim 1, characterized in that: The material of the transparent conductive layer (40) is at least one of indium oxide, doped indium oxide or indium tin oxide.

6. The heterojunction battery according to claim 1, characterized in that: The heterojunction battery (100) further comprises a metal grid line (50), wherein the metal grid line (50) is arranged on a surface of the transparent conductive layer (40) away from the doping layer (30), and the metal grid line (50) and the transparent conductive layer (40) are in ohmic contact.

7. A method for preparing a heterojunction battery, characterized in that: For preparing the heterojunction battery (100) according to any one of claims 1 to 6, the heterojunction battery (100) preparation method comprising: preparing a transparent conductive layer (40); preparing a gate line on a surface of the transparent conductive layer (40) away from the doping layer (30); Scanning the grid line area for the first time using a first laser; The second laser is used to scan the same grid line area for the second time.

8. The method for preparing a heterojunction battery according to claim 7, wherein: The step of scanning the gate line area for the first time using the first laser further includes: A first laser with a wavelength of 300nm-400nm is used to perform a first scan on the gate line area, and a forward bias voltage is applied to the battery cell.

9. The method for preparing a heterojunction battery according to claim 7, wherein: The step of scanning the same grid line area for the second time using the second laser further comprises: A second laser with a wavelength of 1000nm-1200nm is used to scan the same gate line area for the second time, and a reverse bias voltage is applied to the battery cell.

10. The method for preparing a heterojunction battery according to claim 7, wherein: The step of scanning the same grid line area for the second time using the second laser further comprises: After the first scan is completed, the second laser scans the same grid line area for the second time at an interval of 0.1s-1s.

11. A photovoltaic module, characterized in that: A heterojunction battery comprising several heterojunction batteries according to any one of claims 1 to 6, or a heterojunction battery prepared by the heterojunction battery preparation method according to any one of claims 7 to 10.

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