Crystalline silicon textured surface structure, cells and their fabrication methods, photovoltaic modules

Abstract

This application relates to a textured silicon crystalline silicon structure, a solar cell, a method for fabricating the same, and a photovoltaic module. The textured silicon crystalline silicon structure includes a silicon substrate and a pyramid-like structure disposed on the silicon substrate. The pyramid-like structure includes a first part and a second part. The first part is located on the side of the second part away from the silicon substrate. The first part has a first side surface with a concave structure and a spiked structure. The concave first side surface and the spiked structure of the first part in this textured silicon crystalline silicon structure provide easily conductive contact points, thereby improving the fill factor of the solar cell and thus enhancing its photoelectric conversion efficiency.

Description

Technical Field

[0001] This application relates to the field of photovoltaic technology, and in particular to a crystalline silicon textured surface structure, a cell and its preparation method, and a photovoltaic module. Background Technology

[0002] Solar energy, with its advantages of being clean, safe, and abundant, has become one of the fastest-growing renewable energy sources, and photovoltaic (PV) power generation is one of its utilization methods. Crystalline silicon cells, with their mature technology and stable performance, dominate the PV market. However, the photoelectric conversion efficiency of crystalline silicon cells needs further improvement. Summary of the Invention

[0003] Based on this, this application provides a crystalline silicon textured surface structure, a cell and its preparation method, and a photovoltaic module that can effectively improve photoelectric conversion efficiency.

[0004] The technical solution to the above-mentioned technical problems in this application is as follows.

[0005] The first aspect of this application provides a crystalline silicon textured structure, the crystalline silicon textured structure including a silicon substrate and a pyramid-like structure disposed on the silicon substrate, the pyramid-like structure including a first part and a second part, the first part being located on the side of the second part away from the silicon substrate, the first part having a first side surface, the first side surface having a concave structure, and the first part having a spike structure.

[0006] In some embodiments, in the crystalline silicon textured structure, the second portion has a second side surface connected to the first side surface, and the maximum value of the distance from a point on the first side surface to the extension surface of the second side surface is d, where 10 nm ≤ d ≤ 200 nm.

[0007] In some embodiments, the crystalline silicon textured structure satisfies at least one of the following characteristics:

[0008] (1) The distance between the endpoints of two adjacent side edges away from the silicon substrate in the second part is L1, 50 nm≤L1≤200 nm;

[0009] (2) The distance between the endpoints of two adjacent side edges near the silicon substrate in the second part is L2, 1000nm≤L2≤3000 nm.

[0010] In some embodiments, in the crystalline silicon textured structure, at least one side edge of the second portion forms an angle α with the silicon substrate, where 56°≤α≤68°.

[0011] In some embodiments, in the crystalline silicon textured structure, along the vertical direction of the silicon substrate, the height of the first portion is h1, the height of the second portion is h2, and the crystalline silicon textured structure satisfies at least one of the following characteristics:

[0012] (1)10 nm≤h1≤1000 nm;

[0013] (2) 500nm≤h2≤2000nm;

[0014] (3) 0.02≤h1 / h2≤1.

[0015] The second aspect of this application provides a method for preparing the textured silicon crystalline structure provided in the first aspect, including the following steps:

[0016] A first texturing process and a second texturing process are sequentially performed on at least one surface of a silicon wafer, wherein the texturing agent used in the second texturing process includes sodium lignosulfonate and benzotriazole.

[0017] In some embodiments, in the method for preparing the crystalline silicon textured structure, the texturing agent comprises the following components by mass parts: 0.2-0.3 parts of 2-methyl-2,4-pentanediol, 1.5-2 parts of sodium carboxymethyl cellulose, 0.18-0.22 parts of 5-nitroguaiacol, 0.2-0.25 parts of triclosan, 0.3-0.5 parts of sodium hydroxide, 0.1-0.15 parts of poly[(naphthaleneformaldehyde)sulfonate], 0.2-0.7 parts of sodium lignosulfonate, 0.1-0.3 parts of benzotriazole, 0.05-0.15 parts of sodium acetate, 0.2-0.4 parts of sodium chloride, and 95-96.97 parts of water.

[0018] In some embodiments, the method for preparing a textured silicon crystalline structure satisfies at least one of the following characteristics:

[0019] (1) In the texturing agent, the mass fraction of sodium lignosulfonate is greater than the mass fraction of benzotriazole;

[0020] (2) In the texturing agent, the sodium lignosulfonate is 0.3 to 0.7 parts by mass;

[0021] (3) In the texturing agent, the benzotriazole is present in a mass fraction of 0.2 to 0.3 parts;

[0022] (4) The temperature of the second texturing process is 68℃~76℃ and the time is 80s~160s.

[0023] A third aspect of this application provides a battery including a silicon substrate and a metal electrode, wherein at least one surface of the silicon substrate includes a metal contact region, and the metal electrode is disposed in the metal contact region. The metal contact region includes a crystalline silicon textured structure prepared by the method of preparing a crystalline silicon textured structure provided in the first aspect or the method of preparing a crystalline silicon textured structure provided in the second aspect.

[0024] In some embodiments, the surface of the silicon substrate in the battery further includes a non-metallic contact region, which includes the crystalline silicon textured structure.

[0025] In some embodiments, the thickness of the silicon substrate in the metal contact region of the battery is δ1, and the thickness of the silicon substrate in the non-metal contact region is δ2, where δ1 > δ2.

[0026] In some embodiments, the δ1-δ2 in the battery is 0.5 μm to 15 μm.

[0027] In some embodiments, the total area of ​​the non-metallic contact area in the battery is S1, and the total area of ​​the metallic contact area is S2, where S1 > S2.

[0028] In some embodiments, the silicon substrate in the battery is doped with a boron group element, wherein the doping concentration of the boron group element in the metal contact region is C1 and the doping concentration of the boron group element in the non-metal contact region is C2, where C1 > C2.

[0029] In some embodiments, the boron group elements in the battery are each independently selected from at least one of boron, aluminum, gallium, and indium.

[0030] In some embodiments, the silicon substrate in the battery includes a front side and a back side, and the battery satisfies at least one of the following characteristics:

[0031] (1) The battery includes a tunneling oxide layer and a polycrystalline silicon layer, wherein the tunneling oxide layer is disposed on the back side of the silicon substrate and the polycrystalline silicon layer is disposed on the side of the tunneling oxide layer away from the silicon substrate;

[0032] (2) The battery includes a passivation layer and an anti-reflection layer. The passivation layer is disposed on the front side of the silicon substrate, and the anti-reflection layer is disposed on the side of the passivation layer away from the silicon substrate.

[0033] The fourth aspect of this application provides a method for preparing the battery provided in the third aspect, comprising the following steps:

[0034] A silicon wafer is provided, wherein at least one surface of the silicon wafer includes a metal contact area;

[0035] A first texturing process and a second texturing process are sequentially performed on the metal contact area of ​​the silicon wafer; the texturing agent used in the second texturing process includes sodium lignosulfonate and benzotriazole;

[0036] A metal electrode is prepared in the metal contact region.

[0037] In some embodiments, the battery preparation method includes the following steps:

[0038] Both surfaces of the silicon wafer are subjected to a first texturing process and a second texturing process in sequence;

[0039] The silicon wafer is diffused using a semiconductor source;

[0040] Laser molding is performed on the non-metallic contact area on the front side of the silicon wafer;

[0041] The non-metallic contact area after laser mold opening is subjected to a third texturing process;

[0042] The silicon wafer is subjected to double-sided oxidation treatment;

[0043] The silicon wafer is back-polished;

[0044] A tunneling oxide layer and a polycrystalline silicon layer are sequentially formed on the back side of the silicon wafer;

[0045] A passivation layer and an antireflection layer are sequentially prepared on both surfaces of the silicon wafer;

[0046] Metal electrodes are fabricated in the metal contact region of the silicon wafer.

[0047] In some embodiments, the step of preparing the metal electrode in the battery preparation method includes: applying a metal conductive paste to the metal contact area of ​​the silicon wafer and then performing LECO laser-assisted sintering.

[0048] The fifth aspect of this application provides a photovoltaic module, including a cell prepared by the method of the cell provided in the third aspect or the cell provided in the fourth aspect.

[0049] The textured silicon surface structure of this application has the following beneficial effects:

[0050] The crystalline silicon textured structure provided in this application includes a silicon substrate and a pyramid-like structure disposed on the silicon substrate. The pyramid-like structure includes a first part and a second part. The first part is located on the side of the second part away from the silicon substrate. The first part has a first side surface with a concave structure and a spike structure, which can provide contact points for easy current transmission, thereby improving the fill factor of the cell and thus improving the photoelectric conversion efficiency of the cell. Attached Figure Description

[0051] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0052] Figure 1 A side view of a pyramid-like structure provided for one embodiment;

[0053] Figure 2 A schematic diagram of the structure of a battery provided in one embodiment;

[0054] Figure 3 SEM image of the pyramid-like structure provided in Example 1;

[0055] Figure 4 SEM image of the standard pyramid structure provided for Comparative Example 1.

[0056] Figure label:

[0057] 10: Battery; 11: Silicon substrate; 111: Silicon substrate; 112: Pyramid-like structure; 12: Metal electrode; 121: Front electrode; 122: Back electrode; 13: Tunneling oxide layer; 14: Polycrystalline silicon layer; 15: Passivation layer; 16: Anti-reflection layer. Detailed Implementation

[0058] The present application will be further described in detail below with reference to the embodiments and examples. It should be understood that these embodiments and examples are for illustrative purposes only and are not intended to limit the scope of the present application. The purpose of providing these embodiments and examples is to enable a more thorough and comprehensive understanding of the disclosure of the present application. It should also be understood that the present application can be implemented in many different forms and is not limited to the embodiments and examples described herein. Those skilled in the art can make various modifications or alterations without departing from the spirit of the present application, and the equivalent forms obtained also fall within the protection scope of the present application. For example, features described or illustrated as part of one embodiment can be combined in a suitable manner in another embodiment to produce new embodiments. Furthermore, numerous specific details are set forth in the following description to provide a more complete understanding of the present application. It should be understood that the present application can be implemented without one or more of these details.

[0059] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for descriptive purposes only and is not intended to be limiting of the application.

[0060] Unless otherwise stated or in case of contradiction, the terms or phrases used herein shall have the following meanings:

[0061] In this application, the terms "multiple", "various", "multiple times", etc., unless otherwise specified, refer to a quantity greater than or equal to 2. For example, "one or more" means one or more than or equal to two.

[0062] The terms “combinations of,” “any combination of,” and “any combination of” used in this article include all suitable combinations of any two or more of the listed items.

[0063] In this document, the term "suitable" as used in "suitable combination", "suitable method", "any suitable method", etc., refers to the ability to implement the technical solution of this application, solve the technical problem of this application, and achieve the expected technical effect of this application.

[0064] In this document, terms such as "preferred," "better," "more suitable," and "ideal" are merely descriptions of more effective implementation methods or embodiments, and should be understood not to limit the scope of protection of this application. If multiple "preferred" terms appear in a technical solution, unless otherwise specified and there are no contradictions or mutual constraints, each "preferred" term shall be independent.

[0065] In this application, terms such as "further," "even further," and "particularly" are used to describe purposes and indicate differences in content, but should not be construed as limiting the scope of protection of this application.

[0066] In this application, "optionally," "optionally," and "optional" mean that something is optional, that is, it means that it is selected from either "with" or "without." If there are multiple "optional" entries in a technical solution, unless otherwise specified, and there are no contradictions or mutual constraints, each "optional" entry shall be independent.

[0067] In this application, the terms "first aspect," "second aspect," "third aspect," "fourth aspect," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or quantity, nor should they be construed as implicitly indicating the importance or quantity of the indicated technical features. Moreover, "first," "second," "third," "fourth," etc., serve only as a non-exhaustive enumeration and should be understood not to constitute a closed limitation on quantity.

[0068] In this application, the technical features described in an open-ended manner include both closed technical solutions consisting of the listed features and open technical solutions that include the listed features.

[0069] In this application, when numerical intervals (i.e., numerical ranges) are mentioned, unless otherwise specified, the distribution of selectable numerical values ​​within the numerical interval is considered continuous, and includes the two endpoints of the numerical interval (i.e., the minimum and maximum values), as well as every numerical value between these two endpoints. Unless otherwise specified, when a numerical interval refers only to integers within that numerical interval, it includes the two endpoint integers of the numerical range, as well as every integer between the two endpoints, which is equivalent to directly listing every integer. When multiple numerical ranges are provided to describe features or characteristics, these numerical ranges can be merged. In other words, unless otherwise specified, the numerical ranges disclosed herein should be understood to include any and all subranges included therein. The "numerical value" in the numerical interval can be any quantitative value, such as a number, percentage, ratio, etc. The term "numerical interval" can be broadly included to include numerical interval types such as percentage intervals, ratio intervals, and proportion intervals.

[0070] Unless otherwise specified, the temperature parameters in this application are permitted to be either constant-temperature treatment or variations within a certain temperature range. It should be understood that the constant-temperature treatment allows temperature fluctuations within the precision range of the instrument control, such as ±5℃, ±4℃, ±3℃, ±2℃, or ±1℃.

[0071] In this application, the terms "room temperature" or "normal temperature" generally refer to 4℃ to 35℃, for example, 20℃ ± 5℃. In some embodiments of this application, "room temperature" or "normal temperature" refers to 10℃ to 30℃. In some embodiments of this application, "room temperature" or "normal temperature" refers to 20℃ to 30℃.

[0072] In this application, if the unit of a data range is only followed by the right endpoint, it indicates that the units of the left and right endpoints are the same. For example, 3~5 h means that the units of the left endpoint "3" and the right endpoint "5" are both h (hours).

[0073] All references to documents mentioned in this application are incorporated herein by reference as if each document were individually incorporated by reference. Unless they conflict with the inventive purpose and / or technical solution of this application, all cited documents are incorporated herein by reference in their entirety and for all purposes. When citing documents in this application, the definitions of relevant technical features, terms, nouns, phrases, etc., are also incorporated herein by reference. When citing documents in this application, examples and preferred embodiments of the cited technical features may also be incorporated herein by reference, but only to the extent that they enable the implementation of this application. It should be understood that when the cited content conflicts with the description in this application, this application shall prevail or modifications shall be made adaptably to the description in this application.

[0074] The mass or weight of the relevant components mentioned in the embodiments of this application can refer not only to the specific content of each component, but also to the proportional relationship of mass or weight between the components. Therefore, any scaling up or down of the content of the relevant components according to the embodiments of this application is within the scope disclosed in the embodiments of this application. Specifically, the mass or weight mentioned in the embodiments of this application can be units known in the chemical industry, such as μg, mg, g, and kg.

[0075] One embodiment of this application provides a crystalline silicon textured structure, which includes a silicon substrate and a pyramid-like structure disposed on the silicon substrate. The pyramid-like structure includes a first part and a second part. The first part is located on the side of the second part away from the silicon substrate. The first part has a first side surface, which is a concave structure and has a spiked structure.

[0076] The textured silicon structure of this application includes a silicon substrate and a pyramid-like structure. The pyramid-like structure includes a first part and a second part. The first part is located on the side of the second part away from the silicon substrate. The first part has a first side surface with a concave structure and a spiked structure, which can provide contact points for easy current transmission, thereby improving the fill factor of the cell and thus improving the photoelectric conversion efficiency of the cell.

[0077] It can be understood that in a pyramid-like structure, the first part is the apex of the pyramid-like structure, and the second part is the base of the pyramid-like structure.

[0078] Traditional pyramids are shaped like square pyramids with a square base and four triangular sides. In each individual side, the side of the apex and the side of the base are on the same plane. However, in the pyramid structure of this application, the side of the first part is concave and is not on the same plane as the corresponding side of the second part. There is a gap between the planes on which the sides of the first part and the sides of the second part are located.

[0079] See Figure 1 The diagram shows a side view of a pyramid-like structure. In some examples, in the crystalline silicon textured structure, the second part has a second side surface connected to the first side surface, and the maximum value of the distance from a point on the first side surface to the extension surface of the second side surface is d, where 10 nm ≤ d ≤ 200 nm.

[0080] It can be understood that the distance between a point and a surface refers to the length of the line segment between the point and the foot of the perpendicular line drawn from the point in space to the surface. 'd' can be understood as the maximum depth of the first lateral surface depression.

[0081] It can be understood that d includes, but is not limited to, 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, 180 nm, 190 nm, and 200 nm. In some examples, it can be any two of these point values ​​as end values ​​within a range, and the same applies below. For example, 10 nm ≤ d ≤ 180 nm, 50 nm ≤ d ≤ 180 nm, 100 nm ≤ d ≤ 180 nm, 50 nm ≤ d ≤ 200 nm, 100 nm ≤ d ≤ 200 nm, 100 nm ≤ d ≤ 150 nm, etc.

[0082] By controlling the maximum value d of the distance from a point on the first side to the extended surface of the second side, the fill factor (FF) of the battery can be increased, thereby improving the photoelectric conversion efficiency.

[0083] In some of these examples, in the crystalline silicon textured structure, the distance between the endpoints of two adjacent side edges in the second part that are furthest from the silicon substrate is L1, where 50 nm ≤ L1 ≤ 200 nm.

[0084] It can be understood that a lateral edge is a straight line segment connecting two adjacent lateral vertices of a polyhedron. In a square pyramid structure, a lateral edge refers to the four edges connecting a vertex to each vertex of the base quadrilateral; that is, a lateral edge is the intersection line of two lateral faces. Furthermore, L1 can be understood to include, but is not limited to, 50 nm, 55 nm, 60 nm, 65 nm, 70 nm, 75 nm, 80 nm, 85 nm, 90 nm, 95 nm, 100 nm, 105 nm, 110 nm, 115 nm, 120 nm, 125 nm, 130 nm, 135 nm, 140 nm, 145 nm, 150 nm, 155 nm, 160 nm, 165 nm, 170 nm, 175 nm, 180 nm, 185 nm, 190 nm, 195 nm, and 200 nm.

[0085] In some of these examples, in the crystalline silicon textured structure, the distance between the endpoints of two adjacent side edges near the silicon substrate in the second part is L2, where 1000 nm ≤ L2 ≤ 3000 nm.

[0086] It is understood that L2 includes, but is not limited to, 1000 nm, 1100 nm, 1200 nm, 1300 nm, 1400 nm, 1500 nm, 1600 nm, 1700 nm, 1800 nm, 1900 nm, 2000 nm, 2100 nm, 2200 nm, 2300 nm, 2400 nm, 2500 nm, 2600 nm, 2700 nm, 2800 nm, 2900 nm, and 3000 nm.

[0087] It is understandable that L2 affects the size of a single pyramid-like structure, the open-circuit voltage Voc is positively correlated with L2, and the fill factor FF is negatively correlated with L2. By controlling L2 within the above range, Voc and FF can be balanced, resulting in better overall performance of Voc and FF, thereby further improving the photoelectric conversion efficiency of the battery.

[0088] In some of these examples, in the crystalline silicon textured structure, at least one side edge in the second part forms an angle α with the silicon substrate, where 56°≤α≤68°.

[0089] It can be understood that the angle between a straight line and a plane refers to the angle formed by the line connecting the perpendicular line drawn from a point on the straight line to the plane and the point where this perpendicular line intersects the plane, and the original straight line (the complementary angle of the angle between the perpendicular line and the original straight line). This is also called the line-plane angle. Furthermore, α includes, but is not limited to, 56°, 57°, 58°, 59°, 60°, 61°, 62°, 63°, 64°, 65°, 66°, 67°, and 68°.

[0090] It is understandable that α affects the reflection angle of the incident light, and the absorption of the incident light is positively correlated with the reflection angle, thus affecting the photoelectric conversion efficiency.

[0091] In some of these examples, in the crystalline silicon textured structure, the height of the first part is h1 and the height of the second part is h2, along the vertical direction of the silicon substrate.

[0092] Optionally, 10 nm ≤ h1 ≤ 1000 nm. It can be understood that h1 includes, but is not limited to, 10 nm, 50 nm, 100 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, and 1000 nm.

[0093] Optionally, 500nm ≤ h2 ≤ 2000nm. It can be understood that h2 includes, but is not limited to, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1000 nm, 1100 nm, 1200 nm, 1300 nm, 1400 nm, 1500 nm, 1600 nm, 1700 nm, 1800 nm, 1900 nm, and 2000 nm.

[0094] In some examples, in the crystalline silicon textured structure, 0.02 ≤ h1 / h2 ≤ 1. It is understood that h1 / h2 includes, but is not limited to, 0.02, 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, and 1. Optionally, 0.02 ≤ h1 / h2 ≤ 0.3.

[0095] It is understandable that L1, α, and h1 / h2 affect the volume of the first part in the pyramid-like structure. Based on controlling d and keeping L1, α, and h1 / h2 within the above ranges, the photoelectric conversion efficiency is positively correlated with the volume.

[0096] One embodiment of this application provides a method for preparing a textured silicon surface structure, including the following steps:

[0097] A first texturing process and a second texturing process are sequentially performed on at least one surface of the silicon wafer. The texturing agent used in the second texturing process (the second texturing agent) includes sodium lignosulfonate and benzotriazole.

[0098] Based on the first texturing process of the silicon wafer, a second texturing process is performed using a texturing agent containing specific components. Benzotriazole is adsorbed at the growth site of sodium lignosulfonate, resulting in selective etching to obtain a crystalline silicon textured surface structure. The crystalline silicon textured surface structure includes a silicon substrate and a pyramid-like structure. The pyramid-like structure includes a first part and a second part. The first part is located on the side of the second part away from the silicon substrate. The first part has a first side surface with a concave structure and a spiked structure, which can provide contact points for easy current transmission, thereby improving the fill factor of the cell and thus improving the photoelectric conversion efficiency of the cell.

[0099] Furthermore, no water tank is needed between the two texturing steps, and the yield does not deteriorate. It is understood that the method for preparing the crystalline silicon textured structure provided in this application can obtain the aforementioned crystalline silicon textured structure.

[0100] It is understood that a silicon wafer includes a front side and a back side, and at least one surface of the silicon wafer includes a front side, or a back side, or both front and back sides.

[0101] In some of these examples, in the method for preparing the crystalline silicon textured structure, the mass fraction of sodium lignosulfonate in the texturing agent used in the second texturing process is greater than the mass fraction of benzotriazole.

[0102] In some examples, in the method for preparing the crystalline silicon textured structure, the texturing agent used in the second texturing process contains, by mass, 0.2 to 0.7 parts of sodium lignosulfonate and 0.1 to 0.3 parts of benzotriazole.

[0103] It is understood that the mass fractions of sodium lignosulfonate used in the second texturing process include, but are not limited to, 0.2 parts, 0.25 parts, 0.3 parts, 0.35 parts, 0.4 parts, 0.45 parts, 0.5 parts, 0.55 parts, 0.6 parts, 0.65 parts, and 0.7 parts; and the mass fractions of benzotriazole include, but are not limited to, 0.1 parts, 0.15 parts, 0.2 parts, 0.25 parts, and 0.3 parts.

[0104] In some examples, the texturing agent used in the second texturing process in the preparation method of the crystalline silicon textured structure also includes at least one of 2-methyl-2,4-pentanediol, sodium carboxymethyl cellulose, 5-nitroguaiacol, triclosan, sodium hydroxide, poly[(naphthaleneform)sulfonate], sodium acetate, and sodium chloride.

[0105] Furthermore, in the method for preparing the textured silicon structure, the texturing agent used in the second texturing process also includes 2-methyl-2,4-pentanediol, sodium carboxymethyl cellulose, 5-nitroguaiacol, triclosan, sodium hydroxide, poly[(naphthalenealdehyde)sulfonate], sodium acetate, and sodium chloride.

[0106] In some examples, in the method for preparing the crystalline silicon textured structure, the texturing agent used in the second texturing process, by mass parts, includes the following components: 0.2-0.3 parts of 2-methyl-2,4-pentanediol, 1.5-2 parts of sodium carboxymethyl cellulose, 0.18-0.22 parts of 5-nitroguaiacol, 0.2-0.25 parts of triclosan, 0.3-0.5 parts of sodium hydroxide, 0.1-0.15 parts of poly[(naphthaleneformaldehyde)sulfonate], 0.2-0.7 parts of sodium lignosulfonate, 0.1-0.3 parts of benzotriazole, 0.05-0.15 parts of sodium acetate, 0.2-0.4 parts of sodium chloride, and 95-96.97 parts of water.

[0107] It is understood that, by weight, the texturing agent used in the second texturing process includes, but is not limited to, 0.2 parts, 0.22 parts, 0.24 parts, 0.26 parts, 0.28 parts, and 0.3 parts of 2-methyl-2,4-pentanediol; 1.5 parts, 1.6 parts, 1.7 parts, 1.8 parts, 1.9 parts, and 2 parts of sodium carboxymethyl cellulose; 0.18 parts, 0.19 parts, 0.2 parts, 0.21 parts, and 0.22 parts of 5-nitroguaiacol; and 0.21 parts, including but not limited to 0.2 parts, 0.21 parts, and 0.21 parts of triclosan. 0.22 parts, 0.23 parts, 0.24 parts, 0.25 parts; sodium hydroxide, including but not limited to 0.3 parts, 0.32 parts, 0.34 parts, 0.36 parts, 0.38 parts, 0.4 parts, 0.42 parts, 0.44 parts, 0.46 parts, 0.48 parts, 0.5 parts; poly[(naphthaleneformaldehyde)sulfonate], including but not limited to 0.1 parts, 0.11 parts, 0.12 parts, 0.13 parts, 0.14 parts, 0.15 parts; sodium lignosulfonate, including but not limited to 0.2 parts, 0.25 parts, 0.3 ... 0.35 parts, 0.4 parts, 0.45 parts, 0.5 parts, 0.55 parts, 0.6 parts, 0.65 parts, 0.7 parts; benzotriazole, including but not limited to 0.1 parts, 0.15 parts, 0.2 parts, 0.25 parts, 0.3 parts; sodium acetate, including but not limited to 0.05 parts, 0.06 parts, 0.07 parts, 0.08 parts, 0.09 parts, 0.1 parts, 0.11 parts, 0.12 parts, 0.13 parts, 0.14 parts, 0.15 parts; sodium chloride, including but not limited to 0.2 parts, 0.22 parts, 0.24 parts, ... 0.26 parts, 0.28 parts, 0.3 parts, 0.32 parts, 0.34 parts, 0.36 parts, 0.38 parts, 0.4 parts; water including but not limited to 95.0 parts, 95.1 parts, 95.2 parts, 95.3 parts, 95.4 parts, 95.5 parts, 95.6 parts, 95.7 parts, 95.8 parts, 95.9 parts, 96.0 parts, 96.1 parts, 96.2 parts, 96.3 parts, 96.4 parts, 96.5 parts, 96.6 parts, 96.7 parts, 96.8 parts, 96.9 parts, 96.97 parts.

[0108] In some examples, in the method for preparing the crystalline silicon textured structure, the texturing agent used in the second texturing process, by mass parts, consists of the following components: 0.2-0.3 parts of 2-methyl-2,4-pentanediol, 1.5-2 parts of sodium carboxymethyl cellulose, 0.18-0.22 parts of 5-nitroguaiacol, 0.2-0.25 parts of triclosan, 0.3-0.5 parts of sodium hydroxide, 0.1-0.15 parts of poly[(naphthaleneform)sulfonate], 0.2-0.7 parts of sodium lignosulfonate, 0.1-0.3 parts of benzotriazole, 0.05-0.15 parts of sodium acetate, 0.2-0.4 parts of sodium chloride, and 95-96.97 parts of water.

[0109] In some examples, in the method for preparing the crystalline silicon textured structure, the texturing agent used in the second texturing process, by mass percentage, includes the following components: 0.2%~0.3% 2-methyl-2,4-pentanediol, 1.5%~2% sodium carboxymethyl cellulose, 0.18%~0.22% 5-nitroguaiacol, 0.2%~0.25% triclosan, 0.3%~0.5% sodium hydroxide, 0.1%~0.15% poly[(naphthaleneform)sulfonate], 0.2%~0.7% sodium lignosulfonate, 0.1%~0.3% benzotriazole, 0.05%~0.15% sodium acetate, 0.2%~0.4% sodium chloride, and 95%~96.97% water.

[0110] In some of these examples, in the method for preparing the crystalline silicon textured structure, the mass concentration of sodium lignosulfonate in the texturing agent used in the second texturing process is 0.3% to 0.7%.

[0111] It is understood that the mass concentration of sodium lignosulfonate includes, but is not limited to, 0.3%, 0.4%, 0.5%, 0.6%, and 0.7%.

[0112] In some of these examples, in the method for preparing the textured silicon structure, the benzotriazole mass concentration in the texturing agent used in the second texturing process is 0.2% to 0.3%.

[0113] It is understood that the mass concentration of benzotriazole includes, but is not limited to, 0.2%, 0.21%, 0.22%, 0.23%, 0.24%, 0.25%, 0.26%, 0.27%, 0.28%, 0.29%, and 0.3%.

[0114] Understandably, in some of these examples, the texturing agent used in the second texturing process also includes pigments.

[0115] In some of these examples, the second texturing process is carried out at a temperature of 68°C to 76°C for a duration of 80 to 160 seconds.

[0116] It is understood that the temperature of the second texturing process includes, but is not limited to, 68℃, 69℃, 70℃, 71℃, 72℃, 73℃, 74℃, 75℃, and 76℃, and the time includes, but is not limited to, 80s, 90s, 100s, 110s, 120s, 130s, 140s, 150s, and 160s. By controlling the temperature and time of the second texturing process, the maximum value d of the distance from a point on the first side surface to the extended surface of the second side surface can be controlled.

[0117] In some of these examples, the texturing agent used in the first texturing process (the first texturing agent) comprises the following components: 2-methyl-2,4-pentanediol, sodium carboxymethyl cellulose, 5-nitroguaiacol, triclosan, sodium hydroxide, sodium acetate, and sodium chloride.

[0118] In some of these examples, the texturing agent used in the first texturing process, by mass fraction, comprises the following components:

[0119] 0.2-0.3 parts of 2-methyl-2,4-pentanediol, 1.5-2 parts of sodium carboxymethyl cellulose, 0.18-0.22 parts of 5-nitroguaiacol, 0.2-0.25 parts of triclosan, 0.3-0.5 parts of sodium hydroxide, 0.15-0.25 parts of sodium acetate, 0.2-0.4 parts of sodium chloride, and 96.08-97.27 parts of water.

[0120] It is understood that, by weight, the texturing agent used in the first texturing treatment includes, but is not limited to, 0.2 parts, 0.22 parts, 0.24 parts, 0.26 parts, 0.28 parts, and 0.3 parts of 2-methyl-2,4-pentanediol; 1.5 parts, 1.6 parts, 1.7 parts, 1.8 parts, 1.9 parts, and 2 parts of sodium carboxymethyl cellulose; 0.18 parts, 0.19 parts, 0.2 parts, 0.21 parts, and 0.22 parts of 5-nitroguaiacol; and 0.21 parts, 0.22 parts, and 0.23 parts, and 0.24 parts of triclosan. 0.25 parts; Sodium hydroxide, including but not limited to 0.3 parts, 0.32 parts, 0.34 parts, 0.36 parts, 0.38 parts, 0.4 parts, 0.42 parts, 0.44 parts, 0.46 parts, 0.48 parts, and 0.5 parts; Sodium acetate, including but not limited to 0.15 parts, 0.16 parts, 0.18 parts, 0.2 parts, 0.22 parts, 0.24 parts, and 0.25 parts; Sodium chloride, including but not limited to 0.2 parts, 0.22 parts, 0.24 parts, 0.26 parts, 0.28 parts, 0.3 parts, 0.32 parts, 0.34 parts, 0.36 parts, 0.38 parts, and 0.4 parts.

[0121] In some of these examples, the texturing agent used in the first texturing process, by mass percentage, comprises the following components:

[0122] 2-Methyl-2,4-pentanediol 0.2%~0.3%, sodium carboxymethyl cellulose 1.5%~2%, 5-nitroguaiacol 0.18%~0.22%, triclosan 0.2%~0.25%, sodium hydroxide 0.3%~0.5%, sodium acetate 0.15%~0.25%, sodium chloride 0.2%~0.4%, and water balance.

[0123] In some of these examples, the texturing agent used in the first texturing process also includes pigments.

[0124] In some of these examples, the first texturing process is carried out at a temperature of 80°C to 86°C for a duration of 300s to 360s.

[0125] It is understood that the temperature of the first texturing process includes, but is not limited to, 80℃, 81℃, 82℃, 83℃, 84℃, 85℃, and 86℃, and the time includes, but is not limited to, 300s, 310s, 320s, 330s, 340s, 350s, and 360s.

[0126] See Figure 2 One embodiment of this application provides a battery 10, including a silicon substrate 11 and a metal electrode 12. At least one surface of the silicon substrate 11 includes a metal contact region, and the metal electrode 12 is disposed in the metal contact region. The metal contact region includes the above-described crystalline silicon textured structure or a crystalline silicon textured structure prepared by the above-described method for preparing the crystalline silicon textured structure.

[0127] The battery provided in this application has a metal contact area comprising the aforementioned crystalline silicon textured structure or a crystalline silicon textured structure prepared by the aforementioned method, which can effectively improve the fill factor of the battery and thus effectively improve the photoelectric conversion efficiency of the battery.

[0128] It is understood that in some examples, in the battery 10, the metal contact region of the silicon substrate 11 is the aforementioned crystalline silicon textured structure. Further, the metal contact region of the silicon substrate 11 includes a silicon substrate 111 and a pyramid-like structure 112. The pyramid-like structure 112 includes a first portion and a second portion. The first portion is located on the side of the second portion away from the silicon substrate 111, and the first portion has a first side surface that is recessed.

[0129] In some of these examples, the surface of the silicon substrate 11 in the battery 10 also includes a non-metallic contact area.

[0130] It is understood that the area of ​​the silicon substrate 11 in contact with the metal electrode 12 is the metal contact area, and the area not in contact with the metal electrode 12 is the non-metal contact area. Furthermore, this application does not limit the textured structure of the non-metal contact area of ​​the silicon substrate 11; it can be the aforementioned crystalline silicon textured structure or a conventional textured structure.

[0131] In some of these examples, the non-metallic contact area of ​​battery 10 includes the aforementioned crystalline silicon textured surface structure.

[0132] In some examples, in the battery 10, the thickness of the silicon substrate 11 in the metal contact region and the thickness of the silicon substrate 11 in the non-metal contact region are independently 80 μm to 250 μm. It can be understood that the thickness of the silicon substrate 11 in the metal contact region and the thickness of the silicon substrate 11 in the non-metal contact region are independently, but not limited to, 80 μm, 90 μm, 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, 160 μm, 170 μm, 180 μm, 190 μm, 200 μm, 210 μm, 220 μm, 230 μm, 240 μm, and 250 μm.

[0133] In some of these examples, in battery 10, the thickness of the silicon substrate 11 in the metal contact area is δ1, and the thickness of the silicon substrate 11 in the non-metal contact area is δ2, where δ1 > δ2.

[0134] It is understood that in some examples, in the battery 10, the non-metallic contact area on the front side of the silicon substrate 11 is lower than the metallic contact area on the front side of the silicon substrate 11, that is, on the front side of the silicon substrate 11, the metallic contact area protrudes more than the non-metallic contact area. Furthermore, in the front direction of the silicon substrate 11, the silicon substrate of the metallic contact area protrudes δ1-δ2 from the silicon substrate of the non-metallic contact area.

[0135] In some of these examples, in battery 10, δ1-δ2 = 0.5 μm~15 μm.

[0136] It can be understood that δ1-δ2 includes, but is not limited to, 0.5 μm, 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm, 11 μm, 12 μm, 13 μm, 14 μm, 15 μm.

[0137] In some of these examples, in battery 10, δ1-δ2 = 0.5 μm to 10 μm.

[0138] Patterning the emitter on the front of the battery and controlling the height difference (δ1-δ2) can reduce Auger recombination and improve the battery's Voc, FF, and Isc.

[0139] In some of these examples, in battery 10, the total area of ​​the non-metallic contact area is S1, and the total area of ​​the metallic contact area is S2, where S1 > S2.

[0140] In some of these examples, in battery 10, silicon substrate 11 is doped with boron group elements, with a doping concentration of C1 in the metal contact region and a doping concentration of C2 in the non-metal contact region, where C1 > C2.

[0141] It can be understood that the doping concentration C1 refers to the average concentration of boron group elements in the silicon substrate 11 throughout the entire metal contact area, and the doping concentration C2 refers to the average concentration of boron group elements in the silicon substrate 11 throughout the entire non-metal contact area.

[0142] It is understandable that the boron group elements are a column of elements located in group IIIA of the periodic table.

[0143] In some of these examples, in battery 10, the boron group elements are each independently selected from at least one of boron, aluminum, gallium, and indium.

[0144] It is understood that the silicon substrate 11 includes a front side and a back side.

[0145] In some of these examples, the front side of the silicon substrate 11 in the battery 10 includes the aforementioned crystalline silicon textured structure.

[0146] In some of these examples, battery 10 includes at least one of HJT battery (heterojunction battery), TOPCon battery (tunneling oxide passivated contact battery), BC battery (back contact battery), and PERC battery (passivated emitter and back contact battery).

[0147] In some of these examples, battery 10 is a TOPCon battery.

[0148] In some of these examples, the cell 10 includes a tunneling oxide layer 13 and a polysilicon layer 14, the tunneling oxide layer 13 being disposed on the back side of the silicon substrate 11 and the polysilicon layer 14 being disposed on the side of the tunneling oxide layer 13 away from the silicon substrate 11.

[0149] In some of these examples, the battery 10 includes a passivation layer 15 and an antireflection layer 16, with the passivation layer 15 disposed on the front side of the silicon substrate 11 and the antireflection layer 16 disposed on the side of the passivation layer 15 away from the silicon substrate 11.

[0150] In some of these examples, in the battery 10, the surface of the polycrystalline silicon layer 14 away from the tunneling oxide layer 13 is provided with a passivation layer 15 and an antireflection layer 16 in sequence.

[0151] In some of these examples, in battery 10, metal electrode 12 includes a front electrode 121 and a back electrode 122.

[0152] In some of these examples, the battery 10 includes, from back to front, a stacked back electrode 122, an antireflection layer 16, a passivation layer 15, a polysilicon layer 14, a tunneling oxide layer 13, a silicon substrate 11, a passivation layer 15, an antireflection layer 16, and a front electrode 121.

[0153] In some of these examples, in battery 10, the front electrode 121 penetrates the passivation layer 15 and the antireflection layer 16 and is connected to the front side of the silicon substrate 11, while the back metal electrode 122 penetrates the tunnel oxide layer 13 and is connected to the polycrystalline silicon layer 14.

[0154] It is understood that this application does not limit the types of metal electrode 12, tunneling oxide layer 13, polysilicon layer 14, passivation layer 15, and antireflection layer 16; any type that can be implemented is acceptable. For example, tunneling oxide layer 13 may include SiO2, and passivation layer 15 and antireflection layer 16 may independently include, but are not limited to, at least one of polysilicon layer, metal oxide layer, non-metal oxide, nitride, and oxynitride.

[0155] One embodiment of this application provides a method for preparing a battery, comprising the following steps:

[0156] A silicon wafer is provided, wherein at least one surface of the silicon wafer includes a metal contact area;

[0157] The first texturing process and the second texturing process are performed sequentially in the metal contact area of ​​the silicon wafer; the texturing agent used in the second texturing process includes sodium lignosulfonate and benzotriazole.

[0158] Metal electrodes are fabricated in the metal contact region.

[0159] The battery fabrication method provided in this application obtains a crystalline silicon textured surface structure in the metal contact region, which can effectively improve the fill factor of the battery and thus effectively improve the photoelectric conversion efficiency of the battery.

[0160] It is understood that in the battery fabrication method, the first texturing process and the second texturing process are performed sequentially in the metal contact area of ​​the silicon wafer. This is consistent with the characteristics in the above-mentioned method for fabricating crystalline silicon textured surface structures, and will not be elaborated here.

[0161] In some of these examples, the battery fabrication method uses a metal conductive paste to prepare metal electrodes.

[0162] Based on the first texturing process of the silicon wafer, a second texturing process is performed using a texturing agent containing specific components to generate a pyramid-like structure. The pyramid-like structure includes a first part and a second part. The first part is located on the side of the second part away from the silicon substrate. The first part has a first side surface, which is a concave structure.

[0163] By controlling the maximum value d of the distance from a point on the first side to the extension surface of the second side, the contact points between the first part of the pyramid-like structure and the slurry can be enhanced, thereby increasing the fill factor of the battery and thus improving the photoelectric conversion efficiency.

[0164] In some of these examples, the battery fabrication method includes the following steps:

[0165] Step S100: Perform a first texturing process and a second texturing process on both surfaces of the silicon wafer in sequence.

[0166] It is understood that step S100 includes performing a first texturing process and a second texturing process on the front side of the silicon wafer in sequence, and performing a first texturing process and a second texturing process on the back side of the silicon wafer in sequence; further, the texturing area includes the metal contact area and the non-metal contact area on the front side, and the metal contact area and the non-metal contact area on the back side.

[0167] Step S200: Diffusion treatment of silicon wafer is performed using a semiconductor source.

[0168] In some of these examples, in step S200, the semiconductor source includes at least one of a boron source, an aluminum source, a gallium source, and an indium source.

[0169] It is understood that in step S200, the diffusion process dops the boron group elements in the semiconductor source into the silicon wafer, while simultaneously forming a mask layer on both surfaces of the silicon wafer. For example, in some examples, the semiconductor source includes boron oxide, and the silicon on the surface of the silicon wafer reacts with the boron oxide to form a borosilicate glass layer (BSG mask layer).

[0170] Step S300: Perform laser molding on the non-metallic contact area on the front side of the silicon wafer.

[0171] It is understandable that step S300, which involves laser-opening the non-metallic contact area on the front side of the silicon wafer, is to remove the mask layer formed in step S200 on the non-metallic contact area on the front side of the silicon wafer.

[0172] Step S400: Perform a third texturing process on the non-metallic contact area after laser mold opening.

[0173] It is understood that in step S100, texturing is performed on both the metal contact area and the non-metal contact area, and etching is performed on both the metal contact area and the non-metal contact area at the same time. In steps S300 to S400, laser molding and texturing are performed again only on the non-metal contact area. At this time, the non-metal contact area undergoes a second etching and thinning, resulting in a height difference between the metal contact area and the non-metal contact area of ​​the silicon wafer. Furthermore, in the thickness direction of the cell, the non-metal contact area on the front side of the silicon wafer is lower than the metal contact area on the front side of the silicon wafer, that is, on the front side of the silicon wafer, the metal contact area protrudes more than the non-metal contact area.

[0174] In some examples, in step S400, the temperature of the third texturing process is 65℃~85℃. It is understood that the temperature of the third texturing process includes, but is not limited to, 65℃, 66℃, 67℃, 68℃, 69℃, 70℃, 71℃, 72℃, 73℃, 74℃, 75℃, 76℃, 77℃, 78℃, 79℃, 80℃, 81℃, 82℃, 83℃, 84℃, and 85℃. Further, the time of the third texturing process is 50s~500s. It is understood that the time of the third texturing process includes, but is not limited to, 50s, 100s, 150s, 200s, 250s, 300s, 350s, 400s, 450s, and 500s. By controlling the temperature and time of the third texturing process, δ1-δ2 can be controlled.

[0175] Step S500: Perform double-sided oxidation on the silicon wafer.

[0176] It is understandable that the oxidation process will generate a silicon oxide layer, which will protect the textured surface of the front side when the silicon wafer is back polished.

[0177] Step S600: Perform back polishing on the silicon wafer.

[0178] It is understood that step S600 back polishing of the silicon wafer removes the silicon oxide layer generated on the back of the silicon wafer (including the metal contact area and the non-metal contact area) in step S500, the mask layer formed on the back of the silicon wafer (including the metal contact area and the non-metal contact area) in step S200, and the crystalline silicon textured surface structure formed by the first texturing process and the second texturing process.

[0179] Furthermore, this application does not restrict the polishing liquid used for back polishing; any silicon wafer can be back polished.

[0180] Step S700: A tunneling oxide layer and a polycrystalline silicon layer are sequentially prepared on the back side of the silicon wafer.

[0181] In some of these examples, step S700, preparing the tunneling oxide layer and the polysilicon layer, includes:

[0182] Step S710: A tunneling oxide layer is prepared on the back side of the silicon wafer using PECVD (plasma-enhanced chemical vapor deposition); optionally, a SiO2 tunneling oxide layer is deposited by reacting N2O with Si.

[0183] Step S720: Deposit a Poly-Si thin film using PECVD; optionally, the reaction gases include SiH4, H2 and PH3;

[0184] Step S730: Anneal the silicon wafer.

[0185] It is understandable that during the annealing process, the initially deposited amorphous silicon film is completely crystallized to form a polycrystalline silicon structure, while simultaneously activating the doped atoms.

[0186] In other examples, step S700, preparing the tunneling oxide layer and the polysilicon layer includes:

[0187] Step S740: A tunneling oxide layer is grown using LPCVD (low-pressure chemical vapor deposition).

[0188] Step S750: Grow a polycrystalline silicon layer using LPCVD;

[0189] Step S750: Phosphorus diffusion is performed on the silicon wafer.

[0190] In some of these examples, after the polycrystalline silicon layer is prepared in step S700, step S760 is also included: removing the front-side wrapping.

[0191] It can be understood that the front-side winding plating includes the silicon oxide layer generated on the front side of the silicon wafer in step S500, and the tunneling oxide layer and polycrystalline silicon layer materials wound onto the front side when preparing the tunneling oxide layer and polycrystalline silicon layer on the back side.

[0192] Step S800: Passivation layer and antireflection layer are sequentially prepared on both surfaces of the silicon wafer.

[0193] It is understood that step S800 includes sequentially preparing a passivation layer and an anti-reflection layer on the front side of the silicon wafer, and sequentially preparing a passivation layer and an anti-reflection layer on the back side of the silicon wafer.

[0194] Step S900: Prepare a metal electrode in the metal contact area of ​​the silicon wafer.

[0195] In some of these examples, in step S900, a front metal electrode is prepared on the front side of the silicon wafer, and a back metal electrode is prepared on the back side of the silicon wafer.

[0196] In some of these examples, the steps of preparing the metal electrode in the battery fabrication method include: applying a conductive metal paste to the metal contact area of ​​the silicon wafer and then performing LECO laser-assisted sintering.

[0197] Under the action of LECO, the metal conductive paste produces instantaneous current. In the LECO process, the metal conductive paste will form a silicon-metal alloy with the first part (spiked structure) of the pyramid-like structure (for example, a silicon-silver alloy is formed when the metal conductive paste is silver paste). The resulting alloy has less passivation damage to the battery and is beneficial for transmission. Moreover, the first part (spiked structure) of the above-mentioned crystalline silicon textured structure can provide contact points that are easier to transmit LECO current, thereby effectively improving the photoelectric conversion efficiency.

[0198] It is understandable that L1, α, and h1 / h2 in the pyramid-like structure affect the volume of LECO. Based on controlling d and keeping L1, α, and h1 / h2 within the above ranges, the larger the volume of the first part in the pyramid-like structure, the larger the volume of the silicon-silver alloy formed, and the more significant the improvement in photoelectric conversion efficiency.

[0199] One embodiment of this application provides a photovoltaic module, including the above-described battery or a battery prepared by the above-described battery preparation method.

[0200] It is understandable that photovoltaic (PV) modules can be used in PV power plants, such as ground-mounted, rooftop, and floating power plants, as well as in equipment or devices that utilize solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, and solar buildings. It is also understood that the application scenarios of PV systems include, but are not limited to, all areas that require solar energy for power generation. Taking a PV power grid as an example, a PV system can include PV arrays, combiner boxes, and inverters. A PV array can be a combination of multiple PV modules; for example, multiple PV modules can form multiple PV arrays. The PV arrays are connected to combiner boxes, which collect the current generated by the PV arrays. The collected current flows through an inverter, converts it into AC power required by the mains grid, and then connects to the mains grid to achieve solar power supply.

[0201] The present application will be described in further detail below with reference to specific embodiments, but the embodiments of the present application are not limited thereto.

[0202] Example 1

[0203] (1) The two surfaces of the silicon wafer are subjected to a first texturing process and a second texturing process in sequence;

[0204] The texturing agent used in the first texturing process, by mass percentage, comprises the following components: 0.3% 2-methyl-2,4-pentanediol, 1.5% sodium carboxymethyl cellulose, 0.22% 5-nitroguaiacol, 0.2% triclosan, 0.3% sodium hydroxide, 0.2% sodium acetate, 0.2% sodium chloride, and water as the balance; the temperature of the first texturing process is 80°C.

[0205] The texturing agent used in the second texturing process, by mass percentage, comprises the following components: 0.3% 2-methyl-2,4-pentanediol, 1.5% sodium carboxymethyl cellulose, 0.22% 5-nitroguaiacol, 0.2% triclosan, 0.3% sodium hydroxide, 0.1% poly[(naphthaleneform)sulfonate], 0.7% sodium lignosulfonate, 0.3% benzotriazole, 0.15% sodium acetate, 0.2% sodium chloride, and the balance being water; the temperature of the second texturing process is 70°C, and the time is 80 seconds.

[0206] The resulting pyramid-like structure, such as Figure 3 As shown, the maximum value d of the distance from a point on the side of the tower tip (first part) to the extended surface of its corresponding side of the tower base (second part) is 100nm;

[0207] (2) A semiconductor source is used to perform diffusion treatment on the silicon wafer;

[0208] (3) Laser mold opening is performed on the non-metallic contact area on the front side of the silicon wafer;

[0209] (4) Perform a third texturing process on the non-metallic contact area after laser mold opening. The texturing agent used in the third texturing process is the same as that used in the second texturing process in step (1). The temperature of the third texturing process is 65℃. In the silicon substrate formed, δ1-δ2=0.5 μm.

[0210] (5) Perform double-sided oxidation treatment on the silicon wafer;

[0211] (6) Back polishing of the silicon wafer;

[0212] (7) A tunneling oxide layer and a polycrystalline silicon layer are sequentially prepared on the back side of the silicon wafer;

[0213] (8) Remove the front-side plating;

[0214] (9) A passivation layer and an antireflection layer are sequentially prepared on both surfaces of the silicon wafer;

[0215] (10) Prepare metal electrodes in the metal contact area of ​​the silicon wafer.

[0216] Example 2

[0217] The difference from Example 1 is that in step (4), the temperature of the third texturing process is 80°C and δ1-δ2=11 μm.

[0218] Example 3

[0219] The difference from Example 1 is that steps (3) and (4) are omitted, and δ1 = δ2.

[0220] Example 4

[0221] The difference from Example 1 is that in step (4), the sizing agent used in the third sizing process is the same sizing agent used in the first sizing process in step (1).

[0222] Example 5

[0223] The difference from Example 1 is that the second texturing process in step (1) takes 140s, and the maximum value d of the distance from a point on the side of the pyramid tip (first part) to the extended surface of the corresponding side of the bottom (second part) in the formed pyramid-like structure is 200nm.

[0224] Comparative Example 1

[0225] The difference from Example 1 is that the sodium lignosulfonate in the texturing agent used in the second texturing process of step (1) is replaced with an equal mass content of lignosulfonic acid to form a standard pyramid, such as... Figure 4 As shown.

[0226] The reflectivity of the silicon substrates formed by the third texturing process in step (4) of Example 1 and Comparative Example 1 was tested. The reflectivity of Example 1 was 8.40%, and the reflectivity of Comparative Example 1 was 9.38%.

[0227] The open-circuit voltage (Voc), short-circuit current density (Isc), fill factor (FF), and energy conversion efficiency (Eta) of the batteries prepared in each embodiment and comparative example were tested using IV curves. The test conditions were: AM 1.5G standard solar spectrum and irradiance of 1000 W / m². 2 The experimental test results are detailed in Table 1.

[0228] Table 1

[0229]

[0230] As shown in Table 1, compared with Comparative Example 1, the photoelectric conversion efficiency of the batteries prepared in each embodiment is higher.

[0231] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0232] The embodiments described above are merely illustrative of several implementation methods of this application, intended to facilitate a detailed understanding of the technical solutions of this application, but should not be construed as limiting the scope of protection of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the scope of protection of this application. It should be understood that technical solutions obtained by those skilled in the art based on the technical solutions provided in this application through logical analysis, reasoning, or limited experimentation are all within the scope of protection of the appended claims. Therefore, the scope of protection of this patent application should be determined by the content of the appended claims, and the specification can be used to interpret the content of the claims.

Claims

1. A textured silicon surface structure, characterized in that, The crystalline silicon textured structure includes a silicon substrate and a pyramid-like structure disposed on the silicon substrate. The pyramid-like structure includes a first part and a second part. The first part is located on the side of the second part away from the silicon substrate. The first part has a first side surface with a concave structure. The first part is the apex of the pyramid-like structure and has a spike structure. The second part has a second side surface connected to the first side surface. The first side surface and the second side surface are not on the same plane.

2. The crystalline silicon textured surface structure as described in claim 1, characterized in that, The second part has a second side surface connected to the first side surface, and the maximum value of the distance from a point on the first side surface to the extension surface of the second side surface is d, where 10 nm ≤ d ≤ 200 nm.

3. The crystalline silicon textured surface structure as described in claim 1, characterized in that, The crystalline silicon textured surface structure satisfies at least one of the following characteristics: (1) The distance between the endpoints of two adjacent side edges away from the silicon substrate in the second part is L1, 50 nm≤L1≤200 nm; (2) The distance between the endpoints of two adjacent side edges near the silicon substrate in the second part is L2, 1000 nm≤L2≤3000 nm.

4. The crystalline silicon textured surface structure as described in claim 3, characterized in that, The angle between at least one side edge of the second part and the silicon substrate is α, where 56°≤α≤68°.

5. The crystalline silicon textured surface structure as described in any one of claims 1 to 4, characterized in that, Along the vertical direction of the silicon substrate, the height of the first portion is h1, the height of the second portion is h2, and the crystalline silicon textured surface structure satisfies at least one of the following characteristics: (1)10 nm≤h1≤1000 nm; (2) 500nm≤h2≤2000nm; (3) 0.02≤h1 / h2≤1.

6. A method for preparing a textured silicon surface structure as described in any one of claims 1 to 5, characterized in that, Includes the following steps: A first texturing process and a second texturing process are sequentially performed on at least one surface of a silicon wafer. The texturing agent used in the second texturing process includes sodium lignosulfonate and benzotriazole, wherein the mass fraction of sodium lignosulfonate is greater than the mass fraction of benzotriazole in the texturing agent.

7. The method for preparing the textured silicon surface structure as described in claim 6, characterized in that, The texturing agent comprises, by weight, the following components: 0.2-0.3 parts of 2-methyl-2,4-pentanediol, 1.5-2 parts of sodium carboxymethyl cellulose, 0.18-0.22 parts of 5-nitroguaiacol, 0.2-0.25 parts of triclosan, 0.3-0.5 parts of sodium hydroxide, 0.1-0.15 parts of poly[(naphthaleneformaldehyde)sulfonate], 0.2-0.7 parts of sodium lignosulfonate, 0.1-0.3 parts of benzotriazole, 0.05-0.15 parts of sodium acetate, 0.2-0.4 parts of sodium chloride, and 95-96.97 parts of water.

8. The method for preparing the textured silicon crystalline structure according to any one of claims 6 to 7, characterized in that, The method for preparing the textured silicon crystalline structure satisfies at least one of the following characteristics: (1) In the flocking agent, the sodium lignosulfonate is 0.3 to 0.7 parts by mass; (2) In the texturing agent, the benzotriazole is present in a mass fraction of 0.2 to 0.3 parts; (3) The temperature of the second texturing process is 68℃~76℃ and the time is 80s~160s.

9. A battery, characterized in that, The device includes a silicon substrate and a metal electrode, wherein at least one surface of the silicon substrate includes a metal contact region, the metal electrode is disposed in the metal contact region, and the metal contact region includes a crystalline silicon textured structure as described in any one of claims 1 to 5 or a crystalline silicon textured structure prepared by a method described in any one of claims 6 to 8.

10. The battery as claimed in claim 9, characterized in that, The surface of the silicon substrate also includes a non-metallic contact region, which includes the crystalline silicon textured surface structure.

11. The battery as claimed in claim 10, characterized in that, The thickness of the silicon substrate in the metal contact area is δ1, and the thickness of the silicon substrate in the non-metal contact area is δ2, where δ1 > δ2.

12. The battery as claimed in claim 11, characterized in that, δ1-δ2=0.5 μm~15 μm.

13. The battery according to any one of claims 10 to 12, characterized in that, The total area of ​​the non-metallic contact area is S1, and the total area of ​​the metallic contact area is S2, where S1 > S2.

14. The battery according to any one of claims 10 to 12, characterized in that, The silicon substrate is doped with boron group elements, and the doping concentration of the boron group elements in the metal contact region is C1, and the doping concentration of the boron group elements in the non-metal contact region is C2, where C1 > C2.

15. The battery as claimed in claim 14, characterized in that, The boron group elements are each independently selected from at least one of boron, aluminum, gallium, and indium.

16. The battery according to any one of claims 9 to 12, characterized in that, The silicon substrate includes a front side and a back side, and the cell satisfies at least one of the following characteristics: (1) The battery includes a tunneling oxide layer and a polycrystalline silicon layer, wherein the tunneling oxide layer is disposed on the back side of the silicon substrate and the polycrystalline silicon layer is disposed on the side of the tunneling oxide layer away from the silicon substrate; (2) The battery includes a passivation layer and an anti-reflection layer. The passivation layer is disposed on the front side of the silicon substrate, and the anti-reflection layer is disposed on the side of the passivation layer away from the silicon substrate.

17. A method for preparing a battery as described in any one of claims 9 to 16, characterized in that, Includes the following steps: A silicon wafer is provided, wherein at least one surface of the silicon wafer includes a metal contact area; A first texturing process and a second texturing process are sequentially performed on the metal contact area of ​​the silicon wafer; the texturing agent used in the second texturing process includes sodium lignosulfonate and benzotriazole; A metal electrode is prepared in the metal contact region.

18. The method for preparing a battery as described in claim 17, characterized in that, Includes the following steps: Both surfaces of the silicon wafer are subjected to a first texturing process and a second texturing process in sequence; The silicon wafer is diffused using a semiconductor source; Laser molding is performed on the non-metallic contact area on the front side of the silicon wafer; The non-metallic contact area after laser mold opening is subjected to a third texturing process; The silicon wafer is subjected to double-sided oxidation treatment; The silicon wafer is back-polished; A tunneling oxide layer and a polycrystalline silicon layer are sequentially formed on the back side of the silicon wafer; A passivation layer and an antireflection layer are sequentially prepared on both surfaces of the silicon wafer; Metal electrodes are fabricated in the metal contact region of the silicon wafer.

19. The method for preparing a battery according to any one of claims 17-18, characterized in that, The steps for preparing the metal electrode include: applying a conductive metal paste to the metal contact area of ​​the silicon wafer and then performing LECO laser-assisted sintering.

20. A photovoltaic module, characterized in that, This includes batteries prepared by any one of the battery methods described in claims 9 to 16 or claims 17 to 19.

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