Micro-channel liquid cooling method, device and equipment for heat dissipation of integrated circuit chip and medium

Abstract

The invention discloses a micro-channel liquid cooling method, device, equipment and medium for heat dissipation of an integrated circuit chip, and the method comprises the steps: collecting temperature data of different depths of the surface and the interior of the chip in real time through a temperature sensor array, an embedded temperature probe and an infrared detector, and generating a three-dimensional temperature field matrix; carrying out region division according to the microchannel physical layout of the chip, mapping a three-dimensional temperature field matrix, and generating a region temperature field matrix; calculating a thermal load change rate of the regional temperature field matrix, and generating a main flow regulation parameter by adopting a PI D algorithm based on the change rate; calculating branch flow adjusting parameters by combining the temperature field matrixes of the adjacent areas and a pre-constructed topological association table, and fusing the main flow adjusting parameters and the branch flow adjusting parameters to generate a flow adjusting quantity instruction. According to the invention, dynamic and accurate regulation and control of chip heat dissipation are realized, and the heat dissipation efficiency is effectively improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of heat dissipation of electronic devices, and in particular relates to a microchannel liquid cooling method, device, equipment and medium for heat dissipation of integrated circuit chips. Background Art

[0002] With the rapid development of high-performance integrated circuit chip technology, power consumption density continues to rise, posing an increasingly severe heat dissipation challenge. Microchannel liquid cooling technology, with its efficient heat dissipation capabilities, has become a key solution to this challenge. This technology integrates micron-scale flow channels within or on the chip, directly removing heat with coolant, resulting in high heat dissipation efficiency and excellent temperature uniformity. Traditionally, microchannel liquid cooling control methods have primarily included fixed control based on total inlet flow / pressure; feedback control based on the average temperature of a small number of points on the chip surface; and simple independent regulation based on coarse partitioning. However, the current microchannel liquid cooling control method has the following problems: insufficient temperature perception, relying on a small number of points or average temperature, unable to perceive the three-dimensional temperature field distribution on the chip surface and inside (especially at different depths) in real time and comprehensively, and difficult to accurately locate hot spots; poor control adaptability, static or simple feedback strategies are difficult to effectively cope with the complex and rapid thermal load fluctuations caused by dynamic load changes in the chip, which can easily lead to response lag or unstable control; fluid distribution is disconnected from heat demand, and the topological structure of the microchannel network, branch fluid resistance characteristics and inter-regional thermal coupling are not fully considered during adjustment, and the flow distribution cannot accurately match the actual heat distribution; weak response to deep heat sources, mainly focusing on surface temperature, and lack of effective detection and control means for concentrated heat sources generated in deep areas inside the chip. Summary of the Invention

[0003] Based on this, it is necessary to provide a microchannel liquid cooling method, device, equipment and medium for dissipating heat of integrated circuit chips that can solve the above-mentioned problems.

[0004] In a first aspect, the present application provides a microchannel liquid cooling method for dissipating heat from an integrated circuit chip, comprising:

[0005] The temperature sensor array, embedded temperature probe and infrared detector are used to collect temperature data at different depths on the chip surface and inside in real time to generate a three-dimensional temperature field matrix.

[0006] Performing regional division based on the physical layout of the chip's microchannels and combining it with the three-dimensional temperature field matrix to generate a regional temperature field matrix;

[0007] Calculate the heat load change rate of the regional temperature field matrix and generate the main flow regulation parameters using the PID algorithm based on the heat load change rate;

[0008] Based on the main flow regulation parameters, the branch flow regulation parameters are calculated in combination with the temperature field matrix of the adjacent areas and the pre-built topological association table, and the main flow regulation parameters and the branch flow regulation parameters are fused to generate the flow regulation amount instruction.

[0009] In one embodiment, performing regional division according to the physical layout of the microchannels of the chip and combining it with a three-dimensional temperature field matrix to generate a regional temperature field matrix includes:

[0010] generating a first grid based on a distributed topology of a physical layout of microchannels of the chip;

[0011] Performing local mesh encryption on the entrance and exit areas and the bend area of ​​the microchannel in the first mesh to obtain a second mesh;

[0012] According to the temperature gradient amplitude in the three-dimensional temperature field matrix, the grid density of the non-microchannel area in the second grid is adjusted to obtain a third grid;

[0013] The three-dimensional temperature field matrix is ​​mapped to the third grid to generate the regional temperature field matrix.

[0014] In one embodiment, the heat load change rate is calculated based on the regional temperature field matrix, and the main flow adjustment parameter is generated using a PID algorithm according to the heat load change rate, including:

[0015] Based on the regional temperature field matrix, use the formula Calculate the heat load change rate, where R th represents the rate of change of heat load, c is the specific heat capacity of coolant, m p is the coolant mass in area p, ΔT p is the regional temperature change;

[0016] Real-time derivative based on the rate of change of heat load and regional temperature change ΔT p , adjust PID parameters in, and are the initial proportional, integral and differential coefficients respectively, K p (t), K i (t) and K d (t) represents the proportional, integral, and differential coefficients, γ and λ are correction factors, and η p is the regional thermal coupling coefficient;

[0017] Using the corrected PID parameters, the formula Generate the main flow adjustment parameter, where u(t) represents the main flow adjustment parameter, e(t) is the error between the target temperature and the measured temperature, K p (t), K i(t) and K d (t) represent the proportional, integral and differential coefficients respectively.

[0018] In one embodiment, the branch flow regulation parameters are calculated based on the main flow regulation parameters in combination with the adjacent area temperature field matrix and the pre-built topological association table, including:

[0019] Based on the gradient distribution data in the temperature field matrix of adjacent regions, a microchannel topology association table is constructed, which records: the resistance coefficient α, the pipe diameter d and the length l of each branch;

[0020] The inter-region thermal coupling coefficient β of each branch is generated using the temperature field matrix of adjacent regions;

[0021] Calculate the fluid network inlet pressure change ΔP0(t)=u(t)·ρ·c based on the main flow adjustment parameter u(t), where ρ is the coolant density and c is the coolant specific heat capacity;

[0022] Based on the inlet pressure change ΔP0(t) and the parameters of the topology association table, the branch flow regulation is calculated using the following fluid network model coupled with temperature field data:

[0023]

[0024] Where Δq j represents the flow regulation of branch j, ΔP0(t) represents the inlet pressure change, j represents the branch number, β j represents the inter-region thermal coupling coefficient with branch j, α j represents the fluid resistance coefficient of branch j, d j Indicates the pipe diameter of branch j, l j represents the length of branch j.

[0025] In one embodiment, the method further comprises:

[0026] The microchannel structure of the chip is divided into a surface channel layer, a middle channel layer and a deep channel layer along the depth direction;

[0027] Combined with the three-dimensional temperature field matrix, the temperature gradient amplitude of each channel layer in the corresponding grid of the regional temperature field matrix is ​​calculated respectively;

[0028] When the temperature gradient amplitude of a certain channel layer in a certain area exceeds a preset threshold, it is determined that there is a concentrated heat source in the area and its corresponding channel layer;

[0029] Adjust the topology association table parameters according to the area and channel layer of the concentrated heat source.

[0030] In one embodiment, the microchannel structure of the chip is divided into a surface channel layer, a middle channel layer, and a deep channel layer along the depth direction, including stratifying each channel layer according to the following definitions:

[0031] Surface channel layer: microchannels with a depth ≤ D1 from the chip surface;

[0032] Middle channel layer: microchannels with depth ∈ (D1, D2];

[0033] Deep channel layer: microchannels with depth > D2;

[0034] Where D1 and D2 are depth thresholds preset according to the three-dimensional structure of the chip.

[0035] In one embodiment, adjusting the branch flow regulation parameters includes:

[0036] Generate the governance priority factor using the following formula:

[0037]

[0038] in, represents the temperature gradient amplitude in region p and channel layer k, represents the maximum value of the temperature gradient amplitude at all locations in the entire chip, ξ represents the preset heat source depth weight constant, k represents the channel layer identifier (k = 1 represents the surface channel layer, k = 2 represents the middle channel layer, k = 3 represents the deep channel layer), and p represents the region number;

[0039] According to the control priority factor λ pk , all branches in the channel layer k where the heat source area p is located (recorded as branch set J pk ) Dynamically adjust the topology association table parameters according to the following rules:

[0040] The heat source area corresponds to the pipe diameter d of the channel layer j Updated to

[0041] The fluid resistance coefficient α of the adjacent branch of the heat source area j Updated to

[0042] In a second aspect, the present application also provides a microchannel liquid cooling device for dissipating heat from an integrated circuit chip, comprising:

[0043] The three-dimensional temperature monitoring module is used to collect temperature data at different depths on the chip surface and inside in real time through a temperature sensor array, embedded temperature probes, and infrared detectors to generate a three-dimensional temperature field matrix;

[0044] A region partitioning and mapping module is used to perform region partitioning according to the physical layout of the microchannels of the chip and combine it with the three-dimensional temperature field matrix to generate a regional temperature field matrix;

[0045] The flow collaborative control module is used to calculate the heat load change rate of the regional temperature field matrix and generate the main flow adjustment parameters using the PID algorithm based on the heat load change rate;

[0046] The instruction fusion output module is used to calculate the branch flow regulation parameters based on the main flow regulation parameters, combined with the adjacent area temperature field matrix and the pre-built topological association table, and fuse the main flow regulation parameters and the branch flow regulation parameters to generate the flow regulation instruction.

[0047] In a third aspect, the present application also provides a computer device comprising a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the steps of the above-mentioned microchannel liquid cooling method for dissipating heat of an integrated circuit chip are implemented.

[0048] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the above-mentioned microchannel liquid cooling method for dissipating heat of an integrated circuit chip.

[0049] The above-mentioned microchannel liquid cooling method, device, computer equipment and storage medium for integrated circuit chip heat dissipation use a temperature sensor array, embedded temperature probes and infrared detectors to collect temperature data at different depths on the chip surface and inside in real time to generate a three-dimensional temperature field matrix, thereby realizing real-time and comprehensive perception of the three-dimensional temperature field of the entire chip, overcoming the problem of insufficient perception caused by relying on a small number of points or average temperatures in traditional technologies; by mapping the three-dimensional temperature field based on the regional division of the physical layout of the microchannel to generate a regional temperature field matrix, providing a spatial basis for the precise distribution of flow; by calculating the regional heat load change rate and using the PID algorithm to generate the main flow regulation parameter, a rapid adaptive response to the dynamic load change of the chip is achieved, solving the lag problem of static or simple feedback strategies; by combining the adjacent regional temperature field matrix and the pre-constructed topological association table to calculate the branch flow regulation parameter, the main parameter and the branch parameter are integrated to generate the flow regulation instruction, ensuring the precise matching of the fluid distribution of the microchannel network with the regional heat distribution and topological structure, eliminating the defect of disconnection between fluid distribution and heat demand, and achieving efficient heat dissipation. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following briefly introduces the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0051] Figure 1 This is a flow chart of a microchannel liquid cooling method for dissipating heat from an integrated circuit chip according to the present invention;

[0052] Figure 2 This is a structural diagram of a microchannel liquid cooling device for dissipating heat from an integrated circuit chip according to the present invention;

[0053] Figure 3 This is a structural diagram of a microchannel liquid cooling device for dissipating heat from an integrated circuit chip in one embodiment of the present invention. DETAILED DESCRIPTION

[0054] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0055] The present invention is implemented in the hardware environment of terminal devices (such as 5G mobile phones, AI acceleration chips) or servers (such as GPU computing clusters). Its hardware architecture includes: a perception layer composed of a chip surface temperature sensor array, an internal embedded probe, and an external infrared detector, which captures surface and depth temperature data in real time; a control layer composed of edge computing terminals or servers, which fuses multi-source data to generate a three-dimensional temperature field matrix and maps it into a regional temperature field matrix based on the physical layout of the microchannel; and an execution layer formed by a main flow electric proportional valve and a branch piezoelectric microvalve array. In application, when the integrated circuit chip processes high-load applications (such as AR real-time rendering) or burst computing tasks (such as large model reasoning), dynamic thermal changes are triggered: the perception layer collects three-dimensional temperature data → the control layer calculates the regional heat load change rate in real time, generates the main flow adjustment parameters through an adaptive PID algorithm, and simultaneously solves the branch flow instructions based on the temperature gradient of adjacent regions and the pre-stored topology association table → the execution layer collaboratively triggers the main valve pressure adjustment and the branch microvalve opening adjustment to achieve precise on-demand distribution of coolant in hot spots.

[0056] In one embodiment, Figure 1As shown, a microchannel liquid cooling method for dissipating heat from integrated circuit chips is provided. This embodiment uses the method applied to an edge computing terminal as an example for illustration. It is understandable that the method can also be applied to a server, or to a system including an edge computing terminal and a server, and implemented through interaction between the terminal and the server. In this embodiment, the method includes the following steps:

[0057] S01, through the temperature sensor array, embedded temperature probe and infrared detector, real-time temperature data of the chip surface and different depths inside are collected to generate a three-dimensional temperature field matrix.

[0058] Among them, the temperature sensor array is arranged on the surface of the chip, forming a high-density temperature measurement point grid, covering the plane temperature distribution (two-dimensional planar data). The embedded temperature probe is vertically inserted into the chip at a preset depth to directly measure the core area temperature at different depths (depth direction data). The infrared detector non-contact scans the chip surface and packaging layer (two-dimensional planar data, which can be complementary or corrected with the sensor array data). Based on the spatial position information of the sensor, the temperature data is mapped to the corresponding three-dimensional coordinate points. Through the three-dimensional interpolation algorithm, the plane temperature distribution and the mapped depth temperature data are used to generate a three-dimensional temperature field matrix covering the entire three-dimensional space of the chip. Through the spatiotemporal synchronous data fusion of heterogeneous sensors (array + probe + infrared), the real-time reconstruction of the full-domain three-dimensional thermal field of the integrated circuit chip is achieved, overcoming the perception blind spots and dynamic response lag defects of traditional solutions in the depth dimension.

[0059] S02, performing regional division according to the physical layout of the microchannels of the chip and combining it with the three-dimensional temperature field matrix to generate a regional temperature field matrix.

[0060] The initial mesh is constructed based on the distributed topology of the chip's microchannel physical layout. The microchannel entrance and exit areas and bends are re-encrypted and adjusted. The mesh density in non-microchannel areas is adjusted based on the temperature gradient amplitude of the three-dimensional temperature field matrix. The three-dimensional temperature field data is mapped onto the adjusted and optimized mesh to generate a regional temperature field matrix. Partitioning based on microchannel topology constraints resolves the mismatch between high-temperature areas and microchannel positions caused by fixed mesh partitioning. A two-stage mesh optimization process: coarse-grained optimization based on physical structure in the first stage and fine-grained correction based on real-time thermal gradients in the second stage resolves the conflict between computational efficiency and accuracy.

[0061] S03, calculating the heat load change rate of the regional temperature field matrix, and generating the main flow adjustment parameter using a PID algorithm according to the heat load change rate.

[0062] The system extracts the temperature change (heat load change rate) of each region over successive time steps from the regional temperature field matrix, and dynamically adjusts the parameters of the PID algorithm: For the proportional coefficient, the control strength is dynamically increased or decreased based on the real-time gradient of the heat load change rate; for the integral coefficient, the integral effect is automatically reduced when the regional temperature changes suddenly to prevent control overshoot; for the differential coefficient, the anti-interference capability is adaptively enhanced based on the thermal coupling strength between regions, and a main inlet flow adjustment command (such as valve opening percentage) is generated as the overall control benchmark for the fluid network. By dynamically reconstructing PID control parameters through real-time analysis of the heat load change rate, an adaptive control mechanism is established that combines load trend prediction capabilities with multi-region collaborative stability, fundamentally addressing the response lag and oscillation issues in dynamic thermal management.

[0063] S04, based on the main flow regulation parameters, combined with the adjacent area temperature field matrix and the pre-built topology association table, the branch flow regulation parameters are calculated, and the main flow regulation parameters and the branch flow regulation parameters are merged to generate a flow regulation amount instruction.

[0064] Among them, the main flow regulation parameter serves as the total inlet flow / pressure regulation benchmark, the temperature field matrix of adjacent regions contains the temperature gradient distribution between regions, and the pre-constructed topology association table is constructed through the microchannel network structure parameter database. The heat flow transfer coefficient is generated according to the temperature gradient of the adjacent regions, and based on the branch resistance characteristics (pipe diameter / length / number of bends) recorded in the topology table, the main inlet pressure change is distributed to each branch according to the thermal coupling strength, and the branch flow regulation parameter is calculated. According to the global flow benchmark provided by the main parameters, the local heat load matching is performed in combination with the branch parameters to generate an independent flow regulation amount for each microchannel branch (such as the piezoelectric valve opening instruction). Through the coupling of heat-flow-topology ternary data and the hierarchical fusion of main branch parameters, the non-homogeneous and precise control of microchannel flow is achieved, breaking through the technical bottleneck of the disconnection between global flow and local heat demand in traditional heat dissipation.

[0065] The above-mentioned microchannel liquid cooling method for integrated circuit chip heat dissipation uses the collaborative sensing of a temperature sensor array, an embedded temperature probe, and an infrared detector to collect temperature data at different depths on the chip surface and inside in real time and generate a three-dimensional temperature field matrix. This solves the perception blind spot problem caused by relying on a small number of points or average temperatures in traditional technologies and realizes comprehensive dynamic monitoring of the chip's entire three-dimensional thermal field. By combining the regional division of the microchannel physical layout, the three-dimensional temperature field is mapped into a regional temperature field matrix, providing a spatially precisely matched partitioning basis for thermal management and overcoming the defect of the disconnection between fixed grid partitioning and microchannel location. The main flow regulation parameters are generated using a dynamically corrected PID algorithm based on the regional heat load change rate. The proportional, integral, and differential coefficients are adaptively adjusted through real-time derivatives and regional temperature changes to improve the response speed and control stability to the chip's dynamic load and avoid the lag and oscillation of static strategies. By integrating the main flow regulation parameters, the temperature gradients of adjacent regions, and a fluid network model with a topological association table, the branch flow regulation parameters are calculated and instructions are generated to achieve precise distribution of microchannel network flow according to heat distribution requirements, solving the core problem of the disconnection between fluid distribution and heat demand. The above technical steps work together to achieve dynamic and precise control of chip heat dissipation, improving heat dissipation efficiency and temperature uniformity under complex thermal load fluctuations.

[0066] In one embodiment, performing regional division according to the physical layout of the microchannels of the chip and combining it with a three-dimensional temperature field matrix to generate a regional temperature field matrix includes:

[0067] S11, generating a first grid based on the distribution topology of the physical layout of the microchannels of the chip;

[0068] S12, performing local mesh encryption on the entrance and exit areas and the bend area of ​​the microchannel in the first mesh to obtain a second mesh;

[0069] S13, adjusting the grid density of the non-microchannel area in the second grid according to the temperature gradient amplitude in the three-dimensional temperature field matrix to obtain a third grid;

[0070] S14, mapping the three-dimensional temperature field matrix to the third grid to generate a regional temperature field matrix.

[0071] Specifically, a first grid is generated based on the distributed topology of the microchannel's physical layout, matching the actual spatial position and structure of the microchannel. Local mesh encryption is performed on the microchannel's entrance and exit areas and bends to generate a second grid, improving the resolution of key areas for fluid turbulence effects and heat exchange, and avoiding the numerical distortion of traditional uniform grids in areas with sudden flow field changes. Based on the temperature gradient amplitude of the three-dimensional temperature field matrix, the grid is refined in highly thermally sensitive areas where the temperature gradient is above the threshold, and moderately coarsened in areas with gentle gradients, resulting in a third grid that matches computing resources with thermal field analysis requirements. The three-dimensional temperature field matrix is ​​mapped to the optimized third grid, coupling the temperature data with the microchannel topology in physical space, laying the data structure foundation for subsequent precise flow control. Through a three-level progressive grid generation mechanism of physical structure drive → key area enhancement → thermal field feedback optimization, the regional temperature field matrix's ability to characterize the chip's true thermal distribution is improved.

[0072] In one embodiment, the heat load change rate is calculated based on the regional temperature field matrix, and the main flow adjustment parameter is generated using a PID algorithm according to the heat load change rate, including:

[0073] S21, based on the regional temperature field matrix, uses the formula Calculate the heat load change rate, where R th represents the rate of change of heat load, c is the specific heat capacity of coolant, m p is the coolant mass in area p, ΔT p is the regional temperature change;

[0074] S22, real-time derivative of the rate of change of heat load and regional temperature change ΔT p , adjust PID parameters in, and are the initial proportional, integral and differential coefficients respectively, K p (t), K i (t) and K d (t) represents the proportional, integral, and differential coefficients, γ and λ are correction factors, and η p is the regional thermal coupling coefficient;

[0075] S23, using the corrected PID parameters, adopt the formula Generate the main flow adjustment parameter, where u(t) represents the main flow adjustment parameter, e(t) is the error between the target temperature and the measured temperature, K p (t), K i (t) and K d (t) represent the proportional, integral and differential coefficients respectively.

[0076] For example, in calculating the heat load change rate, the coolant specific heat capacity c and the coolant mass m in area p are p is the physical property parameter, the regional temperature change ΔT p The time series data directly comes from the regional temperature field matrix, and the physical mapping relationship between temperature change and heat load is established; the thermodynamic dynamic response mechanism is introduced, through Adaptive correction PID parameters: K p (t) Real-time derivative of the rate of change of heat load Dynamic amplification ratio effect, when the thermal load rises rapidly (such as sudden computing load of the chip), the control intensity is automatically increased to improve the response speed; K i (t) According to the total amount of regional temperature mutation (∑|ΔT p |)’s exponential decay integral function avoids integral saturation and system oscillation caused by sudden temperature rise in multiple regions; K d (t) Based on the regional thermal coupling coefficient η p The statistical mean value of the differential function is adjusted to enhance the anti-interference ability in the area of ​​intensive thermal interaction; the modified PID parameters are used through the classic PID algorithm Generate the main flow regulation parameter u(t), and based on the three-level optimization mechanism of real-time analysis of heat load change rate → dynamic reconstruction of control parameters → multi-physical field coupling feedback, upgrade the traditional PID static control to intelligent control with predictive, anti-interference and collaborative capabilities.

[0077] In one embodiment, the branch flow regulation parameters are calculated based on the main flow regulation parameters in combination with the adjacent area temperature field matrix and the pre-built topological association table, including:

[0078] S31, based on the gradient distribution data in the temperature field matrix of the adjacent regions, construct a microchannel topology association table, the topology association table records: the resistance coefficient α, the pipe diameter d and the length l of each branch;

[0079] S32, using the temperature field matrix of adjacent regions to generate the inter-region thermal coupling coefficient β of each branch;

[0080] S33, calculating the fluid network inlet pressure change ΔP0(t)=u(t)·ρ·c based on the main flow adjustment parameter u(t), where ρ is the coolant density and c is the coolant specific heat capacity;

[0081] S34, based on the inlet pressure change ΔP0(t) and the topology association table parameters, the branch flow regulation amount is calculated using the following fluid network model coupled with the temperature field data:

[0082]

[0083] Where Δq jrepresents the flow regulation of branch j, ΔP0(t) represents the inlet pressure change, j represents the branch number, β j represents the inter-region thermal coupling coefficient with branch j, α j represents the fluid resistance coefficient of branch j, d j Indicates the pipe diameter of branch j, l j represents the length of branch j.

[0084] Specifically, the resistance coefficient α of each branch (obtained through CFD simulation or experimental calibration based on the geometric shape of the branch (such as bend angle, roughness) and fluid characteristics (such as Reynolds number)), the pipe diameter d and length l (physical size parameters extracted from the chip microchannel design drawings) respectively represent the flow resistance characteristics of the branch (including the influence of bend angle / roughness) and the geometric size and spatial scale of the branch. The physical structural parameters of the microchannel network are formed into a topological association table for subsequent fluid resistance calculation; the temperature gradient amplitude of the region where each branch is located in the temperature field matrix of the adjacent region is extracted to generate the inter-region thermal coupling coefficient β (the weighted average of the temperature gradient difference between the region where the branch is located and the adjacent region, and the weight is determined by the spatial distance between the regions (such as the length of the heat conduction path)); the main flow regulation instruction is converted into a pressure control benchmark for the fluid network through the formula ΔP0(t)=u(t)·ρ·c, and the pressure drive of the entire microchannel network can be achieved by changing the main valve opening; according to the fluid network model Combined with the heat load and fluid resistance characteristics, the branch flow is accurately distributed: the inlet pressure change ΔP0(t) provides the fluid driving energy and the thermal coupling coefficient β between the regions of branch j j Characterizes the weight of heat load demand on flow, branch resistance factor Reflects the obstruction of pipe diameter, length and resistance coefficient on flow (the larger the pipe diameter and the shorter the length, the smaller the resistance and the greater the flow regulation); thermal coupling coefficient β j The larger the branch, the more flow regulation Δq is obtained. j The larger the value, the higher the heat dissipation demand of the high heat load area will be met first; combined with the topological resistance parameter α j 、l j and d j Ensure that flow distribution complies with the laws of fluid mechanics to avoid pressure imbalance. Through the main flow reference + branch dynamic allocation, precise flow control of the microchannel liquid cooling system is achieved, improving chip heat dissipation efficiency and temperature uniformity.

[0085] In one embodiment, the method further comprises:

[0086] S41, dividing the microchannel structure of the chip into a surface channel layer, a middle channel layer, and a deep channel layer along the depth direction;

[0087] S42, combining the three-dimensional temperature field matrix, respectively calculating the temperature gradient amplitude of each channel layer in the corresponding grid of the regional temperature field matrix;

[0088] S43, when the temperature gradient amplitude of a certain channel layer in a certain area exceeds a preset threshold, it is determined that a concentrated heat source exists in the area and its corresponding channel layer;

[0089] S44, adjusting the topology association table parameters according to the area and channel layer of the concentrated heat source.

[0090] Specifically, the microchannels can be divided into surface, middle, and deep channel layers based on the vertical depth of the chip microchannels from the surface and a preset depth threshold of the chip's three-dimensional structure. After stratification, differentiated control can be implemented for the heat source characteristics (such as heat conduction path and heat dissipation efficiency) at different depths, especially to enhance the response capability to deep heat sources. The temperature gradient amplitude of the three-dimensional temperature field matrix is ​​calculated using numerical differentiation within the corresponding grid of each channel layer. The three-dimensional temperature field matrix is ​​mapped to the grid of the regional temperature field matrix, and the temperature gradient amplitude of each grid point is extracted according to the surface, middle, and deep channel layers to form a layered temperature gradient distribution. A preset temperature gradient threshold (such as 5°C / μm, determined through thermal simulation or experiment based on parameters such as chip material thermal conductivity and maximum allowable temperature) is set. If the temperature gradient amplitude of a certain region or channel layer exceeds the preset threshold, it is determined that a concentrated heat source exists in that region and is recorded as a heat source point. Based on the depth and location of the heat source, the microchannel fluid parameters can be dynamically optimized by calculating the control priority factor and dynamically updating the topological parameters to achieve directional distribution of the coolant. Through the closed-loop control of hierarchical perception-gradient judgment-topology optimization, dynamic response to the three-dimensional thermal field of the chip is achieved, which is particularly suitable for deep heat source cooling scenarios of highly integrated chips such as 3DIC chips.

[0091] In one embodiment, the microchannel structure of the chip is divided into a surface channel layer, a middle channel layer, and a deep channel layer along the depth direction, including S51, and each channel layer is layered according to the following definitions:

[0092] Surface channel layer: microchannels with a depth ≤ D1 from the chip surface;

[0093] Middle channel layer: microchannels with depth ∈ (D1, D2];

[0094] Deep channel layer: microchannels with depth > D2;

[0095] Where D1 and D2 are depth thresholds preset according to the three-dimensional structure of the chip.

[0096] Specifically, according to the vertical depth of the microchannels from the chip surface in the three-dimensional chip structure, two depth thresholds D1 and D2 (D1 < D2) are preset to divide the microchannels into three layers: the surface channel layer, which includes microchannels with a depth from the chip surface ≤ D1 and is directly adjacent to the heat source on the chip surface (such as the top transistor array), with a short heat conduction path; the middle channel layer, which includes microchannels with a depth ∈ (D1, D2], covering the medium-depth area inside the chip (such as the multi-layer interconnect structure); the deep channel layer, which includes microchannels with a depth > D2, corresponding to the chip core buried layer (such as the bottom devices and power layer in 3DIC stacking), with a large heat conduction resistance. The determination method of the thresholds D1 and D2 is as follows: Based on the thermal conductivity of the chip material (such as the thermal conductivity of silicon), the distribution of device layers (such as the thickness of the transistor layer and metal interconnect layer), and the heat dissipation requirements, through thermal simulation or experimental calibration: D1 is usually set to the main influence depth of the surface heat source (such as 50 - 100 μm); D2 is set to the typical distribution depth of the deep heat source (such as buried devices) (such as 150 - 300 μm).

[0097] In one embodiment, adjusting the parameters of the topological association table includes:

[0098] S61, using the following formula to generate a regulation priority factor:

[0099]

[0100] Where, represents the magnitude of the temperature gradient in region p and channel layer k, represents the maximum value of the magnitude of the temperature gradient at all positions in the entire chip, ξ represents a preset heat source depth weight constant, k represents the channel layer identifier (k = 1 represents the surface channel layer, k = 2 represents the middle channel layer, k = 3 represents the deep channel layer), and p represents the region number;

[0101] S62, according to the regulation priority factor λ pk , all branches (denoted as branch set J pk ) in the channel layer k where the heat source region p is located dynamically adjust the parameters of the topological association table according to the following rules:

[0102] Update the pipe diameter d j of the channel layer corresponding to the heat source region to

[0103] Update the fluid resistance coefficient α j of the adjacent branches of the heat source region to5] 7]

[0104] Exemplarily, in the formula , the magnitude of the temperature gradient Reflects the degree of local heat load concentration. The larger the gradient, the higher the heat source intensity. The maximum value of the temperature gradient amplitude at all locations in the chip. For normalization, λ pk ∈[0,1]; the preset heat source depth weight constant ξ is used to strengthen the control priority of deep heat sources (ξ=1.5 is recommended); the channel layer identifier k can make the λ of deep channels (with large k values) pk Larger, the actual priority is improved after ξ compensation; The adjustment logic is: when λ pk The larger the diameter, the greater the expansion of the pipe diameter. According to fluid mechanics, increasing the pipe diameter can increase the branch flow rate, directly enhancing the heat dissipation capacity of the heat source area; Medium α j and λ pk The negative phase guides the fluid from the non-heat source area to the heat source area by reducing the resistance of the adjacent branches of the heat source area. j 2 The quadratic design avoids pressure imbalance in the fluid network caused by excessively reduced resistance coefficients. By optimizing the pipe diameter and resistance coefficient, a low-resistance, high-speed fluid channel is formed in the heat source area, achieving directional distribution of coolant and improving heat dissipation efficiency.

[0105] The above-mentioned microchannel liquid cooling method for integrated circuit chip heat dissipation uses a temperature sensor array, an embedded temperature probe and an infrared detector to collect temperature data at different depths on the chip surface and inside in real time to generate a three-dimensional temperature field matrix, combines the physical layout of the microchannel to perform regional division and map to generate a regional temperature field matrix, calculates the heat load change rate and uses a dynamic correction PID algorithm to generate the main flow regulation parameter, calculates the branch flow regulation parameter based on the adjacent regional temperature field matrix and the pre-built topology association table, fuses and generates the flow regulation quantity instruction, and layers the microchannel according to depth to locate the deep heat source and adjust the topology parameters, thereby realizing real-time and comprehensive perception of the chip's full-domain three-dimensional temperature field, dynamic adaptive adjustment of the regional heat load, and precise matching of the microchannel fluid distribution with the heat distribution and topological structure, solving the problems of insufficient temperature perception, poor control adaptability, disconnection between fluid distribution and heat demand, and weak response to deep heat sources in traditional technologies, and improving the dynamic and precise control capability and heat dissipation efficiency of the chip.

[0106] It should be understood that, although the various steps in the flowcharts involved in the various embodiments described above are displayed in sequence according to the instructions of the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least a portion of the steps in the flowcharts involved in the various embodiments described above can include multiple steps or multiple stages, and these steps or stages are not necessarily executed and completed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a portion of steps or stages in other steps.

[0107] Based on the same inventive concept, embodiments of the present application also provide a microchannel liquid cooling device for dissipating heat from an integrated circuit chip, which is used to implement the aforementioned microchannel liquid cooling method for dissipating heat from an integrated circuit chip. The solution provided by this device is similar to the solution described in the aforementioned method. Therefore, the specific limitations of one or more embodiments of the microchannel liquid cooling device for dissipating heat from an integrated circuit chip provided below can be found in the above-mentioned limitations of the microchannel liquid cooling method for dissipating heat from an integrated circuit chip, and will not be further elaborated here.

[0108] In an exemplary embodiment, Figure 2 As shown, a microchannel liquid cooling device for dissipating heat from an integrated circuit chip is provided, comprising:

[0109] The three-dimensional temperature monitoring module 101 is used to collect temperature data at different depths on the chip surface and inside in real time through a temperature sensor array, embedded temperature probes, and infrared detectors to generate a three-dimensional temperature field matrix;

[0110] A region division mapping module 102 is configured to perform region division according to the physical layout of the microchannels of the chip and combine the three-dimensional temperature field matrix to generate a regional temperature field matrix;

[0111] The flow collaborative control module 103 is used to calculate the heat load change rate of the regional temperature field matrix and generate the main flow adjustment parameters using the PID algorithm according to the heat load change rate;

[0112] The instruction fusion output module 104 is used to calculate the branch flow regulation parameters based on the main flow regulation parameters, combined with the adjacent area temperature field matrix and the pre-built topology association table, and fuse the main flow regulation parameters and the branch flow regulation parameters to generate a flow regulation instruction.

[0113] In one embodiment, the region division mapping module 102 is further configured to:

[0114] generating a first grid based on a distributed topology of a physical layout of microchannels of the chip;

[0115] Performing local mesh encryption on the entrance and exit areas and the bend area of ​​the microchannel in the first mesh to obtain a second mesh;

[0116] According to the temperature gradient amplitude in the three-dimensional temperature field matrix, the grid density of the non-microchannel area in the second grid is adjusted to obtain a third grid;

[0117] The three-dimensional temperature field matrix is ​​mapped to the third grid to generate the regional temperature field matrix.

[0118] In one embodiment, the traffic collaborative control module 103 is further configured to:

[0119] Based on the regional temperature field matrix, use the formula Calculate the heat load change rate, where R th represents the rate of change of heat load, c is the specific heat capacity of coolant, m p is the coolant mass in area p, ΔT p is the regional temperature change;

[0120] Real-time derivative based on the rate of change of heat load and regional temperature change ΔT p , adjust PID parameters in, and are the initial proportional, integral and differential coefficients respectively, K p (t), K i (t) and K d (t) represents the proportional, integral, and differential coefficients, γ and λ are correction factors, and η p is the regional thermal coupling coefficient;

[0121] Using the corrected PID parameters, the formula Generate the main flow adjustment parameter, where u(t) represents the main flow adjustment parameter, e(t) is the error between the target temperature and the measured temperature, K p (t), K i (t) and K d (t) represent the proportional, integral and differential coefficients respectively.

[0122] In one embodiment, the instruction fusion output module 104 is further configured to:

[0123] Based on the gradient distribution data in the temperature field matrix of adjacent regions, a microchannel topology association table is constructed, which records: the resistance coefficient α, the pipe diameter d and the length l of each branch;

[0124] The inter-region thermal coupling coefficient β of each branch is generated using the temperature field matrix of adjacent regions;

[0125] Calculate the fluid network inlet pressure change ΔP0(t)=u(t)·ρ·c based on the main flow adjustment parameter u(t), where ρ is the coolant density and c is the coolant specific heat capacity;

[0126] Based on the inlet pressure change ΔP0(t) and the parameters of the topology association table, the branch flow regulation is calculated using the following fluid network model coupled with temperature field data:

[0127]

[0128] Where Δq j represents the flow regulation of branch j, ΔP0(t) represents the inlet pressure change, j represents the branch number, β j represents the inter-region thermal coupling coefficient with branch j, α j represents the fluid resistance coefficient of branch j, d j Indicates the pipe diameter of branch j, l j represents the length of branch j.

[0129] In one embodiment, Figure 3 As shown, the region division mapping module 102 further includes a hierarchical mapping unit, which is used to:

[0130] The microchannel structure of the chip is divided into a surface channel layer, a middle channel layer and a deep channel layer along the depth direction;

[0131] Combined with the three-dimensional temperature field matrix, the temperature gradient amplitude of each channel layer in the corresponding grid of the regional temperature field matrix is ​​calculated respectively;

[0132] When the temperature gradient amplitude of a certain channel layer in a certain area exceeds a preset threshold, it is determined that there is a concentrated heat source in the area and its corresponding channel layer;

[0133] Adjust the topology association table parameters according to the area and channel layer of the concentrated heat source.

[0134] In one embodiment, the layer mapping unit is further configured to layer each channel layer according to the following definition:

[0135] Surface channel layer: microchannels with a depth ≤ D1 from the chip surface;

[0136] Middle channel layer: microchannels with depth ∈ (D1, D2];

[0137] Deep channel layer: microchannels with depth > D2;

[0138] Where D1 and D2 are depth thresholds preset according to the three-dimensional structure of the chip.

[0139] In one embodiment, the layered mapping unit is further configured to:

[0140] Generate the governance priority factor using the following formula:

[0141]

[0142] in, represents the temperature gradient amplitude in region p and channel layer k, represents the maximum value of the temperature gradient amplitude at all locations in the entire chip, ξ represents the preset heat source depth weight constant, k represents the channel layer identifier (k = 1 represents the surface channel layer, k = 2 represents the middle channel layer, k = 3 represents the deep channel layer), and p represents the region number;

[0143] According to the control priority factor λ pk , all branches in the channel layer k where the heat source area p is located (recorded as branch set J pk ) Dynamically adjust the topology association table parameters according to the following rules:

[0144] The heat source area corresponds to the pipe diameter d of the channel layer j Updated to

[0145] The fluid resistance coefficient α of the adjacent branch of the heat source area j Updated to

[0146] In one embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the steps of the microchannel liquid cooling method for dissipating heat of an integrated circuit chip as described above are implemented.

[0147] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.

[0148] For the device embodiments, since they basically correspond to the method embodiments, the relevant parts can be referred to the partial description of the method embodiments. The device embodiments described above are merely illustrative, wherein the components described as separate parts may or may not be physically separated, and the parts displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the disclosed solution. A person of ordinary skill in the art can understand and implement it without expending creative work.

[0149] The above-described embodiments merely represent several implementation methods of the embodiments of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that a person skilled in the art may make various modifications and improvements without departing from the concept of the embodiments of the present application, and these modifications and improvements fall within the scope of protection of the embodiments of the present application.

Claims

1. A microchannel liquid cooling method for dissipating heat from an integrated circuit chip, characterized in that: The method comprises: The temperature sensor array, embedded temperature probe and infrared detector are used to collect temperature data at different depths on the chip surface and inside in real time to generate a three-dimensional temperature field matrix. Performing regional division according to the physical layout of the microchannels of the chip and combining the three-dimensional temperature field matrix to generate a regional temperature field matrix; Calculating the heat load change rate of the regional temperature field matrix, and generating a main flow adjustment parameter using a PID algorithm according to the heat load change rate; Based on the main flow regulation parameter, the branch flow regulation parameter is calculated in combination with the adjacent area temperature field matrix and the pre-constructed topological association table, and the main flow regulation parameter and the branch flow regulation parameter are fused to generate a flow regulation amount instruction.

2. The method according to claim 1, characterized in that The performing of regional division according to the physical layout of the microchannels of the chip and combining the three-dimensional temperature field matrix to generate a regional temperature field matrix includes: generating a first grid based on a distribution topology of a physical layout of microchannels of the chip; Performing local mesh encryption on the entrance and exit areas and the bend area of ​​the microchannel in the first mesh to obtain a second mesh; adjusting the grid density of the non-microchannel region in the second grid according to the temperature gradient amplitude in the three-dimensional temperature field matrix to obtain a third grid; The three-dimensional temperature field matrix is ​​mapped to the third grid to generate the regional temperature field matrix.

3. The method according to claim 2, characterized in that The calculating of the heat load change rate based on the regional temperature field matrix and generating the main flow adjustment parameter using a PID algorithm according to the heat load change rate include: Based on the regional temperature field matrix, use the formula Calculate the heat load change rate, where R th represents the rate of change of heat load, c is the specific heat capacity of coolant, m p is the coolant mass in area p, ΔT p is the regional temperature change; Based on the real-time derivative of the heat load change rate and regional temperature change ΔT p , adjust PID parameters in, and are the initial proportional, integral and differential coefficients respectively, K p (t), K i (t) and K d (t) represents the proportional, integral, and differential coefficients, γ and λ are correction factors, and η p is the regional thermal coupling coefficient; Using the corrected PID parameters, the formula Generate the main flow adjustment parameter, where u(t) represents the main flow adjustment parameter, e(t) is the error between the target temperature and the measured temperature, K p (t), K i (t) and K d (t) represent the proportional, integral and differential coefficients respectively.

4. The method according to claim 3, characterized in that The calculation of the branch flow regulation parameters based on the main flow regulation parameters, combined with the adjacent area temperature field matrix and the pre-built topology association table, includes: Based on the gradient distribution data in the temperature field matrix of the adjacent regions, a microchannel topology association table is constructed, wherein the topology association table records: the resistance coefficient α, the pipe diameter d and the length l of each branch; The inter-region thermal coupling coefficient β of each branch is generated using the temperature field matrix of adjacent regions; Calculate the fluid network inlet pressure change ΔP0(t)=u(t)·ρ·c according to the main flow adjustment parameter u(t), where ρ is the coolant density and c is the coolant specific heat capacity; Based on the inlet pressure change ΔP0(t) and the topology association table parameters, the branch flow regulation amount is calculated using the following fluid network model coupled with temperature field data: Where Δq j represents the flow regulation of branch j, ΔP0(t) represents the inlet pressure change, j represents the branch number, β j represents the inter-region thermal coupling coefficient with branch j, α j represents the fluid resistance coefficient of branch j, d j Indicates the pipe diameter of branch j, l j represents the length of branch j.

5. The method according to claim 1, wherein The method further comprises: Dividing the microchannel structure of the chip into a surface channel layer, a middle channel layer and a deep channel layer along the depth direction; Combined with the three-dimensional temperature field matrix, the temperature gradient amplitude of each channel layer in the corresponding grid of the regional temperature field matrix is ​​calculated respectively; When the temperature gradient amplitude of a certain channel layer in a certain area exceeds a preset threshold, it is determined that there is a concentrated heat source in the area and its corresponding channel layer; The topology association table parameters are adjusted according to the area and channel layer of the concentrated heat source.

6. The method according to claim 5, characterized in that The microchannel structure of the chip is divided into a surface channel layer, a middle channel layer and a deep channel layer along the depth direction, including stratifying each channel layer according to the following definitions: Surface channel layer: microchannels with a depth ≤ D1 from the chip surface; Middle channel layer: microchannels with depth ∈ (D1, D2]; Deep channel layer: microchannels with depth > D2; Where D1 and D2 are depth thresholds preset according to the three-dimensional structure of the chip.

7. The method according to claim 6, characterized in that The adjusting of the topology association table parameters includes: Generate the governance priority factor using the following formula: in, represents the temperature gradient amplitude in region p and channel layer k, represents the maximum value of the temperature gradient amplitude at all locations in the entire chip, ξ represents the preset heat source depth weight constant, k represents the channel layer identifier (k = 1 represents the surface channel layer, k = 2 represents the middle channel layer, k = 3 represents the deep channel layer), and p represents the region number; According to the control priority factor λ pk , all branches in the channel layer k where the heat source area p is located (recorded as branch set J pk ) Dynamically adjust the topology association table parameters according to the following rules: The heat source area corresponds to the pipe diameter d of the channel layer j Updated to The fluid resistance coefficient α of the adjacent branch of the heat source area j Updated to 8. A microchannel liquid cooling device for dissipating heat from an integrated circuit chip, characterized in that: The device comprises: The three-dimensional temperature monitoring module is used to collect temperature data at different depths on the chip surface and inside in real time through a temperature sensor array, embedded temperature probes, and infrared detectors to generate a three-dimensional temperature field matrix; A region division mapping module, configured to perform region division according to the physical layout of the microchannels of the chip and generate a region temperature field matrix in combination with the three-dimensional temperature field matrix; A flow collaborative control module is used to calculate the heat load change rate of the regional temperature field matrix and generate a main flow adjustment parameter using a PID algorithm based on the heat load change rate; The instruction fusion output module is used to calculate the branch flow regulation parameters based on the main flow regulation parameters, combined with the adjacent area temperature field matrix and the pre-built topological association table, and fuse the main flow regulation parameters and the branch flow regulation parameters to generate a flow regulation instruction.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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