Wafer defect graph data enhancement method and system

Through template-driven preprocessing and GAN network adversarial training, standardized defect maps adapted to industrial inspection equipment are generated, which solves the problems of data heterogeneity, resolution mismatch and data imbalance in wafer defect map analysis and improves the robustness and adaptability of detection.

CN120672616APending Publication Date: 2025-09-19JIANGSU COLLEGE OF INFORMATION TECH
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202510839623.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-23
Publication Date
2025-09-19

AI Technical Summary

Technical Problem

Traditional wafer defect image analysis methods face problems such as data heterogeneity, resolution mismatch, data imbalance, and high manual labeling costs, making it difficult to meet the real-time requirements of industrial online detection.

Method used

A template-driven pre-processing and post-processing mechanism is adopted, combined with a customized GAN network structure, and through adversarial training of the generator and discriminator, a standardized defect map adapted to industrial inspection equipment is generated.

Benefits of technology

The resolution and data diversity of defect images are significantly improved, the data imbalance problem is solved, and the robustness and adaptability of the classification model are improved.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120672616A_ABST
    Figure CN120672616A_ABST
Patent Text Reader

Abstract

The invention discloses a wafer defect graph data enhancement method and system, and the method comprises the following steps: superposing an extracted original wafer defect graph with a pure white template to generate a binary template, and correcting a local defect region according to a defect coverage rule, the method comprises the following steps of: designing a training set defect graph, performing resolution normalization processing on the training set defect graph, designing a generator network and a discriminator network, taking a random noise graph as an input by a generator, and sequentially performing BatchNorm2d normalization layer and ReLU activation function processing to generate a defect graph; the discriminator outputs a discrimination probability through a Leaky ReLU activation function and an adaptive average pooling operation, a binary cross entropy loss function and an Adam optimizer are adopted to iteratively train the generator and the discriminator, after a generated graph is superposed to a standard template, an artifact region is filtered through a defect density threshold, a standardized defect graph adapted to industrial detection equipment is output, and the standard defect graph is used for detecting the industrial detection equipment. According to the method, through a template-driven preprocessing and post-processing mechanism and in combination with a customized GAN network structure, the defect graph resolution and the data diversity are remarkably improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing defect analysis and industrial detection technology, and in particular to a wafer defect map data enhancement method and system. Background Art

[0002] Wafer Failure Map analysis is a core component of the semiconductor manufacturing process. By visualizing the distribution of good and defective chips on the wafer, it provides a key basis for process optimization and yield improvement. Traditional defect map analysis relies on manual annotation and statistical models. Its advantage lies in its high interpretability and ability to intuitively reflect specific defect patterns caused by process anomalies. However, with the increase in wafer size and the diversification of defect types, traditional methods face three major challenges: First, defect data exhibits significant data heterogeneity, making feature extraction difficult; second, the distribution of defect samples is highly unbalanced, limiting the generalization ability of classification models; and third, manual annotation is costly and prone to subjective bias, making it difficult to meet the real-time requirements of industrial online testing.

[0003] To address these challenges, researchers have attempted to introduce data augmentation techniques to expand defect image datasets. Existing enhancement methods often rely on fixed rules, generating samples from different perspectives through predefined geometric transformations, rotations, and cropping. However, these methods have two limitations: First, geometric transformations can only linearly reorganize the original defect pattern (e.g., angular flipping and region cropping), and cannot generate defect types with new characteristics, limiting the diversity of the enhanced data. Second, such methods cannot address the resolution mismatch problem of defect images. For example, if the original sample contains low-resolution defect areas, geometric transformations will not improve the resolution difference.

[0004] Therefore, there is an urgent need for a data enhancement method that can not only preserve the physical properties of defect images, but also solve the problems of resolution mismatch, feature dimension difference and data imbalance of defect images, and ultimately generate highly consistent and highly interpretable defect maps to improve the robustness of the classification model and its adaptability to industrial scenarios. Summary of the Invention

[0005] The purpose of this section is to summarize some aspects of the embodiments of the present invention and briefly introduce some preferred embodiments. Some simplifications or omissions may be made in this section and the abstract and title of this application to avoid blurring the purpose of this section, the abstract and the title of the invention, and such simplifications or omissions should not be used to limit the scope of the present invention.

[0006] Therefore, an object of the present invention is to provide a method and system for enhancing wafer defect map data to solve the problems raised in the above background technology.

[0007] To solve the above technical problems, according to one aspect of the present invention, the present invention provides the following technical solutions: A wafer defect map data enhancement method, the steps are as follows: S1. Template-driven preprocessing: Extract the original wafer defect image of a single defect type and overlay it with a pure white template to generate a binary template. Correct the local defect area according to the defect coverage rule, and perform resolution normalization on the training set defect image. S2. Template-constrained GAN network construction: Design a generator network and a discriminator network. The generator takes a random noise image as input and processes it through a BatchNorm2d normalization layer and a ReLU activation function to generate a defect image. The discriminator uses a Leaky ReLU activation function and an adaptive average pooling operation to output the discrimination probability. S3. Adversarial training and post-processing: The binary cross entropy loss function and Adam optimizer are used to iteratively train the generator and discriminator. After the generated image is superimposed on the standard template, the artifact area is filtered through the defect density threshold to output a standardized defect map suitable for industrial inspection equipment.

[0008] As a preferred solution of the wafer defect image data enhancement method described in the present invention, the pure white template size is 64×64, 128×128 or 150×150, which is used to perform binary conversion and resolution normalization on the original defect image. By superimposing the blank template, the pixel value of the original defect image is mapped to a 0 / 1 binary space.

[0009] As a preferred solution of the wafer defect map data enhancement method described in the present invention, the defect coverage rule is: if the defect area covers a local area of ​​a single chip, the chip is marked as a full defect area.

[0010] As a preferred solution of the wafer defect map data enhancement method described in the present invention, the standard template adopts a standard defect-free wafer template with a size of 64×64, 128×128 or 150×150, which is used to normalize the generated wafer defect map. By superimposing the standard template, the topological logic of the generated defect map is corrected.

[0011] As a preferred solution of the wafer defect image data enhancement method described in the present invention, the generator adopts a multi-layer transposed convolution stacking structure, including a deep neural network with at least 4 layers of transposed convolution stacking. The number of channels is designed according to the principle of "double the resolution and halve the number of channels", supporting output resolutions of 64×64, 128×128 or 256×256. The middle layer includes a BatchNorm2d normalization layer and a ReLU activation function, and the output layer adopts a Tanh activation function.

[0012] As a preferred solution of the wafer defect image data enhancement method described in the present invention, the network structure of the discriminator composed of multiple convolutional layers is: a deep neural network consisting of at least 4 convolutional layers, the input defect image resolution includes 64×64, 128×128 or 256×256; the number of channels increases layer by layer, and the final layer combines adaptive average pooling with Sigmoid activation function to output the discrimination probability.

[0013] As a preferred solution of the wafer defect image data enhancement method described in the present invention, during the adversarial training process, the loss function is a binary cross entropy loss function, the optimizer is an Adam optimizer, the learning rate is 0.00001, and the number of iterative training times is 100,000.

[0014] A wafer defect map data enhancement system, comprising: The preprocessing module is used to extract the original wafer defect map of a single defect type, overlay it with a pure white template to generate a binary template, correct the local defect area according to the defect coverage rule, and normalize the resolution of the training set defect map; The GAN network building module is used to construct the generator and discriminator. The generator uses a multi-layer transposed convolution stack structure, taking a random noise image as input and passing it through a BatchNorm2d normalization layer and a ReLU activation function to generate a defect image. The discriminator is composed of multiple convolutional layers with increasing number of channels layer by layer, and outputs the discrimination probability through leaky ReLU activation and adaptive average pooling. The training and post-processing module is used to iteratively train the generator and discriminator using the binary cross-entropy loss function and the Adam optimizer; the generated defect map is superimposed on the standard template, the artifact area is filtered using the defect density threshold, and a standardized defect map suitable for industrial inspection equipment is output.

[0015] Compared with existing technologies, this invention offers the following advantages: through a template-driven pre- and post-processing mechanism, combined with a customized GAN network structure, it significantly improves defect image resolution and data diversity while preserving the physical characteristics of defects, thereby addressing data imbalance. This method can be widely applied in online defect detection scenarios in semiconductor manufacturing, adapting to the wafer analysis needs of different process nodes. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the present invention will be described in detail below with reference to the accompanying drawings and detailed embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be derived from these drawings without inventive effort. Among them: Figure 1 This is a flow chart of a wafer defect map data enhancement method of the present invention; Figure 2 A schematic diagram comparing the resolution of pre-processing and post-processing provided by the present invention; Figure 3 A schematic diagram of the diversity of defect map generation provided by the present invention. DETAILED DESCRIPTION

[0017] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0018] Figure 1 The flowchart of the wafer defect map data enhancement method of the present invention is shown as follows: Figure 1 As shown, the original wafer defect image is first binarized and resolution-normalized by the preprocessing module to generate a standardized template. This is then input into an adversarial network consisting of a generator and a discriminator. The generator uses random noise as input and learns the spatial distribution pattern of the defect image under the constraints of the template, while the discriminator is responsible for determining the authenticity of the generated image. Finally, the post-processing module filters artifacts and outputs a standardized defect map. This method is described in detail below with reference to Examples 1-2.

[0019] Example 1: 64×64 resolution wafer defect map generation based on template-driven GAN.

[0020] (1) Wafer defect map data preparation The public wafer defect map dataset WM-811K from actual production lines is used, which contains 8 typical defect types and multiple wafer sizes.

[0021] (2) Template-driven preprocessing process Original defect images of a single defect type from the WM-811K dataset were extracted and superimposed with a pure white background template (an all-ones matrix) to generate a binary template library (template size 150×150, with pixel values ​​0 / 1 representing normal / defective areas). If a defective area covers a portion of a single chip on the template image, the chip is marked as fully defective. Bilinear interpolation or downsampling was performed on the training set defect images to a uniform 64×64 resolution. Figure 2 shows a resolution comparison of the original, preprocessed, and postprocessed images. The preprocessing eliminates the uneven resolution differences in the original data.

[0022] (3) Template-constrained GAN network construction and training The generator in the GAN network adopts a 5-layer transposed convolutional layer stacked structure with the following specific parameters: the first layer: inputs a random noise image, sets the convolution layer with 1024 channels, the normalization layer is BatchNorm2d, and ReLU is used for activation; the second to fourth layers: set the convolution layers in sequence with 512, 256, and 128 channels respectively, the normalization layer is BatchNorm2d, and ReLU is used for activation; the fifth layer: the output layer sets the number of convolutional layer channels to 1, uses the Tanh activation function, and generates a defect image with a resolution of 64×64.

[0023] The discriminator in the GAN network consists of four convolutional layers with the following parameters: the first layer takes the generated defect image as input, the number of convolutional layer channels is 64, and the activation function is Leaky ReLU; the second to third layers have 128 and 256 convolutional channels, respectively, and the activation function is Leaky ReLU; the fourth layer has 1 convolutional channel, an adaptive average pooling layer and a Sigmoid activation function, and finally outputs the discrimination probability.

[0024] During the training process, the loss function is the binary cross entropy loss function, the optimizer is the Adam optimizer, the learning rate is 0.00001, and the iterative training is 100,000 times.

[0025] (4) Post-processing optimization The generated 64×64 defect map is superimposed on a standard defect-free template, and artifact areas (such as low-density noise points) are filtered out using a defect density threshold segmentation algorithm. Finally, a standardized map suitable for industrial inspection equipment is output. Figure 3 The diversity of the generated defect maps is demonstrated, including patterns such as local defects, central defects, and random defects, verifying the method's enhancement capability for different defect types.

[0026] Example 2: 128×128 resolution wafer defect map generation based on template-driven GAN.

[0027] (1) Wafer defect map data preparation The public wafer defect map dataset WM-811K from actual production lines is used, which contains 8 typical defect types and multiple wafer sizes.

[0028] (2) Template-driven preprocessing process Extract the original defect images of a single defect type from the WM-811K dataset and overlay them with a pure white background template (an all-ones matrix) to generate a binary template library (template size 150×150, with pixel values ​​0 / 1 representing normal / defective areas). If a defect area covers a portion of a single chip on the template image, the chip is marked as fully defective. Perform bilinear interpolation or downsampling on the training set defect images to a uniform 128×128 resolution.

[0029] (3) Template-constrained GAN network construction and training The generator in the GAN network adopts a stacked structure of 6 transposed convolutional layers with the following specific parameters: the first layer: inputs a random noise image, sets the convolution layer with 1024 channels, the normalization layer is BatchNorm2d, and ReLU is used for activation; the second to fifth layers: set the convolution layers in sequence with 512, 256, 128, and 64 channels respectively, the normalization layer is BatchNorm2d, and ReLU is used for activation; the sixth layer: the output layer sets the number of convolutional layer channels to 1, uses the Tanh activation function, and generates a defect image with a resolution of 64×64.

[0030] The discriminator in the GAN network consists of five convolutional layers with the following parameters: the first layer uses the generated defect image as input, with 64 convolutional channels and a Leaky ReLU activation function; the second to fourth layers use 128, 256, and 512 convolutional channels, respectively, and a Leaky ReLU activation function; the fifth layer uses 1 convolutional channel, an adaptive average pooling layer, and a Sigmoid activation function, and finally outputs the discrimination probability.

[0031] During the training process, the loss function is the binary cross entropy loss function, the optimizer is the Adam optimizer, the learning rate is 0.00001, and the iterative training is 100,000 times.

[0032] 1. The present invention also provides a wafer defect map data enhancement system to implement the above steps and methods, which includes: a pre-processing module, a GAN network construction module, and a training and post-processing module.

[0033] The preprocessing module is used to extract the original wafer defect image of a single defect type, superimpose it with a pure white template to generate a binary template, correct the local defect area according to the defect coverage rule, and normalize the resolution of the training set defect image; The GAN network building module is used to construct the generator and discriminator. The generator uses a multi-layer transposed convolution stack structure, taking a random noise image as input and passing it through a BatchNorm2d normalization layer and a ReLU activation function to generate a defect image. The discriminator is composed of multiple convolutional layers with increasing number of channels layer by layer, and outputs the discrimination probability through leaky ReLU activation and adaptive average pooling. The training and post-processing module is used to iteratively train the generator and discriminator using the binary cross-entropy loss function and the Adam optimizer; the generated defect map is superimposed on the standard template, the artifact area is filtered using the defect density threshold, and a standardized defect map suitable for industrial inspection equipment is output.

[0034] Although the present invention has been described above with reference to embodiments, various modifications may be made thereto and equivalent components may be substituted without departing from the scope of the present invention. In particular, as long as there are no structural conflicts, the various features of the embodiments disclosed herein may be combined with each other in any manner, and the omission of an exhaustive description of such combinations in this specification is solely for the sake of space and resource conservation. Therefore, the present invention is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A wafer defect map data enhancement method, characterized in that: Here are the steps: S1. Template-driven preprocessing: Extract the original wafer defect image of a single defect type and overlay it with a pure white template to generate a binary template. Correct the local defect area according to the defect coverage rule, and perform resolution normalization on the training set defect image. S2. Template-constrained GAN network construction: Design a generator network and a discriminator network. The generator takes a random noise image as input and processes it through a BatchNorm2d normalization layer and a ReLU activation function to generate a defect image. The discriminator uses a Leaky ReLU activation function and an adaptive average pooling operation to output the discrimination probability. S3. Adversarial training and post-processing: The binary cross entropy loss function and Adam optimizer are used to iteratively train the generator and discriminator. After the generated image is superimposed on the standard template, the artifact area is filtered through the defect density threshold to output a standardized defect map suitable for industrial inspection equipment.

2. The method for enhancing wafer defect map data according to claim 1, wherein: The pure white template has a size of 64×64, 128×128 or 150×150, and is used to perform binary conversion and resolution normalization on the original defect image. By superimposing the blank template, the pixel values ​​of the original defect image are mapped to a 0 / 1 binary space.

3. The method for enhancing wafer defect map data according to claim 1, wherein: The defect coverage rule is: if the defect area covers a local area of ​​a single chip, the chip is marked as a full defect area.

4. The method for enhancing wafer defect map data according to claim 1, wherein: The standard template adopts a standard defect-free wafer template with a size of 64×64, 128×128 or 150×150, and is used to normalize the generated wafer defect map. By superimposing the standard template, the topological logic of the generated defect map is corrected.

5. The method for enhancing wafer defect map data according to claim 1, wherein: The generator adopts a multi-layer transposed convolution stacking structure, including a deep neural network with at least 4 layers of transposed convolution stacking. The number of channels is designed according to the principle of "double the resolution and halve the number of channels". It supports output resolutions of 64×64, 128×128 or 256×256. The middle layer includes a BatchNorm2d normalization layer and a ReLU activation function, and the output layer uses a Tanh activation function.

6. The method for enhancing wafer defect map data according to claim 1, wherein: The discriminator is composed of multiple convolutional layers. The network structure is as follows: a deep neural network consisting of at least 4 convolutional layers, the input defect image resolution includes 64×64, 128×128 or 256×256; the number of channels increases layer by layer, and the final layer combines adaptive average pooling with Sigmoid activation function to output the discrimination probability.

7. The method for enhancing wafer defect map data according to claim 1, wherein: During the adversarial training process, the loss function is the binary cross entropy loss function, the optimizer is the Adam optimizer, the learning rate is 0.00001, and the number of iterative training times is 100,000.

8. A system for implementing the wafer defect map data enhancement method according to any one of claims 1 to 7, characterized in that: include: The preprocessing module is used to extract the original wafer defect map of a single defect type, overlay it with a pure white template to generate a binary template, correct the local defect area according to the defect coverage rule, and normalize the resolution of the training set defect map; The GAN network building module is used to construct the generator and discriminator. The generator uses a multi-layer transposed convolution stack structure, taking a random noise image as input and passing it through a BatchNorm2d normalization layer and a ReLU activation function to generate a defect image. The discriminator is composed of multiple convolutional layers with increasing number of channels layer by layer, and outputs the discrimination probability through leaky ReLU activation and adaptive average pooling. The training and post-processing module is used to iteratively train the generator and discriminator using the binary cross-entropy loss function and the Adam optimizer; the generated defect map is superimposed on the standard template, the artifact area is filtered using the defect density threshold, and a standardized defect map suitable for industrial inspection equipment is output.