Verification method of configuration result of programmable memory, electronic equipment and storage medium

Abstract

The invention relates to the technical field of chip design, in particular to a verification method of a configuration result of a programmable memory, electronic equipment and a storage medium, the verification method comprises the following steps: obtaining a standard file of a standard signal value stored in the programmable memory and a configuration file of the standard file, and the configuration file comprises index information of each signal; actual signal values of the signals configured according to the standard file are obtained, the actual signal values of the K signals are sequentially stored as a row of configuration result sequence according to the index information of the signals in the configuration file, a configuration result file is obtained, the standard signal values in the standard file are processed into a row of standard sequence, and the row of standard sequence is obtained; the configuration result sequence and the standard sequence are compared and verified, so that the workload is reduced, the compiling error problem is avoided, the efficiency is greatly improved, and the verification period is shortened.

Description

Technical Field

[0001] The present invention relates to the technical field of chip design, and in particular to a verification method, electronic equipment and storage medium for programmable memory configuration results. Background Art

[0002] Programmable memory (PROM) is a one-time programmable memory (OTP) based on semiconductor technology. It can be programmed using specific electrical signals and retains information after power is removed. It can be used to store data such as configuration parameters and user data. Some PROMs can also protect circuit components from abnormalities such as overcurrent and overvoltage. In a system-on-a-chip (SoC), after the chip is powered on, the boot code (bootcode) initializes and configures the various internal modules. A key task is to set up each module using the configuration values ​​stored in the PROM. These values ​​are equivalent to the standard values ​​(golden values) originally input. To ensure configuration accuracy, integrated circuit (IC) verification requires a check mechanism. After the boot code completes configuration, the configuration results of each intellectual property (IP) core are checked to ensure consistency with the reference fuse file (hex). Assume that this file is a 32-bit × 1536-row array. The original check mechanism manually extracts the configured signal values ​​and concatenates them into a 32-bit × 1536-row array. However, due to the variety of signal bit widths—some 1 or 2 bits, others 8 or even more than 10 bits—and the requirement for 32 bits per row, line wrapping can occur during the splicing process. For example, if the next signal is 8 bits when the splicing reaches 30 bits, a line wrap must occur. These 8 bits of data are stored across two rows, but with so many signals, it's difficult to determine which signal's bit position in the splicing will trigger a line wrap, and there's no unified rule.

[0003] This situation leads to two obvious defects: First, since the line break signal cannot be clearly defined and there is no unified calculation formula for script processing, it can only rely on manual splicing, which increases the labor and time costs of verification and is prone to human errors; second, if a new signal causes the signal that previously required a line break to no longer break, the original splicing method will cause a compilation error, reducing the stability and maintainability of the verification process. Summary of the Invention

[0004] In order to solve the above technical problems, the present invention adopts a technical solution: a method for verifying the configuration result of a programmable memory, the method comprising the following steps: A standard file of standard signal values ​​stored in a programmable memory is obtained, wherein the standard file includes M lines of data composed of standard signal values ​​of K signals, and each line of data includes N bits of data.

[0005] Obtain a configuration file of the standard file, wherein the configuration file includes index positions of the K signals, wherein the index position of each signal includes a row index index, a row offset offset, and a data bit width size of a standard signal value of the current signal in the standard file.

[0006] Acquire the actual signal value, which is the signal value obtained by configuring the signal according to the standard file; and store the actual signal values ​​of K signals in sequence as a row of configuration result sequence according to the index information of the signal in the configuration file to obtain a configuration result file; wherein the step of storing the actual signal value of the jth signal into the configuration result sequence includes: according to the row index index of the jth signal j , row offset j and data width size j A target index position of the j-th signal in the configuration result sequence is determined, and an actual signal value of the j-th signal is stored in the target index position.

[0007] The M lines of data in the standard file are spliced ​​into one line of standard sequence.

[0008] The configuration result sequence is compared and verified with the standard sequence.

[0009] In addition, the present invention also provides a non-transitory computer-readable storage medium, which stores at least one instruction or at least one program, and the at least one instruction or at least one program is loaded and executed by a processor to implement the above method.

[0010] In addition, the present invention also provides an electronic device including a processor and the above-mentioned non-transitory computer-readable storage medium.

[0011] The present invention has at least the following beneficial effects: The present invention provides a method, electronic device, and storage medium for verifying the configuration results of a programmable memory. The method sequentially stores all actual signal values ​​of the configuration into a row of a configuration result sequence based on the index position of the signal in the configuration file, processes the standard signal values ​​in the standard file into a row of a standard sequence, and compares and verifies the configuration result sequence and the standard sequence. This method reduces the workload while avoiding compilation errors, greatly improves efficiency, shortens the verification cycle, and improves the stability and maintainability of the verification process. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0013] Figure 1 A flow chart of a method for verifying programmable memory configuration results provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0014] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making any creative efforts shall fall within the scope of protection of the present invention.

[0015] Unless otherwise defined, all technical and scientific terms used in the embodiments of the present invention have the same meanings as commonly understood by those skilled in the art.

[0016] See also Figure 1 , which shows a method for verifying a programmable memory configuration result, the method comprising the following steps: S100 , obtaining a standard file of standard signal values ​​stored in a programmable memory, wherein the standard file includes M lines of data composed of standard signal values ​​of K signals, and each line of data includes N bits of data.

[0017] Among them, the programmable memory is a one-time programmable memory based on semiconductor technology. It can be programmed through specific electrical signals and the information will not be lost after power failure. It can be used to store data, such as configuration parameters and user data. Some of them can also protect circuit components when the circuit is abnormal, such as overcurrent and overvoltage.

[0018] In one embodiment, the programmable memory is an Efuse or a flash memory. Other types of programmable memories also fall within the scope of protection of the present invention. In a chip, the capacity of the Efuse is usually very small. Some chips have an Efuse of only 128 bits.

[0019] It should be noted that each row of data includes the signal value of at least one signal. A row of data may include the signal value of at least one signal, and the signal value of a signal may span two rows, that is, part of the signal value of the signal is at the end of the previous row and the other part of the signal value is at the beginning of the next row.

[0020] As an example, a row of data information is 32 bits, the signal value of signal A1 is 8 bits, the signal value of signal A2 is 16 bits, and the signal value of signal A3 is 16 bits. Assuming that the signal values ​​of A1, A2 and A3 are stored in the first row from low to high, since the signal value of A3 is longer, only 8 bits can be stored in the first row, and the remaining 8 bits of A3 must be stored in the lower 8 bits of the second row.

[0021] S200, obtaining a configuration file of the standard file, wherein the configuration file includes index positions of the K signals, wherein the index position of each signal includes a row index index, a row offset offset, and a data bit width size of a standard signal value of the current signal in the standard file.

[0022] It's important to note that the row index indicates the row number of the current signal's value in the standard file, while the row offset indicates the starting position of the current signal's value in the standard file. Combined with the data width, the data width of the current signal's value can be determined. The data directly available in the configuration file is the signal storage starting address, row offset, and data width. The row index must be calculated using a formula.

[0023] In one embodiment, the index satisfies: index = starting address / R, where R is the number of bytes for address alignment. The starting address is the storage address configured for the current signal in the configuration file. Regarding R, byte alignment is a memory management policy that stipulates that the starting address of data storage must be an integer multiple of R. This is done to improve data access efficiency because hardware is faster when accessing aligned data. For example, if R = 4, then the starting address of the data must be a multiple of 4.

[0024] S300, obtaining an actual signal value, wherein the actual signal value is a signal value obtained by configuring a signal according to a standard file; and storing the actual signal values ​​of K signals in sequence as a row of configuration result sequence according to the index information of the signal in the configuration file, to obtain a configuration result file; wherein the step of storing the actual signal value of the jth signal into the configuration result sequence includes: according to the row index index of the jth signal j , row offset j and data width size j A target index position of the j-th signal in the configuration result sequence is determined, and an actual signal value of the j-th signal is stored in the target index position.

[0025] After allocating the standard signal value stored in the programmable memory to each signal, an actual signal value is obtained, and it is necessary to verify whether the configured actual signal value is the same as the standard signal value stored in the programmable memory.

[0026] In one embodiment, the target index position includes a starting position fuse_index and a stored data width stored in the configuration result sequence, the stored data width is configured as the size, and the fuse_index is configured as index×N+offset.

[0027] As an example, when each line has 32 bits of data and R = 4 bytes, the starting address of the jth signal is 0 according to the configuration file, and the row offset is j 4, data bit width size j When it is 12, it indicates that the starting position of the j-th signal stored in the configuration result sequence is fuse_index=index+offset=0 / 4×32+4=4, that is, the starting position of the j-th signal stored in the configuration result sequence is the 4th bit, and the stored data width is 12 bits, that is, the target index position for storing the actual signal value of the j-th signal is from the 4th bit to the 15th bit.

[0028] It should be noted that there is no line break data in the configuration result sequence.

[0029] S400: splicing the M lines of data in the standard file into a line of standard sequence.

[0030] In one embodiment, the splicing step includes: reading the data in the standard file line by line, storing each line of data in a list in order; and connecting the data lines in the list in order to form a continuous line of standard sequence.

[0031] It should be noted that there is no line break data in the standard sequence.

[0032] S500: Compare and verify the configuration result sequence with the standard sequence.

[0033] It should be noted that since both the configuration result sequence and the standard sequence contain single-line data and do not contain line-wrapped data, they can be directly compared.

[0034] In one embodiment, since the number of signals in the chip that need to be configured through the programmable memory is huge, the workload of manually writing code to store the signal value of each signal in the configuration result sequence is also very large. To solve the problem of manual code writing, the present invention further automates the writing of this part of the code through a script. Therefore, the method further includes: S310, automatically generating splicing functions corresponding to K signals, each of the splicing functions is used to store the signal value of the current signal in the configuration result sequence; wherein the step of the script automatically generating the splicing function for the jth signal includes: S311 , obtaining a declared splicing function, where the splicing function includes a function name and a parameter list, where the parameter list includes a first input parameter and a second input parameter.

[0035] As an example, the concatenated function is uvm_model_read(A1, fuse_data_dut[A2]), where uvm_model_read is the function name, A1 is the first input parameter, and fuse_data_dut[A2] is the second input parameter. The first input parameter is the signal name of the signal to be read. The second input parameter is the target index location where the read result is stored, and fuse_data_dut is the array name.

[0036] S312, obtaining the index of the j-th signal according to the configuration file j 、offset j and size j .

[0037] S313, according to the index j 、offset j and size j Splicing generates a second input parameter in the splicing function.

[0038] In one embodiment, the second input parameter is: fuse_data_dut[A21:A22], wherein fuse_data_dut[A21:A22] is the target index location for storing the read result, fuse_data_dut is the array name; A21 is index j ×N+offset j +size j , indicating the high address index of the target index position; A22 is index j ×N+offset j , represents the low-order address index of the target index position. In one embodiment, index j =Start address / R.

[0039] S314: Acquire a signal file, where the signal file includes signal names of K signals.

[0040] S315 , matching the signal file with the signal name of the second input parameter, and when the match is successful, generating the first input parameter in the splicing function according to the successfully matched signal name.

[0041] In one embodiment, the matching of signal names is a textual matching.

[0042] In one embodiment, the signal name is a hierarchical name of the signal, which is a naming method used to accurately identify the position of the signal in a complex circuit system and reflects the module hierarchical relationship where the signal is located.

[0043] The method for automatically generating the splicing function provided by S311-S315 improves the generation efficiency of the splicing function.

[0044] In summary, the present invention provides a method for verifying the configuration results of a programmable memory. It stores all the actual signal values ​​of the configuration in sequence according to the index position of the signal in the configuration file into a row of configuration result sequence, processes the standard signal values ​​in the standard file into a row of standard sequence, and compares and verifies the configuration result sequence and the standard sequence. While reducing the workload, it also avoids the compilation error problem, greatly improves efficiency, and shortens the verification cycle.

[0045] An embodiment of the present invention also provides a non-transitory computer-readable storage medium, which can be set in an electronic device to store at least one instruction or at least one program related to implementing a method in a method embodiment. The at least one instruction or the at least one program is loaded and executed by the processor to implement the method provided in the above embodiment.

[0046] An embodiment of the present invention further provides an electronic device including a processor and the aforementioned non-transitory computer-readable storage medium.

[0047] An embodiment of the present invention further provides a computer program product comprising program code. When the program product is run on an electronic device, the program code is used to enable the electronic device to execute the steps of the method according to various exemplary embodiments of the present invention described above in this specification.

[0048] Those skilled in the art will clearly understand that for the sake of convenience and brevity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be distributed to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0049] Although some specific embodiments of the present invention have been described in detail by way of example, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It should also be understood by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A method for verifying a programmable memory configuration result, characterized in that: The method comprises the following steps: Obtaining a standard file of standard signal values ​​stored in a programmable memory, wherein the standard file includes M lines of data consisting of standard signal values ​​of K signals, and each line of data includes N bits of data; Obtaining a configuration file of the standard file, wherein the configuration file includes index information of the K signals, wherein the index information of each signal includes a row index index, a row offset offset, and a data bit width size of a standard signal value of the current signal in the standard file; Acquire the actual signal value, which is the signal value obtained by configuring the signal according to the standard file; and store the actual signal values ​​of K signals in sequence as a row of configuration result sequence according to the index information of the signal in the configuration file to obtain a configuration result file; wherein the step of storing the actual signal value of the jth signal into the configuration result sequence includes: according to the row index index of the jth signal j , row offset j and data width size j Determine a target index position of the j-th signal in the configuration result sequence, and store the actual signal value of the j-th signal in the target index position; Splicing the M lines of data in the standard file into a line of standard sequence; The configuration result sequence is compared and verified with the standard sequence.

2. The method according to claim 1, characterized in that The target index position includes a starting position fuse_index and a stored data width stored in the configuration result sequence, the stored data width is configured as the size, and the fuse_index is configured as index×N+offset.

3. The method according to claim 1, characterized in that The index satisfies: index=starting address / R, where R is the number of bytes of address alignment.

4. The method according to claim 1, wherein The method further includes: automatically generating, by script, splicing functions corresponding to K signals, each of the splicing functions being used to store an actual signal value of a current signal into the configuration result sequence.

5. The method according to claim 4, characterized in that The steps for the script to automatically generate the splicing function for the jth signal include: Obtain a declared splicing function, the splicing function including a function name and a parameter list, the parameter list including a first input parameter and a second input parameter; Get the index of the jth signal according to the configuration file j 、offset j and size j ; According to the index j 、offset j and size j Splicing to generate a second input parameter in the splicing function; Obtain a signal file, wherein the signal file includes signal names of K signals; The signal file is matched with the signal name of the second input parameter. When the match is successful, the first input parameter in the splicing function is generated according to the successfully matched signal name.

6. The method according to claim 5, characterized in that The second input parameter is: fuse_data_dut[A21:A22], wherein fuse_data_dut[A21:A22] is the target index location for storing the read result, fuse_data_dut is the array name; A21 is index j ×N+offset j +size j , indicating the high address index of the target index position; A22 is index j ×N+offset j , representing the low-order address index of the target index position.

7. The method according to claim 1, characterized in that The splicing step includes: reading the data in the standard file line by line, storing each line of data in a list in order; and connecting the data lines in the list in order to form a continuous line of standard sequence.

8. The method according to claim 1, characterized in that The programmable memory is Efuse.

9. A non-transitory computer-readable storage medium, wherein at least one instruction or at least one program is stored in the storage medium, characterized in that: The at least one instruction or the at least one program is loaded and executed by a processor to implement the method according to any one of claims 1 to 8.

10. An electronic device, characterized in that: The device comprises a processor and the non-transitory computer-readable storage medium as claimed in claim 9.

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