Bit stream processing method and related device

Abstract

The invention provides a bit stream processing device. A bitstream processing apparatus includes a transceiver and a processor, processing a bitstream to provide processed bits; and transmitting, by the transceiver, the processed bit to the station through a combination of a plurality of resource units allocated to the station, where, when processing the bit stream, the processor is configured to perform parsing the bit stream into a combination of a plurality of RUs, the combination comprising at least one smaller resource unit of 242 or 484 tones and at least one larger resource unit of 996 tones; and in the event that remaining bits remain after parsing, the proportional loop parser allocates the remaining bits to one or more resource units, rather than all resource units, such that the remaining bits are allocated to each of at least one larger resource unit, rather than at least one smaller resource unit. According to the bit stream processing method, the system performance can be improved.

Description

Technical field

[0001] The present disclosure relates generally to wireless communications, and more particularly, to leftover bit processing for proportional round-robin resource unit (RU) parsing in extreme high-throughput (EHT) systems. [Background Technology]

[0002] Unless otherwise indicated herein, the approaches described in this section are not background art to the present invention and are not admitted as background art by inclusion in this section.

[0003] In next-generation EHT systems (e.g., wireless local area network (WLAN) systems) based on the upcoming Institute of Electrical and Electronics Engineers (IEEE) 802.11be standard, aggregated RUs (interchangeably referred to herein as multi-RUs) comprising multiple RUs can be allocated to a single station (STA) to improve spectrum efficiency. However, in certain RU aggregation scenarios, after filling the bits for a smaller RU (e.g., RU484, which represents a 484-tone RU), there may be some remaining bits for a larger RU (e.g., RU996, which represents a 996-tone RU). Therefore, a solution is needed to handle the remaining bits in this situation. [Summary of the invention]

[0004] These and other objects of the present invention will no doubt become apparent to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment, which is illustrated in the various diagrams and figures.

[0005] According to one embodiment of the present invention, a method for processing a bit stream is provided, comprising processing a bit stream to provide processed bits; and sending the processed bits to a station via a combination of multiple resource units allocated to the station, comprising: parsing the bit stream into the combination of multiple resource units; and if remaining bits remain after the parsing, allocating the remaining bits to one or more resource units rather than to all resource units in the combination of the multiple resource units.

[0006] According to another embodiment of the present invention, a method for processing a bit stream is provided, comprising: processing a bit stream to provide processed bits; and sending the processed bits to the station via a combination of multiple resource units allocated to the STA, wherein the combination of the multiple resource units includes at least one smaller resource unit and at least one larger resource unit, and each of the at least one larger resource unit has more tones than the at least one smaller resource unit, and wherein the processing of the bit stream comprises: parsing the bit stream into the combination of the multiple resource units in a proportional round-robin manner; and if remaining bits remain after parsing in the proportional round-robin manner, allocating the remaining bits to the at least one larger resource unit.

[0007] Other aspects and features of the present invention will become apparent to those skilled in the art from reading the following description of specific embodiments.

Brief Description of the Drawings

[0008] Various embodiments of the present disclosure, presented as examples, will be described in detail with reference to the following drawings, in which:

[0009] Figure 1 is a schematic diagram of an example network environment in which various solutions according to the present disclosure may be implemented.

[0010] Figure 2 is a diagram designed according to an example of the present disclosure.

[0011] Figure 3 is a diagram of an example scenario according to the present disclosure.

[0012] Figure 4 is a diagram of an example scenario according to the present disclosure.

[0013] Figure 5 is a diagram of an example scenario according to the present disclosure.

[0014] Figure 6 is a diagram of an example scenario according to the present disclosure.

[0015] Figure 7 An example system with example devices according to an embodiment of the present disclosure is shown.

[0016] Figure 8 An example process according to an embodiment of the present disclosure is shown.

[0017] Figure 9 An example process according to an embodiment of the present disclosure is shown. [Specific implementation method]

[0018] Certain words are used in the specification and claims to refer to specific components. It should be understood by those skilled in the art that manufacturers may use different terms to refer to the same component. This specification and claims do not distinguish components based on differences in name, but rather on differences in the functions of the components. The word "including" mentioned throughout the specification and claims is an open-ended term and should be interpreted as "including but not limited to". In addition, the word "coupled" includes any direct and indirect electrical connection means. Therefore, if the text describes a first device coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means.

[0019] It will be readily understood that the components of the present invention, as generally described and illustrated in the figures herein, may be arranged and designed in a variety of different configurations. Accordingly, the following more detailed description of embodiments of the systems and methods of the present invention, as illustrated in the figures, is not intended to limit the scope of the claimed invention, but is merely representative of selected embodiments of the invention.

[0020] Implementations according to the present disclosure involve various techniques, methods, concepts, and / or solutions related to residual bit processing for proportional round-robin RU parsing in EHT systems. According to the present disclosure, many possible solutions can be implemented individually or in combination. That is, although these possible solutions may be described separately below, two or more of these possible solutions may be implemented in one or another combination.

[0021] It is worth noting that although the description provided herein may be in the context of certain radio access technologies, networks, and network topologies (e.g., Wi-Fi), the concepts, schemes, and any (multiple) variants / derivatives presented may be implemented in and through other types of radio access technologies, networks, and network topologies, such as, but not limited to, Bluetooth, ZigBee, Fifth Generation (5G) / New Radio (NR), Long Term Evolution (LTE), Advanced LTE, Advanced LTE Pro, Internet of Things (IoT), Industrial Internet of Things (IIoT), and Narrowband Internet of Things (NB-IoT). Therefore, the scope of the present disclosure is not limited to the examples described herein.

[0022] Figure 1 An example network environment 100 is shown in which various solutions and concepts according to the present disclosure may be implemented. Figure 2 Figure 6 1 shows an example of implementation of various proposed solutions in a network environment 100 according to the present disclosure. Figure 1 Figure 6 The following descriptions of various proposed approaches are provided.

[0023] like Figure 1 As shown, network environment 100 may include at least one STA 110 and STA 120 in wireless communication. Each of STA 110 and STA 120 may be a non-access point (non-AP) STA, or either STA 110 or STA 120 may function as an AP. In some cases, STA 110 and STA 120 may be associated with a basic service set (BSS) in accordance with one or more IEEE 802.11 standards (e.g., IEEE 802.11be and future standards). Each of STA 110 and STA 120 may be configured to communicate with each other using residual bit processing according to various proposed schemes described below for proportional round-robin RU resolution in an EHT system.

[0024] Figure 2 An example design 200 according to the present disclosure is shown. In general, the basic operation of multi-RU transmission may include the following reference Figure 2 Many operations described. For example, data for one STA (e.g., STA 110 or STA 120) for transmission over multiple RUs using one physical layer (PHY) service data unit (PSDU) may be provided by a media access control layer (MAC) 210. Information bits for the multiple RUs may be jointly encoded by a joint encoder 220 to provide a coded bit sequence to a stream parser 230, which may perform stream parsing to split or otherwise parse the input coded bit stream into different spatial streams. A bit-level RU and segment (RU / segment) parser 240 may then be operated at the bit level for each stream to allocate, distribute, or parse the coded bits on each of the multiple RUs for modulation and tone mapping / interleaving for transmission over the allocated RUs, depending on the bandwidth and / or RU allocation and interleaving / tone mapping scheme.

[0025] Under the proposed solution according to the present disclosure, regarding the proportional cycle RU analysis, the parameter s=max{1, N bpscs / 2} (referred to herein as "s bits"), where N bpscs The number of coded bits per subcarrier per spatial stream. Therefore, the value of s bits may depend on the type of modulation used, since N bpscsDepending on the type of modulation used (e.g., Nbpscs=2 for quadrature phase shift keying (QPSK) and Nbpscs=4 for 16-bit quadrature amplitude modulation (QAM), the coded bits can therefore be parsed into multiple RUs in a proportional round-robin manner, where the parser ratio depends on the size (or number of tones) of each RU in the RU aggregate. For example, the parser ratio can be defined in the format of m0:m1:m2… (or 1s:2s:3s…), and each of m0, m1, and m2 can be in units of s bits. The operation of the proportional round-robin parser is as follows: first, the parser can parse m0 s-bits into the first RU (RU1), then parse m1s bits into the second RU (RU2), and so on, by alternatively assigning the coding to each RU in the multiple RUs. For certain multi-RU combinations, if there are remaining bits after alternatingly allocating coded bits to each RU in a ratio of m0:m1:... (or 1s:2s:...), the residual (remaining) bits can be allocated to each relatively large RU. In addition, the residual / remaining bits can also be allocated to the larger RUs (when the number of larger RUs is equal to or greater than 2) in a ratio of m1:m2:m3 (or 2:2:2) (if the larger RUs have the same size, in units of s bits) to further improve system performance. Otherwise, the residual / remaining bits can be allocated sequentially or evenly to each larger RU as described below.

[0026] Figure 3 An example scenario 300 according to the present disclosure is shown. Figure 3 In FIG. 5 , a set of example combinations of RUs and corresponding parameters are shown in a table. For example, for each example combination of multiple RUs, a corresponding parameter may be a tone or data subcarrier (N sd Another corresponding parameter can be the ratio between RUs in the combination, expressed as Ns d，0 :Ns d，1 :Ns d，2 : ... is approximately m0:m1:m2: ..., where mi is an integer in s bits, 0 ≤ i ≤ the number of RUs combined – 1. Therefore, in the present disclosure, each expression of the ratio (e.g., m0: ... : mn) can be replaced by an alternative expression of 1s: ... : ns, where n > 1. Another corresponding parameter can be the number of bits (or residual) remaining (per symbol), if any, after parsing the coded bit stream into a combination of multiple RUs in a round-robin manner.

[0027] Reference Figure 3As shown, for some combinations of RUs, there may be bits remaining after parsing in a round-robin manner, while for some other combinations of RUs, there may not be any bits remaining after parsing in a round-robin manner. In each of those combinations of RUs with multiple bits remaining, there may be at least one smaller RU and at least one larger RU in terms of the number of tones. For example, in the listed combination examples of multiple RUs, the following combinations may have remaining bits after parsing in a round-robin manner: a combination of a smaller RU of 484 tones (RU484) plus a larger RU of 996 tones (RU996), a combination of an aggregated RU that is an aggregate of smaller RUs (one RU of 242 tones (RU242) and one RU of 484 tones (RU484)) and a larger RU of 996 tones (RU996), a combination of one smaller RU of 484 tones (RU484) plus two larger RUs of 996 tones (RU996), a combination of one smaller RU of 484 tones (RU484) plus three larger RUs of 996 tones (RU996), and a combination of one smaller RU of 242 tones (RU242) plus one larger RU of 996 tones (RU996).

[0028] According to the proposed solution of the present disclosure, Figure 4 As shown, for a combination of multiple RUs with remaining bits after parsing in a round-robin manner, the remaining bits can be allocated to at least one larger RU of the multiple combined RUs. For example, under the first method, the remaining bits can be proportionally allocated over the last predefined number of tones (e.g., 44 tones) in the ratio of m1:m2:... between the larger RU (e.g., RU996) of the combination of the multiple RUs. Under the second method, as Figure 5 As shown, the remaining bits can be sequentially distributed over the last predetermined number of tones (e.g., 44 tones) of each larger RU (e.g., RU996) of the combination of multiple RUs. Under the third method, as shown Figure 6 As shown, the remaining bits can be evenly distributed on each larger RU (eg, RU996) of the combination of multiple RUs.

[0029] Figure 4 An example scenario 400 according to the present disclosure is shown. In scenario 400, a bit stream (e.g., coded bits of input data) may be parsed into a combination of multiple RUs having at least one smaller RU and at least one larger RU in a proportional round-robin manner. Then, in the event that remaining bits remain from the parsing in the proportional round-robin manner, the remaining bits may be assigned to at least one larger RU in the combination of the multiple RUs. For example, Figure 4In the example shown, the combination of multiple RUs may include one smaller RU (e.g., RU 484) and two larger RUs (e.g., first RU 996 and second RU 996), with the ratio of m0:m1:m2 being 448:996:996, or 1:2:2. Therefore, initially, the bitstream may be parsed into a combination of multiple RUs consisting of RU 484, first RU 996, and second RU 996 in a round-robin fashion, according to a ratio of 1:2:2. Subsequently, under the proposed scheme of the present disclosure, the remaining bits may be distributed over the final 44 tones between the first RU 996 and the second RU 996.

[0030] Figure 5 An example scenario 500 according to the present disclosure is shown. In the scenario 500, a bit stream (e.g., coded bits of input data) may be parsed into a combination of multiple RUs having at least one smaller RU and at least one larger RU in a proportional cyclic manner. Then, if remaining bits remain after parsing in the proportional cyclic manner, the remaining bits may be allocated to at least one larger RU in the combination of the multiple RUs. For example, Figure 5 In the example shown, a combination of multiple RUs may include one smaller RU (e.g., RU 484) and two larger RUs (e.g., first RU 996 and second RU 996), where the ratio of m0:m1:m2 is 448:996:996 or 1:2:2. Therefore, initially, the bitstream may be parsed into a combination of multiple RUs, including RU 484, first RU 996, and second RU 996, in a proportional round-robin manner, according to a 1:2:2 ratio. Subsequently, under the proposed scheme of the present disclosure, the remaining remaining bits may be distributed across the last 44 tones of each of the first RU 996 and the second RU 996.

[0031] Figure 6 An example scenario 600 according to the present disclosure is shown. In scenario 600, a bit stream (e.g., coded bits of input data) may be parsed into a combination of multiple RUs having at least one smaller RU and at least one larger RU in a proportional cyclic manner. Then, when the remaining bits are parsed in a proportional cyclic manner, the remaining bits may be assigned to at least one larger RU in the combination of the multiple RUs. For example, Figure 6In the example shown, the combination of multiple RUs may include one smaller RU (e.g., RU484) and two larger RUs (e.g., first RU996 and second RU996), where the ratio of m0:m1:m2 is 448:996:996 or 1:2:2. Therefore, under the proposed scheme according to the present disclosure, for every N iterations (N>1) of the bit stream of the combination of multiple RUs parsed into RU484, first RU996, and second RU996, the bit stream is allocated in a ratio of 1:2:2, and the first RU996 and the second RU996 in the combination of multiple RUs may allocate one or more additional m1 s bits to the first RU996, and may allocate one or more additional m2 s bits to the second RU996 in a proportional round-robin manner.

[0032] Figure 7 An example system 700 is shown having at least an example device 710 and an example device 720 according to an embodiment of the present disclosure. Each of the devices 710 and 720 can perform various functions to implement the schemes, techniques, processes, and methods described herein related to residual bit processing for proportional round-robin RU parsing in an EHT system, including the various schemes, concepts, ideas, systems, and methods described above with respect to various proposed designs, as well as the following processes. For example, the device 710 can be implemented in the STA 110, while the device 720 can be implemented in the STA 120, or vice versa.

[0033] Each of apparatus 710 and apparatus 720 may be part of an electronic device, such as a STA or AP, such as a portable or mobile device, a wearable device, a wireless communication device, or a computing device. When implemented in a STA, each of apparatus 710 and apparatus 720 may be implemented in a smartphone, a smartwatch, a personal digital assistant, a digital camera, or a computing device such as a tablet, laptop, or notebook computer. Each of apparatus 710 and apparatus 720 may also be part of a machine-type device, such as an IoT device, such as a stationary or fixed device, a home device, a wired communication device, or a computing device. For example, each of apparatus 710 and apparatus 720 may be implemented in a smart thermostat, a smart refrigerator, a smart door lock, a wireless speaker, or a home control center. When implemented in or as a network device, apparatus 710 and / or apparatus 720 may be implemented in a network node, such as an AP in a WLAN.

[0034] In some embodiments, each of the apparatus 710 and the apparatus 720 may be implemented in the form of one or more integrated circuit (IC) chips, such as, but not limited to, one or more single-core processors, one or more multi-core processors, one or more reduced instruction set computing (RISC) processors, or one or more complex instruction set computing (CISC) processors. In the various schemes described above, each of the apparatus 710 and the apparatus 720 may be implemented in or with a STA or an AP. Each of the apparatus 710 and the apparatus 720 may include Figure 7 At least some of those components shown in . For example, Figure 7 Each of the apparatus 710 and the apparatus 720 may further include one or more other components not related to the proposed solution of the present disclosure (e.g., an internal power supply, a display device, and / or a user interface device), and therefore, for the sake of simplicity and brevity, such components of the apparatus 710 and the apparatus 720 are not shown in FIG. Figure 7 They are not shown or described.

[0035] In one aspect, each of the processors 712 and 722 can be implemented in the form of one or more single-core processors, one or more multi-core processors, one or more RISC processors, or one or more CISC processors. That is, even if the singular term "processor" is used herein to refer to the processors 712 and 722, in accordance with the disclosure of the present invention, each of the processors 712 and 722 may include multiple processors in some embodiments and a single processor in other embodiments. On the other hand, each of the processors 712 and 722 can be implemented in the form of hardware (and optionally, firmware) having electronic components, which include, for example, but not limited to, one or more transistors, one or more diodes, one or more capacitors, one or more resistors, one or more inductors, one or more memristors, and / or one or more varactors, which are configured and arranged to achieve specific purposes according to the present disclosure. In other words, in at least some embodiments, each of the processors 712 and 722 is a dedicated machine specifically designed, arranged, and configured to perform specific tasks, including those tasks related to the processing of the remaining bits of the proportional cycle RU parsing in the EHT system according to various embodiments of the present disclosure.

[0036] In some embodiments, the device 710 may further include a transceiver 716 coupled to the processor 712. The transceiver 716 may include a transmitter capable of wirelessly transmitting data and a receiver capable of wirelessly receiving data. In some embodiments, the device 720 may further include a transceiver 726 coupled to the processor 722. The transceiver 726 may include a transmitter capable of wirelessly transmitting data and a receiver capable of wirelessly receiving data. It is worth noting that although the transceiver 716 and the transceiver 726 are illustrated as being external to and separate from the processor 712 and the processor 722, respectively, in some embodiments, the transceiver 716 may be a component of the processor 712 as a system on a chip (SoC), and the transceiver 726 may be a component of the processor 722 as a SoC.

[0037] In some embodiments, the device 710 may further include a memory 714 coupled to the processor 712 and accessible by the processor 712, and storing data therein. In some embodiments, the device 720 may further include a memory 724 coupled to the processor 722 and accessible by the processor 722, and storing data therein. Each of the memory 714 and the memory 724 may include a type of random access memory (RAM), such as dynamic RAM (DRAM), static RAM (SRAM), thyristor RAM (T-RAM), and / or zero capacitor RAM (Z-RAM). Alternatively or additionally, each of the memory 714 and the memory 724 may include a type of read-only memory (ROM), such as mask ROM, programmable ROM (PROM), erasable programmable ROM (EPROM), and / or electrically erasable programmable ROM (EEPROM). Alternatively or additionally, each of the memory 714 and the memory 724 may include a type of non-volatile random access memory (NVRAM), such as flash memory, solid-state memory, ferroelectric RAM (FeRAM), magnetoresistive RAM (MRAM), and / or phase change memory.

[0038] Each of apparatus 710 and apparatus 720 may be a communication entity capable of communicating with each other using various proposed schemes according to the present disclosure. For illustrative purposes and not limitation, a description of the functionality of apparatus 710 (e.g., STA 110) and apparatus 720 (e.g., STA 120) is provided below. It is worth noting that, although a detailed description of the capabilities, functions, and / or technical features of apparatus 710 is provided below, it can be applied similarly to apparatus 720, although a detailed description thereof is not provided for the sake of brevity. It is also worth noting that, although an example implementation of the following description is provided in the context of a WLAN, the same implementation can be implemented in other types of networks.

[0039] In a proposed scheme related to residual bit processing for proportional cyclic RU parsing in an EHT system according to the present disclosure, apparatus 710 is implemented in or as STA 110 in a network environment, and apparatus 720 is implemented in or as STA 120 in a network environment. A processor 712 of apparatus 710 may encode data for a STA (e.g., STA 120) to provide a bit stream. Furthermore, processor 712 may process the bit stream to provide processed bits. For example, processor 712 may parse the bit stream into a combination of multiple RUs assigned to the STA, and if residual bits remain during parsing, processor 712 may allocate the residual bits to one or more RUs, but not all RUs in the RU combination. Furthermore, processor 712 may wirelessly transmit the processed bits to the STA via transceiver 716 via the combination of multiple RUs.

[0040] In some implementations, when parsing the bitstream into a combination of multiple RUs, the processor 712 may parse the bitstream into the combination of multiple RUs in a proportional round-robin manner.

[0041] In some embodiments, the combination of the plurality of RUs may include at least one smaller RU and at least one larger RU, and each of the at least one larger RU has more tones than the at least one smaller RU. In this case, when allocating the remaining bits to one or more RUs rather than all RUs of the combination of the plurality of RUs, the processor 712 may allocate the remaining bits to the at least one larger RU.

[0042] In some implementations, when allocating the remaining bits to the at least one larger RU, the processor 712 may distribute the remaining bits proportionally over a last predetermined number of tones in each of the at least one larger RU. For example, the processor 712 may distribute the remaining bits proportionally over a last 44 tones in each of the at least one larger RU.

[0043] In some embodiments, a combination of multiple RUs may include a smaller RU of 484 tones and a larger RU of 996 tones. In such a case, the ratio of the multiple RUs may be 1:2 in units of s bits, and may alternatively be expressed as 1s:2s, with the remaining bits allocated to the larger RU of 996 tones.

[0044] In some embodiments, a combination of multiple RUs may include one smaller RU of 484 tones and two larger RUs of 996 tones. In this case, the ratio of the multiple RUs may be 1:2:2 in units of s bits, or may be expressed as 1s:2s:2s, and the remaining bits may be allocated to the two larger RUs of 996 tones in a ratio of 2:2 in units of s bits (or expressed as 2s:2s).

[0045] In some embodiments, a combination of multiple RUs may include one smaller RU of 484 tones and three larger RUs of 996 tones. In this case, the ratio of the multiple RUs may be 1:2:2:2 in units of s bits, or 1s:2s:2s:2s, and the remaining bits may be allocated to the three larger RUs of 996 tones in a ratio of 2:2:2 in units of s bits (or 2s:2s:2s).

[0046] In some embodiments, a combination of multiple RUs may include an aggregate RU and a larger RU of 996 tones, and the aggregate RU includes a smaller RU of 242 tones and a smaller RU of 484 tones. In such a case, the ratio of the multiple RUs may be 3:4, or alternatively expressed as 3s:4s, in units of s bits, with the remaining bits allocated to the larger RU of 996 tones.

[0047] In some implementations, a combination of multiple RUs may include a smaller RU of 242 tones and a larger RU of 996 tones. In this case, the ratio of the multiple RUs may be 1:4 in s bits, and may alternatively be expressed as 1s:4s.

[0048] In an embodiment of the present disclosure, and in accordance with a method for processing remaining bits for proportional round-robin RU parsing in an EHT system, apparatus 710 may be implemented in or as STA 110 in network environment 100, and apparatus 720 may be implemented in or as STA 120 in network environment 110. A processor 712 of apparatus 710 may encode data for a STA (e.g., STA 120) to provide a bit stream. Furthermore, processor 712 may process the bit stream to provide processed bits. For example, processor 712 may parse the bit stream in a proportional round-robin manner into a combination of multiple RUs assigned to the STA, which may include at least one smaller RU and at least one larger RU, each of the at least one larger RU having more tones than the at least one smaller RU. Furthermore, if remaining bits remain from the proportional round-robin parsing, processor 712 may allocate the remaining bits to one or more RUs, rather than all RUs in the combination of the multiple RUs. Furthermore, processor 712 may wirelessly transmit the processed bits to the STA via the combination of the multiple RUs via transceiver 716.

[0049] In some implementations, when allocating the remaining bits to the at least one larger RU, the processor 712 may distribute the remaining bits proportionally over the last 44 tones on each of the at least one larger RU.

[0050] In some implementations, when allocating the remaining bits to the at least one larger RU, the processor 712 may sequentially allocate the remaining bits over the last 44 tones on each of the at least one larger RU.

[0051] In some implementations, when allocating the remaining bits to the at least one larger RU, the processor 712 may evenly distribute the remaining bits across each of the at least one larger RU. For example, when evenly distributing the remaining bits across each of the at least one larger RU, for every N iterations of parsing the bitstream into a combination of multiple RUs in a proportional round-robin manner, the processor 712 may allocate the remaining bits to each RU in the at least one larger RU, where N is an integer equal to or greater than 1.

[0052] In some embodiments, a combination of multiple RUs may include a smaller RU of 484 tones and a larger RU of 996 tones. In such a case, the ratio of the multiple RUs may be 1:2 (in s bits), and may alternatively be expressed as 1s:2s, with the remaining bits allocated to the larger RU of 996 tones.

[0053] In some embodiments, the combination of multiple RUs may include one smaller RU of 484 tones and two larger RUs of 996 tones. In this case, the ratio of the multiple RUs may be 1:2:2 (in s bits), or may be expressed as 1s:2s:2s, with the remaining bits being allocated to the two larger RUs of 996 tones in a ratio of 2:2 (in s bits) (or expressed as 2s:2s).

[0054] In some embodiments, a combination of multiple RUs may include one smaller RU of 484 tones and three larger RUs of 996 tones. In this case, the ratio of the multiple RUs may be 1:2:2:2 (in s bits), or 1s:2s:2s:2s, and the remaining bits may be allocated to the three larger RUs of 996 tones in a ratio of 2:2:2 (in s bits) (or 2s:2s:2s).

[0055] In some implementations, a combination of multiple RUs may include an aggregate RU and a larger RU of 996 tones, and the aggregate RU includes a smaller RU of 242 tones and a smaller RU of 484 tones. In such a case, the ratio of the multiple RUs may be 3:4 in s bits, or alternatively expressed as 3s:4s, with the remaining bits allocated to the larger RU of 996 tones.

[0056] In some embodiments, a combination of multiple RUs may include a smaller RU of 242 tones and a larger RU of 996 tones. In this case, the ratio of the multiple RUs may be 1:4 in s-bit units, and may alternatively be expressed as 1s:4s.

[0057] Figure 8 An example process 800 is shown in accordance with an embodiment of the present disclosure. Process 800 may represent one aspect of implementing the various proposed designs, concepts, schemes, systems, and methods described above. More specifically, process 800 may represent one aspect of the proposed concepts and schemes related to residual bit processing for proportional round-robin RU parsing in an EHT system in accordance with the present disclosure. Process 800 may include one or more operations, actions, or functions shown in one or more of blocks 810, 820, and 830 and sub-blocks 822 and 824. Although shown as discrete blocks, the various blocks of process 800 may be divided into more blocks, combined into fewer blocks, or eliminated, depending on the desired implementation. Furthermore, the blocks / sub-blocks of process 800 may be arranged in accordance with Figure 8 800. The process 800 may be performed in the order shown or in other orders. Furthermore, one or more blocks / sub-blocks of process 800 may be performed repeatedly or iteratively. Process 800 may be implemented by or in apparatus 710 and apparatus 720, or any variations thereof. For illustrative purposes only and without limiting the scope, process 800 is described below in the context of apparatus 710 implemented in or as STA 110 and apparatus 720 implemented in or as STA 120 in a network environment 100 according to a wireless network (e.g., a WLAN) that complies with one or more IEEE 802.11 standards. Process 800 may begin at block 810.

[0058] At 810 , process 800 may involve processor 712 of device 710 (eg, STA 110 ) encoding data for a STA (eg, STA 120 ) to provide a bitstream. Process 800 may proceed from 810 to 820 .

[0059] At 820, process 800 may include processor 712 processing the bit stream to provide processed bits by performing operations represented by 822 and 824. Process 800 may proceed from 820 to 830.

[0060] At 830 , process 800 may include processor 712 transmitting the processed bits to the STA via transceiver 716 over a combination of multiple RUs assigned to the STA.

[0061] At 822, process 800 can include processor 712 parsing the bitstream into a combination of multiple RUs. Process 800 can proceed from 822 to 824.

[0062] At 824 , in the event that remaining bits remain after parsing, process 800 may involve processor 712 allocating the remaining bits to one or more RUs rather than all RUs in the combination of the plurality of RUs.

[0063] In some implementations, when parsing the bitstream into combinations of multiple RUs, the process 800 may include the processor 712 parsing the bitstream into combinations of multiple RUs in a proportional round-robin manner.

[0064] In some embodiments, the combination of the plurality of RUs may include at least one smaller RU and at least one larger RU, and each of the at least one larger RU has more tones than the at least one smaller RU. In such a case, when allocating remaining bits to one or more RUs rather than all RUs in the combination of the plurality of RUs, the process 800 may involve the processor 712 allocating the remaining bits to the at least one larger RU.

[0065] In some implementations, in allocating the remaining bits to the at least one larger RU, the process 800 may include the processor 712 proportionally distributing the remaining bits across a last predetermined number of tones in each of the at least one larger RU. For example, the process 800 may include the processor 712 proportionally distributing the remaining bits across a last predetermined number of tones in each of the at least one larger RU.

[0066] In some embodiments, a combination of multiple RUs may include a smaller RU of 484 tones and a larger RU of 996 tones. In such a case, the ratio of the multiple RUs may be 1:2 in s bits, and may alternatively be expressed as 1s:2s, with the remaining bits allocated to the larger RU of 996 tones.

[0067] In some embodiments, the combination of multiple RUs may include one smaller RU of 484 tones and two larger RUs of 996 tones. In this case, the ratio of the multiple RUs may be 1:2:2 (in s bits), or 1s:2s:2s, and the remaining bits may be allocated to the two larger RUs of 996 tones in a ratio of 2:2 (in s bits), or 2s:2s.

[0068] In some embodiments, a combination of multiple RUs may include one smaller RU of 484 tones and three larger RUs of 996 tones. In this case, the ratio of the multiple RUs may be 1:2:2:2 (in units of s bits), or 1s:2s:2s:2s, and the remaining bits may be allocated to the three larger RUs of 996 tones in a ratio of 2:2:2 (in units of s bits), or 2s:2s:2s.

[0069] In some implementations, a combination of multiple RUs may include an aggregate RU and a larger RU of 996 tones, and the aggregate RU includes a smaller RU of 242 tones and a smaller RU of 484 tones. In such a case, the ratio of the multiple RUs may be 3:4 in s bits, or alternatively expressed as 3s:4s, with the remaining bits allocated to the larger RU of 996 tones.

[0070] In some embodiments, a combination of multiple RUs may include a smaller RU of 242 tones and a larger RU of 996 tones. In this case, the ratio of the multiple RUs may be 1:4 in s-bit units, and may alternatively be expressed as 1s:4s.

[0071] Figure 9 An example process 900 is shown in accordance with an embodiment of the present disclosure. Process 900 may represent one aspect of implementing the various proposed designs, concepts, schemes, systems, and methods described above. More specifically, process 900 may represent one aspect of the proposed concepts and schemes related to residual bit processing for proportional round-robin RU parsing in an EHT system in accordance with the present disclosure. Process 900 may include one or more operations, actions, or functions shown in one or more of blocks 910, 920, and 930 and sub-blocks 922 and 924. Although shown as discrete blocks, the various blocks of process 900 may be partitioned, divided into more blocks, combined into fewer blocks, or eliminated, depending on the desired implementation. Furthermore, the blocks / sub-blocks of process 900 may be arranged in accordance with Figure 9 11. The process 900 may be performed in the order shown or in other orders. In addition, one or more blocks / sub-blocks of process 900 may be performed repeatedly or iteratively. Process 900 may be implemented by or in apparatus 710 and apparatus 720, or any variations thereof. For illustrative purposes only and without limiting the scope, process 900 is described below in the context of apparatus 710 implemented in or as STA 110 and apparatus 720 implemented in or as STA 120 in a network environment 100 according to one or more IEEE 802.11 standards in accordance with a wireless network (e.g., a WLAN). Process 900 may begin at block 910.

[0072] At 910 , process 900 may involve processor 712 of apparatus 710 (eg, STA 110 ) encoding data for a STA (eg, STA 120 ) to provide a bitstream. Process 900 may proceed from 910 to 920 .

[0073] At 920 , process 900 may involve processor 712 processing the bit stream to provide processed bits by performing operations represented by 922 and 924 .

[0074] At 930, process 900 may include processor 712 transmitting the processed bits to the STA via transceiver 716 via a combination of multiple RUs assigned to the STA, wherein the combination of the multiple RUs may include at least one smaller RU and at least one larger RU, wherein each of the at least one larger RU has more tones than the at least one smaller RU.

[0075] At 922, process 900 can include processor 712 parsing the bitstream into combinations of multiple RUs in a proportional round-robin manner. Process 900 can proceed from 922 to 924.

[0076] At 924 , where remaining bits remain from the parsing in a proportional round-robin manner, process 900 may involve processor 712 allocating the remaining bits to one or more RUs rather than all RUs in the combination of the plurality of RUs.

[0077] In some implementations, in allocating the remaining bits to the at least one larger RU, process 900 may include processor 712 proportionally distributing the remaining bits across the last 44 tones on each of the at least one larger RU.

[0078] In some implementations, in allocating the remaining bits to the at least one larger RU, process 900 may include processor 712 sequentially allocating the remaining bits over the last 44 tones on each of the at least one larger RU.

[0079] In some embodiments, in allocating the remaining bits to the at least one larger RU, process 900 may include processor 712 evenly distributing the remaining bits across each of the at least one larger RU. For example, in evenly distributing the remaining bits across each of the at least one larger RU, process 900 may involve processor 712, for each N iterations of parsing the bitstream into a combination of the plurality of RUs in a proportional round-robin manner, distributing the remaining bits to each of the at least one larger RU, where N is an integer equal to or greater than 1.

[0080] In some implementations, a combination of multiple RUs may include a smaller RU of 484 tones and a larger RU of 996 tones. In such a case, the ratio of the multiple RUs may be 1:2 in s bits, and may alternatively be expressed as 1s:2s, with the remaining bits allocated to the larger RU of 996 tones.

[0081] In some embodiments, the combination of multiple RUs may include one smaller RU of 484 tones and two larger RUs of 996 tones. In this case, the ratio of the multiple RUs may be 1:2:2 (in s bits), or 1s:2s:2s, and the remaining bits may be allocated to the two larger RUs of 996 tones in a ratio of 2:2 (in s bits), or 2s:2s.

[0082] In some implementations, a combination of multiple RUs may include one smaller RU of 484 tones and three larger RUs of 996 tones. In this case, the ratio of the multiple RUs may be 1:2:2:2 (in units of s bits), or 1s:2s:2s:2s, and the remaining bits may be allocated to the two larger RUs of 996 tones in a ratio of 2:2:2 (in units of s bits), or 2s:2s:2s.

[0083] In some embodiments, a combination of multiple RUs may include an aggregate RU and a larger RU of 996 tones, and the aggregate RU includes a smaller RU of 242 tones and a smaller RU of 484 tones. In such a case, the ratio of the multiple RUs may be 3:4 in s bits, or alternatively expressed as 3s:4s, with the remaining bits allocated to the larger RU of 996 tones.

[0084] In some embodiments, a combination of multiple RUs may include a smaller RU of 242 tones and a larger RU of 996 tones. In this case, the ratio of the multiple RUs may be 1:4 in s-bit units, and may alternatively be expressed as 1s:4s.

[0085] The subject matter described herein sometimes shows different components contained within or connected to other different components. It should be understood that the architectures depicted in this manner are merely exemplary, and that many other architectures that implement the same functionality can actually be implemented. In a conceptual sense, any arrangement of components that implement the same functionality is effectively "associated" so as to achieve the desired functionality. Therefore, any two components that are combined herein to obtain a particular functionality can be considered to be "associated" with each other to achieve the desired functionality, regardless of the architecture or intermediate components. Similarly, any two components that are associated in this manner can also be considered to be "operably connected" or "operably coupled" to each other to achieve the desired functionality, and any two components that can be associated in this manner can also be considered to be "operably couplable" to each other to achieve the desired functionality. Specific examples of "operably couplable" include, but are not limited to, components that are physically connectable and / or physically interact with each other, and / or components that are wirelessly interactive and / or wirelessly interactive, and / or components that are logically interactive and / or logically interactive.

[0086] Furthermore, with respect to the use of substantially any plural and / or singular terms herein, one of ordinary skill in the art can translate the plural to the singular, and / or the singular to the plural, as appropriate to the context and / or application. For clarity, various singular / plural permutations may be expressly set forth herein.

[0087] Those skilled in the art will understand that, generally, the terms used herein, and particularly the terms used in the appended claims (e.g., the subject matter of the appended claims), are generally intended as "open-ended" terms (e.g., the term "comprising" should be interpreted as "including but not limited to," the term "having" should be interpreted as "having at least," the term "including" should be interpreted as "including but not limited to," etc.). Those skilled in the art will also understand that if a specific number of an introduced claim recitation is intended, such intent will be expressly stated in the claims, and in the absence of such a statement, no such intent exists. For example, to aid understanding, the appended claims may include the use of the introductory phrases "at least one" and "one or more" to introduce claim recitations. However, the use of such phrases should not be construed as limiting any claim containing such claimed subject matter to inventions containing only one such claimed subject matter, even if the same claim contains the introductory phrases "one or more" or "at least one" and an indefinite article such as "a" or "an" (e.g., "a" and / or "an" should generally be construed to mean "at least one" or "one or more"); the same applies to claims introduced with definite articles. In addition, even if a specific number of claimed subject matter is explicitly stated, one of ordinary skill in the art will recognize that such a statement should generally be construed to mean at least the stated number (e.g., the statement "two claimed subject matter" without other modifiers generally means at least two claimed subject matter, or two or more claimed subject matter). Furthermore, where phrases such as “at least one of A, B, and C, etc.” are used, such constructions are generally intended to have the meaning of the phrase as understood by those skilled in the art (e.g., “a system having at least one of A, B, and C” would include, but not be limited to, systems having A alone, B alone, C alone, A and B together, A and C together, B and C together, and / or A, B, and C together, etc.). Where phrases such as “at least one of A, B, or C, etc.” are used, such constructions are generally intended to have the meaning of the phrase as understood by those skilled in the art (e.g., “a system having at least one of A, B, or C” would include, but not be limited to, systems having A alone, B alone, C alone, A and B together, A and C together, B and C together, and / or A, B, and C together, etc.).Those skilled in the art will further understand that, whether in the specification, the claims, or the drawings, substantially any disjunctive word and / or phrase representing two or more interchangeable terms should be understood to encompass the possibility of one, either, or both of the terms. For example, the phrase "A or B" should be understood to encompass the possibility of "A," "B," or "A and B."

[0088] It will be appreciated from the foregoing that various embodiments of the present disclosure have been described herein for illustrative purposes, and that various modifications may be made without departing from the scope and spirit of the present disclosure. Therefore, the various embodiments disclosed herein are not intended to be restrictive, with the true scope and spirit being indicated by the appended claims.

Claims

1. A bit stream processing device, comprising: a transceiver configured for wireless communication; as well as A processor is coupled to the transceiver and configured to: processing the bit stream to provide processed bits; and The processed bits are transmitted to the station by the transceiver via a combination of a plurality of resource units allocated to the station, Wherein, when processing the bit stream, the processor is configured to perform the following operations: parsing the bitstream into a combination of the plurality of RUs, the combination comprising at least one smaller resource unit of 242 or 484 tones and at least one larger resource unit of 996 tones; and In the event that remaining bits remain after parsing, the proportional round-robin parser allocates the remaining bits to one or more resource units, rather than all resource units, such that the remaining bits are allocated to each of the at least one larger resource unit but not to the at least one smaller resource unit.

2. The bit stream processing device according to claim 1, wherein When parsing the bitstream into combinations of the plurality of resource units, the processor is configured to parse the bitstream in a proportional round-robin manner.

3. The bit stream processing device according to claim 1, wherein The combination of the plurality of resource units includes at least one smaller resource unit and at least one larger resource unit, each larger resource unit having more tones than the at least one smaller resource unit, and wherein allocating the remaining bits to one or more resource units, but not all resource units, comprises allocating the remaining bits to the at least one larger resource unit.

4. The bit stream processing device according to claim 3, wherein: In allocating the remaining bits to the at least one larger resource unit, the processor is configured to distribute the remaining bits proportionally over a last predefined number of tones on each of the at least one larger resource unit.

5. The bit stream processing device according to claim 4, wherein: Proportional distribution of the remaining bits over a last predefined number of tones on each of the at least one larger resource unit includes proportional distribution of the remaining bits over a last 44 tones on each of the at least one larger resource unit. The bit stream processing device according to claim 1 , wherein: The combination of the plurality of resource units includes a smaller resource unit of 484 tones and a larger resource unit of 996 tones, wherein a ratio of the plurality of resource units is 1:2, and the remaining bits are allocated to the larger resource unit of 996 tones.

7. The bit stream processing device according to claim 1, wherein: The combination of the multiple resource units includes a smaller resource unit of 484 tones and two larger resource units of 996 tones, and wherein the ratio of the multiple resource units is 1:2:2, and the remaining remaining bits are allocated to the two large resource units of 996 tones in a ratio of 2:

2.

8. The bit stream processing device according to claim 1, wherein: The combination of the multiple resource units includes a smaller resource unit of 484 tones and three larger resource units of 996 tones, and wherein the ratio of the multiple resource units is 1:2:2:2, and the remaining remaining bits are allocated to the three larger resource units of 996 tones in a ratio of 2:2:

2.

9. The bit stream processing device according to claim 1, wherein: The combination of the multiple resource units includes an aggregated resource unit and a larger resource unit of 996 tones, and the aggregated resource unit contains a smaller resource unit of 242 tones and a smaller resource unit of 484 tones, and wherein the ratio of the multiple resource units is 3:4, and the remaining remaining bits are allocated to the larger resource unit of 996 tones.

10. The bit stream processing device according to claim 1, wherein: The combination of the plurality of resource units includes a smaller resource unit of 242 tones and a larger resource unit of 996 tones, and wherein the ratio of the plurality of resource units is 1:

4.

11. A bit stream processing device, comprising: a transceiver configured for wireless communication; as well as A processor, coupled to the transceiver, configured to: processing the bit stream to provide processed bits; and The processed bits are transmitted to the station by the transceiver via a combination of multiple resource units allocated to the station, The combination of the plurality of resource units includes at least one smaller resource unit and at least one larger resource unit, and each of the at least one larger resource unit has more tones than the at least one smaller resource unit. Wherein, when processing the bit stream, the processor is configured to perform the following operations: parsing the bitstream into combinations of a plurality of resource units in a proportional round-robin manner; and If remaining bits remain after parsing in a proportional round-robin manner, the remaining bits are allocated to the at least one larger resource unit.

12. The bit stream processing device according to claim 11, wherein: In allocating the remaining bits to the at least one larger resource unit, the processor is configured to allocate the remaining bits proportionally to the last 44 tones of each resource unit in the at least one larger resource unit.

13. The bit stream processing device according to claim 11, wherein: When allocating the remaining bits to the at least one larger resource unit, the processor is configured to sequentially allocate the remaining bits to last 44 tones of each resource unit in the at least one larger resource unit.

14. The bit stream processing device according to claim 11, wherein: The combination of the plurality of resource units includes a smaller resource unit of 484 tones and a larger resource unit of 996 tones, and wherein the ratio of the plurality of resource units is 1:2, and the remaining bits are allocated to the larger resource unit of 996 tones.

15. The bit stream processing device according to claim 11, wherein: The combination of the multiple resource units includes a smaller resource unit of 484 tones and two larger resource units of 996 tones, and wherein the ratio of the multiple resource units is 1:2:2, and the remaining remaining bits are allocated to the two large resource units of 996 tones in a ratio of 2:

2.

16. The bit stream processing device according to claim 11, wherein: The combination of the multiple resource units includes a smaller resource unit of 484 tones and three larger resource units of 996 tones, and wherein the ratio of the multiple resource units is 1:2:2:2, and the remaining remaining bits are allocated to the three larger resource units of 996 tones in a ratio of 2:2:

2.

17. The bit stream processing device according to claim 11, wherein: The combination of the multiple resource units includes an aggregated resource unit and a larger resource unit of 996 tones, and the aggregated resource unit contains a smaller resource unit of 242 tones and a smaller resource unit of 484 tones, and wherein the ratio of the multiple resource units is 3:4, and the remaining remaining bits are allocated to the larger resource unit of 996 tones.

18. The bit stream processing device according to claim 11, wherein: The combination of the plurality of resource units includes a smaller resource unit of 242 tones and a larger resource unit of 996 tones, and wherein the ratio of the plurality of resource units is 1:4.

Images