Display device and manufacturing method thereof

Abstract

The invention relates to a display device and a manufacturing method thereof. A display device according to an embodiment may include: a pixel electrode; a light emitting element including a first semiconductor layer, an active layer, and a second semiconductor layer sequentially disposed on the pixel electrode, and including a trench in a portion where the second semiconductor layer is disposed; a common electrode disposed on the light emitting element; and a light scattering layer disposed on the common electrode and filled in the groove.

Description

Technical Field

[0001] Embodiments of the present invention relate to a display device and a method for manufacturing the same. Background Art

[0002] With the development of the information society, the demand for display devices for displaying images in various forms has increased. Correspondingly, various display devices including light-emitting display devices are being developed. Light-emitting display devices include light-emitting elements. Summary of the Invention

[0003] An object of the present invention is to provide a display device and a method for manufacturing the same, which can improve the luminous efficiency of a light-emitting element and the driving voltage.

[0004] The technical problems to be solved by the present invention are not limited to the technical problems mentioned above. Ordinary technicians in the technical field to which the present invention belongs can clearly understand other technical problems not mentioned through the following description.

[0005] According to one embodiment, a display device may include: a pixel electrode; a light-emitting element including a first semiconductor layer, an active layer, and a second semiconductor layer sequentially arranged on the pixel electrode, and including a groove in a portion where the second semiconductor layer is arranged; a common electrode arranged on the light-emitting element; and a light scattering layer arranged on the common electrode and filling the groove.

[0006] In one embodiment, the second semiconductor layer may include a first portion including a bottom surface of the trench and a second portion on the first portion, and a doping concentration of the first portion may be higher than a doping concentration of the second portion.

[0007] In one embodiment, the common electrode may be in contact with the first portion of the second semiconductor layer.

[0008] In one embodiment, the second portion of the second semiconductor layer may include a portion of a sidewall of the trench.

[0009] In one embodiment, the light emitting element may further include a protective film surrounding side surfaces of the first semiconductor layer, the active layer, and the second semiconductor layer, wherein a portion of the protective film may protrude above a height of the second semiconductor layer and surround the groove.

[0010] In one embodiment, the groove may be formed at a position spaced apart from the active layer by more than 0.5 μm.

[0011] In one embodiment, a bottom surface of the groove may be located at a height of 0.5 μm to 1.5 μm with respect to an upper surface of the active layer.

[0012] In one embodiment, the common electrode may have a shape corresponding to the groove, and a portion of the common electrode may be arranged inside the groove.

[0013] In one embodiment, the bottom surface of the groove may include a texture pattern, and the common electrode and the light scattering layer may include a light-transmitting pattern having a shape corresponding to the texture pattern on the bottom surface of the groove.

[0014] In one embodiment, the light emitting element may further include a first reflective film disposed under the first semiconductor layer.

[0015] In one embodiment, the first reflective film may include metal.

[0016] In one embodiment, a portion of the first reflective film may surround side surfaces of the first semiconductor layer, the active layer, and the second semiconductor layer.

[0017] In one embodiment, the light emitting element may further include a second reflective film surrounding side surfaces of the first semiconductor layer, the active layer, and the second semiconductor layer.

[0018] In one embodiment, the second reflective film may include a distributed Bragg reflector.

[0019] In one embodiment, the light scattering layer may include a light scatterer.

[0020] In one embodiment, the light scattering layer may further include wavelength conversion particles.

[0021] In one embodiment, the display device may further include: a light conversion layer disposed on the light emitting element and the light scattering layer, and including wavelength conversion particles.

[0022] According to one embodiment, a method for manufacturing a display device may include the following steps: forming a thin film transistor layer including a substrate and a thin film transistor, and forming a pixel electrode on the thin film transistor layer; providing a light-emitting element including a first semiconductor layer, an active layer, and a second semiconductor layer, and arranging the light-emitting element on the pixel electrode in a manner such that the second semiconductor layer faces upward; etching the second semiconductor layer to form a groove in the light-emitting element; forming a common electrode on the light-emitting element; and forming a light scattering layer on the common electrode to fill the groove.

[0023] In one embodiment, the second semiconductor layer of the light-emitting element may include: a first portion, arranged on the active layer and having a first doping concentration; and a second portion, arranged on the first portion and having a second doping concentration lower than the first doping concentration, wherein, in the step of forming a groove in the light-emitting element, the second semiconductor layer can be etched to expose the first portion.

[0024] In one embodiment, the common electrode may be formed to contact the first portion of the second semiconductor layer.

[0025] Details of other embodiments are included in the detailed description and accompanying drawings.

[0026] A display device according to an embodiment may include: a light-emitting element having a groove in a portion where the second semiconductor layer is disposed; a common electrode disposed on the light-emitting element; and a light-scattering layer disposed on the common electrode and filling the groove. The display device and its manufacturing method according to an embodiment can increase the amount of light emitted toward the upper portion of the light-emitting element by appropriately scattering or diffusing light emitted from the light-emitting element. Furthermore, by shortening the distance between the active layer and the light-emitting surface of the light-emitting element, the light-emitting efficiency of the light-emitting element can be improved.

[0027] In some embodiments, the groove of the light-emitting element can be formed to a depth that exposes the highly doped layer of the second semiconductor layer, and the common electrode can be in contact with the highly doped layer. The display device and manufacturing method of the embodiments can improve the electrical connection (e.g., ohmic contact) between the light-emitting element and the common electrode, and can also improve the driving voltage of the display device. This can improve the reliability of the display device and reduce power consumption.

[0028] The effects according to the embodiment are not limited to the above-exemplified contents, and include more various effects in this specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 is a perspective view showing a display device according to an embodiment.

[0030] Figure 2 is a layout diagram showing a display device according to an embodiment.

[0031] Figure 3 is a block diagram illustrating a display device according to an embodiment.

[0032] Figure 4 is an equivalent circuit diagram illustrating a sub-pixel according to an embodiment.

[0033] Figure 5 FIG. 4 is a diagram showing a layout of pixels in a display area according to an embodiment.

[0034] Figure 6 is shown with Figure 5 FIG. 1 is a cross-sectional view of an example of a cross-section of a display panel corresponding to line I1 - I1 ′.

[0035] Figure 7 It is shown in detail Figure 6 An example cross-sectional view of region A.

[0036] Figure 8 is shown with Figure 5 Another example of a cross-sectional view of a display panel corresponding to line I1-I1' is shown.

[0037] Figure 9 is shown with Figure 5 FIG. 1 is a cross-sectional view showing another example of the cross-section of the display panel corresponding to line I1 - I1 ′.

[0038] Figure 10 is shown with Figure 5 FIG. 1 is a cross-sectional view showing another example of the cross-section of the display panel corresponding to line I1 - I1 ′.

[0039] Figure 11 It is shown in detail Figure 8 An example cross-sectional view of region B.

[0040] Figure 12 is a graph showing the carrier doping concentration of the second semiconductor layer according to an embodiment.

[0041] Figure 13 It is shown in detail Figure 8 A cross-sectional view of another example of region B.

[0042] Figure 14 It is shown in detail Figure 8 A cross-sectional view of another example of region B.

[0043] Figure 15 It is shown in detail Figure 8 A cross-sectional view of another example of region B.

[0044] Figure 16 It is shown in detail Figure 8 A cross-sectional view of another example of region B.

[0045] Figure 17 It is shown in detail Figure 8 A cross-sectional view of another example of region B.

[0046] Figure 18 It is shown in detail Figure 8 A cross-sectional view of another example of region B.

[0047] Figure 19 It is shown in detail Figure 8 A cross-sectional view of another example of region B.

[0048] Figure 20 is shown with Figure 5 FIG. 1 is a cross-sectional view showing another example of the cross-section of the display panel corresponding to line I1 - I1 ′.

[0049] Figures 21 to 30 is a cross-sectional view illustrating a method for manufacturing a display device according to an embodiment.

[0050] Figure 31 FIG. 1 is an exemplary diagram illustrating a smart watch including a display device according to an embodiment.

[0051] Figure 32 and Figure 33 FIG. 1 is an exemplary diagram illustrating a virtual reality device including a display device according to an embodiment.

[0052] Figure 34 FIG. 4 is an exemplary diagram illustrating a virtual reality device including a display device according to another embodiment.

[0053] Figure 35 FIG. 1 is an exemplary diagram illustrating a vehicle instrument panel and a center instrument panel including a display device according to an embodiment.

[0054] Figure 36 FIG. 1 is an exemplary diagram illustrating a transparent display device including a display device according to an embodiment.

[0055] Description of Reference Numerals 10: Display device 100: Display panel CE: Common Electrode GRV: Groove INS: Protective film LE: Light-emitting element MQW: active layer PXE1: first pixel electrode PXE2: second pixel electrode PXE3: third pixel electrode QDL1: first light conversion layer QDL2: second light conversion layer RFL1: First reflective film RFL2: Second reflective film SCT: light scatterer SEM1: first semiconductor layer SEM2: second semiconductor layer SPX1: first sub-pixel SPX2: second sub-pixel SPX3: third sub-pixel STL: Light scattering layer SUB: Substrate TPL: Transparent Layer TFT1: Thin Film Transistor TFTL: Thin Film Transistor Layer TP: Light Transmitting Pattern WCP1: first wavelength conversion particles WCP2: second wavelength conversion particles DETAILED DESCRIPTION

[0056] The advantages and features of the present invention, as well as methods for achieving these advantages and features, will become apparent with reference to the accompanying drawings and the embodiments described in detail below. However, the present invention is not limited to the embodiments disclosed below, but can be implemented in a variety of different forms. These embodiments are provided solely to complete the disclosure of the present invention and to fully inform those skilled in the art of the present invention of the scope of the invention. The present invention is defined solely by the scope of the claims.

[0057] When an element or layer is referred to as being "on" another element or layer, this includes all instances where the element or layer is immediately above the other element or layer or where another layer or element is interposed therebetween. Throughout this specification, the same reference numerals represent the same components. The shapes, sizes, ratios, angles, quantities, and the like disclosed in the drawings used to illustrate the embodiments are exemplary only, and the present invention is not limited to the matters illustrated.

[0058] Each feature of the multiple embodiments of the present invention can be partially or completely combined or combined with each other, and can be technically linked and driven in various ways. The various embodiments can be implemented independently of each other, or can be implemented together in an associated relationship.

[0059] Hereinafter, specific embodiments will be described with reference to the accompanying drawings.

[0060] Figure 1 is a perspective view showing a display device according to an embodiment.

[0061] Reference Figure 1 The display device 10, as a device for displaying moving images or still images, can be used not only as a display screen for portable electronic devices such as mobile phones, smart phones, tablet personal computers, smart watches, watch phones, mobile communication terminals, electronic notepads, electronic books, portable multimedia players (PMPs), navigators, and ultra-portable PCs (UMPCs), but can also be used as a display screen for a variety of products such as televisions, notebook computers, monitors, billboards, and Internet of Things (IOT) devices.

[0062] The display device 10 may be a light-emitting display device such as an organic light-emitting display device utilizing organic light-emitting diodes, a quantum dot light-emitting display device including a quantum dot light-emitting layer, an inorganic light-emitting display device including an inorganic semiconductor, or an ultra-small light-emitting display device utilizing ultra-small light-emitting diodes (micro LEDs or nano LEDs). The following description will focus on the case where the display device 10 is an ultra-small light-emitting display device, but the present invention is not limited thereto. For ease of description, ultra-small light-emitting diodes are referred to as light-emitting elements.

[0063] The display device 10 includes a display panel 100 , a display driving circuit 250 , a circuit board 300 , and a power supply circuit 500 .

[0064] The display panel 100 can be formed into a plane having a rectangular shape with short sides in a first direction DR1 and long sides in a second direction DR2 intersecting the first direction DR1. The corners where the short sides in the first direction DR1 intersect the long sides in the second direction DR2 can be formed in a circular arc with a predetermined curvature or can be formed at a right angle. The plane shape of the display panel 100 is not limited to a quadrilateral and can be formed into other polygonal shapes, a circle, or an ellipse. The display panel 100 can be formed flat, but is not limited thereto. For example, the display panel 100 can include curved portions formed at the left and right ends and having a constant curvature or a varying curvature. In addition, the display panel 100 can be formed flexibly so as to be able to bend, bend, fold, or curl.

[0065] The display panel 100 may include a main area MA and a sub-area SBA.

[0066] The main area MA may include a display area DA that displays an image and a non-display area NDA that is a peripheral area of ​​the display area DA. The display area DA may include a plurality of pixels that display an image. Each pixel may include a plurality of sub-pixels. For example, each pixel may include a first sub-pixel that emits a first light, a second sub-pixel that emits a second light, and a third sub-pixel that emits a third light, but the embodiments of this specification are not limited thereto.

[0067] The sub-region SBA may protrude from one side of the main region MA in the second direction DR2. Figure 1exemplarily illustrates that the sub-region SBA is unfolded, but the sub-region SBA may be curved, and in this case, the sub-region SBA may be arranged on the lower surface of the display panel 100. When the sub-region SBA is curved, the sub-region SBA may overlap with the main region MA in the third direction DR3, which is the thickness direction of the display panel 100. The display driving circuit 250 may be arranged in the sub-region SBA.

[0068] The display driver circuit 250 generates signals and voltages for driving the display panel 100. The display driver circuit 250 can be attached to the display panel 100 using an integrated circuit (IC) using a chip-on-glass (COG) method, a chip-on-plastic (COP) method, or ultrasonic bonding, but is not limited thereto. For example, the display driver circuit 250 can be attached to the circuit board 300 using a chip-on-film (COF) method.

[0069] The circuit board 300 can be attached to one end of the sub-area SBA of the display panel 100. Thus, the circuit board 300 can be electrically connected to the display panel 100 and the display driver circuit 250. The display panel 100 and the display driver circuit 250 can receive digital video data, timing signals, and drive voltages through the circuit board 300. The circuit board 300 can be a flexible printed circuit board (FPC), a rigid printed circuit board (RPC), or a flexible film such as a chip on film (CFP).

[0070] The power supply circuit 500 can generate a plurality of panel driving voltages according to an external power supply voltage. The power supply circuit 500 can be formed by an integrated circuit (IC) and attached to the circuit board 300 in a COF manner.

[0071] Figure 2 FIG. 1 is a diagram showing a layout of a display device according to an embodiment. Figure 2 exemplarily shows a situation where the sub-area SBA is unfolded but not bent.

[0072] Reference Figure 2 , the display panel 100 may include a main area MA and a sub-area SBA.

[0073] The main area MA may include a display area DA displaying an image and a non-display area NDA as a peripheral area of ​​the display area DA. The display area DA may occupy most of the main area MA. The display area DA may be arranged in the center of the main area MA.

[0074] The display area DA may include a plurality of pixels PX for displaying an image, and each of the plurality of pixels PX may include a plurality of sub-pixels SPX. The pixel PX may be defined as a sub-pixel group that is a minimum unit capable of representing a white grayscale.

[0075] The non-display area NDA may be arranged adjacent to the display area DA. The non-display area NDA may be an outer area of ​​the display area DA. The non-display area NDA may be arranged to surround the display area DA. The non-display area NDA may be an edge area of ​​the display panel 100.

[0076] The first scan driver SDC1 and the second scan driver SDC2 may be arranged in the non-display area NDA. The first scan driver SDC1 may be arranged on one side (e.g., the left side) of the display panel 100, and the second scan driver SDC2 may be arranged on the other side (e.g., the right side) of the display panel 100, but the present invention is not limited thereto. Each of the first scan driver SDC1 and the second scan driver SDC2 may be electrically connected to the display driver circuit 250 via a scan fan-out line. Each of the first scan driver SDC1 and the second scan driver SDC2 may receive a scan control signal from the display driver circuit 250 and generate a scan signal based on the scan control signal and output it to the scan line.

[0077] The sub-region SBA may protrude from one side of the main region MA in the second direction DR2. The length of the sub-region SBA in the second direction DR2 may be less than the length of the main region MA in the second direction DR2. The length of the sub-region SBA in the first direction DR1 may be less than the length of the main region MA in the first direction DR1, or may be substantially equal to the length of the main region MA in the first direction DR1. The sub-region SBA may be curved and may be arranged at the lower portion of the display panel 100. In this case, the sub-region SBA may overlap with the main region MA in the third direction DR3.

[0078] The sub-area SBA may include a connection area CA, a pad area PA, and a bending area BA.

[0079] The connection area CA is a region protruding from one side of the main area MA in the second direction DR2 , and one side of the connection area CA may be connected to the non-display area NDA of the main area MA, and the other side of the connection area CA may be connected to the bending area BA.

[0080] The pad area PA is where the pads PD and the display driver circuit 250 are located. The display driver circuit 250 can be attached to the driving pads in the pad area PA using a conductive adhesive member such as an anisotropic conductive film. The circuit board 300 can be attached to the pads PD in the pad area PA using a conductive adhesive member such as an anisotropic conductive film. One side of the pad area PA can be connected to the flex area BA.

[0081] The bending area BA is a curved area. When the bending area BA is curved, the pad area PA may be arranged below the connection area CA and the main area MA. The bending area BA may be arranged between the connection area CA and the pad area PA. One side of the bending area BA may be connected to the connection area CA, and the other side of the bending area BA may be connected to the pad area PA.

[0082] Figure 3 is a block diagram illustrating a display device according to an embodiment.

[0083] Reference Figure 3 The display area DA includes a plurality of pixels PX, a plurality of scan lines SL, a plurality of light emitting control lines EL, and a plurality of data lines DL.

[0084] The plurality of pixels PX may be arranged in a matrix along a first direction DR1 and a second direction DR2. A plurality of scan lines SL and a plurality of emission control lines EL may extend along the first direction DR1 and may be arranged along the second direction DR2. A plurality of data lines DL may extend along the second direction DR2 and may be arranged along the first direction DR1. The plurality of scan lines SL include a plurality of write scan lines GWL, a plurality of initialization scan lines GIL, and a plurality of bias scan lines GBL.

[0085] Each of the plurality of sub-pixels SPX can be connected to one of the plurality of write scan lines GWL, one of the plurality of initialization scan lines GIL, one of the plurality of bias scan lines GBL, one of the plurality of emission control lines EL, and one of the plurality of data lines DL. Each of the plurality of sub-pixels SPX can receive a data voltage of the data line DL in response to a write scan signal from the write scan line GWL and cause a light-emitting element to emit light in response to the data voltage.

[0086] The non-display area NDA includes a first scan driving part SDC1 , a second scan driving part SDC2 , and a display driving circuit 250 .

[0087] Each of the first scan driving part SDC1 and the second scan driving part SDC2 may include a write scan signal output part 611, an initialization scan signal output part 612, a bias scan signal output part 613, and a light emission control signal output part 614. Each of the write scan signal output part 611, the initialization scan signal output part 612, the bias scan signal output part 613, and the light emission control signal output part 614 may receive a scan timing control signal SCS from the timing control circuit 251.

[0088] The write scan signal output unit 611 may generate a write scan signal according to the scan timing control signal SCS of the timing control circuit 251 and sequentially output the write scan signal to the write scan line GWL.

[0089] The initialization scan signal output unit 612 may generate an initialization scan signal according to the scan timing control signal SCS and output the signal to the initialization scan line GIL in sequence.

[0090] The bias scan signal output unit 613 generates a bias scan signal according to the scan timing control signal SCS and sequentially outputs it to the bias scan line GBL. The emission control signal output unit 614 generates a emission control signal according to the scan timing control signal SCS and sequentially outputs it to the emission control line EL.

[0091] The display driving circuit 250 includes a timing control circuit 251 and a data driving circuit 252 .

[0092] The data driving circuit 252 may receive digital video data DATA and a data timing control signal DCS from the timing control circuit 251. The data driving circuit 252 converts the digital video data DATA into an analog data voltage based on the data timing control signal DCS and outputs the analog data voltage to the data line DL. In this case, a sub-pixel SPX may be selected by the write scan signal of the first scan driving unit SDC1 and the second scan driving unit SDC2, and a data voltage may be supplied to the selected sub-pixel SPX.

[0093] The timing control circuit 251 can receive digital video data DATA and timing signals from the outside. Based on the timing signals, the timing control circuit 251 generates a scan timing control signal SCS and a data timing control signal DCS for controlling the display panel 100. The timing control circuit 251 can output the scan timing control signal SCS to the first scan driver SDC1 and the second scan driver SDC2. The timing control circuit 251 can also output the digital video data DATA and the data timing control signal DCS to the data driver circuit 252.

[0094] The power supply circuit 500 may generate a plurality of panel driving voltages according to a power supply voltage supplied from the outside. For example, the power supply circuit 500 may generate a first power supply voltage VDD, a second power supply voltage VSS, a third power supply voltage VINT, and a fourth power supply voltage VAINT and supply them to the display panel 100.

[0095] Figure 4 is an equivalent circuit diagram illustrating a sub-pixel according to an embodiment.

[0096] Reference Figure 4 According to an embodiment, the subpixel SPX may be connected to the scan lines SL: GWL, GIL, GBL, the emission control line EL, and the data line DL. For example, the subpixel SPX may be connected to the write scan line GWL, the initialization scan line GIL, the bias scan line GBL, the emission control line EL, and the data line DL.

[0097] The subpixel SPX according to an embodiment includes a driving transistor DT, a switching element, a capacitor C1 and a light emitting element LE. The switching element includes a first transistor ST1, a second transistor ST2, a third transistor ST3, a fourth transistor ST4, a fifth transistor ST5 and a sixth transistor ST6.

[0098] The driving transistor DT includes a gate electrode, a first electrode, and a second electrode, and controls a drain-source current Ids (hereinafter referred to as “driving current”) flowing between the first electrode and the second electrode according to a data voltage applied to the gate electrode.

[0099] The light emitting element LE may be a micro light emitting diode (LED).

[0100] The light emitting element LE emits light according to the driving current Ids. The amount of light emitted by the light emitting element LE may be proportional to the driving current Ids. The anode electrode of the light emitting element LE may be connected to the first electrode of the fourth transistor ST4 and the second electrode of the sixth transistor ST6, and the cathode electrode may be connected to the transistor to which the second power supply voltage ( Figure 3 VSS) is connected to the second power line VSL.

[0101] The capacitor C1 is formed between the gate electrode of the driving transistor DT and the first power supply voltage ( Figure 3 The first power supply voltage ( Figure 3 VDD) may be higher than the second power supply voltage ( Figure 3 One electrode of the capacitor C1 may be connected to the gate electrode of the driving transistor DT, and the other electrode may be connected to the first power line VDL.

[0102] like Figure 4 As shown, the first transistor ST1, the second transistor ST2, the third transistor ST3, the fourth transistor ST4, the fifth transistor ST5, the sixth transistor ST6, and the driving transistor DT may all be formed of p-type MOSFETs. In this case, the active layers of the first transistor ST1, the second transistor ST2, the third transistor ST3, the fourth transistor ST4, the fifth transistor ST5, the sixth transistor ST6, and the driving transistor DT may be formed of polysilicon.

[0103] The gate electrode of the first transistor ST1 and the gate electrode of the second transistor ST2 can be connected to the write scan line GWL, the gate electrode of the third transistor ST3 can be connected to the initialization scan line GIL, and the gate electrode of the fourth transistor ST4 can be connected to the bias scan line GBL. Since the first transistor ST1, the second transistor ST2, the third transistor ST3, the fourth transistor ST4, the fifth transistor ST5, and the sixth transistor ST6 are formed by p-type MOSFETs, they can be turned on when a scan signal with a gate low voltage and a light emitting control signal are applied to the initialization scan line GIL, the write scan line GWL, the bias scan line GBL, and the light emitting control line EL, respectively. One electrode of the third transistor ST3 can be connected to a gate electrode to which a third power supply voltage ( Figure 3 The first initialization voltage line VIL is connected to the first initialization voltage line VIL, and the first electrode of the fourth transistor ST4 can be applied with the fourth power supply voltage ( Figure 3 The third power supply voltage ( Figure 3 VINT) and the fourth power supply voltage ( Figure 3 VAINT in can be different voltages from each other. In addition, the third power supply voltage ( Figure 3 VINT) and the fourth power supply voltage ( Figure 3 VAINT in may be a voltage lower than the level of the first power supply voltage VDD, and may be a voltage higher than the level of the second power supply voltage VSS.

[0104] Alternatively, the driving transistor DT, the second transistor ST2, the fourth transistor ST4, the fifth transistor ST5, and the sixth transistor ST6 can be formed of p-type MOSFETs, and the first transistor ST1 and the third transistor ST3 can be formed of n-type MOSFETs. In this case, the active layers of the driving transistor DT, the second transistor ST2, the fourth transistor ST4, the fifth transistor ST5, and the sixth transistor ST6 formed of p-type MOSFETs can be formed of polysilicon, and the active layers of the first transistor ST1 and the third transistor ST3 formed of n-type MOSFETs can be formed of oxide semiconductors. In addition, since the first transistor ST1 and the third transistor ST3 are formed of n-type MOSFETs, the first transistor ST1 can be turned on when a scan signal with a gate high voltage is applied, and the third transistor ST3 can be turned on when an initialization scan signal with a gate high voltage is applied. In contrast, since the second transistor ST2, the fourth transistor ST4, the fifth transistor ST5, and the sixth transistor ST6 are formed of p-type MOSFETs, they can be turned on when a scan signal with a gate low voltage and a light emitting control signal are applied.

[0105] Alternatively, if the fourth transistor ST4 is formed of an n-type MOSFET and the remaining transistors (the drive transistor DT, the first transistor ST1, the second transistor ST2, the third transistor ST3, the fifth transistor ST5, and the sixth transistor ST6) are formed of p-type MOSFETs, the active layer of the fourth transistor ST4 can be formed of an oxide semiconductor, and the active layers of the remaining transistors (the drive transistor DT, the first transistor ST1, the second transistor ST2, the third transistor ST3, the fifth transistor ST5, and the sixth transistor ST6) can be formed of polycrystalline silicon. Furthermore, the fourth transistor ST4 can be turned on by applying a scan signal with a gate high voltage, while the remaining transistors (the drive transistor DT, the first transistor ST1, the second transistor ST2, the third transistor ST3, the fifth transistor ST5, and the sixth transistor ST6) can be turned on by applying a scan signal with a gate low voltage and a light emitting control signal.

[0106] Alternatively, the first transistor ST1, the second transistor ST2, the third transistor ST3, the fourth transistor ST4, the fifth transistor ST5, the sixth transistor ST6, and the driving transistor DT may all be formed of n-type MOSFETs. In this case, the active layers of the first transistor ST1, the second transistor ST2, the third transistor ST3, the fourth transistor ST4, the fifth transistor ST5, the sixth transistor ST6, and the driving transistor DT may be formed of an oxide semiconductor and may be turned on when a scanning signal with a gate high voltage and a light emitting control signal are applied.

[0107] Figure 5 FIG. 4 is a diagram showing a layout of pixels in a display area according to an embodiment.

[0108] Reference Figure 5 Each of the plurality of pixels PX in the display area DA may include three sub-pixels SPX1, SPX2, and SPX3, but the embodiments of the present specification are not limited thereto and may include four sub-pixels. In the case where each of the plurality of pixels PX includes three sub-pixels SPX1, SPX2, and SPX3, each of the plurality of pixels PX may include a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3.

[0109] The plurality of pixels PX may be arranged in a matrix form. In each of the plurality of pixels PX, a first sub-pixel SPX1 , a second sub-pixel SPX2 , and a third sub-pixel SPX3 may be arranged along a first direction DR1 .

[0110] When each of the plurality of pixels PX includes three sub-pixels SPX1, SPX2, and SPX3, the first sub-pixel SPX1 may emit a first light, the second sub-pixel SPX2 may emit a second light, and the third sub-pixel SPX3 may emit a third light. The third light may be light in a blue wavelength band, the second light may be light in a green wavelength band, and the first light may be light in a red wavelength band. For example, the blue wavelength band may refer to light having a main peak wavelength within a wavelength band of approximately 370 nm to 460 nm, the green wavelength band may refer to light having a main peak wavelength within a wavelength band of approximately 480 nm to 560 nm, and the red wavelength band may refer to light having a main peak wavelength within a wavelength band of approximately 600 nm to 750 nm.

[0111] Alternatively, when each of the plurality of pixels PX includes four sub-pixels, the first sub-pixel may emit the first light, the second and fourth sub-pixels may emit the second light, and the third sub-pixel may emit the third light. Alternatively, the first sub-pixel may emit the first light, the second sub-pixel may emit the second light, the third sub-pixel may emit the third light, and the fourth sub-pixel may emit the fourth light. In this case, the fourth light may be white light.

[0112] The first subpixel SPX1 includes a first pixel electrode PXE1, a plurality of light-emitting elements LE, and a first light conversion layer QDL1. The second subpixel SPX2 includes a second pixel electrode PXE2, a plurality of light-emitting elements LE, and a second light conversion layer QDL2. The third subpixel SPX3 includes a third pixel electrode PXE3, a plurality of light-emitting elements LE, and a light-transmitting layer (or third light conversion layer) TPL.

[0113] Each of the first pixel electrode PXE1, the second pixel electrode PXE2, and the third pixel electrode PXE3 may have a rectangular planar shape, with a short side in the first direction DR1 and a long side in the second direction DR2. The area of ​​the first sub-pixel SPX1, the area of ​​the second sub-pixel SPX2, and the area of ​​the third sub-pixel SPX3 may be set based on the light conversion efficiency of the first light conversion layer QDL1 and the light conversion efficiency of the second light conversion layer QDL2. As an example, the lower the light conversion efficiency, the larger the sub-pixel area may be.

[0114] For example, Figure 5 As shown, when the light conversion efficiency of the second light conversion layer QDL2 is lower than that of the first light conversion layer QDL1, the area of ​​the second pixel electrode PXE2 can be larger than that of the first pixel electrode PXE1. In addition, compared with the light-transmitting layer TPL directly transmitting the light of the light-emitting element LE, since the first light conversion layer QDL1 needs to convert the light, the area of ​​the first pixel electrode PXE1 can be larger than that of the third pixel electrode PXE3.

[0115] The pixel electrodes PXE1, PXE2, and PXE3 can be electrically connected to at least one transistor through the pixel connection holes CT1, CT2, and CT3, respectively. For example, each of the pixel electrodes PXE1, PXE2, and PXE3 can be electrically connected to the fourth transistor ( Figure 4 ST4) of the second electrode and the sixth transistor ( Figure 4 The second electrode of ST6 is electrically connected.

[0116] Multiple light-emitting elements LE may be arranged on each pixel electrode PXE1, PXE2, and PXE3. The same number of light-emitting elements LE may be arranged on each pixel electrode PXE1, PXE2, and PXE3. For example, two light-emitting elements LE may be arranged on each pixel electrode PXE1, PXE2, and PXE3. The multiple light-emitting elements LE may emit a third light (for example, light in a blue wavelength band), but the embodiments of this specification are not limited thereto. When the light-emitting element LE of the first subpixel SPX1 emits the first light, the light-emitting element LE of the second subpixel SPX2 emits the second light, and the light-emitting element LE of the third subpixel SPX3 emits the third light, the light conversion layers QDL1 and QDL2 and the light-transmitting layer TPL may be omitted.

[0117] The first light conversion layer QDL1 may completely overlap the first pixel electrode PXE1 and the multiple light-emitting elements LE of the first subpixel SPX1. The area of ​​the first light conversion layer QDL1 may be larger than the area of ​​the first pixel electrode PXE1. The first light conversion layer QDL1 may convert or shift the peak wavelength of incident light to light of a different specific peak wavelength and emit the light. For example, the first light conversion layer QDL1 may convert or shift the third light emitted from the multiple light-emitting elements LE of the first subpixel SPX1 to the first light.

[0118] The second light conversion layer QDL2 may completely overlap with the second pixel electrode PXE2 and the multiple light-emitting elements LE of the second sub-pixel SPX2. The area of ​​the second light conversion layer QDL2 may be larger than the area of ​​the second pixel electrode PXE2. The second light conversion layer QDL2 may convert or shift the peak wavelength of incident light to light of another specific peak wavelength and emit the light. For example, the second light conversion layer QDL2 may convert or shift the third light emitted by the multiple light-emitting elements LE of the second sub-pixel SPX2 into the second light.

[0119] The light-transmitting layer TPL may completely overlap the third pixel electrode PXE3 and the plurality of light-emitting elements LE of the third sub-pixel SPX3. The light-transmitting layer TPL may directly transmit incident light. For example, the light-transmitting layer TPL may directly transmit the third light emitted from the plurality of light-emitting elements LE of the third sub-pixel SPX3.

[0120] Figure 6 is shown with Figure 5 FIG. 1 is a cross-sectional view of an example of a cross-section of a display panel corresponding to line I1 - I1 ′. Figure 7 It is shown in detail Figure 6 An example cross-sectional view of region A.

[0121] Reference Figure 6 and Figure 7 The substrate SUB can be formed of an insulating material such as glass or a polymer resin. When the substrate SUB is formed of a polymer resin, the substrate SUB can be a stretchable flexible substrate. The polymer resin can be an acryl resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0122] A barrier film BR may be disposed on the substrate SUB. The barrier film BR is a film used to protect the transistors of the thin film transistor layer TFTL and the light-emitting elements LE disposed on the thin film transistor layer TFTL from moisture that penetrates through the moisture-permeable substrate SUB. The barrier film BR may be composed of a plurality of alternately stacked inorganic films.

[0123] A thin film transistor TFT1 may be disposed on the barrier film BR. The thin film transistor TFT1 may be Figure 4 One of the fourth transistor ST4 and the sixth transistor ST6 is shown. The thin film transistor TFT1 may include a first active layer ACT1 and a first gate electrode G1.

[0124] A first active layer ACT1 of a thin-film transistor TFT1 may be disposed on the barrier film BR. The first active layer ACT1 of the thin-film transistor TFT1 may include polycrystalline silicon, single-crystalline silicon, low-temperature polycrystalline silicon, or amorphous silicon. Alternatively, the first active layer ACT1 of the thin-film transistor TFT1 may be formed using an oxide semiconductor including IGZO (indium (In), gallium (Ga), zinc (Zn), and oxygen (O)), IGZTO (indium (In), gallium (Ga), zinc (Zn), tin (Sn), and oxygen (O)), or IGTO (indium (In), gallium (Ga), tin (Sn), and oxygen (O)).

[0125] The first active layer ACT1 may include a first channel region CHA1, a first source region S1, and a first drain region D1. The first channel region CHA1 may be a region that overlaps with the first gate electrode G1 in a third direction DR3, which is the thickness direction of the substrate SUB. The first source region S1 may be arranged on one side of the first channel region CHA1, and the first drain region D1 may be arranged on the other side of the first channel region CHA1. The first source region S1 and the first drain region D1 may be regions that do not overlap with the first gate electrode G1 in the third direction DR3. The first source region S1 and the first drain region D1 may be regions that are conductive due to ions doped into a semiconductor material.

[0126] A first gate insulating film 131 may be disposed on the first channel region CHA1 , the first source region S1 , and the first drain region D1 of the thin film transistor TFT1 .

[0127] A first gate metal layer may be disposed on the first gate insulating film 131. The first gate metal layer may include a first gate electrode G1 of the thin film transistor TFT1 and a first capacitor electrode CAE1. The first gate electrode G1 may overlap the first active layer ACT1 in the third direction DR3. Figure 6 FIG. 1 shows a case where the first gate electrode G1 and the first capacitor electrode CAE1 are spaced apart from each other, but when the thin film transistor TFT1 is Figure 4 In the case of the driving transistor DT, the first gate electrode G1 and the first capacitor electrode CAE1 may be electrically or physically connected to each other. Alternatively, in the case of the thin film transistor TFT1 being Figure 4In the case of one of the first to sixth transistors ST1 to ST6 , the first gate electrode G1 and the first capacitor electrode CAE1 may not be electrically or physically connected to each other.

[0128] A second gate insulating film 132 may be disposed on the first gate electrode G1 and the first capacitor electrode CAE1 of the thin film transistor TFT1 .

[0129] A second gate metal layer may be disposed on the second gate insulating film 132. The second gate metal layer may include a second capacitor electrode CAE2. The second capacitor electrode CAE2 may overlap with the first capacitor electrode CAE1 of the first gate metal layer in the third direction DR3. Since the second gate insulating film 132 has a predetermined dielectric constant, a capacitor ( Figure 4 C1).

[0130] An interlayer insulating film 141 may be disposed on the second capacitor electrode CAE2 .

[0131] A first data metal layer may be disposed on the interlayer insulating film 141. The first data metal layer may include a first source connection electrode PCE1. The first source connection electrode PCE1 may be connected to the first drain region D1 of the first active layer ACT1 via a first source contact hole PCT1 that penetrates the first gate insulating film 131, the second gate insulating film 132, and the interlayer insulating film 141.

[0132] A first planarization film 160 for planarizing a step difference generated by the thin film transistor TFT1 may be disposed on the first source connection electrode PCE1 .

[0133] A second data metal layer may be disposed on the first planarization film 160 . The second data metal layer may include a second source connection electrode PCE2 . The second source connection electrode PCE2 may be connected to the first source connection electrode PCE1 through a second source contact hole PCT2 penetrating the first planarization film 160 .

[0134] A second planarization film 180 may be disposed on the second source connection electrode PCE2 .

[0135] The barrier film BR, the first gate insulating film 131, the second gate insulating film 132, and the interlayer insulating film 141 may be made of an inorganic film (eg, silicon nitride (SiN x ), silicon oxynitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ) or aluminum oxide (AlO x ))form.

[0136] The first gate metal layer, the second gate metal layer, the first data metal layer, and the second data metal layer may be formed of a single layer or multiple layers using one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or alloys thereof.

[0137] The first planarization film 160 and the second planarization film 180 may be formed of an organic film such as acryl resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0138] A light emitting element layer may be disposed on the second planarization film 180. The light emitting element layer may include pixel electrodes PXE1, PXE2, and PXE3, light emitting elements LE, a common electrode CE, and organic films 210, 211, and 212.

[0139] A pixel electrode layer may be disposed on the second planarization film 180. The pixel electrode layer may include a first pixel electrode PXE1, a second pixel electrode PXE2, and a third pixel electrode PXE3. The pixel electrodes PXE1, PXE2, and PXE3 may be connected to the pixel via a pixel connection hole ( Figure 5 The pixel electrodes PXE1, PXE2, and PXE3 are connected to the second source connection electrode PCE2 (CT1, CT2, and CT3). Each of the pixel electrodes PXE1, PXE2, and PXE3 can be connected to the first source region S1 or the first drain region D1 of the thin-film transistor TFT1 via the first source connection electrode PCE1 and the second source connection electrode PCE2. Therefore, a voltage controlled by the thin-film transistor TFT1 can be applied to each of the pixel electrodes PXE1, PXE2, and PXE3.

[0140] The pixel electrode layer can be formed of a single layer or multiple layers made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or alloys thereof. For example, to reduce the resistance of each of pixel electrodes PXE1, PXE2, and PXE3, the pixel electrode layer can be formed of copper (Cu), which has a low surface resistance.

[0141] A first organic film 210 may be disposed on each of the pixel electrodes PXE1, PXE2, and PXE3. The first organic film 210 serves to temporarily secure or bond the multiple light-emitting elements LE to prevent them from tilting or falling during the process of moving them to the display panel 100. Specifically, the first organic film 210 may be a film used to temporarily bond the multiple light-emitting elements LE to each of the pixel electrodes PXE1, PXE2, and PXE3. To facilitate temporary bonding, the thickness of the first organic film 210 may be greater than the thickness of each of the pixel electrodes PXE1, PXE2, and PXE3, and greater than the thickness of the contact electrode CTE.

[0142] The first organic film 210 may be a photosensitive organic film such as a photoresist, or may be formed using acryl resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, or the like.

[0143] A plurality of light emitting elements LE may be arranged on the first organic film 210 . Figure 6 , each of the plurality of light-emitting elements LE is a vertical micro-LED extending along a third direction DR3. A vertical micro-LED is an LED having a structure in which a first semiconductor layer SEM1, an active layer MQW, and a second semiconductor layer SEM2 are sequentially arranged in the third direction DR3, which is perpendicular to the vertical direction.

[0144] Each of the plurality of light emitting elements LE may have an inverted tapered cross-sectional shape. As an example, each of the plurality of light emitting elements LE may have an inverted trapezoidal cross-sectional shape in which the width of the upper surface is greater than the width of the lower surface.

[0145] Each of the plurality of light-emitting elements LE can be formed using an inorganic material such as gallium nitride (GaN). Each of the plurality of light-emitting elements LE can have a length in the first direction DR1, a length in the second direction DR2, and a length in the third direction DR3 ranging from several μm to several hundred μm. For example, each of the plurality of light-emitting elements LE can have a length in the first direction DR1, a length in the second direction DR2, and a length in the third direction DR3 of approximately 100 μm or less.

[0146] Each of the plurality of light-emitting elements LE can be grown on a semiconductor substrate such as a silicon substrate or a sapphire substrate. The plurality of light-emitting elements LE can be directly transferred from the semiconductor substrate to the pixel electrodes PXE1, PXE2, and PXE3 of the display panel 100. Alternatively, the plurality of light-emitting elements LE can be transferred to the pixel electrodes PXE1, PXE2, and PXE3 of the display panel 100 using an electrostatic method using an electrostatic head or a stamping method using a flexible polymer such as PDMS or silicon as a transfer substrate.

[0147] The light emitting element LE may include a conductive layer E1, a semiconductor stack STC, a contact electrode CTE, and a protection film INS. The semiconductor stack STC may include a first semiconductor layer SEM1, an active layer MQW, and a second semiconductor layer SEM2 sequentially arranged in the third direction DR3.

[0148] The conductive layer E1 may be disposed on a lower surface of the first semiconductor layer SEM1 . Figure 7 , the conductive layer E1 covers the entire lower surface of the first semiconductor layer SEM1, but the embodiments of this specification are not limited thereto. As an example, the conductive layer E1 may be disposed on a portion of the lower surface of the first semiconductor layer SEM1. The conductive layer E1 may include one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu).

[0149] The first semiconductor layer SEM1 may be disposed on the conductive layer E1. The length of the lower surface of the first semiconductor layer SEM1 in the first direction DR1 or the second direction DR2 may be greater than the length of the conductive layer E1 in the first direction DR1 or the second direction DR2. The first semiconductor layer SEM1 may be formed using a semiconductor material layer (e.g., gallium nitride (GaN)) doped with a first conductivity-type dopant such as magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), or barium (Ba).

[0150] The active layer MQW can be disposed on the first semiconductor layer SEM1. The active layer MQW can comprise the same semiconductor material as the first and second semiconductor layers SEM1, SEM2. For example, if the first and second semiconductor layers SEM1, SEM2 comprise gallium nitride (GaN), the active layer MQW can also comprise GaN. For example, the active layer (MQW) can comprise at least one of gallium nitride (GaN), indium gallium nitride (InGaN), and aluminum gallium nitride (AlGaN). The active layer MQW can emit light by recombination of electron-hole pairs in response to an electrical signal applied through the first and second semiconductor layers SEM1, SEM2.

[0151] The active layer MQW can include a material with a single quantum well structure or a multiple quantum well structure. When the active layer MQW includes a material with a multiple quantum well structure, it can also have a structure in which multiple well layers and barrier layers are alternately stacked. In this case, the well layers can be formed using InGaN, and the barrier layers can be formed using GaN or AlGaN, but are not limited thereto. Alternatively, the active layer MQW can have a structure in which high-bandgap semiconductor materials and low-bandgap semiconductor materials are alternately stacked, or it can include different Group III to Group V semiconductor materials depending on the wavelength band of the emitted light.

[0152] When the active layer MQW contains indium gallium nitride (InGaN), the color of the emitted light can vary depending on the indium (In) content. For example, as the indium (In) content increases, the wavelength band of the light emitted by the active layer MQW can shift toward the red wavelength band, while as the indium (In) content decreases, the wavelength band of the light emitted by the active layer MQW can shift toward the blue wavelength band. For example, the indium (In) content in the active layer MQW of a light-emitting element LE that emits the third light (light in the blue wavelength band) can be approximately 10 wt% to 20 wt%.

[0153] The second semiconductor layer SEM2 may be disposed on the active layer MQW and may be a semiconductor material layer (for example, gallium nitride (GaN)) doped with a second conductive type dopant such as silicon (Si), germanium (Ge), or tin (Sn).

[0154] An electron blocking layer may be disposed between the first semiconductor layer SEM1 and the active layer MQW. The electron blocking layer may be a layer for suppressing or preventing excessive electrons from flowing into the active layer MQW. For example, the electron blocking layer may be p-AlGaN doped with AlGaN or p-type Mg. The electron blocking layer may be omitted.

[0155] A superlattice layer may be disposed between the active layer MQW and the second semiconductor layer SEM2. The superlattice layer may be a layer for alleviating stress between the second semiconductor layer SEM2 and the active layer MQW. For example, the superlattice layer may be formed using InGaN or GaN. The superlattice layer may be omitted.

[0156] The protective film INS may be disposed on the side surfaces of the first semiconductor layer SEM1, the active layer MQW, and the second semiconductor layer SEM2. The protective film INS may be a film for protecting the side surfaces of the light emitting element LE. The protective film INS may be made of an inorganic film (e.g., silicon nitride (SiN x ), silicon oxynitride (SiON), silicon oxide (SiOx ), titanium oxide (TiO x ) or aluminum oxide (AlO x ))form.

[0157] The contact electrode CTE may be disposed on the protection film INS. The contact electrode CTE may be disposed between the first organic film 210 and the protection film INS. The contact electrode CTE may be in contact with the first organic film 210 .

[0158] Figure 6 and Figure 7 , the contact electrode CTE of each light-emitting element LE is exemplarily shown as being disposed on the first organic film 210, but the embodiments of this specification are not limited thereto. As an example, the first organic film 210 may be disposed on a portion of the lower surface and side surfaces of the contact electrode CTE of each light-emitting element LE. Alternatively, the first organic film 210 may be disposed on the side surfaces of the conductive layer E1 of each light-emitting element LE. Alternatively, the first organic film 210 may be disposed on the side surfaces of the first semiconductor layer SEM1, the side surfaces of the active layer MQW, and the side surfaces of the second semiconductor layer SEM2 of each light-emitting element LE. In this case, the first organic film 210 may be disposed on a portion of the side surfaces of the second semiconductor layer SEM2.

[0159] The contact electrode CTE can be connected to the conductive layer E1 that is not covered by the protective film INS and is exposed. Therefore, even if one of the multiple contact electrodes CTE is not connected to the conductive layer E1 due to process errors, the other contact electrodes CTE are still connected to the conductive layer E1, thereby preventing the light-emitting element LE from not lighting up.

[0160] When the contact electrode CTE is formed of a metal with high reflectivity, light emitted from the active layer MQW of the light-emitting element LE that travels toward the side surface of the light-emitting element LE can be reflected by the contact electrode CTE and emitted from the upper surface of the light-emitting element LE. Therefore, light loss in the light-emitting element LE can be reduced, thereby improving the light efficiency of the light-emitting element LE. Therefore, to improve the light efficiency of the light-emitting element LE, the contact electrode CTE is preferably arranged to cover a majority of the side surface of the semiconductor stack STC.

[0161] The contact electrode CTE may include one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Specifically, to improve reflectivity, the contact electrode CTE may be formed with a two-layer structure of chromium (Cr) and gold (Au), a three-layer structure of titanium (Ti), aluminum (Al), and titanium (Ti), or a three-layer structure of indium tin oxide (ITO), silver (Ag), and indium tin oxide (ITO).

[0162] The connecting electrode BE connects the contact electrode CTE of the light-emitting element LE to one of the pixel electrodes PXE1, PXE2, and PXE3. The connecting electrode BE may be connected to one of the pixel electrodes PXE1, PXE2, and PXE3 exposed through a connection hole BH penetrating the first organic film 210. Furthermore, the connecting electrode BE may be disposed on the upper surface of the first organic film 210 and the side surface of the contact electrode CTE. Furthermore, the connecting electrode BE may be disposed on a portion of the side surface of the light-emitting element LE. For example, the connecting electrode BE may be disposed on a portion of the protective film INS of the light-emitting element LE.

[0163] The connecting electrode BE can include one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, the connecting electrode BE can be formed using a transparent metal (TCO) that transmits light, such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0164] When the connection electrode BE is made of a highly reflective metal such as aluminum (Al), light emitted from the active layer MQW of the light-emitting element LE and traveling toward the side surfaces of the light-emitting element LE can be reflected by the connection electrode BE and travel toward the upper portion of the light-emitting element LE. This reduces light loss in the light-emitting element LE and improves the light efficiency of the light-emitting element LE.

[0165] The third organic film 211 may be arranged to cover a portion of the side surfaces of the plurality of light emitting elements LE. In addition, the third organic film 211 may be arranged to cover the connection electrode BE, but at least a portion of the connection electrode BE may be exposed without being covered by the third organic film 211.

[0166] The fourth organic film 212 may be disposed on the third organic film 211. The fourth organic film 212 may be disposed to cover a portion of the side surface of each of the plurality of light-emitting elements LE. The fourth organic film 212 may be disposed on at least a portion of the connection electrode BE that is not covered by the third organic film 211 and is exposed. The top surface of each of the plurality of light-emitting elements LE may be exposed without being covered by the fourth organic film 212.

[0167] The third organic film 211 and the fourth organic film 212 may be formed of an organic film made of acryl resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, or the like.

[0168] The third organic film 211 and the fourth organic film 212 are layers for planarizing the step difference generated by the plurality of light emitting elements LE. In the case where the height of the third organic film 211 is arranged to cover most of the side surface of each of the plurality of light emitting elements LE, the fourth organic film 212 may be omitted.

[0169] A common electrode CE may be disposed on the upper surface of each of the plurality of light-emitting elements LE and the upper surface of the fourth organic film 212. The common electrode CE may be a common layer formed in common with the first, second, and third subpixels SPX1, SPX2, and SPX3. The common electrode CE may be formed using a transparent conductive material (TCO) capable of transmitting light, such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0170] In addition, the pixel electrodes PXE1 , PXE2 , and PXE3 may be referred to as anode electrodes or first electrodes, and the common electrode CE may be referred to as cathode electrode or second electrode.

[0171] A first capping layer CAP1 may be disposed on the common electrode CE.

[0172] A light-shielding layer BM, a first light conversion layer QDL1, a second light conversion layer QDL2, and a light-transmitting layer TPL may be arranged on the first cover layer CAP1. The first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL may be formed by dividing the light-shielding layer BM. Therefore, in the first subpixel SPX1, the first light conversion layer QDL1 may be arranged on the first cover layer CAP1, in the second subpixel SPX2, the second light conversion layer QDL2 may be arranged on the first cover layer CAP1, and in the third subpixel SPX3, the light-transmitting layer TPL may be arranged on the first cover layer CAP1. The light-shielding layer BM may overlap with the third organic film 211 and the fourth organic film 212 in the third direction DR3, but may not overlap with the plurality of light-emitting elements LE.

[0173] The first light conversion layer QDL1 can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element LE into the first light (light in the red wavelength band). The first light conversion layer QDL1 can include a first base resin BRS1 and first wavelength conversion particles WCP1. The first base resin BRS1 can include a light-transmitting organic substance. The first wavelength conversion particles WCP1 can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element LE into the first light (light in the red wavelength band).

[0174] The second light conversion layer QDL2 can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element LE into second light (light in the green wavelength band). The second light conversion layer QDL2 can include a second base resin BRS2 and second wavelength conversion particles WCP2. The second base resin BRS2 can include a light-transmitting organic substance. The second wavelength conversion particles WCP2 can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element LE into second light (light in the green wavelength band).

[0175] The light-transmitting layer TPL may include a light-transmitting organic substance.

[0176] For example, the first base resin BRS1, the second base resin BRS2, ​​and the light-transmitting layer TPL may include epoxy resin, acrylic resin, cardo resin, or imide resin. The first wavelength conversion particles WCP1 and the second wavelength conversion particles WCP2 may be quantum dots (QDs), quantum rods, fluorescent materials, or phosphorescent materials.

[0177] The light-shielding layer BM may include a first light-shielding layer BM1 and a second light-shielding layer BM2 stacked in sequence. The length of the first light-shielding layer BM1 in the first direction DR1 or the second direction DR2 may be greater than the length of the second light-shielding layer BM2 in the first direction DR1 or the second direction DR2. The first and second light-shielding layers BM1 and BM2 may be formed from an organic film such as an acryl resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. The first and second light-shielding layers BM1 and BM2 may contain a light-shielding substance to prevent light from the light-emitting element LE of a sub-pixel from traveling to adjacent sub-pixels. For example, the first and second light-shielding layers BM1 and BM2 may contain an inorganic black pigment such as carbon black or an organic black pigment.

[0178] The second cover layer CAP2 may be arranged on the first cover layer CAP1 and the light shielding layer BM. The second cover layer CAP2 may be arranged on the side surface and the upper surface of the light shielding layer BM. As an example, the second cover layer CAP2 may be arranged on the side surface of the first light shielding layer BM1 and the side surface and the upper surface of the second light shielding layer BM2.

[0179] A reflective film RF may be disposed between the light-shielding layer BM and the first light conversion layer QDL1, between the light-shielding layer BM and the second light conversion layer QDL2, and between the light-shielding layer BM and the light-transmitting layer TPL. The reflective film RF may be disposed on the second cover layer CAP2 disposed on the side surfaces of the first light-shielding layer BM1 and the second light-shielding layer BM2. The reflective film RF reflects light traveling toward the side surfaces from the first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL.

[0180] The reflective film RF may include a metal substance with high reflectivity such as aluminum (Al), and the thickness of the reflective film RF may be approximately 0.1 μm.

[0181] Alternatively, in order to function as a distributed Bragg reflector (DBR), the reflective film RF may include M (M is an integer greater than or equal to 2) pairs of first and second layers having different refractive indices. In this case, the M first layers and the M second layers may be arranged alternately. The first and second layers may be made of an inorganic film (e.g., silicon nitride (SiN x ), silicon oxynitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x) or aluminum oxide (AlO x ))form.

[0182] The third capping layer CAP3 may be disposed on the second capping layer CAP2 , the first light conversion layer QDL1 , the second light conversion layer QDL2 , and the light transmitting layer TPL.

[0183] The first capping layer CAP1, the second capping layer CAP2, and the third capping layer CAP3 may be made of an inorganic film (eg, silicon nitride (SiN x ), silicon oxynitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ) or aluminum oxide (AlO x The first light conversion layer QDL1, the second light conversion layer QDL2, and the light transmitting layer TPL may be encapsulated by the first cover layer CAP1, the second cover layer CAP2, and the third cover layer CAP3.

[0184] A fifth organic film 213 may be disposed on the third capping layer CAP3. A plurality of color filters CF1, CF2, and CF3 may be disposed on the fifth organic film 213. The plurality of color filters CF1, CF2, and CF3 may include a first color filter CF1, a second color filter CF2, and a third color filter CF3.

[0185] The first color filter CF1 disposed in the first subpixel SPX1 can transmit the first light (light in the red wavelength band) and absorb or block the third light (light in the blue wavelength band). Therefore, the first color filter CF1 can transmit the first light (light in the red wavelength band) converted by the first light conversion layer QDL1 among the third light (light in the blue wavelength band) emitted by the light-emitting element LE, and can absorb or block the third light (light in the blue wavelength band) not converted by the first light conversion layer QDL1. As a result, the first subpixel SPX1 can emit the first light (light in the red wavelength band).

[0186] The second color filter CF2 disposed in the second subpixel SPX2 can transmit the second light (light in the green wavelength band) and absorb or block the third light (light in the blue wavelength band). Therefore, the second color filter CF2 can transmit the second light (light in the green wavelength band) converted by the second light conversion layer QDL2 within the third light (light in the blue wavelength band) emitted by the light-emitting element LE, and can absorb or block the third light (light in the blue wavelength band) not converted by the second light conversion layer QDL2. As a result, the second subpixel SPX2 can emit the second light (light in the green wavelength band).

[0187] The third color filter CF3 disposed in the third subpixel SPX3 can transmit the third light (light in the blue wavelength band). Therefore, the third color filter CF3 can transmit the third light (light in the blue wavelength band) emitted from the light-emitting element LE and passing through the light-transmitting layer TPL. Therefore, the third subpixel SPX3 can emit the third light (light in the blue wavelength band).

[0188] The first, second, and third color filters CF1, CF2, and CF3 that overlap in the third direction DR3 may overlap the light shielding layer BM in the third direction DR3.

[0189] A sixth organic film 214 for planarization may be disposed on the plurality of color filters CF1 , CF2 , and CF3 .

[0190] The fifth organic film 213 and the sixth organic film 214 may be formed using acryl resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, or the like.

[0191] Figure 8 is shown with Figure 5 Another example of a cross-sectional view of a display panel corresponding to line I1-I1' is shown. Figure 9 is shown with Figure 5 FIG. 1 is a cross-sectional view showing another example of the cross-section of the display panel corresponding to line I1 - I1 ′. Figure 10 is shown with Figure 5 FIG. 1 is a cross-sectional view showing another example of the cross-section of the display panel corresponding to line I1 - I1 ′.

[0192] Figures 8 to 10 The light emitting element layer including the light emitting element LE and the like are shown. Figure 6 In addition, Figures 8 to 10 The following embodiments are different from each other in relation to the fourth organic film 212. In the following description of the embodiments, description overlapping with the above-described embodiments will be omitted.

[0193] Reference Figures 8 to 10 , the light emitting element LE can be arranged on the pixel electrodes PXE1, PXE2, and PXE3. Figures 8 to 10 The display panel 100 of the embodiment may not include Figure 6 The first organic film 210 and the connecting electrode BE are formed.

[0194] In one embodiment, the light-emitting elements LE may include respective bonding electrodes BDE. The light-emitting elements LE may be arranged or bonded to the pixel electrodes PXE1, PXE2, and PXE3 (or bonding pads connected to the pixel electrodes PXE1, PXE2, and PXE3) via the bonding electrodes BDE. As an example, the light-emitting elements LE may be stably arranged or bonded to the pixel electrodes PXE1, PXE2, and PXE3 using bonding methods such as eutectic bonding. In one embodiment, the pixel electrodes PXE1, PXE2, and PXE3 may be formed of multiple layers including metal, but are not limited thereto. The type or structure of the light-emitting elements LE, as well as the connection structure or method between the light-emitting elements LE and the pixel electrodes PXE1, PXE2, and PXE3, may vary depending on the embodiment.

[0195] Each light emitting element LE may include a groove GRV in a portion including the upper surface. As an example, the light emitting element LE may include a groove GRV recessed from the upper surface by more than a predetermined depth.

[0196] Furthermore, each sub-pixel SPX may include a light scattering layer STL filling the groove GRV. For example, the light scattering layer STL may be disposed on the common electrode CE disposed on the light-emitting element LE and may fill the interior and / or upper portion of the groove GRV formed in the light-emitting element LE (or the groove formed in the light-emitting element LE and the common electrode CE due to the groove GRV of the light-emitting element LE). In one embodiment, the light scattering layer STL may completely fill the groove GRV of the light-emitting element LE, but is not limited thereto.

[0197] Figures 8 to 10 The embodiment disclosed herein includes a groove GRV formed in each of the light-emitting elements LE arranged in the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3, but the embodiment is not limited thereto. For example, in another embodiment, only a portion of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may include a light-emitting element LE with a groove GRV, and a light scattering layer STL may be formed in the groove GRV. As another example, sub-pixels SPX requiring improved luminous efficiency may be selected from the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3, and the light scattering layer STL may be arranged or formed in the selected sub-pixels SPX.

[0198] The common electrode CE may be disposed on the light-emitting elements LE and the third organic film 211. The common electrode CE may have a shape corresponding to the groove GRV of each light-emitting element LE (as an example, a surface profile corresponding to the groove GRV). For example, the common electrode CE may have a uniform thickness throughout and may be formed from a thin film having a surface profile corresponding to the surface morphology of the element located therebelow.

[0199] A portion of the common electrode CE may be arranged inside the groove GRV of each light-emitting element LE. The common electrode CE may be arranged within the groove GRV of each light-emitting element LE at a lower height than a portion covering the outer contour of the light-emitting element LE (for example, a portion surrounding the groove GRV). For example, a portion of the common electrode CE arranged on the bottom surface of the groove GRV may be located at a lower height than other portions of the common electrode CE arranged on the sidewalls of the groove GRV.

[0200] The third organic film 211 may cover the side surfaces of the light-emitting element LE. In one embodiment, the third organic film 211 may be formed at a lower height than the light-emitting element LE, and the third organic film 211 may cover a portion of the side surfaces of the light-emitting element LE. In this case, a portion of the common electrode CE disposed on the third organic film 211 may be located at a lower height than another portion of the common electrode CE disposed on the sidewalls of the groove GRV. For example, the common electrode CE may be located at different heights depending on the shape or height of the light-emitting element LE and the third organic film 211.

[0201] The height of the third organic film 211 may vary depending on the embodiment. As an example, in another embodiment, the third organic film 211 may be formed to a height substantially the same as or similar to that of the light emitting element LE and cover the entire side surface of the light emitting element LE.

[0202] In one embodiment, the third organic film 211 may be formed to a height or thickness sufficient to stably form the common electrode CE. As an example, the third organic film 211 may be formed to a height or thickness sufficient to mitigate the step difference of the common electrode CE. This prevents disconnection of the common electrode CE.

[0203] In one embodiment, if Figure 8 and Figure 9 As shown, the display panel 100 may include a fourth organic film 212 disposed on the common electrode CE. The fourth organic film 212 may mitigate the step difference of the light emitting element layer generated by the light emitting element LE and may flatten the upper surface of the light emitting element layer. Figure 8 As shown, the fourth organic film 212 is formed to have a height substantially the same as or similar to that of the light emitting element LE, or as shown in FIG. Figure 9 As shown, the height is formed to be higher than that of the light emitting element LE, so as to entirely cover the light emitting element LE, the common electrode CE and the plurality of light scattering layers STL.

[0204] In one embodiment, if Figure 9As shown, when the fourth organic film 212 is formed to a height greater than that of the light scattering layer STL, the display panel 100 may also include an additional covering layer covering the light scattering layer STL. As an example, the display panel 100 may further include a covering layer (not shown) covering the light scattering layer STL and the common electrode CE, and the fourth organic film 212 may also be disposed on the covering layer.

[0205] Or, as Figure 10 As shown, the display panel 100 may not include the fourth organic film 212. For example, the fourth organic film 212 may not be disposed above the common electrode CE, etc., and the light shielding layer BM, etc. may be disposed directly on the first cover layer CAP1 that covers the common electrode CE and the light scattering layer STL. In one embodiment, at least a portion of each of the light emitting element LE and the light scattering layer STL may be disposed above the third organic film 211 and may be surrounded by the first light conversion layer QDL1, the second light conversion layer QDL2, or the light-transmitting layer TPL. For example, the light emitting element LE, the common electrode CE, the light scattering layer STL, and the first cover layer CAP1 may protrude above the third organic film 211.

[0206] A first light conversion layer QDL1 , a second light conversion layer QDL2 , a light-transmitting layer TPL, and a light-shielding layer BM may be disposed on the light-emitting element layer including the light-emitting element LE, the common electrode CE, and the light-scattering layer STL.

[0207] The light shielding layer BM may be disposed between the light emitting regions of the sub-pixels SPX and / or around the light emitting regions. The light shielding layer BM may surround the first light conversion layer QDL1, the second light conversion layer QDL2, and the light transmitting layer TPL.

[0208] The first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL may be arranged in the light-emitting region of the sub-pixel SPX divided by the light-shielding layer BM. For example, the first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL may be arranged in the light-emitting region of the first sub-pixel SPX1, the light-emitting region of the second sub-pixel SPX2, and the light-emitting region of the third sub-pixel SPX3, respectively. The first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL may be covered by a third cover layer CAP3.

[0209] In one embodiment, the height of the light shielding layer BM may be substantially the same as or similar to the heights of the first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL, but is not limited thereto. As an example, the light shielding layer BM may be formed to a height greater than the maximum height of the first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL. Alternatively, at least a portion of the first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL may be formed to a height greater than the height of the light shielding layer BM.

[0210] The light shielding layer BM may be formed of a single layer or multiple layers. As an example, the light shielding layer BM may be formed of a single layer, or, as Figure 6 As shown in the embodiment, it can be formed of multiple layers including a first light shielding layer BM1 and a second light shielding layer BM2.

[0211] The light shielding layer BM may include a vertical side surface, or Figure 6 As shown in the embodiment of FIG. 4 , the light shielding layer BM may include an inclined side surface. The shape, height, or structure of the light shielding layer BM may be variously changed according to the embodiment.

[0212] In one embodiment, the display panel 100 may further include a reflective film RF disposed on the light shielding layer BM. For example, the reflective film RF and the third cover layer CAP3 may be sequentially disposed on the second cover layer CAP2 covering the light shielding layer BM. The reflective film RF may cover at least the side surfaces of the light shielding layer BM. As an example, the reflective film RF may cover both the side surfaces and the upper surface of the light shielding layer BM. The reflective film RF can increase the amount of light emitted from the sub-pixel SPX and improve the light efficiency of the sub-pixel SPX.

[0213] A fifth organic film 213 , color filters CF1 , CF2 , and CF3 , and a sixth organic film 214 may be disposed on the third capping layer CAP3 .

[0214] Figure 11 It is shown in detail Figure 8 An example cross-sectional view of region B of FIG. Figure 11 A light emitting element LE including a groove GRV and a light scattering layer STL filled in the groove GRV are shown.

[0215] Reference Figure 11 The light-emitting element LE may include a body portion CBD (for example, an LED chip body) and a bonding electrode BDE. In one embodiment, the light-emitting element LE may further include a first reflective film RFL1 disposed between the body portion CBD and the bonding electrode BDE. The first reflective film RFL1 may be disposed below the body portion CBD.

[0216] The main body portion CBD may include a first semiconductor layer SEM1, an active layer MQW, and a second semiconductor layer SEM2, arranged sequentially along a direction (for example, the third direction DR3). For example, the first semiconductor layer SEM1, the active layer MQW, and the second semiconductor layer SEM2 may be arranged sequentially on the pixel electrode. In one embodiment, the main body portion CBD may further include a conductive layer E1 arranged on a surface (for example, the lower surface) of the first semiconductor layer SEM1, and a protective film INS surrounding the side surfaces of the first semiconductor layer SEM1, the active layer MQW, and the second semiconductor layer SEM2.

[0217] In one embodiment, the conductive layer E1 may have a shape and / or size corresponding to the first semiconductor layer SEM1, the active layer MQW, and the second semiconductor layer SEM2. As an example, the conductive layer E1 may be etched together with the semiconductor layers used to manufacture the light-emitting elements LE, on a semiconductor substrate on which the semiconductor layers are grown. The etched semiconductor layers may include the first semiconductor layer SEM1, the active layer MQW, and the second semiconductor layer SEM2 of each of the light-emitting elements LE. The conductive layer E1 may be disposed on the first semiconductor layer SEM1, the active layer MQW, and the second semiconductor layer SEM2. The shape and size of the conductive layer E1 may vary depending on the embodiment. The conductive layer E1 may include one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, the conductive layer E1 may include a transparent conductive material such as a metal oxide.

[0218] In one embodiment, the protection film INS may further surround the conductive layer E1 . For example, the protection film INS may surround the side surfaces of the conductive layer E1 , the first semiconductor layer SEM1 , the active layer MQW, and the second semiconductor layer SEM2 .

[0219] In one embodiment, the protective film INS may partially cover the lower surface of the conductive layer E1. As an example, the protective film INS may cover the edge portion of the lower surface of the conductive layer E1 and may include an opening that exposes the central portion of the conductive layer E1. However, the embodiment is not limited thereto. For example, the protective film INS may only surround the side surfaces of the conductive layer E1 or may not surround the conductive layer E1.

[0220] In one embodiment, the main body CBD may have a quadrilateral cross-sectional shape such as a square, a rectangle, or a trapezoid. As an example, the main body CBD may be a vertical micro LED chip having a square or rectangular cross-sectional shape. Alternatively, Figure 7 As shown in the embodiment of FIG. 1 , the main body portion CBD may have a cross-sectional shape of an inverted tapered (or tapered) trapezoid. The type, shape, or size of the main body portion CBD may vary depending on the embodiment.

[0221] The bonding electrode BDE may include a conductive material suitable for bonding (for example, a bonding metal). In one embodiment, the bonding electrode BDE may be disposed on the lower surface of the first reflective film RFL1 and may be electrically connected to the conductive layer E1 through the first reflective film RFL1. The bonding electrode BDE is bonded to and electrically connected to a pixel electrode (for example, the first pixel electrode PXE1, the second pixel electrode PXE2, or the third pixel electrode PXE3).

[0222] The first reflective film RFL1 may be disposed on the lower surface of the main body CBD. The first reflective film RFL1 may include a metal with high light reflectivity. As an example, the first reflective film RFL1 may be composed of at least one metal layer containing at least one of highly reflective metals such as aluminum (Al), molybdenum (Mo), titanium (Ti), copper (Cu), silver (Ag), magnesium (Mg), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), or chromium (Cr), or other reflective substances. In one embodiment, the first reflective film RFL1 may be formed of a multilayer structure including a reflective metal layer and a conductive bonding layer disposed on at least one surface of the reflective metal layer, but is not limited thereto.

[0223] Light generated in the light-emitting element LE and directed toward the lower portion of the main body CBD can be reflected by the first reflective film RFL1 and emitted upward from the light-emitting element LE. For example, the light-emitting surface from which light is emitted from the light-emitting element LE may include the upper surface of the light-emitting element LE (as one example, the upper surface of the second semiconductor layer SEM2). At least a portion of the light reflected by the first reflective film RFL1 can pass through the upper surface of the light-emitting element LE and enter the first light conversion layer QDL1, the second light conversion layer QDL2, the light-transmitting layer TPL, and the like. This improves the luminous efficiency of the light-emitting element LE.

[0224] The light emitting element LE may include a groove GRV formed on its upper surface. The groove GRV may be formed in the second semiconductor layer SEM2 of the light emitting element LE. For example, the groove GRV may be formed by etching a portion of the second semiconductor layer SEM2. Thus, the light emitting element LE may include the groove GRV in the portion where the second semiconductor layer SEM2 is disposed.

[0225] In one embodiment, the groove GRV may be surrounded by the second semiconductor layer SEM2. For example, the bottom surface and sidewalls (inner side surfaces as an example) of the groove GRV may be defined by the surface of the second semiconductor layer SEM2 exposed when the second semiconductor layer SEM2 is etched (an etched surface of the second semiconductor layer SEM2 as an example).

[0226] In one embodiment, the second semiconductor layer SEM2 may include a second conductivity type dopant (e.g., an n-type dopant) such as Si, and may include at least two portions having different doping concentrations (e.g., the doping concentration of the second conductivity type dopant). For example, the second semiconductor layer SEM2 may include a first portion SEM2A doped with the second conductivity type dopant at a first concentration and a second portion SEM2B doped with the second conductivity type dopant at a second concentration lower than the first concentration. As an example, the second semiconductor layer SEM2 may include at least one highly doped layer including the first portion SEM2A, and at least one low doped layer disposed on the highly doped layer and including the second portion SEM2B.

[0227] The groove GRV may be arranged below the height of the first portion SEM2A of the second semiconductor layer SEM2. For example, the groove GRV may be formed by etching the second semiconductor layer SEM2 to a depth capable of stably exposing the first portion SEM2A of the second semiconductor layer SEM2. As an example, the bottom surface of the groove GRV may be arranged at a height below the maximum height of the first portion SEM2A of the second semiconductor layer SEM2.

[0228] In one embodiment, the first portion SEM2A of the second semiconductor layer SEM2 may include the bottom surface of the groove GRV. As an example, the upper surface of the first portion SEM2A may form the bottom surface of the groove GRV. In one embodiment, the first portion SEM2A may also include a portion of a sidewall of the groove GRV. As an example, the first portion SEM2A may include a lower portion of the sidewall of the groove GRV close to the bottom surface.

[0229] In one embodiment, the second portion SEM2B of the second semiconductor layer SEM2 may include a portion of a sidewall of the groove GRV. As an example, during the formation of the groove GRV, most of the second portion SEM2B of the second semiconductor layer SEM2 may be removed, leaving only an edge portion adjacent to the protection film INS to define a portion of the sidewall of the groove GRV (as an example, including a portion of the upper portion).

[0230] The common electrode CE may contact the first portion SEM2A of the second semiconductor layer SEM2 within and / or on the groove GRV. The common electrode CE is directly disposed on the first portion SEM2A corresponding to the highly doped layer of the second semiconductor layer SEM2, thereby improving ohmic formation between the light-emitting element LE and the common electrode CE. This improves the electrical connection between the light-emitting element LE and the common electrode CE, and reduces contact resistance. Therefore, according to embodiments, the voltage variation or voltage drop of the driving voltage of the display device 10 (for example, the second power supply voltage VSS applied to the display panel 100) can be reduced, and power consumption can be improved by reducing or optimizing the driving voltage range of the display device 10.

[0231] The upper surface of the light-emitting element LE including the groove GRV may be covered by the common electrode CE. The common electrode CE may be formed to have a thickness less than the depth of the groove GRV and may not substantially fill the groove GRV. For example, even if the common electrode CE is formed on the light-emitting element LE, the groove GRV (a space corresponding to the groove GRV) may remain on the light-emitting element LE. The groove GRV may be filled with the light scattering layer STL.

[0232] The light scattering layer STL may fill at least a portion of the groove GRV. As an example, the light scattering layer STL may be formed to have a thickness or height corresponding to the depth of the groove GRV, so as to substantially completely fill the groove GRV. However, the embodiment is not limited thereto. As an example, the light scattering layer STL may also be formed to have a thickness or height lower than the depth of the groove GRV, so as to only partially fill the groove GRV.

[0233] The light scattering layer STL may include a light scatterer SCT (or a light diffuser). As one example, the light scattering layer STL may include a base resin RSL and the light scatterer SCT dispersed within the base resin RSL. The base resin RSL may include a light-transmitting material such as an epoxy resin, an acrylic resin, a cardo resin, or an imide resin. The light scatterer SCT may include titanium dioxide (TiO2) or silicon dioxide (SiO2), for example. Since the light scattering layer STL is disposed within and / or above the groove GRV formed on the upper surface of the light-emitting element LE, the luminous efficiency of the light-emitting element LE can be improved.

[0234] Furthermore, since the groove GRV is formed on the upper surface of the light-emitting element LE, the distance between the active layer MQW of the light-emitting element LE and the light-emitting surface (for example, the upper surface of the light-emitting element LE including the bottom surface of the groove GRV) can be reduced. This further improves the luminous efficiency of the light-emitting element LE.

[0235] Figure 12is a graph showing the carrier doping concentration of the second semiconductor layer according to an embodiment. For example, Figure 12 The Si doping concentration according to the depth of the second semiconductor layer SEM2 (or the distance from the active layer MQW) is shown.

[0236] exist Figure 12 In FIG. 1 , the depth as the independent variable of the horizontal axis represents the depth (or height) of the second semiconductor layer SEM2 with respect to the active layer MQW. As an example, in FIG. Figure 12 The depth of the second semiconductor layer SEM2 shown in the graph may correspond to the distance between a specific position of the second semiconductor layer SEM2 and the active layer MQW (or the height relative to the active layer MQW). The horizontal axis may be in nanometers [nm]. The dependent variable of the vertical axis represents the carrier concentration (as an example, the Si doping concentration). The vertical axis may be in charge per square [C / S] (as an example, per 1 cm 2 of charge).

[0237] Reference Figure 11 and Figure 12 The second semiconductor layer SEM2 may include a highly doped layer doped with Si at a first concentration (as an example, a doping concentration higher than 1.0E+02 [C / S]) and a lowly doped layer doped with Si at a second concentration lower than the first concentration. In one embodiment, the highly doped layer of the second semiconductor layer SEM2 may include a first portion SEM2A of the second semiconductor layer SEM2, and the lowly doped layer of the second semiconductor layer SEM2 may include a second portion SEM2B of the second semiconductor layer SEM2.

[0238] In one embodiment, the total doping concentration of the first portion SEM2A of the second semiconductor layer SEM2 doped with Si at the first concentration may be approximately 1.0E+18 / cm 3 to 1.0E+19 / cm 3 . 3 (10 18 / cm 3 to 10 19 / cm 3 The total doping concentration of the second portion SEM2B of the second semiconductor layer SEM2 doped with Si at the second concentration may be approximately 1.0E+16 / cm 3 (10 16 / cm 3 The carrier concentration or doping concentration of the first portion SEM2A and the second portion SEM2B of the second semiconductor layer SEM2 may vary depending on the embodiment. However, the first portion SEM2A of the second semiconductor layer SEM2 may be doped at a higher concentration than the second portion SEM2B, thereby having a higher conductivity.

[0239] According to an embodiment, a groove GRV may be formed in the light emitting element LE so that the first portion SEM2A of the highly doped layer corresponding to the second semiconductor layer SEM2 is exposed, and a common electrode CE may be formed on the first portion SEM2A of the second semiconductor layer SEM2. This may improve ohmic formation (for example, ohmic contact) between the light emitting element LE and the common electrode CE, and may improve or optimize the driving voltage and power consumption of the display device 10.

[0240] As an example, when the thickness of the first portion SEM2A of the second semiconductor layer SEM2 is within a range of approximately 1500 nm to 2000 nm (1.5 μm to 2 μm), a groove GRV is formed in the light-emitting element LE such that the first portion SEM2A of the second semiconductor layer SEM2 is exposed at a position within a range of approximately 500 nm to 1500 nm (0.5 μm to 1.5 μm) from the active layer MQW, and the common electrode CE may be formed directly on the exposed portion of the second semiconductor layer SEM2. For example, the groove GRV may be formed at a position spaced approximately 500 nm (0.5 μm) or more from the active layer MQW, and the bottom surface of the groove GRV may be located at a height of approximately 500 nm to 1500 nm (0.5 μm to 1.5 μm) relative to the upper surface of the active layer MQW.

[0241] By forming the groove GRV at a distance of approximately 500 nm or more from the active layer MQW (as an example, at a height of 500 nm or more relative to the active layer MQW), the structural stability of the light-emitting element LE can be ensured. Furthermore, by forming the groove GRV in the light-emitting element LE at a distance of approximately 1500 nm or less from the active layer MQW, the first portion SEM2A of the second semiconductor layer SEM2 can be appropriately and stably exposed. However, the height or depth of the groove GRV may vary depending on the thickness or height of the first portion SEM2A of the second semiconductor layer SEM2 (or the highly doped layer).

[0242] Figure 13 It is shown in detail Figure 8 Another example of a cross-sectional view of region B. For example, Figure 13 The shape or structure of the groove GRV formed in the light emitting element LE and the shape or structure of the common electrode CE and the light scattering layer STL are shown. Figure 11 Embodiments of different embodiments.

[0243] Reference Figure 13The bottom surface of the groove GRV may be substantially uneven. For example, after forming the groove GRV to expose the first portion SEM2A of the second semiconductor layer SEM2, a texturing process may be performed to impart roughness to the surface of the groove GRV, including the bottom surface. This allows a light-transmitting pattern, including a lens-shaped pattern or other textured pattern, to be formed on the bottom surface of the groove GRV.

[0244] In one embodiment, since the groove GRV includes a light-transmitting pattern (for example, a textured pattern) having surface roughness, a light-transmitting pattern TP having a shape (for example, a textured pattern) and / or surface roughness corresponding to the shape of the groove GRV may also be formed on the common electrode CE and the light-scattering layer STL. For example, the common electrode CE and the light-scattering layer STL may include the light-transmitting pattern TP arranged on the bottom surface of the groove GRV.

[0245] According to the above embodiments, the luminous efficiency of the light-emitting element LE can be improved. For example, the amount of light generated in the light-emitting element LE and incident on the first light conversion layer QDL1, the second light conversion layer QDL2, or the light-transmitting layer TPL can be increased. Consequently, the light efficiency of the light-emitting element LE and the sub-pixel SPX including the light-emitting element LE can be improved.

[0246] Figure 14 It is shown in detail Figure 8 A cross-sectional view of another example of region B. Figure 15 It is shown in detail Figure 8 A cross-sectional view of another example of region B. Figure 14 and Figure 15 Examples and Figure 11 and Figure 13 The difference of the embodiment is that the light emitting element LE further includes a second reflective film RFL2.

[0247] Reference Figure 14 and Figure 15 The light emitting element LE may further include a second reflective film RFL2 disposed on a side surface, etc. For example, the body portion CBD may further include a second reflective film RFL2 surrounding the side surfaces of the conductive layer E1, the first semiconductor layer SEM1, the active layer MQW, and the second semiconductor layer SEM2.

[0248] In one embodiment, the second reflective film RFL2 may include a distributed Bragg reflector. For example, the second reflective film RFL2 may include at least one pair of a first layer (for example, a low-refractive layer) and a second layer (for example, a high-refractive layer) arranged sequentially or alternately and having different refractive indices. The second reflective film RFL2 may reflect light generated by the light-emitting element LE and traveling toward the side surface of the main body CBD.

[0249] In one embodiment, the second reflective film RFL2 may be formed of a multilayer insulating film containing an insulating substance. For example, the second reflective film RFL2 may include an inorganic film (for example, silicon nitride (SiN x ), silicon oxynitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ) or aluminum oxide (AlO x ) formed inorganic insulating film).

[0250] In one embodiment, the body portion CBD may include a protection film INS surrounding the side surfaces of the conductive layer E1, the first semiconductor layer SEM1, the active layer MQW, and the second semiconductor layer SEM2. The second reflective film RFL2 may be disposed on the outer surface of the protection film INS. For example, the second reflective film RFL2 may surround the side surfaces of the protection film INS. In one embodiment, the protection film INS may not be disposed on the lower surface of the conductive layer E1, but is not limited thereto.

[0251] Alternatively, the main body CBD may not include an additional protective film INS. For example, the second reflective film RFL2 may directly surround the side surfaces of the conductive layer E1, the first semiconductor layer SEM1, the active layer MQW, and the second semiconductor layer SEM2. In this case, the second reflective film RFL2 not only reflects light generated by the light-emitting element LE and traveling toward the side surfaces of the main body CBD, but also functions as a protective film to protect the conductive layer E1, the first semiconductor layer SEM1, the active layer MQW, and the second semiconductor layer SEM2.

[0252] In one embodiment, the second reflective film RFL2 may partially cover the lower surface of the conductive layer E1. For example, the second reflective film RFL2 may cover the edge of the lower surface of the conductive layer E1 and may include an opening that exposes the central portion of the conductive layer E1. On the lower surface of the conductive layer E1, a portion of the first reflective film RFL1 and a portion of the second reflective film RFL2 may overlap. The lower and side surfaces of the conductive layer E1, the first semiconductor layer SEM1, the active layer MQW, and the second semiconductor layer SEM2 may be covered by the first and second reflective films RFL1 and RFL2.

[0253] Light generated by the light-emitting element LE and traveling toward the lower portion and side surfaces of the main body CBD is reflected by the first reflective film RFL1 and the second reflective film RFL2 so as to be emitted upward from the light-emitting element LE. This can further increase the amount of light emitted upward from the light-emitting element LE, effectively improving the luminous efficiency of the light-emitting element LE and the sub-pixel SPX including it.

[0254] Figure 16 It is shown in detail Figure 8 A cross-sectional view of another example of region B. Figure 17 It is shown in detail Figure 8 Another example of a cross-sectional view of region B. For example, Figure 16 The first reflective film RFL1 and the protective film INS are shown. Figure 11 Different embodiments of the embodiment, Figure 17 The light transmission pattern TP is shown. Figure 16 Embodiments of different embodiments.

[0255] Reference Figure 16 and Figure 17 , the first reflective film RFL1 can be extended to surround the side surfaces of the conductive layer E1, the first semiconductor layer SEM1, the active layer MQW, and the second semiconductor layer SEM2. For example, a portion of the first reflective film RFL1 can be arranged on the lower surface of the conductive layer E1, and another portion of the first reflective film RFL1 extending from the portion can be arranged on the side surface of the protective film INS (as an example, the first protective film INS1). Accordingly, even if an additional reflective film (as an example, Figure 14 and Figure 15 The second reflective film RFL2) can also effectively improve the luminous efficiency of the light emitting element LE and the sub-pixel SPX including the same.

[0256] In one embodiment, the first reflective film RFL1 may include a metal with high light reflectivity and be conductive. In this case, the side surfaces of the first reflective film RFL1 are surrounded by a protective film INS, thereby ensuring insulation between the first reflective film RFL1 and the common electrode CE. For example, the protective film INS may be formed of a multilayer structure including a first insulating film INS1 surrounding the side surfaces of the conductive layer E1, the first semiconductor layer SEM1, the active layer MQW, and the second semiconductor layer SEM2, and a second insulating film INS2 surrounding the side surfaces of the first reflective film RFL1.

[0257] The groove GRV may include a light-transmitting pattern having surface roughness, or may not include a light-transmitting pattern. Figure 16 As shown, the bottom surface of the groove GRV can be substantially flat. Alternatively, as shown Figure 17As shown, the bottom surface of the groove GRV may include a light-transmitting pattern having surface roughness, and accordingly, the common electrode CE and the light scattering layer STL may include a light-transmitting pattern TP having a shape and / or surface roughness corresponding to the shape of the groove GRV.

[0258] Figure 18 It is shown in detail Figure 8 Another example of a cross-sectional view of region B. For example, Figure 18 The second semiconductor layer SEM2 is shown. Figure 11 Embodiments of different embodiments.

[0259] Reference Figure 18 , the second semiconductor layer SEM2 may not include Figure 11 The second portion SEM2B of the second semiconductor layer SEM2 may be a low-doped layer, and may include only the first portion SEM2A formed of a highly doped layer. For example, in the process of etching the second semiconductor layer SEM2 to form the groove GRV, the second portion SEM2B of the second semiconductor layer SEM2 may be completely etched, and only the protection film INS may remain in the light-emitting element LE at a height above the bottom surface of the groove GRV. As an example, a portion of the protection film INS may protrude toward the upper portion of the second semiconductor layer SEM2 and surround the groove GRV.

[0260] In this case, the groove GRV may be defined by the first portion SEM2A of the second semiconductor layer SEM2 and the protection film INS. For example, a surface of the first portion SEM2A exposed by etching the second semiconductor layer SEM2 (as an example, an upper surface of the first portion SEM2A) may form the bottom surface of the groove GRV, and a portion of the protection film INS protruding toward the upper portion of the second semiconductor layer SEM2 may define a sidewall of the groove GRV.

[0261] exist Figure 18 In the Figure 11 The present invention provides a modified embodiment of the embodiment, but the embodiment is not limited thereto. For example, at least two of the embodiments disclosed in this specification can be combined with each other. As an example, according to Figures 13 to 17 The second semiconductor layer SEM2 of the light emitting element LE of at least one embodiment of the embodiments may not include the second portion SEM2B.

[0262] Figure 19 It is shown in detail Figure 8 Another example of a cross-sectional view of region B. For example, Figure 19 The light scattering layer STL is shown. Figure 11 Embodiments of different embodiments.

[0263] Reference Figure 19The light scattering layer STL may further include wavelength conversion particles. For example, if the color or wavelength of light emitted by the light-emitting element LE arranged in the light-emitting region of a sub-pixel SPX differs from the color or wavelength of light intended to be emitted from that sub-pixel SPX, the light scattering layer STL arranged in that sub-pixel SPX may further include wavelength conversion particles. As an example, the light scattering layer STL of the first sub-pixel SPX1 may further include first wavelength conversion particles WCP1, and the light scattering layer STL of the second sub-pixel SPX2 may further include second wavelength conversion particles WCP2.

[0264] In one embodiment, the light scattering layer STL of the third subpixel SPX3 may not include wavelength conversion particles. As an example, when the light emitting element LE of the third subpixel SPX3 emits light of a desired color or wavelength (for example, blue light) emitted from the third subpixel SPX3, the light scattering layer STL of the third subpixel SPX3 may not include wavelength conversion particles.

[0265] In one embodiment, to improve the light diffusion efficiency and / or light conversion efficiency of the light scattering layer STL, the amount of light scatterers SCT and / or wavelength conversion particles included in the light scattering layer STL can be increased. As an example, the volume of the light scattering layer STL filled in the groove GRV (or the light-emitting element LE) can be increased by increasing at least one of the area and height of the groove GRV (or the light-emitting element LE). Accordingly, the amount of light scatterers SCT and / or wavelength conversion particles included in the light scattering layer STL can be increased.

[0266] Figure 20 is shown with Figure 5 Another example of a cross-sectional view of a display panel corresponding to line I1-I1' is shown. For example, Figure 20 Shown include Figure 5 An embodiment of the display panel 100 includes the pixel electrodes PXE1, PXE2, PXE3 and the light emitting element LE, but does not include the first light conversion layer QDL1, the second light conversion layer QDL2 and the light transmitting layer TPL.

[0267] Reference Figure 20 The light scattering layer STL of at least one sub-pixel SPX may include wavelength conversion particles. As an example, the light scattering layer STL of the first sub-pixel SPX1 may include first wavelength conversion particles WCP1, and the light scattering layer STL of the second sub-pixel SPX2 may include second wavelength conversion particles WCP2.

[0268] An additional light conversion layer may not be disposed on the upper portion of the light emitting element layer including the light emitting element LE and the light scattering layer STL of the sub-pixel SPX. As an example, when appropriate light conversion efficiency can be obtained through the light scattering layer STL of the first sub-pixel SPX1 and the second sub-pixel SPX2, the fifth organic film 213 may be formed directly on the first cover layer CAP1, and the color filters CF1, CF2, CF3 and the sixth organic film 214 may be disposed on the fifth organic film 213.

[0269] Or, as Figure 8 and Figure 19 In the embodiment, even if the wavelength conversion particles WCP1 and WCP2 are included in the light scattering layer STL disposed in at least one sub-pixel SPX, the first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL may be disposed on the light-emitting element layer. For example, considering the light efficiency or color purity of the sub-pixel SPX, the first light conversion layer QDL1, the second light conversion layer QDL2, and / or the light-transmitting layer TPL may be selectively disposed on the light-emitting element layer.

[0270] Figures 21 to 30 is a cross-sectional view showing a method for manufacturing a display device according to an embodiment. For example, Figures 21 to 30 Sequentially shows the method for manufacturing according to Figure 8 1 and 2. The manufacturing steps of the display panel 100 of the embodiment are shown in FIG.

[0271] According to other embodiments of the display panel 100 (as an example, according to Figure 9 、 Figure 10 as well as Figure 20 The method for manufacturing the display panel 100 of at least one embodiment of the present invention may be substantially the same as that according to the embodiment of the present invention. Figure 8 The manufacturing method of the display panel 100 of the embodiment is the same or similar. Figure 8 Compared with the display panel 100 of the embodiment, in the case of manufacturing the display panel 100 including additional elements, layers or patterns, a process for forming the additional elements, layers or patterns may be additionally performed.

[0272] Reference Figure 8 and Figure 21First, a thin-film transistor layer TFTL including a substrate SUB and a thin-film transistor TFT1 can be formed, and pixel electrodes PXE1, PXE2, and PXE3 can be formed on the thin-film transistor layer TFTL. For example, a substrate SUB can be provided, and then the thin-film transistor layer TFTL can be formed based on the substrate SUB. The step of forming the thin-film transistor layer TFTL can include forming circuit components (for example, the thin-film transistor TFT1 and the capacitor C1 including the first capacitor electrode CAE1 and the second capacitor electrode CAE2) and wiring on the substrate SUB.

[0273] Once the thin-film transistor layer TFTL is formed, respective pixel electrodes can be formed in each sub-pixel region. For example, a first pixel electrode PXE1, a second pixel electrode PXE2, and a third pixel electrode PXE3 can be formed in the first sub-pixel region for forming the first sub-pixel SPX1, the second sub-pixel region for forming the second sub-pixel SPX2, and the third sub-pixel region for forming the third sub-pixel SPX3, respectively. Pixel electrodes PXE1, PXE2, and PXE3 can be formed by, for example, forming a single-layer or multi-layer conductive film containing at least one conductive substance and etching the conductive film.

[0274] Reference Figure 8 and Figure 22 , a light-emitting element LE may be arranged on the pixel electrodes PXE1, PXE2, and PXE3. As an example, a light-emitting element LE including a first semiconductor layer SEM1, an active layer MQW, and a second semiconductor layer SEM2 may be provided, and then the light-emitting element LE may be arranged on the pixel electrodes PXE1, PXE2, and PXE3 with the second semiconductor layer SEM2 facing upward.

[0275] In one embodiment, the light emitting element LE may be Figures 11 to 19 The light emitting element LE of at least one embodiment of the embodiment of the present invention can be provided. As an example, the light emitting element LE can include a bonding electrode BDE arranged at the lower portion of the body portion CBD. In this case, the light emitting element LE can be bonded to the pixel electrodes PXE1, PXE2, and PXE3 by applying the bonding electrode BDE.

[0276] In one embodiment, the light-emitting element LE may be provided and arranged on the pixel electrodes PXE1, PXE2, and PXE3 without including the groove GRV. As an example, the second semiconductor layer SEM2 of each light-emitting element LE may include a first portion SEM2A and a second portion SEM2B sequentially arranged on the active layer MQW. The doping concentration of the first portion SEM2A of the second semiconductor layer SEM2 may be higher than the doping concentration of the second portion SEM2B of the second semiconductor layer SEM2.

[0277] Reference Figure 8 and Figure 23 , a polymer layer 190 may be formed on the thin film transistor layer TFTL. For example, the polymer layer 190 may be formed on the thin film transistor layer TFTL by coating a polymer around the periphery of the light emitting element LE.

[0278] In one embodiment, the polymer layer 190 may be formed to a height substantially equal to or similar to that of the light-emitting element LE, thereby covering the side surfaces of the light-emitting element LE, but the present invention is not limited thereto. Forming the polymer layer 190 protects the thin film transistor layer TFTL during subsequent processes (for example, an etching process for forming the groove GRV in the light-emitting element LE).

[0279] Reference Figure 8 and Figure 24 The groove GRV may be formed in the light emitting element LE by etching the light emitting element LE. As an example, the groove GRV may be formed in each light emitting element LE by etching the second semiconductor layer SEM2 of each light emitting element LE to expose the first portion SEM2A of the second semiconductor layer SEM2.

[0280] In one embodiment, by utilizing the difference in etching selectivity between the second semiconductor layer SEM2 and the protective film INS, only the second semiconductor layer SEM2 can be selectively etched to a depth greater than a predetermined depth within the second semiconductor layer SEM2 and the protective film INS. As an example, the groove GRV can be formed in the second semiconductor layer SEM2 by etching the second semiconductor layer SEM2 to a depth greater than or equal to the thickness of the second portion SEM2B of the second semiconductor layer SEM2, thereby appropriately exposing the first portion SEM2A of the second semiconductor layer SEM2. During the etching of the second semiconductor layer SEM2, the second portion SEM2B of the second semiconductor layer SEM2 can partially remain around the protective film INS or be completely removed. During the etching of the second semiconductor layer SEM2, the polymer layer 190 can also be etched, thereby reducing the height of the polymer layer 190.

[0281] In one embodiment, if a light-transmitting pattern is to be formed in the groove GRV, a process for forming the light-transmitting pattern may be additionally performed. For example, a texturing process may be performed to form the light-transmitting pattern on the bottom surface of the groove GRV.

[0282] Reference Figure 8 and Figure 25 , the polymer layer 190 may be removed. As an example, the polymer layer 190 may be removed by performing an ashing process or the like.

[0283] In one embodiment, the polymer layer 190 may not be formed. In this case, the Figure 23 The formation process of the polymer layer 190 is shown in FIG. Figure 25 The removal process of the polymer layer 190 is shown.

[0284] Reference Figure 8 and Figure 26 The third organic film 211 may be formed on the thin film transistor layer TFTL. For example, the third organic film 211 may be formed on the thin film transistor layer TFTL by coating an organic insulating material around the light emitting element LE.

[0285] In one embodiment, the third organic film 211 may be formed to a height lower than the height of the light emitting element LE. As an example, the third organic film 211 may be formed to a height lower than the height of the groove GRV, but is not limited thereto. For example, the height of the third organic film 211 may vary depending on the embodiment.

[0286] In one embodiment, the third organic film 211 may be formed while masking the upper portion of each light emitting element LE where the groove GRV is formed. This prevents the third organic film 211 from being filled into the groove GRV.

[0287] Reference Figure 8 and Figure 27 , a common electrode CE may be formed on the third organic film 211 and the light-emitting elements LE. As an example, the common electrode CE may be formed throughout the display area DA using a transparent conductive material such as ITO. In one embodiment, the common electrode CE may be sufficiently thin to have a surface profile that conforms to the shape of the groove GRV, and may have a cross-sectional shape corresponding to the groove GRV at the top of each light-emitting element LE. As an example, the common electrode CE may define each groove GRV together with the light-emitting element LE. The common electrode CE may be formed inside and / or above the groove GRV to contact the first portion SEM2A of the second semiconductor layer SEM2 corresponding to the highly doped layer.

[0288] Reference Figure 8 and Figure 28 , a light scattering layer STL may be formed on the common electrode CE. As an example, the grooves GRV of the light emitting elements LE may be filled with the light scattering layer STL including the light scatterers SCT.

[0289] Reference Figure 8 and Figure 29A fourth organic film 212 may be formed on the common electrode CE. For example, the fourth organic film 212 may be formed by coating an organic insulating material around the periphery of the light-emitting element LE to mitigate steps generated by the light-emitting element LE and the like. This planarizes the upper portion of the light-emitting element layer including the light-emitting element LE, the common electrode CE, and the light-scattering layer STL.

[0290] After forming the fourth organic film 212, the first capping layer CAP1 may be formed by coating an inorganic insulating material in the entire display area DA where the light emitting element LE, the common electrode CE, the light scattering layer STL, and the fourth organic film 212 are formed.

[0291] Reference Figure 8 and Figure 30 , a light-shielding layer BM, a first light conversion layer QDL1, a second light conversion layer QDL2, and a light-transmitting layer TPL, etc., can be formed on the light-emitting element layer. As an example, after forming the light-shielding layer BM on the first cover layer CAP1 using a light-shielding material, a second cover layer CAP2 can be formed using an inorganic insulating material to cover the light-shielding layer BM, etc. Thereafter, a reflective film RF can be selectively formed on the second cover layer CAP2. Thereafter, the first light conversion layer QDL1, the second light conversion layer QDL2, or the light-transmitting layer TPL can be formed in each sub-pixel region where each sub-pixel SPX is formed, and a third cover layer CAP3 covering the first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL can be formed using an inorganic insulating material.

[0292] The order of forming the light shielding layer BM, the first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL may vary depending on the embodiment. As an example, depending on the process used to form the first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL, the light shielding layer BM may be formed after the first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL are formed.

[0293] like Figure 8 As shown, in the case of manufacturing the display panel 100 further including the color filter CF, etc., a subsequent process for forming the color filter CF, etc. on the third cover layer CAP3 may be performed. As an example, the fifth organic film 213, the color filter CF, and the sixth organic film 214 may be sequentially formed on the third cover layer CAP3.

[0294] As described above, the display device 10 according to the embodiment may include: a light-emitting element LE having a groove GRV in a portion where the second semiconductor layer SEM2 is disposed; a common electrode CE disposed on the light-emitting element LE; and a light-scattering layer STL disposed on the common electrode CE and filling the groove GRV. The display device 10 and its manufacturing method according to the embodiment can appropriately scatter or diffuse light generated by the light-emitting element LE and appropriately transmit or concentrate light emitted from the light-emitting element LE toward an upper portion of the light-emitting element LE. For example, according to the embodiment, the ratio of light emitted from the light-emitting element LE that is transmitted to the first light conversion layer QDL1, the second light conversion layer QDL2, or the light-transmitting layer TPL can be increased.

[0295] Furthermore, according to the embodiment, the groove GRV is formed by etching the second semiconductor layer SEM2 , thereby reducing the distance between the active layer MQW of the light emitting element LE and the light emitting surface (for example, the bottom surface of the groove GRV). This improves the luminous efficiency of the light emitting element LE.

[0296] In some embodiments, the groove GRV of the light-emitting element LE can be formed to a depth sufficient to expose the highly doped layer of the second semiconductor layer SEM2 (as an example, sufficient to expose the first portion SEM2A of the second semiconductor layer SEM2). As an example, the bottom surface of the groove GRV of the light-emitting element LE can be located at a height corresponding to the first portion SEM2A of the second semiconductor layer SEM2 (as an example, a distance from the active layer MQW or a height relative to the active layer MQW of approximately 0.5 μm to 1.5 μm). The light-emitting element LE can contact the common electrode CE within and / or above the groove GRV. As an example, the common electrode CE can be directly disposed on the first portion SEM2A of the second semiconductor layer SEM2 on the bottom surface of the groove GRV. According to the display device 10 and the manufacturing method thereof according to the embodiments, ohmic formation between the light-emitting element LE and the common electrode CE can be improved, and contact resistance can be reduced. As a result, the driving voltage and power consumption of the display device 10 can be improved or optimized.

[0297] Figure 31 FIG. 1 is an exemplary diagram showing a smartwatch including a display device according to an embodiment. Figure 31 The display device 10_1 according to one embodiment can be applied to a smart watch 1000_1 as one of the smart devices.

[0298] Figure 32 and Figure 33 FIG. 1 is an exemplary diagram illustrating a virtual reality device including a display device according to an embodiment.

[0299] Reference Figure 32 and Figure 33According to one embodiment, a head-mounted display device 1000_2 includes a first display device 10_2, a second display device 10_3, a display device storage portion 1100, a storage portion cover 1200, a first eyepiece 1210, a second eyepiece 1220, a head-mounted strap 1300, an intermediate frame 1400, a first optical component 1510, a second optical component 1520 and a control circuit board 1600.

[0300] The first display device 10_2 provides an image to the left eye of the user, and the second display device 10_3 provides an image to the right eye of the user. Figure 1 and Figure 2 The display devices 10 described are substantially the same, and thus descriptions of the first display device 10_2 and the second display device 10_3 are omitted.

[0301] The first optical member 1510 may be disposed between the first display device 10_2 and the first eyepiece 1210. The second optical member 1520 may be disposed between the second display device 10_3 and the second eyepiece 1220. Each of the first optical member 1510 and the second optical member 1520 may include at least one convex lens.

[0302] The middle frame 1400 may be disposed between the first display device 10_2 and the control circuit board 1600 and between the second display device 10_3 and the control circuit board 1600. The middle frame 1400 supports and fixes the first and second display devices 10_2 and 10_3 and the control circuit board 1600.

[0303] The control circuit board 1600 may be disposed between the middle frame 1400 and the display device storage portion 1100. The control circuit board 1600 may be connected to the first display device 10_2 and the second display device 10_3 via a connector. The control circuit board 1600 may convert an externally input image source into digital video data and transmit the digital video data to the first display device 10_2 and the second display device 10_3 via the connector.

[0304] The control circuit board 1600 may transmit digital video data corresponding to a left-eye image optimized for the user's left eye to the first display device 10_2, and may transmit digital video data corresponding to a right-eye image optimized for the user's right eye to the second display device 10_3. Alternatively, the control circuit board 1600 may transmit the same digital video data to both the first display device 10_2 and the second display device 10_3.

[0305] The display device storage portion 1100 serves to store the first display device 10_2, the second display device 10_3, the middle frame 1400, the first optical component 1510, the second optical component 1520, and the control circuit board 1600. The storage portion cover 1200 is arranged to cover the open side of the display device storage portion 1100. The storage portion cover 1200 may include a first eyepiece 1210 for the user's left eye and a second eyepiece 1220 for the user's right eye. Figure 32 and Figure 33 2 and 3. The first eyepiece 1210 and the second eyepiece 1220 are exemplarily shown as being arranged separately, but the embodiments of the present specification are not limited thereto. The first eyepiece 1210 and the second eyepiece 1220 may be combined into one.

[0306] The first eyepiece 1210 may be aligned with the first display device 10_2 and the first optical component 1510, and the second eyepiece 1220 may be aligned with the second display device 10_3 and the second optical component 1520. Therefore, the user can view the image of the first display device 10_2 magnified into a virtual image by the first optical component 1510 through the first eyepiece 1210, and can view the image of the second display device 10_3 magnified into a virtual image by the second optical component 1520 through the second eyepiece 1220.

[0307] The headband 1300 serves to fix the display device storage unit 1100 on the user's head so that the first eyepiece 1210 and the second eyepiece 1220 of the storage unit cover 1200 remain arranged on the user's left eye and right eye respectively. When the display device storage unit 1100 is realized to be lightweight and compact, the head mounted display device 1000_2 can be equipped with Figure 34 The eyeglass frames are shown in place of the headband 1300.

[0308] The head-mounted display device 1000_2 may also be equipped with a battery for power supply, an external memory slot for storing external memory, an external connection port for receiving an image source, and a wireless communication module. The external connection port may be a universal serial bus (USB) terminal, a display interface, or a high-definition multimedia interface (HDMI) terminal. The wireless communication module may be a 5G communication module, a 4G communication module, a Wi-Fi module, or a Bluetooth module.

[0309] Figure 34 FIG. 4 is an exemplary diagram illustrating a virtual reality device including a display device according to another embodiment. Figure 34 FIG. 1 shows a virtual reality device 1000_3 to which a display device 10_4 according to an embodiment is applied.

[0310] Reference Figure 34 According to one embodiment, the virtual reality device 1000_3 may be a glasses-shaped device. The virtual reality device 1000_3 may include a display device 10_4, a left eyeglass 10a, a right eyeglass 10b, a support frame 20, eyeglass frame legs 30a and 30b, a reflective component 40, and a display device storage portion 50.

[0311] Figure 34 exemplarily shows that the virtual reality device 1000_3 is a glasses-type display device including glasses frame legs 30a, 30b. That is, the virtual reality device 1000_3 according to one embodiment is not limited to Figure 34 The virtual reality device shown in can be applied to various electronic devices other than these in various forms.

[0312] The display device storage portion 50 may include a display device 10_4 and a reflective component 40. The image displayed on the display device 10_4 may be reflected by the reflective component 40 and provided to the user's right eye through the right eye lens 10b. Thus, the user may view the virtual reality image displayed on the display device 10_4 through the right eye.

[0313] Figure 34 , the display device storage portion 50 is shown as being arranged at the right end of the support frame 20, but the embodiments of this specification are not limited thereto. For example, the display device storage portion 50 can be arranged at the left end of the support frame 20. In this case, the image displayed on the display device 10_4 can be reflected by the reflective component 40 and provided to the user's left eye through the left eye lens 10a. As a result, the user can view the virtual reality image displayed on the display device 10_4 through the left eye. Alternatively, the display device storage portion 50 can be arranged at both the left and right ends of the support frame 20. In this case, the user can view the virtual reality image displayed on the display device 10_4 through both the left eye and the right eye.

[0314] Figure 35 FIG. 1 is an exemplary diagram illustrating a vehicle instrument panel and a center instrument panel including a display device according to an embodiment. Figure 35 2 shows a car to which display devices 10_a, 10_b, 10_c, 10_d, 10_e according to an embodiment are applied.

[0315] Reference Figure 35The display devices 10_a, 10_b, and 10_c according to one embodiment can be applied to a vehicle dashboard, a center fascia, or a center information display (CID) arranged on a vehicle dashboard. Furthermore, the display devices 10_d and 10_e according to one embodiment can be applied to a room mirror display that replaces a vehicle's side mirrors.

[0316] Figure 36 FIG. 1 is an exemplary diagram illustrating a transparent display device including a display device according to an embodiment.

[0317] Reference Figure 36 The display device 10_5 according to one embodiment can be applied to a transparent display device. A transparent display device can transmit light while displaying an image IM. Therefore, a user in front of the transparent display device can not only view the image IM displayed on the display device 10_5, but also see objects RS or the background behind the transparent display device. When the display device 10_5 is applied to a transparent display device, the substrate of the display device 10_5 can include a light-transmitting portion or be formed of a light-transmitting material.

[0318] While the embodiments of the present invention have been described above with reference to the accompanying drawings, it will be understood by those skilled in the art that the present invention may be implemented in other specific forms without changing the technical concept or essential features of the present invention. Therefore, it should be understood that the embodiments described above are illustrative in all respects and are not restrictive.

Claims

1. A display device, comprising: pixel electrode; a light emitting element comprising a first semiconductor layer, an active layer, and a second semiconductor layer sequentially arranged on the pixel electrode, and comprising a groove in a portion where the second semiconductor layer is arranged; a common electrode, arranged on the light-emitting element; as well as A light scattering layer is disposed on the common electrode and filled in the groove.

2. The display device according to claim 1, wherein The second semiconductor layer includes a first portion including a bottom surface of the trench and a second portion on the first portion, the first portion having a doping concentration higher than a doping concentration of the second portion.

3. The display device according to claim 2, wherein: The common electrode contacts the first portion of the second semiconductor layer.

4. The display device according to claim 2, wherein The second portion of the second semiconductor layer includes a portion of a sidewall of the trench.

5. The display device according to claim 1, wherein The light emitting element further includes a protective film surrounding the side surfaces of the first semiconductor layer, the active layer, and the second semiconductor layer. Part of the protection film protrudes above the height of the second semiconductor layer and surrounds the groove. The display device according to claim 1 , wherein: The groove is formed at a position spaced 0.5 μm or more from the active layer.

7. The display device according to claim 6, wherein: The bottom surface of the groove is located at a height of 0.5 μm to 1.5 μm with respect to the upper surface of the active layer.

8. The display device according to claim 1, wherein The common electrode has a shape corresponding to the groove, A portion of the common electrode is disposed inside the groove.

9. The display device according to claim 8, wherein The bottom surface of the groove includes a textured pattern, The common electrode and the light scattering layer include a light-transmitting pattern having a shape corresponding to a shape of the texture pattern on a bottom surface of the groove.

10. The display device according to claim 1, wherein The light emitting element further includes a first reflective film disposed under the first semiconductor layer.

11. The display device according to claim 10, wherein: The first reflective film includes metal.

12. The display device according to claim 10, wherein: A portion of the first reflective film surrounds side surfaces of the first semiconductor layer, the active layer, and the second semiconductor layer.

13. The display device according to claim 10, wherein: The light emitting element further includes a second reflective film surrounding side surfaces of the first semiconductor layer, the active layer, and the second semiconductor layer.

14. The display device according to claim 13, wherein: The second reflective film includes a distributed Bragg reflector.

15. The display device according to claim 1, wherein The light scattering layer includes a light scatterer.

16. The display device according to claim 15, wherein The light scattering layer further includes wavelength conversion particles.

17. The display device according to claim 1, further comprising: The light conversion layer is disposed on the light emitting element and the light scattering layer and includes wavelength conversion particles.

18. A method for manufacturing a display device, comprising the following steps: forming a thin film transistor layer including a substrate and a thin film transistor, and forming a pixel electrode on the thin film transistor layer; providing a light-emitting element including a first semiconductor layer, an active layer, and a second semiconductor layer, and arranging the light-emitting element on the pixel electrode in such a manner that the second semiconductor layer faces upward; etching the second semiconductor layer to form a groove in the light emitting element; forming a common electrode on the light emitting element; as well as A light scattering layer filling the groove is formed on the common electrode.

19. The method for manufacturing a display device according to claim 18, wherein: The second semiconductor layer of the light emitting element includes: a first portion, disposed on the active layer and having a first doping concentration; a second portion disposed on the first portion and having a second doping concentration lower than the first doping concentration, In the step of forming the groove of the light emitting element, the second semiconductor layer is etched to expose the first portion.

20. The method for manufacturing a display device according to claim 19, wherein: The common electrode is formed to contact the first portion of the second semiconductor layer.

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