Display panel, preparation method thereof and display device

Abstract

The invention relates to the technical field of display, and particularly provides a display panel, a preparation method thereof and a display device.The display panel is provided with a first display area and a second display area, and the preparation method of the display panel comprises the steps that a pixel definition material layer and an isolation material layer are prepared on one side of an array substrate in sequence; the isolation material layers located in the first display area and the second display area are subjected to graphical processing to form an isolation structure, and the isolation structure is provided with a first opening formed in the first display area and a second opening formed in the second display area; the pixel definition material layers located in the first display area and the second display area are subjected to graphical processing to form pixel openings, and when one of the isolation material layer and the pixel definition material layer located in the first display area and the isolation material layer and the pixel definition material layer located in the second display area is etched, the pixel openings are formed in the isolation material layer and the pixel definition material layer. And the used etching pattern can cover the other one. The display panel is used for improving the processing property of the display panel.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and more specifically, relates to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) display technology is considered the most promising new display technology for the next generation. Compared with liquid crystal display technology, OLED display technology has advantages such as low energy consumption, low cost, self-luminescence, wide viewing angle, and fast response speed.

[0003] In the traditional OLED display panel manufacturing process, the patterning of luminous pixels is usually achieved through a fine metal mask (FMM). FMM technology is mature and has rich experience in mass production. However, FMM technology also has problems such as limited precision and high development costs. The fine metal mask-free technology eliminates the limitations of traditional OLED processes on display size, resolution, and other screen performance, and has the advantages of high performance, full-area size, and agile delivery. Patents CN118251982A, CN115666161A, CN116648095A, CN117062489A, CN118678742A, CN118785761A, CN115224220A, CN118678729A, CN118660529A, and CN118660589A record the relevant content of the fine metal mask-free technology for reference.

[0004] However, the process performance of current OLED display products needs to be improved. Summary of the Invention

[0005] The present application provides a display panel and a manufacturing method thereof, and a display device, so as to improve the process performance of the display panel at least to a certain extent.

[0006] To achieve the above-mentioned objectives, the technical solution adopted by the present application is as follows: In a first aspect, the present application provides a method for manufacturing a display panel, wherein the display panel has a first display area and a second display area, and the manufacturing method comprises:

[0007] A pixel definition material layer and an isolation material layer are successively prepared on one side of the array substrate, wherein the pixel definition material layer and the isolation material layer are both located in the first display area and the second display area;

[0008] Patterning the isolation material layer located in the first display area and the isolation material layer located in the second display area to form an isolation structure, wherein the isolation structure is provided with a first opening opened in the first display area and a second opening opened in the second display area, and when etching one of the isolation material layer located in the first display area and the isolation material layer located in the second display area, the etching pattern used can cover the other;

[0009] performing patterning on the pixel definition material layer located in the first display area and the pixel definition material layer located in the second display area to form a first pixel opening communicating with the first opening and a second pixel opening communicating with the second opening, respectively, so that when etching one of the pixel definition material layer located in the first display area and the pixel definition material layer located in the second display area, the etching pattern used can cover the other;

[0010] preparing light-emitting elements in the first opening and the second opening;

[0011] In which, along a direction parallel to the plane where the array substrate is located, the first openings and the second openings are arranged at intervals, and the distribution density of the first openings in the first display area is greater than the distribution density of the second openings in the second display area.

[0012] In the method for preparing the display panel provided in the embodiment of the present application, the first opening and the second opening and the first pixel opening and the second pixel opening can be processed separately by graphically processing the pixel definition material layer and the isolation material layer respectively located in the first display area and the second display area, thereby reducing the influence of the etching process on the isolation material layers respectively located in the first display area and the second display area and having different isolation opening densities, and improving the opening accuracy of the prepared first opening and second opening and the first pixel opening and the second pixel opening by step etching, and ultimately making the respectively prepared first opening and second opening and the first pixel opening and the second pixel opening meet the design requirements and will not cause damage to other film layers, and ultimately achieving the effect of improving the process performance and processing yield of the display panel.

[0013] Optionally, the step of patterning the isolation material layer located in the first display area and the isolation material layer located in the second display area to form an isolation structure, wherein the isolation structure is provided with a first opening opened in the first display area and a second opening opened in the second display area, and patterning the pixel definition material layer located in the first display area and the pixel definition material layer located in the second display area to form a first pixel opening connected to the first opening and a second pixel opening connected to the second opening, respectively, comprises:

[0014] forming a first etched pattern on a side of the isolation material layer facing away from the array substrate, the first etched pattern having a first etched opening exposing a portion of the surface of the isolation material layer, and an orthographic projection of the second display area on the array substrate being located within the orthographic projection of the first etched pattern on the array substrate;

[0015] Etching the isolation material layer through the first etching opening to form the first opening;

[0016] forming a second etched pattern on a side of the pixel definition material layer facing away from the array substrate, the second etched pattern having a second etched opening exposing a portion of the surface of the pixel definition material layer, wherein an orthographic projection of the second display area on the array substrate is located within the orthographic projection of the second etched pattern on the array substrate;

[0017] etching the pixel definition material layer through the second etching opening to form a first pixel opening;

[0018] forming a third etched pattern on a side of the isolation material layer facing away from the array substrate, the third etched pattern having a third etched opening exposing a portion of the surface of the isolation material layer, wherein the orthographic projection of the first display area on the array substrate is located within the orthographic projection of the third etched pattern on the array substrate;

[0019] Etching the isolation material layer through the third etching opening to form the second opening;

[0020] forming a fourth etched pattern on a side of the pixel definition material layer facing away from the array substrate, the fourth etched pattern having a fourth etched opening exposing a portion of the surface of the pixel definition material layer, wherein an orthographic projection of the first display area on the array substrate is located within the orthographic projection of the fourth etched pattern on the array substrate;

[0021] Etching the pixel definition material layer through the fourth etching opening to form a second pixel opening;

[0022] In which, the first pixel opening is arranged correspondingly to and connected with the first opening, and the orthographic projection of the first pixel opening on the array substrate is located within the orthographic projection of the first opening on the array substrate; the second pixel opening is arranged correspondingly to and connected with the second opening, and the orthographic projection of the second pixel opening on the array substrate is located within the orthographic projection of the second opening on the array substrate.

[0023] Optionally, the step of patterning the isolation material layer located in the first display area and the isolation material layer located in the second display area to form an isolation structure, wherein the isolation structure is provided with a first opening opened in the first display area and a second opening opened in the second display area, includes:

[0024] forming a third etched pattern on a side of the isolation material layer facing away from the array substrate, the third etched pattern having a third etched opening exposing a portion of the surface of the isolation material layer, wherein the orthographic projection of the first display area on the array substrate is located within the orthographic projection of the third etched pattern on the array substrate;

[0025] Etching the isolation material layer through the third etching opening to form the second opening;

[0026] forming a fourth etched pattern on a side of the pixel definition material layer facing away from the array substrate, the fourth etched pattern having a fourth etched opening exposing a portion of the surface of the pixel definition material layer, wherein an orthographic projection of the first display area on the array substrate is located within the orthographic projection of the fourth etched pattern on the array substrate;

[0027] Etching the pixel definition material layer through the fourth etching opening to form a second pixel opening;

[0028] forming a first etched pattern on a side of the isolation material layer facing away from the array substrate, the first etched pattern having a first etched opening exposing a portion of the surface of the isolation material layer, and an orthographic projection of the second display area on the array substrate being located within the orthographic projection of the first etched pattern on the array substrate;

[0029] Etching the isolation material layer through the first etching opening to form the first opening;

[0030] forming a second etched pattern on a side of the pixel definition material layer facing away from the array substrate, the second etched pattern having a second etched opening exposing a portion of the surface of the pixel definition material layer, wherein an orthographic projection of the second display area on the array substrate is located within the orthographic projection of the second etched pattern on the array substrate;

[0031] etching the pixel definition material layer through the second etching opening to form a first pixel opening;

[0032] In which, the first pixel opening is arranged correspondingly to and connected with the first opening, and the orthographic projection of the first pixel opening on the array substrate is located within the orthographic projection of the first opening on the array substrate; the second pixel opening is arranged correspondingly to and connected with the second opening, and the orthographic projection of the second pixel opening on the array substrate is located within the orthographic projection of the second opening on the array substrate.

[0033] Optionally, the isolation material layer is in contact with a side of the pixel definition material layer facing away from the array substrate;

[0034] The step of forming a first etching pattern on a side of the isolation material layer facing away from the array substrate, wherein the first etching pattern has a first etching opening exposing a portion of the surface of the isolation material layer, comprises:

[0035] forming a photoresist layer on a side of the isolation material layer facing away from the array substrate;

[0036] The photoresist layer is exposed and developed to form the first etching opening exposing a portion of the surface of the isolation material layer.

[0037] Optionally, the step of forming a second etched pattern on a side of the pixel definition material layer facing away from the array substrate, wherein the second etched pattern has a second etched opening exposing a portion of the surface of the pixel definition material layer, comprises:

[0038] forming a photoresist layer on a side of the pixel definition material layer facing away from the array substrate;

[0039] The photoresist layer is exposed and developed to form a second etching opening exposing a portion of the surface of the pixel definition material layer.

[0040] Optionally, the step of forming a third etched pattern on a side of the isolation material layer facing away from the array substrate, wherein the third etched pattern has a third etched opening exposing a portion of the surface of the isolation material layer, comprises:

[0041] forming a photoresist layer on a side of the isolation material layer facing away from the array substrate;

[0042] The photoresist layer is exposed and developed to form the third etching opening exposing a portion of the surface of the isolation material layer.

[0043] Optionally, the step of forming a fourth etched pattern on a side of the pixel definition material layer facing away from the array substrate, wherein the fourth etched pattern has a fourth etched opening exposing a portion of the surface of the pixel definition material layer, comprises:

[0044] forming a photoresist layer on a side of the pixel definition material layer facing away from the array substrate;

[0045] The photoresist layer is exposed and developed to form the fourth etching opening exposing a portion of the surface of the pixel definition material layer.

[0046] Optionally, the preparation method further comprises preparing an encapsulation layer covering the isolation structure on a side of the light-emitting element facing away from the array substrate.

[0047] In a second aspect, the present application provides a display panel, produced by the above-described production method. The display panel comprises a first display area and a second display area; the display panel further comprises an array substrate and an isolation structure, the isolation structure being located on one side of the array substrate and enclosing a plurality of isolation openings, the isolation openings comprising a first opening located in the first display area and a second opening located in the second display area; wherein the distribution density of the first openings in the first display area is greater than the distribution density of the second openings in the second display area, and the transmittance of the first display area is less than the transmittance of the second display area.

[0048] In the display panel provided in the embodiment of the present application, by setting the display panel to have a first display area and a second display area, and the isolation structure to have a first opening and a second opening both for accommodating light-emitting elements, by controlling the distribution density of the first openings in the first display area to be greater than the distribution density of the second openings in the second display area, the transmittance of the second display area can be effectively improved while both the first display area and the second display area have display functions, so that the second display area can be used to realize transparent display or under-screen recognition functions, etc., thereby improving the process performance of the display panel.

[0049] Optionally, along the direction of the plane where the array substrate is located, the distance between two adjacent first openings is a first distance, the distance between two adjacent second openings is a second distance, and the first distance is smaller than the second distance.

[0050] Optionally, the isolation structure includes a first isolation portion and a second isolation portion arranged in a stacked manner, the second isolation portion is located on a side of the first isolation portion facing away from the array substrate, and the first isolation portion and the second isolation portion enclose the isolation opening;

[0051] The orthographic projection of the first isolation portion on the array substrate is located within the orthographic projection of the second isolation portion on the array substrate.

[0052] Optionally, the first isolation portion includes a first isolation sub-portion and a second isolation sub-portion, and the second isolation sub-portion is located on a side of the first isolation sub-portion facing away from the array substrate;

[0053] The orthographic projection of the second isolating sub-portion on the array substrate is located within the orthographic projection of the first isolating sub-portion on the array substrate.

[0054] Optionally, an orthographic projection of one end of the second isolating sub-portion close to the second isolating sub-portion on the array substrate is located within an orthographic projection of one end of the second isolating sub-portion close to the first isolating sub-portion on the array substrate.

[0055] Optionally, the material of the first isolating sub-portion includes molybdenum.

[0056] Optionally, the material of the second insulating sub-part includes aluminum.

[0057] Optionally, the material of the second isolation portion includes titanium.

[0058] Optionally, the display panel further includes a display module, which is located on a side of the array substrate facing the isolation structure and includes a plurality of light-emitting elements, and the light-emitting elements are located in corresponding isolation openings.

[0059] Optionally, the light-emitting element includes a first electrode, a light-emitting functional layer and a second electrode that are stacked.

[0060] Optionally, the second electrode overlaps a side wall of the isolation structure facing the isolation opening.

[0061] Optionally, the display panel further includes a pixel definition layer, the pixel definition layer is located between the array substrate and the isolation structure and has pixel openings, the pixel openings including a first pixel opening opened in the first display area and a second pixel opening opened in the second display area;

[0062] In which, the first pixel opening is arranged correspondingly to and connected with the first opening, and the orthographic projection of the first pixel opening on the array substrate is located within the orthographic projection of the first opening on the array substrate; the second pixel opening is arranged correspondingly to and connected with the second opening, and the orthographic projection of the second pixel opening on the array substrate is located within the orthographic projection of the second opening on the array substrate.

[0063] Optionally, the material of the pixel definition layer includes an inorganic material.

[0064] Optionally, the first electrode is located between the array substrate and the pixel definition layer, at least a portion of the surface of the first electrode on the side facing away from the array substrate is exposed through the pixel opening, the light-emitting functional layer covers the pixel opening and is in contact with the first electrode, and the second electrode covers the surface of the light-emitting functional layer on the side facing away from the array substrate.

[0065] Optionally, the display panel further includes an encapsulation layer, the encapsulation layer includes a plurality of encapsulation units arranged corresponding to the isolation openings, and the encapsulation units include:

[0066] a first packaging portion, located in the isolation opening and covering a side of the light-emitting element facing away from the array substrate;

[0067] The second packaging portion is connected to the first packaging portion and is at least partially located on a side of the isolation structure facing away from the array substrate.

[0068] Optionally, along a direction perpendicular to the plane where the array substrate is located, a gap exists between the second packaging portion and a surface of the isolation structure on a side facing away from the array substrate.

[0069] Optionally, the material of the encapsulation layer includes an inorganic material.

[0070] Optionally, the ratio of the orthographic projection area of ​​the first pixel opening on the array substrate to the orthographic projection area of ​​the first opening on the array substrate is the same as the ratio of the orthographic projection area of ​​the second pixel opening on the array substrate to the orthographic projection area of ​​the second opening on the array substrate.

[0071] Optionally, in a direction perpendicular to the plane where the array substrate is located, an orthographic projection size of the first opening on the array substrate is greater than or equal to an orthographic projection size of the second opening on the array substrate.

[0072] Optionally, the isolation structure encloses a plurality of light-transmitting openings, and at least some of the light-transmitting openings are located in the second display area.

[0073] Optionally, at least a portion of the first display area is disposed around the second display area.

[0074] In a third aspect, the present application further provides a display device, comprising any one of the display panels described above, or comprising the display panel prepared by any one of the preparation methods described above.

[0075] The display device provided in the embodiment of the present application includes the above-mentioned display panel and / or the method for preparing the display panel. Therefore, the display device includes at least the beneficial effects of any one or more of the above-mentioned display panels. The specific effects are described above and will not be repeated here.

[0076] The display panel, preparation method thereof, and display device provided in the present application have the following beneficial effects: compared with the related art, the display panel provided in the present application has a first display area and a second display area, wherein by controlling the distribution density of the first openings of the isolation structure in the first display area to be greater than the distribution density of the second openings in the second display area, the transmittance of the first display area and the second display area can be adjusted, and the first display area and the second display area have different transmittances and the transmittance of the first display area is less than the transmittance of the second display area, thereby improving the process performance of the display panel; the preparation method of the display panel provided in the present application can realize the processing and preparation of the first opening and the second opening on the isolation structure by etching the portions of the isolation material layer located in the first display area and the second display area respectively. BRIEF DESCRIPTION OF THE DRAWINGS

[0077] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application and should not be regarded as limiting the scope. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0078] Figure 1 A schematic diagram of the planar structure of a display panel provided in an embodiment of the present application;

[0079] Figure 2 for Figure 1 The shown panel shows an enlarged view of the structure of the S region;

[0080] Figure 3 for Figure 2 A schematic diagram of a partial structure of an AA-section of the display panel shown;

[0081] Figure 4 for Figure 3 A magnified view of the structure of area B in the middle;

[0082] Figure 5 A flow chart of a method for manufacturing a display panel provided in an embodiment of the present application;

[0083] Figures 6A-6K A schematic diagram of a process for manufacturing a display panel according to an embodiment of the present application;

[0084] Figure 7 A schematic structural diagram of a display device provided in an embodiment of the present application.

[0085] Among them, the reference numerals in the figures are:

[0086] 100, display device; 10, display panel; 110, first display area; 120, second display area;

[0087] 1. Array substrate; 2. Isolation structure; 201. Isolation opening; 2011. First opening; 2012. Second opening; 202. Light-transmitting opening; 21. First isolation portion; 211. First isolation sub-portion; 212. Second isolation sub-portion; 22. Second isolation portion; 2'. Isolation material layer; 3. Light-emitting element; 31. First electrode; 32. Light-emitting functional layer; 33. Second electrode; 4. Pixel definition layer; 401. Pixel opening; 4011. First pixel opening; 4012. Second pixel opening; 4'. Pixel definition material layer; 5. Encapsulation unit; 51. First encapsulation portion; 52. Second encapsulation portion; 6. First etching pattern; 601. First etching opening; 7. Second etching pattern; 701. Second etching opening; 8. Third etching pattern; 801. Third etching opening; 9. Fourth etching pattern; 901. Fourth etching opening. DETAILED DESCRIPTION

[0088] In order to make the purpose, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Generally, the components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations.

[0089] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for protection, but merely represents selected embodiments of the present application. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments in the present application without making any creative efforts shall fall within the scope of protection of the present application.

[0090] It should be noted that similar reference numerals and letters represent similar items in the following figures. Therefore, once an item is defined in one figure, it does not need to be further defined or explained in subsequent figures. It should be noted that different features in the embodiments of the present application can be combined with each other without conflict.

[0091] For ease of understanding, the drawings show mutually orthogonal X-axis, Y-axis, and Z-axis. The direction along the X-axis is referred to as the X-direction, the direction along the Y-axis is referred to as the Y-direction, and the direction along the Z-axis is referred to as the Z-direction. The Z-direction is the normal direction relative to the plane containing the X-direction and the Y-direction. In addition, the situation where various elements are viewed parallel to the plane containing the X-direction and the Y-direction is referred to as a top view. Alternatively, the planes in the X-direction and the Y-direction are parallel to the display surface of the display panel, and the Z-direction is parallel to the thickness direction of the display panel.

[0092] For certain elements, terms such as "upper" or "above" are sometimes used to describe the position of an element in the Z direction, while "lower" or "below" is used to describe the position of an element in the opposite direction. Furthermore, when terms such as "upper," "above," "lower," "below," and "relatively" are used to define the relative position of two elements, this includes not only states where the two elements are directly in contact, but also states where they are separated by a gap or other elements. Furthermore, when a first feature is "above," "above," or "above" a second feature, it can mean that the first feature is directly above or diagonally above the second feature, or simply means that the first feature is higher in level than the second feature. When a first feature is "below," "below," or "below" a second feature, it can mean that the first feature is directly below or diagonally below the second feature, or simply means that the first feature is lower in level than the second feature. Furthermore, terms such as "first," "second," and "third" are used solely to distinguish descriptions and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features being referred to. Therefore, features designated "first" or "second" may explicitly or implicitly include one or more of these features. In the description of the present application, “plurality” means two or more, unless otherwise clearly defined.

[0093] It should be noted that when an element is referred to as being “fixed on” or “disposed on” another element, it may be directly on the other element or indirectly on the other element. When an element is referred to as being “connected to” another element, it may be directly connected to the other element or indirectly connected to the other element.

[0094] In this application, unless otherwise specified or limited, the terms "installed," "connected," "connect," "fixed," etc. should be understood in a broad sense. For example, they can refer to fixed connection, detachable connection, or integration; mechanical connection, electrical connection, or communication; direct connection or indirect connection through an intermediate medium; internal communication between two elements or interaction between two elements, unless otherwise specified. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.

[0095] In this application, unless otherwise expressly specified or limited, when a first feature is "above" or "below" a second feature, it may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Furthermore, when a first feature is "above," "above," or "above" a second feature, it may mean that the first feature is directly above or diagonally above the second feature, or simply means that the first feature is at a higher level than the second feature. When a first feature is "below," "below," or "below" a second feature, it may mean that the first feature is directly below or diagonally below the second feature, or simply means that the first feature is at a lower level than the second feature.

[0096] The term "layer" as used herein may refer to a partial material layer corresponding to a material having a certain thickness. A layer may extend along a complete underlying structure or an overlying structure, or may have a range smaller than the range of the underlying or overlying structure. In addition, a layer may be a region of a homogeneous or inhomogeneous continuous structure, the thickness of which is less than the thickness of the continuous structure. For example, a layer may be located between the top surface and the bottom surface of the continuous structure or between any pairs of transverse planes at the top surface and the bottom surface. A layer may extend laterally, vertically and / or along a tapered surface. An array substrate may be a layer, may include one or more layers therein, and / or may have one or more layers located thereon, above it and / or below it. A layer may include multiple layers. For example, an interconnect layer may include one or more conductors and a contact layer (in which contacts, interconnect lines and / or vias are formed) and one or more dielectric layers.

[0097] In the related art, the display panel can be an organic light emitting diode display panel (Organic Light Emitting Diode, referred to as OLED) or a quantum dot electroluminescent display panel (Quantum Dot Light Emitting Diodes, referred to as QLED). An isolation structure is provided in the display panel, which can be used to separate some functional film layers in adjacent light emitting elements (also referred to as light emitting devices) to ensure that adjacent light emitting elements do not interfere with each other, which helps to improve the display effect of the display panel. However, it is found in the related art that a display panel with two different display areas is more prone to light emitting element failure in one of the display areas, which in turn causes a dark spot problem in the display panel, affecting the yield of the display panel to a certain extent, and ultimately affecting the process performance of the display panel. Through research, the inventors found that the reason why the light emitting element located in the corresponding display area fails is that the electrode used by the light emitting element to connect to the corresponding pixel circuit is etched and damaged, which in turn causes the corresponding light emitting element to fail.

[0098] Based on this, the embodiments of the present application provide a display panel 10 and a manufacturing method thereof, and a display device 100 to alleviate or improve the above technical problems at least to a certain extent.

[0099] See also Figure 1-Figure 3 The embodiment of the present application provides a display panel 10, which has a first display area 110 and a second display area 120. The first display area 110 and the second display area 120 are arranged adjacent to each other and both have a certain degree of light transmittance. Figure 1 and Figure 2 , at least a portion of the first display area 110 is disposed around the second display area 120. The display panel 10 can be manufactured by the manufacturing method described below.

[0100] Specifically, the first display area 110 and the second display area 120 can have various shapes. Figure 1 and Figure 2 , the first display area 110 is arranged around the second display area 120. At this time, the first display area 110 is a rectangular or rounded rectangular structure, and the second display area 120 is a circle.

[0101] In other similar embodiments, the first display area 110 may also be a circular structure. Similarly, the second display area 120 may be a circular, square, oval, bar, or other different structures.

[0102] It should be noted that the embodiment of the present application does not limit the distribution position and size of the second display area 120 , and its actual position and size can be adaptively adjusted according to the application scenario of the display panel 10 .

[0103] In this embodiment, the light transmittance of the first display area 110 is lower than the light transmittance of the second display area 120 .

[0104] By setting the second display area 120 to have a relatively high light transmittance, the display panel 10 can implement a transparent display or an under-screen recognition function through the second display area 120. For example, the display panel 10 can implement various functions such as under-screen video recording and under-screen image acquisition (such as infrared sensing and fingerprint recognition) through the second display area 120.

[0105] Taking the display panel 10 as an example of realizing under-screen photography through the second display area 120, the second display area 120 can be called the UDC (Under Display Camera) area. This area is usually located at the top of the display panel 10 and has a high light transmittance to meet the light input requirements of the camera module located under the screen in the shooting state. At the same time, in the non-shooting state, it is integrated with the surrounding first display area 110 and is used together to realize picture display.

[0106] In order to achieve the above functions without affecting the normal display function of the display panel 10, please refer to Figure 3 The display panel 10 includes an array substrate 1 and an isolation structure 2 located on one side of the array substrate 1. The isolation structure 2 encloses a plurality of isolation openings 201. The isolation openings 201 include a first opening 2011 located in the first display area 110 and a second opening 2012 located in the second display area 120. The distribution density of the first openings 2011 in the first display area 110 is greater than the distribution density of the second openings 2012 in the second display area 120. The transmittance of the first display area 110 is less than the transmittance of the second display area 120.

[0107] See also Figure 2 The isolation structure 2 encloses and forms a plurality of light-transmitting openings 202 , and at least some of the light-transmitting openings 202 are located in the second display area 120 .

[0108] The second display area 120 can achieve better light transmission function through the light-transmitting opening 202 .

[0109] In actual design, the size and distribution density of the light-transmitting openings 202 can be flexibly adjusted according to light transmission requirements to meet the light input requirement of the second display area 120. This embodiment does not limit the specific shape, size, and distribution density of the light-transmitting openings 202. Figure 2 The shape, size and distribution density of the light-transmitting openings 202 shown in FIG. 2 are for illustration only.

[0110] Of course, the relative distribution positions between the light-transmitting openings 202 and the isolation openings 201 can also be adaptively adjusted according to design requirements, which is not limited in this embodiment.

[0111] The display panel 10 also includes a display module, which is located on the side of the array substrate 1 facing the isolation structure 2 and includes a plurality of light-emitting elements 3. The light-emitting elements 3 are located within corresponding isolation openings 201. The isolation structure 2 can limit the light-emitting elements 3 through the isolation openings 201, thereby freeing the manufacturing process of the light-emitting elements 3 from the limitations of fine mask plates, helping to reduce the distance between two adjacent light-emitting elements 3, and thus helping to increase the pixel arrangement density of the display panel 10.

[0112] In this embodiment, in order to take into account both the pixel arrangement density and the light transmittance of the display panel 10, by controlling the distribution density of the first openings 2011 in the first display area 110 to be greater than the distribution density of the second openings 2012 in the second display area 120, the light transmittance of the second display area 120 can be effectively improved while both the first display area 110 and the second display area 120 have display functions, so that the second display area 120 can be used to realize transparent display or under-screen recognition functions, thereby improving the process performance of the display panel 10.

[0113] Along the direction of the plane where the array substrate 1 is located, the distance between two adjacent first openings 2011 is defined as a first distance d1, and the distance between two adjacent second openings 2012 is defined as a second distance d2.

[0114] In the examples of this application, please refer to Figure 2 , the first spacing d1 is smaller than the second spacing d2. In this case, the distribution density of the first openings 2011 in the first display area 110 is greater than the distribution density of the second openings 2012 in the second display area 120. This can also be considered as the distribution density of the light-emitting elements 3 in the first display area 110 being greater than the distribution density of the light-emitting elements 3 in the second display area 120. This allows the second display area 120 to have higher light transmittance than the first display area 110.

[0115] In the display panel 10 provided in the embodiment of the present application, the opening sizes of the first opening 2011 and the second opening 2012 may be the same or different. Figure 3 In the figure, the opening size of the first opening 2011 is consistent with the opening size of the second opening 2012, that is, the orthographic projection size of the first opening 2011 on the array substrate 1 is the same as the orthographic projection size of the second opening 2012 on the array substrate 1.

[0116] In other similar embodiments, the opening size of the first opening 2011 may be larger than the opening size of the second opening 2012. That is, the orthographic projection size of the first opening 2011 on the array substrate 1 is larger than the orthographic projection size of the second opening 2012 on the array substrate 1. In this case, the orthographic projection size of the light-emitting element 3 located within the first opening 2011 on the array substrate 1 is also larger than the orthographic projection size of the light-emitting element 3 located within the second opening 2012 on the array substrate 1. This structure can make the overall size of the light-emitting element 3 located within the first display area 110 larger than the overall size of the light-emitting element 3 located within the second display area 120, thereby further increasing the transmittance difference between the first display area 110 and the second display area 120.

[0117] This embodiment does not limit the opening sizes of the first opening 2011 and the second opening 2012 . The structure of the display panel 10 is further described below by taking the case where the first opening 2011 and the second opening 2012 have the same opening sizes as an example.

[0118] See also Figure 3 The display panel 10 further includes a pixel definition layer 4 located between the array substrate 1 and the isolation structure 2 . The pixel definition layer 4 has a pixel opening 401 and is distributed in the first display area 110 and the second display area 120 .

[0119] The pixel definition layer 4 includes an inorganic material and can be used to prevent moisture formed in the film layer such as the array substrate 1 from corroding the light-emitting devices located on the side of the pixel definition layer 4 facing away from the array substrate 1 , thereby helping to improve the reliability of the display panel 10 .

[0120] Specifically, the pixel opening 401 includes a first pixel opening 4011 opened in the first display area 110 and a second pixel opening 4012 opened in the second display area 120 . The first pixel opening 4011 is correspondingly arranged and connected to the first opening 2011 , and the second pixel opening 4012 is correspondingly arranged and connected to the second opening 2012 .

[0121] See also Figure 3 The orthographic projection of the first pixel opening 4011 on the array substrate 1 is located within the orthographic projection of the first opening 2011 on the array substrate 1 , and the orthographic projection of the second pixel opening 4012 on the array substrate 1 is located within the orthographic projection of the second opening 2012 on the array substrate 1 .

[0122] It should be noted that the aperture ratio refers to the ratio of the light-emitting area of ​​the display panel 10 to the entire pixel area. In this embodiment, it can be understood as the ratio of the orthographic projection of the pixel opening 401 on the array substrate 1 to the orthographic projection of the corresponding isolation opening 201 on the array substrate 1.

[0123] In some embodiments, the aperture ratio of the first display area 110 is the same as the aperture ratio of the second display area 120. At this time, the ratio of the orthographic projection area of ​​the first pixel opening 4011 on the array substrate 1 to the orthographic projection area of ​​the first opening 2011 on the array substrate 1 is the same as the ratio of the orthographic projection area of ​​the second pixel opening 4012 on the array substrate 1 to the orthographic projection area of ​​the second opening 2012 on the array substrate 1, thereby ensuring that the first display area 110 and the second display area 120 of the display panel 10 have high display consistency, so as to minimize the possibility of display defects such as uneven display brightness and color shift in different areas of the display panel 10.

[0124] See also Figure 3 and Figure 4 The display panel 10 provided in the embodiment of the present application also includes an encapsulation layer for encapsulating the light-emitting element 3, wherein the light-emitting element 3 is arranged correspondingly in the isolation opening 201, and the encapsulation layer includes a plurality of encapsulation units 5 arranged corresponding to the isolation opening 201, and the encapsulation unit 5 is partially located in the isolation opening 201 for encapsulating the light-emitting element 3.

[0125] In order to achieve the isolation of the relevant film layers and make the packaging unit 5 have a better packaging effect, in the direction perpendicular to the plane where the array substrate 1 is located,

[0126] The overall cross-sectional shape of the isolation structure 2 formed between two adjacent isolation openings 201 is similar to a rectangular or trapezoidal structure, or its cross-sectional shape can also be "wide at the top and narrow at the bottom", that is, an inverted trapezoid.

[0127] The isolation structure 2 can be a single-layer structure or a multi-layer structure.

[0128] In some embodiments, the isolation structure 2 is a stacked structure, including a first isolation portion 21 and a second isolation portion 22 arranged in a stacked manner, wherein the second isolation portion 22 is located on the side of the first isolation portion 21 facing away from the array substrate 1, and the first isolation portion 21 and the second isolation portion 22 enclose to form an isolation opening 201.

[0129] See also Figure 3 , the orthographic projection of the first isolation portion 21 on the array substrate 1 is located within the orthographic projection of the second isolation portion 22 on the array substrate 1 .

[0130] Specifically, the first isolating portion 21 can be a single-layer structure or a multi-layer structure. When the first isolating portion 21 is a multi-layer structure, it includes a first isolating sub-portion 211 and a second isolating sub-portion 212 stacked together. The second isolating sub-portion 212 is located on the side of the first isolating sub-portion 211 facing away from the array substrate 1. The orthographic projection of the second isolating sub-portion 212 on the array substrate 1 is located within the orthographic projection of the first isolating sub-portion 211 on the array substrate 1.

[0131] At this time, the isolation structure 2 can form an undercut structure in which the portion near the array substrate 1 is contracted toward the center compared to the portion away from the array substrate 1. This undercut structure can cause the film layer constituting the light-emitting element 3 to be cut at this location during the manufacturing process of the display panel 10, thereby making the film layers within the two adjacent isolation openings 201 constitute independent film layers, allowing each different light-emitting element 3 to be independently controlled. Furthermore, the isolation structure 2 can also eliminate the need for a mask during the manufacturing of the film layers constituting the light-emitting element 3 in the display panel 10, thereby helping to reduce manufacturing costs.

[0132] In some embodiments, the second isolating sub-portion 212 located between the first isolating sub-portion 211 and the second isolating sub-portion 22 is a rectangular or trapezoidal structure.

[0133] Specifically, the second isolating sub-portion 212 is a trapezoidal structure. The orthographic projection of the end of the second isolating sub-portion 212 close to the second isolating portion 22 on the array substrate 1 is located within the orthographic projection of the end of the second isolating sub-portion 212 close to the first isolating sub-portion 211 on the array substrate 1.

[0134] The side wall of the second isolating sub-portion 212 close to the isolation opening 201 is offset in a direction away from the middle of the isolation opening 201 relative to the side wall of the second isolating sub-portion 22 and the first isolating sub-portion 211 close to the isolation opening 201, so as to further form a bottom cut structure between the second isolating sub-portion 212 and the second isolating portion 22.

[0135] Of course, in other similar embodiments, the shape of the isolation structure 2 can also be adaptively adjusted according to processing requirements.

[0136] It should be noted that the material of the isolation structure 2 includes a conductive material, so that the light emitting elements 3 in adjacent isolation openings 201 can be electrically connected through the isolation structure 2 , thereby facilitating independent control of different light emitting elements 3 in the display panel 10 .

[0137] Specifically, the material of the second isolation portion 22 includes titanium, which is a titanium metal layer; the material of the second isolation sub-portion 212 includes aluminum, which is an aluminum metal layer; and the material of the first isolation sub-portion 211 includes molybdenum, which is a molybdenum metal layer.

[0138] See also Figure 3 The light-emitting element 3 arranged corresponding to the isolation opening 201 is a stacked structure, including a first electrode 31, a light-emitting functional layer 32 and a second electrode 33 arranged in a stacked manner. The second electrode 33 overlaps the side wall of the isolation structure 2 facing the isolation opening 201, that is, overlaps the first isolation portion 21 of the isolation structure 2.

[0139] Specifically, during actual processing, the second electrode 33 overlaps the first isolation sub-portion 211 of the first isolation portion 21 .

[0140] The luminescent functional layer 32 can be made of organic small molecule luminescent materials, complex luminescent materials, or polymers. Different luminescent functional layers 32 can be used to emit light of different colors. Generally, there are three luminescent functional layers 32, each for emitting red, green, and blue light, respectively.

[0141] One or more of the three different light emitting elements 3 can be arranged in different isolation openings 201 according to design requirements. In a direction parallel to the plane of the array substrate 1, at least two adjacent light emitting elements 3 have different emission wavelengths.

[0142] See also Figure 3The first electrode 31 in the light-emitting element 3 is located between the array substrate 1 and the pixel definition layer 4. At least part of the surface of the first electrode 31 facing away from the array substrate 1 is exposed through the pixel opening 401. The light-emitting functional layer 32 covers the pixel opening 401 and contacts the first electrode 31. The second electrode 33 covers the surface of the light-emitting functional layer 32 facing away from the array substrate 1 and overlaps with the side wall of the isolation structure 2 facing the isolation opening 201 to achieve electrical connection.

[0143] In some embodiments, one of the first electrode 31 and the second electrode 33 is an anode, and the other is a cathode.

[0144] Specifically, the first electrode 31 is an anode, and the second electrode 33 is a cathode. Of course, the first electrode 31 can be adjusted to be a cathode, and the second electrode 33 can be adjusted to be an anode as needed.

[0145] See also Figure 3 and Figure 4 The packaging unit 5 includes a first packaging part 51 and a second packaging part 52 connected to each other. The first packaging part 51 is located in the isolation opening 201 and covers the side of the light-emitting element 3 facing away from the array substrate 1; at least a part of the second packaging part 52 is located on the side of the isolation structure 2 facing away from the array substrate 1.

[0146] Along the direction perpendicular to the plane of the array substrate 1 , there is a gap between the second packaging portion 52 and the surface of the isolation structure 2 facing away from the array substrate 1 , so that the end of the second packaging portion 52 away from the first packaging portion 51 is suspended relative to the isolation structure 2 .

[0147] Specifically, the material of the encapsulation layer includes inorganic materials.

[0148] In other similar embodiments, the display panel 10 further includes a second encapsulation layer and a third encapsulation layer covering the encapsulation layer and the isolation structure 2, see Figure 3 and Figure 4 .

[0149] Specifically, the second encapsulation layer is partially located on a side of the encapsulation layer facing away from the array substrate 1. At least a portion of the second encapsulation layer is located within the isolation opening 201 to fill the isolation opening 201. The surface of the second encapsulation layer facing away from the array substrate 1 is a flat surface. Furthermore, a portion of the second encapsulation layer is located between the second encapsulation portion 52 and the isolation opening 201 to fill the gap formed therebetween.

[0150] Specifically, the material of the second encapsulation layer includes organic polymer (such as polyimide, acrylic resin, etc.).

[0151] The second encapsulation layer made of an organic material can be produced using techniques such as IJP (Ink Jet Printing). A portion of the second encapsulation layer can flow into the isolation opening 201, thereby improving the flatness of the display panel 10 by filling the isolation opening 201 and providing some protection for the underlying film layers.

[0152] The third packaging layer is located on a side of the second packaging layer facing away from the array substrate 1 .

[0153] Specifically, the material of the third encapsulation layer may be the same as that of the encapsulation layer, for example, may be made of an inorganic material.

[0154] The surface of the third encapsulation layer is relatively flat, which is helpful for further preparation of other film layers on the surface, such as a cover plate.

[0155] It can be understood that the display panel 10 provided in the embodiment of the present application has a first display area 110 and a second display area 120, wherein by controlling the distribution density of the first openings 2011 of the isolation structure 2 in the first display area 110 to be greater than the distribution density of the second openings 2012 in the second display area 120, the transmittance of the first display area 110 and the second display area 120 can be adjusted, and the first display area 110 and the second display area 120 have different transmittances and the transmittance of the first display area 110 is less than the transmittance of the second display area 120, thereby improving the process performance of the display panel 10.

[0156] Based on the same inventive concept, an embodiment of the present application further provides a method for manufacturing a display panel 10 . The display panel 10 manufactured by the method has a first display area 110 and a second display area 120 .

[0157] Preparation method please refer to Figure 5 ,include:

[0158] Step S1: sequentially preparing a pixel definition material layer 4' and an isolation material layer 2' on one side of the array substrate 1, wherein the pixel definition material layer 4' and the isolation material layer 2' are both located in the first display area 110 and the second display area 120;

[0159] Step S2: Patterning the isolation material layer 2' located in the first display area 110 and the isolation material layer 2' located in the second display area 120 to form an isolation structure 2. When etching one of the isolation material layer 2' located in the first display area 110 and the isolation material layer 2' located in the second display area 120, the etching pattern used can cover the other. The isolation structure 2 is provided with a first opening 2011 opened in the first display area 110 and a second opening 2012 opened in the second display area 120, and the first openings 2011 are densely distributed in the first display area 110. The pixel definition material layer 4' in the first display area 110 and the pixel definition material layer 4' in the second display area 120 are patterned to form a first pixel opening 4011 communicating with the first opening 2011 and a second pixel opening 4012 communicating with the second opening 2012, respectively. When etching one of the pixel definition material layer 4' in the first display area 110 and the pixel definition material layer 4' in the second display area 120, the etching pattern used can cover the other.

[0160] Step S3, preparing a light-emitting element 3 in the first opening 2011 and the second opening 2012;

[0161] In which, along a direction parallel to the plane where the array substrate 1 is located, the first openings 2011 and the second openings 2012 are arranged at intervals.

[0162] In the preparation method of the display panel 10 provided in the embodiment of the present application, the first opening 2011 and the second opening 2012 can be processed separately by sequentially performing graphic processing on the isolation material layer 2' and the pixel definition material layer 4' respectively located in the first display area 110 and the second display area 120, thereby reducing the influence of the etching process on the isolation material layer 2' respectively located in the first display area 110 and the second display area 120 and having different isolation opening 201 densities, and improving the opening accuracy of the prepared first opening 2011 and the second opening 2012 by step-by-step etching, and ultimately making the opening sizes and depths of the respectively prepared first opening 2011, the second opening 2012 and the first pixel opening 4011 and the second pixel opening 4012 meet the design requirements and will not cause damage to other film layers, thereby ultimately achieving the effect of improving the process performance and processing yield of the display panel 10.

[0163] Compared with the related art, the present solution etches the first display area and the second display area in stages, and when etching the first display area, the second display area is covered and protected by the etching pattern, and when etching the second display area, the first display area is covered and protected by the etching pattern, thereby effectively avoiding the defect of over-etching of the relevant film layers (such as the first electrode 31) of the light-emitting elements located in different display areas due to the inconsistent etching rates in different areas.

[0164] Taking the first electrode 31 as an example, the preparation method provided in this embodiment can protect the first electrode 31 located in the first display area 110 and the second display area 120 from being damaged during the etching process of the isolation material layer 2' and the pixel definition material layer 4', thereby avoiding the possibility of failure of the light-emitting element 3 due to damage to the first electrode 31, thereby improving the reliability and yield of the prepared display panel 10, and achieving the purpose of improving the process performance of the display panel 10.

[0165] Before preparing the isolation material layer 2 , a pixel definition material layer 4 ′ may be prepared on one side of the array substrate 1 .

[0166] Specifically, before the step of preparing the isolation material layer 2' on one side of the array substrate 1, the following steps are further included:

[0167] A plurality of first electrodes 31 are formed on one side of the array substrate 1 ;

[0168] A pixel definition material layer 4 ′ is prepared on one side of the array substrate 1 , and an isolation material layer 2 ′ is located on the side of the pixel definition material layer 4 ′ facing away from the array substrate 1 .

[0169] Specifically, a first electrode 31 for constituting the light-emitting element 3 is further provided between the pixel definition material layer 4' and the array substrate 1. The pixel definition material layer 4' covers a surface of the first electrode 31 facing away from the array substrate 1, and an orthographic projection of the first electrode 31 on the array substrate 1 is located within an orthographic projection of the pixel definition material layer 4' on the array substrate 1.

[0170] After the pixel definition material layer 4 ′ is prepared, an isolation material layer 2 ′ located on the side of the pixel definition material layer 4 ′ facing away from the array substrate 1 can be prepared.

[0171] In the embodiment of the present application, the isolation material layer 2' is a laminated structure. Figure 6A .

[0172] After the isolation material layer 2' is prepared, step S2 is performed to perform patterning on different areas of the isolation material layer 2' and the pixel definition material layer 4' in turn to obtain an isolation structure 2 with a first opening 2011 and a second opening 2012 and a pixel definition layer 4 with a first pixel opening 4011 and a second pixel opening 4012.

[0173] In this embodiment, when the isolation material layer 2' located in the first display area 110 is patterned, the isolation material layer 2' or the isolation opening 201 located in the second display area 120 can be effectively protected to prevent the isolation material layer 2' or the isolation opening 201 located in the second display area 120 from being damaged by etching; similarly, when the isolation material layer 2' located in the second display area 120 is patterned and etched, the isolation material layer 2' or the isolation opening 201 located in the first display area 110 can be effectively protected to prevent the isolation material layer 2' or the isolation opening 201 located in the first display area 110 from being damaged by etching. Compared with the preparation method of etching the first display area 110 and the second display area 120 at the same time, the step-by-step etching can not only better protect the isolation opening 201 and the pixel definition layer 4 and the first electrode 31 located below the isolation opening 201, but also enable the first opening 2011 and the second opening 2012 finally prepared to better meet the design requirements, thereby effectively improving the process performance of the display panel 10, and reducing the possibility of display abnormality failure of the display panel 10 due to damage to the isolation structure 2, the pixel definition layer 4 and the first electrode 31, further improving the processing yield and reliability of the display panel 10.

[0174] In some embodiments, the first display area 110 of the display panel 10 may be etched first, and then the second display area 120 of the display panel 10 may be etched. In this case, step S2 includes:

[0175] Step S21: forming a first etching pattern 6 on the side of the isolation material layer 2' facing away from the array substrate 1, see Figure 6B The first etched pattern 6 has a first etched opening 601 exposing a portion of the surface of the isolation material layer 2 ′, and the orthographic projection of the second display area 120 on the array substrate 1 is located within the orthographic projection of the first etched pattern 6 on the array substrate 1;

[0176] Step S22: Etching the isolation material layer 2' through the first etching opening 601 to form a first opening 2011, see Figure 6C ;

[0177] Step S23: forming a second etching pattern 7 on the side of the pixel definition material layer 4' facing away from the array substrate 1, see Figure 6D The second etched pattern 7 has a second etched opening 701 that exposes a portion of the surface of the pixel definition material layer 4 ′, and the orthographic projection of the second display area 120 on the array substrate 1 is located within the orthographic projection of the second etched pattern 7 on the array substrate 1;

[0178] Step S24: Etching the pixel definition material layer 4' through the second etching opening 701 to form a first pixel opening 4011, see Figure 6E ;

[0179] Step S25: forming a third etching pattern 8 on the side of the isolation material layer 2' facing away from the array substrate 1, see Figure 6F The third etched pattern 8 has a third etched opening 801 exposing a portion of the surface of the isolation material layer 2 ′, and the orthographic projection of the first display area 110 on the array substrate 1 is located within the orthographic projection of the third etched pattern 8 on the array substrate 1 ;

[0180] Step S26: Etch the isolation material layer 2' through the third etching opening 801 to form a second opening 2012, see Figure 6G ;

[0181] Step S27: forming a fourth etching pattern 9 on the side of the pixel definition material layer 4' facing away from the array substrate 1, see Figure 6H The fourth etched pattern 9 has a fourth etched opening 901 exposing a portion of the surface of the pixel definition material layer 4 ′, and the orthographic projection of the first display area 110 on the array substrate 1 is located within the orthographic projection of the fourth etched pattern 9 on the array substrate 1;

[0182] Step S28: Etching the pixel definition material layer 4' through the fourth etching opening 901 to form a second pixel opening 4012, see Figure 6I .

[0183] The first pixel opening 4011 prepared in step S24 is arranged correspondingly to and connected with the first opening 2011, and the orthographic projection of the first pixel opening 4011 on the array substrate 1 is located within the orthographic projection of the first opening 2011 on the array substrate 1; the second pixel opening 4012 prepared in step S28 is arranged correspondingly to and connected with the second opening 2012, and the orthographic projection of the second pixel opening 4012 on the array substrate 1 is located within the orthographic projection of the second opening 2012 on the array substrate 1.

[0184] The first etching pattern 6 , the second etching pattern 7 , the third etching pattern 8 and the fourth etching pattern 9 can all be prepared by exposing and developing a photoresist layer.

[0185] Specifically, the preparation process of the first etching pattern 6 is as follows:

[0186] A photoresist layer is formed on the side of the isolation material layer 2' facing away from the array substrate. The photoresist layer is exposed and developed to form a first etching opening 601 that exposes a portion of the surface of the isolation material layer 2' facing away from the array substrate 1. The photoresist layer having the first etching opening 601 constitutes the aforementioned first etching pattern 6. The orthographic projection of the first etching pattern 6 on the array substrate 1 overlaps the orthographic projection of the second display area 120 on the array substrate 1. Furthermore, the first etching opening 601 for etching is formed within the first display area 110. This facilitates etching of the isolation material layer 2' within the first display area 110 through the first etching opening 601, resulting in a first opening 2011 in the first display area 110.

[0187] Similarly, the preparation process of the second etching pattern 7 is as follows:

[0188] A photoresist layer is formed on the side of the pixel definition material layer 4' facing away from the array substrate 1. The photoresist layer is exposed and developed to form a second etching opening 701 that exposes a portion of the surface of the pixel definition material layer 4' facing away from the array substrate 1. The photoresist layer having the second etching opening 701 constitutes the aforementioned second etching pattern 7. The orthographic projection of the second etching pattern 7 on the array substrate 1 covers the orthographic projection of the second display area 120 on the array substrate 1. It also covers a portion of the first opening 2011, forming the second etching opening 701 for etching. This facilitates etching of the pixel definition material layer 4' located within the first display area 110 through the second etching opening 701, thereby forming a first pixel opening 4011 in the first display area 110. At this point, the surface of the first electrode 31 located in the first display area 110 facing away from the array substrate 1 can be exposed through the first pixel opening 4011.

[0189] Similarly, the preparation process of the third etched pattern 8 is as follows:

[0190] A photoresist layer is formed on the side of the isolation material layer 2' facing away from the array substrate, and the photoresist layer is exposed and developed to form a third etched opening 801 that exposes a portion of the surface of the isolation material layer 2' facing away from the array substrate 1. The photoresist layer having the third etched opening 801 constitutes the aforementioned third etched pattern 8. The orthographic projection of the third etched pattern 8 on the array substrate 1 covers the orthographic projection of the first display area 110 on the array substrate 1. Furthermore, the third etched opening 801 is formed in the second display area 120 for etching. This facilitates etching of the isolation material layer 2' in the second display area 120 through the third etched opening 801, resulting in a second opening 2012 in the second display area 120.

[0191] Similarly, the preparation process of the fourth etched pattern 9 is as follows:

[0192] A photoresist layer is formed on the side of the pixel definition material layer 4' facing away from the array substrate 1. The photoresist layer is exposed and developed to form a fourth etching opening 901 that exposes a portion of the surface of the pixel definition material layer 4' facing away from the array substrate 1. The photoresist layer having the fourth etching opening 901 constitutes the aforementioned fourth etching pattern 9. The orthographic projection of the fourth etching pattern 9 on the array substrate 1 covers the orthographic projection of the first display area 110 on the array substrate 1, while also covering a portion of the second opening 2012, thereby forming the fourth etching opening 901 for etching. This facilitates etching of the pixel definition material layer 4' located in the second display area 120 through the fourth etching opening 901, thereby forming a second pixel opening 4012 in the second display area 120. At this point, the surface of the first electrode 31 located in the second display area 120 facing away from the array substrate 1 can be exposed through the second pixel opening 4012.

[0193] It should be noted that after step S22 is completed, the first etching pattern 6 remaining on the surface of the isolation material layer 2' facing away from the array substrate 1 needs to be removed; after step S24 is completed, the second etching pattern 7 remaining on the surface of the isolation material layer 2' and the pixel definition layer 4 facing away from the array substrate 1 needs to be removed; after step S26 is completed, the third etching pattern 8 remaining on the surface of the isolation structure 2 and the pixel definition material layer 4' facing away from the array substrate 1 needs to be removed; after step S28 is completed, the fourth etching pattern 9 remaining on the surface of the isolation structure 2 and the pixel definition layer 4 facing away from the array substrate 1 needs to be removed.

[0194] Through the above step-by-step etching process, an isolation structure 2 that meets the design requirements can be obtained.

[0195] In step S3, a light emitting element 3 is prepared in the first opening 2011 and the second opening 2012, including:

[0196] Step S31 , preparing a light-emitting material layer 32 in the first opening 2011 and the second opening 2012 , wherein the light-emitting material layer 32 contacts a surface of the first electrode 31 facing away from the array substrate 1 ;

[0197] Step S32 , forming a second electrode 33 on the side of the light-emitting material layer 32 facing away from the array substrate 1 , and overlapping the second electrode 32 with the side of the isolation structure 2 facing the isolation opening 201 .

[0198] It should be noted that during the preparation process of step S3, a redundant layer composed of a light-emitting functional layer 32 and a second electrode 33 is also formed on the surface of the isolation structure 2 facing away from the array substrate 1. The redundant layer can be removed by etching in subsequent processes.

[0199] In some embodiments, the method for manufacturing the display panel 10 provided in the embodiments of the present application further includes:

[0200] Step S4: Prepare a packaging layer covering the isolation structure 2 on the side of the light emitting element 3 facing away from the array substrate 1. Figure 6K .

[0201] Specifically, the above step S4 includes:

[0202] Step S41: preparing a packaging material layer on the side of the light emitting element 3 facing away from the array substrate 1;

[0203] Step S42 : performing patterning on the packaging material layer to form a packaging layer covering the light emitting element 3 .

[0204] The above steps are described below with reference to the accompanying drawings:

[0205] After obtaining the isolation structure 2 having the first opening 2011 and the second opening 2012 and the pixel definition layer 4 having the first pixel opening 4011 and the second pixel opening 4012, step S3 can be performed. At this time, a plurality of light-emitting elements 3 confined within the first opening 2011 and the second opening 2012 can be obtained. At the same time, a redundant layer made of the same material as the partial film layer (light-emitting functional layer 32 and second electrode 33) constituting the light-emitting element 3 is also provided on the surface of the isolation structure 2 facing away from the array substrate 1. Figure 6J Then, step S41 is performed to form a packaging material layer on the surface of the light emitting element 3 facing away from the array substrate 1, and finally step S42 is performed to pattern the packaging material layer to obtain a packaging layer covering the light emitting element 3. Figure 6K The packaging layer includes packaging units 5 arranged in a one-to-one correspondence with the isolation openings 201 .

[0206] In step S42, the photoresist layer is exposed and developed to form etched vias that expose a portion of the surface of the encapsulation material layer facing away from the array substrate 1. The encapsulation material layer is then patterned by etching the vias to remove portions of the encapsulation material layer located in non-designed locations, thereby obtaining the desired encapsulation layer. In this step, the redundant layer is also etched away to facilitate subsequent processing.

[0207] It should be noted that steps S3 and S4 can be repeated at least twice, with either repeat being used to prepare light-emitting elements 3 emitting the same color and the corresponding encapsulation layer. The number of repetitions of steps S3 and S4 is the same as the number of types of light-emitting elements 3 emitting different colors. By repeating steps S3 and S4, light-emitting elements 3 emitting different colors can be sequentially prepared and encapsulated.

[0208] In other similar embodiments, the second display area 120 of the display panel 10 may be etched first, and then the first display area 110 of the display panel 10 may be etched. In this case, step S2 includes:

[0209] Step S210: forming a third etched pattern 8 on a side of the isolation material layer 2' facing away from the array substrate 1. The third etched pattern 8 has a third etched opening 801 that exposes a portion of the surface of the isolation material layer 2'. The orthographic projection of the first display area 110 on the array substrate 1 is located within the orthographic projection of the third etched pattern 8 on the array substrate 1.

[0210] Step S220 , etching the isolation material layer 2 ′ through the third etching opening 801 to form a second opening 2012 ;

[0211] Step S230: forming a fourth etched pattern 9 on a side of the pixel definition material layer 4' facing away from the array substrate 1. The fourth etched pattern 9 has a fourth etched opening 901 exposing a portion of the surface of the pixel definition material layer 4'. The orthographic projection of the first display area 110 on the array substrate 1 is located within the orthographic projection of the fourth etched pattern 9 on the array substrate 1.

[0212] Step S240 , etching the pixel definition material layer 4 ′ through the fourth etching opening 901 to form a second pixel opening 4012 ;

[0213] Step S250: forming a first etched pattern 6 on a side of the isolation material layer 2' facing away from the array substrate 1. The first etched pattern 6 has a first etched opening 601 that exposes a portion of the surface of the isolation material layer 2'. The orthographic projection of the second display area 120 on the array substrate 1 is located within the orthographic projection of the first etched pattern 6 on the array substrate 1.

[0214] Step S260 , etching the isolation material layer 2 ′ through the first etching opening 601 to form a first opening 2011 ;

[0215] Step S270: forming a second etched pattern 7 on a side of the pixel definition material layer 4' facing away from the array substrate 1. The second etched pattern 7 has a second etched opening 701 that exposes a portion of the surface of the pixel definition material layer 4'. The orthographic projection of the second display area 120 on the array substrate 1 is located within the orthographic projection of the second etched pattern 7 on the array substrate 1.

[0216] Step S280 , etching the pixel definition material layer 4 ′ through the second etching opening 701 to form a first pixel opening 4011 ;

[0217] Among them, the first pixel opening 4011 is correspondingly arranged and connected to the first opening 2011, and the orthographic projection of the first pixel opening 4011 on the array substrate 1 is located within the orthographic projection of the first opening 2011 on the array substrate 1; the second pixel opening 4012 is correspondingly arranged and connected to the second opening 2012, and the orthographic projection of the second pixel opening 4012 on the array substrate 1 is located within the orthographic projection of the second opening 2012 on the array substrate 1.

[0218] The above-described preparation method only adjusts the etching process for the first display area 110, which is performed after the etching of the second display area 120 is completed. The remaining steps are the same as above and will not be repeated here. Furthermore, the specific shapes of the first etched pattern 6, second etched pattern 7, third etched pattern 8, and fourth etched pattern 9 formed in the two different preparation sequences are only affected by the shape and size of the isolation opening 201, pixel opening 401, etc., and are not affected by the actual etching order of the first display area 110 and the second display area 120.

[0219] It can be understood that the preparation method of the display panel 10 provided in the present application can achieve the separate processing and preparation of the first opening 2011 and the second opening 2012 on the isolation structure 2 and the separate processing and preparation of the first pixel opening 4011 and the second pixel opening 4012 on the pixel definition layer 4 by etching the portions of the isolation material layer 2' and the pixel definition material layer 4' located in the first display area 110 and the second display area 120 respectively, so as to avoid the possibility of etching damage in a certain area of ​​the first electrode 31 located in the first display area 110 and the second display area 120 due to over-etching of the pixel definition layer 4, thereby improving the process performance of the display panel 10.

[0220] Based on the same inventive concept, in a third aspect, the present application embodiment further provides a display device 100, see Figure 7 The display device 100 includes any of the display panels 10 described above, or includes the display panel 10 manufactured by any of the manufacturing methods described above.

[0221] Specifically, the display device 100 further includes an image acquisition device, which is used to acquire external image information through the second display area 120. The orthographic projection of the image acquisition device on the array substrate 1 overlaps with the second display area 120.

[0222] For example, the image acquisition device may be a camera; of course, it may also include an infrared sensor, a proximity sensor, an infrared lens, a floodlight sensor, an ambient light sensor, a dot projector and other optical sensors.

[0223] The display device 100 provided in this embodiment can be a product or component with display function, such as a mobile phone, a desktop computer, a laptop computer, a tablet computer, a car display, a wearable device (such as a smart watch, a smart bracelet), etc. Since the display panel 10 in the display device 100 has the beneficial effects of any one or more of the above-mentioned display panels 10, the specific effects are referred to the specific description in the aforementioned embodiments and will not be repeated here.

[0224] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present application should be included in the scope of protection of the present application.

Claims

1. A method for preparing a display panel, characterized in that: The display panel (10) has a first display area (110) and a second display area (120), and the preparation method comprises: A pixel definition material layer (4') and an isolation material layer (2') are successively prepared on one side of an array substrate (1), wherein the pixel definition material layer (4') and the isolation material layer (2') are both located in the first display area (110) and the second display area (120); The isolation material layer (2') located in the first display area (110) and the isolation material layer (2') located in the second display area (120) are patterned to form an isolation structure (2); when etching one of the isolation material layer (2') located in the first display area (110) and the isolation material layer (2') located in the second display area (120), the etching pattern used can cover the other; and the isolation structure (2) is provided with a first opening (2011) opened in the first display area (110) and a second opening (2012) opened in the second display area (120); The pixel definition material layer (4') located in the first display area (110) and the pixel definition material layer (4') located in the second display area (120) are patterned to form a first pixel opening (4011) connected to the first opening (2011) and a second pixel opening (4012) connected to the second opening (2012), respectively; when etching one of the pixel definition material layer (4') located in the first display area (110) and the pixel definition material layer (4') located in the second display area (120), the etching pattern used can cover the other; preparing a light-emitting element (3) in the first opening (2011) and the second opening (2012); In which, along a direction parallel to the plane where the array substrate (1) is located, the first openings (2011) and the second openings (2012) are arranged at intervals, and the distribution density of the first openings (2011) in the first display area (110) is greater than the distribution density of the second openings (2012) in the second display area (120).

2. The method for manufacturing a display panel according to claim 1, wherein: The steps of respectively patterning the isolation material layer (2') located in the first display area (110) and the isolation material layer (2') located in the second display area (120) to form an isolation structure (2), wherein the isolation structure (2) is provided with a first opening (2011) opened in the first display area (110) and a second opening (2012) opened in the second display area (120), and respectively patterning the pixel definition material layer (4') located in the first display area (110) and the pixel definition material layer (4') located in the second display area (120) to form a first pixel opening (4011) connected to the first opening (2011) and a second pixel opening (4012) connected to the second opening (2012), comprise: A first etching pattern (6) is formed on a side of the isolation material layer (2') facing away from the array substrate (1), the first etching pattern (6) having a first etching opening (601) exposing a portion of the surface of the isolation material layer (2'), and an orthographic projection of the second display area (120) on the array substrate (1) is located within the orthographic projection of the first etching pattern (6) on the array substrate (1); Etching the isolation material layer (2') through the first etching opening (601) to form the first opening (2011); A second etching pattern (7) is formed on a side of the pixel definition material layer (4') facing away from the array substrate (1), the second etching pattern (7) having a second etching opening (701) exposing a portion of the surface of the pixel definition material layer (4'), and an orthographic projection of the second display area (120) on the array substrate (1) is located within the orthographic projection of the second etching pattern (7) on the array substrate (1); Etching the pixel definition material layer (4') through the second etching opening (701) to form a first pixel opening (4011); A third etched pattern (8) is formed on a side of the isolation material layer (2') facing away from the array substrate (1), the third etched pattern (8) having a third etched opening (801) exposing a portion of the surface of the isolation material layer (2'), and an orthographic projection of the first display area (110) on the array substrate (1) is located within the orthographic projection of the third etched pattern (8) on the array substrate (1); Etching the isolation material layer (2') through the third etching opening (801) to form the second opening (2012); A fourth etched pattern (9) is formed on a side of the pixel definition material layer (4') facing away from the array substrate (1), the fourth etched pattern (9) having a fourth etched opening (901) exposing a portion of the surface of the pixel definition material layer (4'), and an orthographic projection of the first display area (110) on the array substrate (1) is located within the orthographic projection of the fourth etched pattern (9) on the array substrate (1); Etching the pixel definition material layer (4') through the fourth etching opening (901) to form a second pixel opening (4012); The first pixel opening (4011) is arranged correspondingly to and communicates with the first opening (2011); the orthographic projection of the first pixel opening (4011) on the array substrate (1) is located within the orthographic projection of the first opening (2011) on the array substrate (1); the second pixel opening (4012) is arranged correspondingly to and communicates with the second opening (2012); the orthographic projection of the second pixel opening (4012) on the array substrate (1) is located within the orthographic projection of the second opening (2012) on the array substrate (1).

3. The method for manufacturing a display panel according to claim 1, wherein: The step of patterning the isolation material layer (2') located in the first display area (110) and the isolation material layer (2') located in the second display area (120) to form an isolation structure (2), wherein the isolation structure (2) is provided with a first opening (2011) opened in the first display area (110) and a second opening (2012) opened in the second display area (120), comprises: A third etched pattern (8) is formed on a side of the isolation material layer (2') facing away from the array substrate (1), the third etched pattern (8) having a third etched opening (801) exposing a portion of the surface of the isolation material layer (2'), and an orthographic projection of the first display area (110) on the array substrate (1) is located within the orthographic projection of the third etched pattern (8) on the array substrate (1); Etching the isolation material layer (2') through the third etching opening (801) to form the second opening (2012); A fourth etched pattern (9) is formed on a side of the pixel definition material layer (4') facing away from the array substrate (1), the fourth etched pattern (9) having a fourth etched opening (901) exposing a portion of the surface of the pixel definition material layer (4'), and an orthographic projection of the first display area (110) on the array substrate (1) is located within the orthographic projection of the fourth etched pattern (9) on the array substrate (1); Etching the pixel definition material layer (4') through the fourth etching opening (901) to form a second pixel opening (4012); A first etching pattern (6) is formed on a side of the isolation material layer (2') facing away from the array substrate (1), the first etching pattern (6) having a first etching opening (601) exposing a portion of the surface of the isolation material layer (2'), and an orthographic projection of the second display area (120) on the array substrate (1) is located within the orthographic projection of the first etching pattern (6) on the array substrate (1); Etching the isolation material layer (2') through the first etching opening (601) to form the first opening (2011); A second etching pattern (7) is formed on a side of the pixel definition material layer (4') facing away from the array substrate (1), the second etching pattern (7) having a second etching opening (701) exposing a portion of the surface of the pixel definition material layer (4'), and an orthographic projection of the second display area (120) on the array substrate (1) is located within the orthographic projection of the second etching pattern (7) on the array substrate (1); Etching the pixel definition material layer (4') through the second etching opening (701) to form a first pixel opening (4011); The first pixel opening (4011) is arranged correspondingly to and communicates with the first opening (2011); the orthographic projection of the first pixel opening (4011) on the array substrate (1) is located within the orthographic projection of the first opening (2011) on the array substrate (1); the second pixel opening (4012) is arranged correspondingly to and communicates with the second opening (2012); the orthographic projection of the second pixel opening (4012) on the array substrate (1) is located within the orthographic projection of the second opening (2012) on the array substrate (1).

4. The method for manufacturing a display panel according to claim 2 or 3, wherein: The isolation material layer (2') is in contact with a side of the pixel definition material layer (4') facing away from the array substrate (1); The step of forming a first etching pattern (6) on the side of the isolation material layer (2') facing away from the array substrate (1), wherein the first etching pattern (6) has a first etching opening (601) exposing a portion of the surface of the isolation material layer (2'), comprises: forming a photoresist layer on the side of the isolation material layer (2') facing away from the array substrate (1); exposing and developing the photoresist layer to form the first etching opening (601) exposing a portion of the surface of the isolation material layer (2'); And / or, the step of forming a second etching pattern (7) on a side of the pixel definition material layer (4') facing away from the array substrate (1), wherein the second etching pattern (7) has a second etching opening (701) exposing a portion of the surface of the pixel definition material layer (4'), comprises: forming a photoresist layer on the side of the pixel definition material layer (4') facing away from the array substrate (1); exposing and developing the photoresist layer to form the second etching opening (701) exposing a portion of the surface of the pixel definition material layer (4'); And / or, the step of forming a third etching pattern (8) on a side of the isolation material layer (2') facing away from the array substrate (1), wherein the third etching pattern (8) has a third etching opening (801) exposing a portion of the surface of the isolation material layer (2'), comprises: forming a photoresist layer on the side of the isolation material layer (2') facing away from the array substrate (1); exposing and developing the photoresist layer to form the third etching opening (801) exposing a portion of the surface of the isolation material layer (2'); And / or, the step of forming a fourth etching pattern (9) on a side of the pixel definition material layer (4') facing away from the array substrate (1), the fourth etching pattern (9) having a fourth etching opening (901) exposing a portion of the surface of the pixel definition material layer (4'), comprises: forming a photoresist layer on the side of the pixel definition material layer (4') facing away from the array substrate (1); The photoresist layer is exposed and developed to form the fourth etching opening (901) exposing a portion of the surface of the pixel definition material layer (4').

5. The method for manufacturing a display panel according to claim 1, wherein: The preparation method further comprises preparing a packaging layer covering the isolation structure (2) on a side of the light-emitting element (3) facing away from the array substrate (1).

6. A display panel, characterized in that: Prepared by the method for preparing a display panel according to any one of claims 1 to 5, the display panel (10) comprises a first display area (110) and a second display area (120); the display panel (10) further comprises: Array substrate (1); an isolation structure (2) located on one side of the array substrate (1), the isolation structure (2) enclosing a plurality of isolation openings (201), the isolation openings (201) comprising a first opening (2011) located in the first display area (110) and a second opening (2012) located in the second display area (120); The distribution density of the first openings (2011) in the first display area (110) is greater than the distribution density of the second openings (2012) in the second display area (120), and the transmittance of the first display area (110) is less than the transmittance of the second display area (120).

7. The display panel according to claim 6, wherein: Along the direction of the plane where the array substrate (1) is located, the spacing between two adjacent first openings (2011) is a first spacing, and the spacing between two adjacent second openings (2012) is a second spacing, and the first spacing is smaller than the second spacing.

8. The display panel according to claim 6, wherein: The isolation structure (2) comprises a first isolation portion (21) and a second isolation portion (22) arranged in a stacked manner, the second isolation portion (22) being located on a side of the first isolation portion (21) facing away from the array substrate (1), and the first isolation portion (21) and the second isolation portion (22) enclose forming the isolation opening (201); wherein the orthographic projection of the first isolation portion (21) on the array substrate (1) is located within the orthographic projection of the second isolation portion (22) on the array substrate (1); Preferably, the first isolation portion (21) comprises a first isolation sub-portion (211) and a second isolation sub-portion (212), and the second isolation sub-portion (212) is located on a side of the first isolation sub-portion (211) facing away from the array substrate (1); The orthographic projection of the second isolating sub-portion (212) on the array substrate (1) is located within the orthographic projection of the first isolating sub-portion (211) on the array substrate (1); Preferably, the orthographic projection of one end of the second isolating sub-portion (212) close to the second isolating sub-portion (22) on the array substrate (1) is located within the orthographic projection of one end of the second isolating sub-portion (212) close to the first isolating sub-portion (211) on the array substrate (1); Preferably, the material of the first isolating sub-part (211) includes molybdenum; Preferably, the material of the second isolating sub-part (212) includes aluminum; Preferably, the material of the second isolation portion (22) includes titanium.

9. The display panel according to claim 6, wherein: The display panel (10) further comprises a display module, the display module being located on a side of the array substrate (1) facing the isolation structure (2) and comprising a plurality of light-emitting elements (3), the light-emitting elements (3) being located in corresponding isolation openings (201); Preferably, the light-emitting element (3) comprises a first electrode (31), a light-emitting functional layer (32) and a second electrode (33) which are stacked; Preferably, the second electrode (33) overlaps the side wall of the isolation structure (2) facing the isolation opening (201).

10. The display panel according to claim 9, wherein: The display panel (10) further comprises a pixel definition layer (4), the pixel definition layer (4) being located between the array substrate (1) and the isolation structure (2) and having a pixel opening (401), the pixel opening (401) comprising a first pixel opening (4011) opened in the first display area (110) and a second pixel opening (4012) opened in the second display area (120); The first pixel opening (4011) is arranged correspondingly to and communicates with the first opening (2011), and the orthographic projection of the first pixel opening (4011) on the array substrate (1) is located within the orthographic projection of the first opening (2011) on the array substrate (1); the second pixel opening (4012) is arranged correspondingly to and communicates with the second opening (2012), and the orthographic projection of the second pixel opening (4012) on the array substrate (1) is located within the orthographic projection of the second opening (2012) on the array substrate (1); Preferably, the material of the pixel definition layer (4) includes an inorganic material; Preferably, the first electrode (31) is located between the array substrate (1) and the pixel definition layer (4), at least a portion of the surface of the first electrode (31) on the side facing away from the array substrate (1) is exposed through the pixel opening (401), the light-emitting functional layer (32) covers the pixel opening (401) and is in contact with the first electrode (31), and the second electrode (33) covers the surface of the light-emitting functional layer (32) on the side facing away from the array substrate (1).

11. The display panel according to claim 10, wherein: The ratio of the orthographic projection area of ​​the first pixel opening (4011) on the array substrate (1) to the orthographic projection area of ​​the first opening (2011) on the array substrate (1) is the same as the ratio of the orthographic projection area of ​​the second pixel opening (4012) on the array substrate (1) to the orthographic projection area of ​​the second opening (2012) on the array substrate (1); Preferably, in a direction perpendicular to the plane on which the array substrate (1) is located, the orthographic projection size of the first opening (2011) on the array substrate (1) is greater than or equal to the orthographic projection size of the second opening (2012) on the array substrate (1).

12. The display panel according to claim 9, wherein: The display panel (10) further comprises an encapsulation layer, the encapsulation layer comprising a plurality of encapsulation units (5) arranged corresponding to the isolation openings (201), the encapsulation units (5) comprising: A first packaging portion (51) is located in the isolation opening (201) and covers a side of the light-emitting element (3) facing away from the array substrate (1); a second packaging portion (52), connected to the first packaging portion (51) and at least partially located on a side of the isolation structure (2) facing away from the array substrate (1); Preferably, along a direction perpendicular to the plane where the array substrate (1) is located, a gap exists between the second packaging portion (52) and a surface of the isolation structure (2) on a side facing away from the array substrate (1); Preferably, the material of the encapsulation layer includes an inorganic material.

13. The display panel according to claim 6, wherein: The isolation structure (2) encloses and forms a plurality of light-transmitting openings (202), and at least some of the light-transmitting openings (202) are located in the second display area (120).

14. The display panel according to any one of claims 6 to 13, characterized in that: At least a portion of the first display area (110) is arranged around the second display area (120).

15. A display device, characterized in that: A display panel (10) comprising the preparation method according to any one of claims 1 to 5, or a display panel (10) comprising the preparation method according to any one of claims 6 to 14.

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